| /drivers/net/ethernet/marvell/octeontx2/af/ |
| D | rpm.c | 398 u64 val_lo, val_hi; in rpm_get_rx_stats() local
409 val_lo = rpm_read(rpm, 0, RPMX_MTI_STAT_RX_STAT_PAGES_COUNTERX + in rpm_get_rx_stats()
417 *rx_stat = (val_hi << 32 | val_lo); in rpm_get_rx_stats()
426 u64 val_lo, val_hi; in rpm_get_tx_stats() local
436 val_lo = rpm_read(rpm, 0, RPMX_MTI_STAT_TX_STAT_PAGES_COUNTERX + in rpm_get_tx_stats()
440 *tx_stat = (val_hi << 32 | val_lo); in rpm_get_tx_stats()
675 u64 val_lo, val_hi; in rpm_get_fec_stats() local
686 val_lo = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_VL0_CCW_LO); in rpm_get_fec_stats()
688 rsp->fec_corr_blks = (val_hi << 16 | val_lo); in rpm_get_fec_stats()
690 val_lo = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_VL0_NCCW_LO); in rpm_get_fec_stats()
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| D | rvu_npc_fs.h | 18 struct mcam_entry *entry, u64 val_lo,
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| D | rvu_npc_fs.c | 723 struct mcam_entry *entry, u64 val_lo, in npc_update_entry() argument
746 kw1 = (val_lo << shift) & field->kw_mask[i]; in npc_update_entry()
757 kw2 = shift ? val_lo >> (64 - shift) : 0; in npc_update_entry()
771 kw2 = shift ? val_lo >> (64 - shift) : 0; in npc_update_entry()
813 u64 val_lo, val_hi; in npc_update_ipv6_flow() local
827 val_lo = (u64)src_ip[2] << 32 | src_ip[3]; in npc_update_ipv6_flow()
829 npc_update_entry(rvu, NPC_SIP_IPV6, entry, val_lo, val_hi, in npc_update_ipv6_flow()
841 val_lo = (u64)dst_ip[2] << 32 | dst_ip[3]; in npc_update_ipv6_flow()
843 npc_update_entry(rvu, NPC_DIP_IPV6, entry, val_lo, val_hi, in npc_update_ipv6_flow()
919 #define NPC_WRITE_FLOW(field, member, val_lo, val_hi, mask_lo, mask_hi) \ in npc_update_flow() argument
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| /drivers/char/mwave/ |
| D | 3780i.c | 624 unsigned short val_lo, val_hi; in dsp3780I_ReadIStore() local
626 val_lo = InWordDsp(DSP_MsaDataISLow); in dsp3780I_ReadIStore()
629 if(put_user(val_lo, pusBuffer++)) in dsp3780I_ReadIStore()
636 uCount, val_lo, val_hi); in dsp3780I_ReadIStore()
673 unsigned short val_lo, val_hi; in dsp3780I_WriteIStore() local
674 if(get_user(val_lo, pusBuffer++)) in dsp3780I_WriteIStore()
679 OutWordDsp(DSP_MsaDataISLow, val_lo); in dsp3780I_WriteIStore()
685 uCount, val_lo, val_hi); in dsp3780I_WriteIStore()
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| /drivers/dma/ |
| D | fsldma.h | 208 u32 val_lo = in_le32((u32 __iomem *)addr); in fsl_ioread64() local
211 return ((u64)val_hi << 32) + val_lo; in fsl_ioread64()
223 u32 val_lo = in_be32((u32 __iomem *)addr + 1); in fsl_ioread64be() local
225 return ((u64)val_hi << 32) + val_lo; in fsl_ioread64be()
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| /drivers/media/pci/cx18/ |
| D | cx18-gpio.c | 41 u32 val_lo = cx->gpio_val & 0xffff; in gpio_write() local
47 cx18_write_reg_expect(cx, (dir_lo << 16) | val_lo, in gpio_write()
48 CX18_REG_GPIO_OUT1, val_lo, dir_lo); in gpio_write()
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| /drivers/perf/arm_cspmu/ |
| D | arm_cspmu.c | 140 u32 val_lo, val_hi; in read_reg64_hilohi() local
151 val_lo = readl(addr); in read_reg64_hilohi()
154 val = (((u64)val_hi << 32) | val_lo); in read_reg64_hilohi()
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| /drivers/edac/ |
| D | xgene_edac.c | 665 u32 val_lo; in xgene_edac_pmd_l2_check() local
673 val_lo = readl(pg_e + MEMERR_L2C_L2EALR_PAGE_OFFSET); in xgene_edac_pmd_l2_check()
677 ctx->pmd, val, val_hi, val_lo); in xgene_edac_pmd_l2_check()
725 val_lo = readl(pg_d + CPUX_L2C_L2RTOALR_PAGE_OFFSET); in xgene_edac_pmd_l2_check()
729 ctx->pmd, val, val_hi, val_lo); in xgene_edac_pmd_l2_check()
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| /drivers/net/ethernet/broadcom/bnx2x/ |
| D | bnx2x_init_ops.h | 198 static void bnx2x_wr_64(struct bnx2x *bp, u32 reg, u32 val_lo, in bnx2x_wr_64() argument
203 wb_write[0] = val_lo; in bnx2x_wr_64()
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| /drivers/firmware/broadcom/ |
| D | bcm47xx_sprom.c | 97 u16 *val_lo, u16 *val_hi, bool fallback) in NVRAM_READ_VAL()
112 *val_lo = (val & 0x0000FFFFU); in NVRAM_READ_VAL()
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