Lines Matching full:gcc
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
848 gcc: clock-controller@100000 { label
849 compatible = "qcom,gcc-msm8998";
957 clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
958 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
959 <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
960 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
961 <&gcc GCC_PCIE_0_AUX_CLK>;
964 power-domains = <&gcc PCIE_0_GDSC>;
976 clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
977 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
978 <&gcc GCC_PCIE_CLKREF_CLK>;
981 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
991 clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
1005 power-domains = <&gcc UFS_GDSC>;
1018 <&gcc GCC_UFS_AXI_CLK>,
1019 <&gcc GCC_AGGRE1_UFS_AXI_CLK>,
1020 <&gcc GCC_UFS_AHB_CLK>,
1021 <&gcc GCC_UFS_UNIPRO_CORE_CLK>,
1023 <&gcc GCC_UFS_TX_SYMBOL_0_CLK>,
1024 <&gcc GCC_UFS_RX_SYMBOL_0_CLK>,
1025 <&gcc GCC_UFS_RX_SYMBOL_1_CLK>;
1036 resets = <&gcc GCC_UFS_BCR>;
1051 <&gcc GCC_UFS_CLKREF_CLK>,
1052 <&gcc GCC_UFS_PHY_AUX_CLK>;
1098 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1099 <&gcc GCC_BIMC_MSS_Q6_AXI_CLK>,
1100 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1101 <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
1102 <&gcc GCC_MSS_SNOC_AXI_CLK>,
1103 <&gcc GCC_MSS_MNOC_BIMC_AXI_CLK>,
1112 resets = <&gcc GCC_MSS_RESTART>;
1145 <&gcc GPLL0_OUT_MAIN>;
1665 clocks = <&gcc GCC_CFG_NOC_USB3_AXI_CLK>,
1666 <&gcc GCC_USB30_MASTER_CLK>,
1667 <&gcc GCC_AGGRE1_USB3_AXI_CLK>,
1668 <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1669 <&gcc GCC_USB30_SLEEP_CLK>;
1673 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1674 <&gcc GCC_USB30_MASTER_CLK>;
1681 power-domains = <&gcc USB_30_GDSC>;
1683 resets = <&gcc GCC_USB_30_BCR>;
1707 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
1708 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1709 <&gcc GCC_USB3_CLKREF_CLK>;
1712 resets = <&gcc GCC_USB3_PHY_BCR>,
1713 <&gcc GCC_USB3PHY_PHY_BCR>;
1723 clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
1735 clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
1736 <&gcc GCC_RX1_USB2_CLKREF_CLK>;
1739 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
1754 clocks = <&gcc GCC_SDCC2_AHB_CLK>,
1755 <&gcc GCC_SDCC2_APPS_CLK>,
1765 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1778 clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
1779 <&gcc GCC_BLSP1_AHB_CLK>;
1793 clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
1794 <&gcc GCC_BLSP1_AHB_CLK>;
1808 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
1809 <&gcc GCC_BLSP1_AHB_CLK>;
1823 clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
1824 <&gcc GCC_BLSP1_AHB_CLK>;
1838 clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
1839 <&gcc GCC_BLSP1_AHB_CLK>;
1853 clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
1854 <&gcc GCC_BLSP1_AHB_CLK>;
1868 clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
1869 <&gcc GCC_BLSP1_AHB_CLK>;
1882 clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>,
1883 <&gcc GCC_BLSP2_AHB_CLK>;
1893 clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
1894 <&gcc GCC_BLSP2_AHB_CLK>;
1908 clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,
1909 <&gcc GCC_BLSP2_AHB_CLK>;
1923 clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>,
1924 <&gcc GCC_BLSP2_AHB_CLK>;
1938 clocks = <&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>,
1939 <&gcc GCC_BLSP2_AHB_CLK>;
1953 clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>,
1954 <&gcc GCC_BLSP2_AHB_CLK>;
1968 clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
1969 <&gcc GCC_BLSP2_AHB_CLK>;