230       const unsigned dispatch_width = 8 << simd;  in brw_compile_task()  local
233       brw_nir_apply_key(shader, compiler, &key->base, dispatch_width, true /* is_scalar */);  in brw_compile_task()
236       NIR_PASS(_, shader, brw_nir_lower_simd, dispatch_width);  in brw_compile_task()
244                                &prog_data->base.base, shader, dispatch_width,  in brw_compile_task()
285    g.generate_code(selected->cfg, selected->dispatch_width, selected->shader_stats,  in brw_compile_task()
538                        unsigned dispatch_width)  in brw_nir_initialize_mue()  argument
609    if (workgroup_size > dispatch_width) {  in brw_nir_initialize_mue()
731       const unsigned dispatch_width = 8 << simd;  in brw_compile_mesh()  local
740          NIR_PASS_V(shader, brw_nir_initialize_mue, &prog_data->map, dispatch_width);  in brw_compile_mesh()
742       brw_nir_apply_key(shader, compiler, &key->base, dispatch_width, true /* is_scalar */);  in brw_compile_mesh()
749       NIR_PASS(_, shader, brw_nir_lower_simd, dispatch_width);  in brw_compile_mesh()
757                                &prog_data->base.base, shader, dispatch_width,  in brw_compile_mesh()
802    g.generate_code(selected->cfg, selected->dispatch_width, selected->shader_stats,  in brw_compile_mesh()
895       for (unsigned q = 0; q < bld.dispatch_width() / 8; q++) {  in emit_urb_direct_writes()
926       for (unsigned q = 0; q < bld.dispatch_width() / 8; q++) {  in emit_urb_direct_writes()
977       for (unsigned q = 0; q < bld.dispatch_width() / 8; q++) {  in emit_urb_indirect_writes()
1086       for (unsigned q = 0; q < bld.dispatch_width() / 8; q++) {  in emit_urb_indirect_reads()