1 /* 2 * Copyright (c) 2021 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 #include "hpm_pdm_drv.h" 8 #define PDM_WORKING_CLOCK_FREQ_IN_HZ (48000UL) 9 pdm_get_default_config(PDM_Type * ptr,pdm_config_t * config)10void pdm_get_default_config(PDM_Type *ptr, pdm_config_t *config) 11 { 12 config->sof_at_ref_clk_falling_edge = true; 13 config->bypass_pdm_clk_div = false; 14 config->enable_pdm_clk_out = true; 15 config->pdm_clk_div = 3; 16 config->capture_delay = 1; 17 config->dec_after_cic = 3; 18 config->post_scale = 12; 19 config->sigma_delta_order = PDM_CIC_SIGMA_DELTA_ORDER_6; 20 config->cic_dec_ratio = 64; 21 config->enable_hpf = true; 22 } 23 pdm_init(PDM_Type * ptr,pdm_config_t * config)24hpm_stat_t pdm_init(PDM_Type *ptr, pdm_config_t *config) 25 { 26 if (pdm_is_running(ptr)) { 27 pdm_stop(ptr); 28 } 29 /* pdm_software_reset(ptr); */ 30 31 /* ptr->CTRL = PDM_CTRL_DIS_CLK_GATE_MASK; */ 32 ptr->CTRL = PDM_CTRL_SOF_FEDGE_SET(config->sof_at_ref_clk_falling_edge) 33 | PDM_CTRL_DEC_AFT_CIC_SET(config->dec_after_cic) 34 | PDM_CTRL_CAPT_DLY_SET(config->capture_delay) 35 | PDM_CTRL_PDM_CLK_HFDIV_SET(config->pdm_clk_div) 36 | PDM_CTRL_PDM_CLK_DIV_BYPASS_SET(config->bypass_pdm_clk_div) 37 | PDM_CTRL_PDM_CLK_OE_SET(config->enable_pdm_clk_out) 38 | PDM_CTRL_HPF_EN_SET(config->enable_hpf); 39 40 ptr->CH_CTRL = 0xF000FF; 41 ptr->CH_CFG = 0x50000; 42 ptr->CIC_CFG = PDM_CIC_CFG_POST_SCALE_SET(config->post_scale) 43 | PDM_CIC_CFG_SGD_SET(config->sigma_delta_order) 44 | PDM_CIC_CFG_CIC_DEC_RATIO_SET(config->cic_dec_ratio); 45 46 return status_success; 47 } 48