| /third_party/openh264/build/ |
| D | AutoBuildForWindows.bat | 4 rem AutoBuildForWindows.bat Configuration [-winsdk_version=winsdk_version] [-vc_version=vc_ver…
5 rem --For debug version:
6 rem Win32-C-Only: AutoBuildForWindows.bat Win32-Debug-C
7 rem Win32-ASM: AutoBuildForWindows.bat Win32-Debug-ASM
8 rem Win64-C-Only: AutoBuildForWindows.bat Win64-Debug-C
9 rem Win64-ASM: AutoBuildForWindows.bat Win64-Debug-ASM
10 rem ARM64-C-Only: AutoBuildForWindows.bat ARM64-Debug-C
11 rem ARM64-ASM: AutoBuildForWindows.bat ARM64-Debug-ASM
12 rem --For release version:
13 rem Win32-C-Only: AutoBuildForWindows.bat Win32-Release-C
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/ |
| D | EHStreamer.cpp | 1 //===- CodeGen/AsmPrinter/EHStreamer.cpp - Exception Directive Streamer ---===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
39 EHStreamer::EHStreamer(AsmPrinter *A) : Asm(A), MMI(Asm->MMI) {} in EHStreamer()
46 const std::vector<int> &LIds = L->TypeIds, &RIds = R->TypeIds; in sharedTypeIDs()
64 // The action table follows the call-site table in the LSDA. The individual in computeActionsTable()
74 // indicates a catch-all clause. in computeActionsTable()
87 const std::vector<unsigned> &FilterIds = Asm->MF->getFilterIds(); in computeActionsTable()
90 int Offset = -1; in computeActionsTable()
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| D | DwarfDebug.cpp | 1 //===- llvm/CodeGen/DwarfDebug.cpp - Dwarf Debug Framework ----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains support for writing dwarf debug info into asm files.
11 //===----------------------------------------------------------------------===//
91 DisableDebugInfoPrinting("disable-debug-info-print", cl::Hidden,
95 "use-dwarf-ranges-base-address-specifier", cl::Hidden,
98 static cl::opt<bool> GenerateARangeSection("generate-arange-section",
104 GenerateDwarfTypeUnits("generate-type-units", cl::Hidden,
109 "split-dwarf-cross-cu-references", cl::Hidden,
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| D | DwarfFile.cpp | 1 //===- llvm/CodeGen/DwarfFile.cpp - Dwarf Debug Framework -----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
24 : Asm(AP), Abbrevs(AbbrevAllocator), StrPool(DA, *Asm, Pref) {} in DwarfFile()
38 if (TheU->getCUNode()->isDebugDirectivesOnly()) in emitUnit()
41 MCSection *S = TheU->getSection(); in emitUnit()
47 // because they added no information beyond the non-split CU) in emitUnit()
48 if (llvm::empty(TheU->getUnitDie().values())) in emitUnit()
51 Asm->OutStreamer->SwitchSection(S); in emitUnit()
52 TheU->emitHeader(UseOffsets); in emitUnit()
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| D | AsmPrinterInlineAsm.cpp | 1 //===-- AsmPrinterInlineAsm.cpp - AsmPrinter Inline Asm Handling ----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
39 #define DEBUG_TYPE "asm-printer"
41 /// srcMgrDiagHandler - This callback is invoked when the SourceMgr for an
42 /// inline asm has an error in it. diagInfo is a pointer to the SrcMgrDiagInfo
50 unsigned BufNum = DiagInfo->SrcMgr.FindBufferContainingLoc(Diag.getLoc()); in srcMgrDiagHandler()
52 if (BufNum > 0 && BufNum <= DiagInfo->LocInfos.size()) in srcMgrDiagHandler()
53 LocInfo = DiagInfo->LocInfos[BufNum-1]; in srcMgrDiagHandler()
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| D | DwarfCFIException.cpp | 1 //===-- CodeGen/AsmPrinter/DwarfException.cpp - Dwarf Exception Impl ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains support for writing DWARF exception info into asm files.
11 //===----------------------------------------------------------------------===//
43 if (!Asm->MF->getLandingPads().empty()) { in markFunctionEnd()
44 MachineFunction *NonConstMF = const_cast<MachineFunction*>(Asm->MF); in markFunctionEnd()
45 NonConstMF->tidyLandingPads(); in markFunctionEnd()
51 Asm->OutStreamer->EmitCFIEndProc(); in endFragment()
61 /// endModule - Emit all exception information that should come after the
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| D | WinException.cpp | 1 //===-- CodeGen/AsmPrinter/WinException.cpp - Dwarf Exception Impl ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains support for writing Win64 exception info into asm files.
11 //===----------------------------------------------------------------------===//
41 // MSVC's EH tables are always composed of 32-bit words. All known 64-bit in WinException()
43 useImageRel32 = (A->getDataLayout().getPointerSizeInBits() == 64); in WinException()
44 isAArch64 = Asm->TM.getTargetTriple().isAArch64(); in WinException()
49 /// endModule - Emit all exception information that should come after the
52 auto &OS = *Asm->OutStreamer; in endModule()
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| D | DebugHandlerBase.cpp | 1 //===-- llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp -------*- C++ -*--===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
43 auto Op = DIExpr->expr_op_begin(); in extractFromMachineInstruction()
44 while (Op != DIExpr->expr_op_end()) { in extractFromMachineInstruction()
45 switch (Op->getOp()) { in extractFromMachineInstruction()
47 int Value = Op->getArg(0); in extractFromMachineInstruction()
49 if (Op != DIExpr->expr_op_end()) { in extractFromMachineInstruction()
50 switch (Op->getOp()) { in extractFromMachineInstruction()
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| D | DwarfCompileUnit.cpp | 1 //===- llvm/CodeGen/DwarfCompileUnit.cpp - Dwarf Compile Units ------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
62 if (DW->getDwarfVersion() >= 5 && Kind == UnitKind::Skeleton) in GetCompileUnitType()
73 MacroLabelBegin = Asm->createTempSymbol("cu_macro_begin"); in DwarfCompileUnit()
76 /// addLabelAddress - Add a dwarf label attribute data and value using
80 // Don't use the address pool in non-fission or in the skeleton unit itself. in addLabelAddress()
81 if ((!DD->useSplitDwarf() || !Skeleton) && DD->getDwarfVersion() < 5) in addLabelAddress()
85 DD->addArangeLabel(SymbolCU(this, Label)); in addLabelAddress()
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| D | WinCFGuard.cpp | 1 //===-- CodeGen/AsmPrinter/WinCFGuard.cpp - Control Flow Guard Impl ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // Guard, including address-taken functions, and valid longjmp targets.
12 //===----------------------------------------------------------------------===//
30 WinCFGuard::WinCFGuard(AsmPrinter *A) : AsmPrinterHandler(), Asm(A) {} in WinCFGuard()
37 if (MF->getLongjmpTargets().empty()) in endFunction()
40 // Copy the function's longjmp targets to a module-level list. in endFunction()
41 LongjmpTargets.insert(LongjmpTargets.end(), MF->getLongjmpTargets().begin(), in endFunction()
42 MF->getLongjmpTargets().end()); in endFunction()
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| /third_party/openssl/crypto/md5/ |
| D | build.info | 4 IF[{- !$disabled{asm} -}]
5 $MD5ASM_x86=md5-586.S
6 $MD5ASM_x86_64=md5-x86_64.s
7 $MD5ASM_sparcv9=md5-sparcv9.S
11 IF[$MD5ASM_{- $target{asm_arch} -}]
12 $MD5ASM=$MD5ASM_{- $target{asm_arch} -}
20 # A no-deprecated no-shared build ends up with double function definitions
23 # default provider. A no-deprecated build removes the external definition from
26 IF[{- !$disabled{dso} -}]
35 GENERATE[md5-586.S]=asm/md5-586.pl
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| /third_party/popt/tests/test3-data/ |
| D | 03.input | 2 # WARNING: NO LINE IN THIS FILE SHOULD BE LONGER THAN 999 characters!
6 # the vers no of this file. useful for debug
12 # max no of simultaneous sessions
13 sessions=-1
30 # port at which SSM should listen (unless -p)
51 # no of secs before we timeout SOC connection
72 # allow asm switches? 0=no,1=yes,2=all within maxasmtime,3=1 within maxasmtime
75 # max time to which we will allow asm switches
81 # time over which to calc post asm switch input rate
87 # change setbw? 0=no,1=block,2=sub w/1st,3=sub w/curr,4=tell CSM,5=allow w/asm
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MachObjectWriter.cpp | 1 //===-- X86MachObjectWriter.cpp - X86 Mach-O Writer -----------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
28 const MCAssembler &Asm,
36 const MCAssembler &Asm,
44 const MCAssembler &Asm,
50 void RecordX86_64Relocation(MachObjectWriter *Writer, MCAssembler &Asm,
59 void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm, in recordRelocation() argument
63 if (Writer->is64Bit()) in recordRelocation()
64 RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target, in recordRelocation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrFormats.td | 1 //===-- X86InstrFormats.td - X86 Instruction Formats -------*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
14 // ad-hoc solution used to emit machine instruction encodings by our machine
73 // ImmType - This specifies the immediate type used by an instruction. This is
74 // part of the ad-hoc solution used to emit machine instruction encodings by our
90 // FPFormat - This specifies what form this FP instruction has. This is used by
91 // the Floating-Point stackifier pass.
115 // displacement of 8-bit.
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| /third_party/musl/ |
| D | WHATSNEW | 1 0.5.0 - initial release
5 0.5.9 - signal ABI bugfix, various cleanup and fixes:
25 many internal improvements have been made to the syscall-related code
30 0.6.0 - x86_64 port, various important bugs fixed
48 0.7.0 - major improvements to posix conformance and completeness
61 malloc(0) now returns a non-null pointer.
64 hanging), and non-default-type mutex behavior.
67 libgcc with dwarf2 unwind support, and possibly other low-level tools.
69 improved musl-gcc compiler wrapper.
76 0.7.1 - improvements to completeness, bug fixes
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceInstMIPS32.cpp | 1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
8 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
49 // The Neg modes are only needed for Reg +/- Reg. in OperandMIPS32Mem()
53 Vars = &this->Base; in OperandMIPS32Mem()
64 Ostream &Str = Func->getContext()->getStrEmit(); in emit()
67 getDest()->emit(Func); in emit()
73 CR->emitWithoutPrefix(Func->getTarget()); in emit()
76 Src0->emit(Func); in emit()
109 // If there is no next block, then there can be no fallthrough to optimize. in optimizeBranch()
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| /third_party/mesa3d/src/freedreno/afuc/ |
| D | meson.build | 15 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
30 prog_bison, '@INPUT@', '--defines=@OUTPUT1@', '--output=@OUTPUT0@'
39 prog_flex, '-o', '@OUTPUT@', '@INPUT@'
43 asm = executable( variable
44 'afuc-asm',
46 'asm.c',
65 command: [asm, '-g', '6', files('../.gitlab-ci/traces/afuc_test.asm'), '@OUTPUT@'],
67 test('afuc-asm',
69 args: ['-u', files('../.gitlab-ci/reference/afuc_test.fw'), asm_fw],
78 'afuc-disasm',
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| /third_party/openssl/.github/workflows/ |
| D | run-checker-merge.yml | 1 # Copyright 2021-2022 The OpenSSL Project Authors. All Rights Reserved.
8 name: Run-checker merge
16 run-checker:
18 fail-fast: false
21 enable-asan no-shared no-asm -DOPENSSL_SMALL_FOOTPRINT,
22 no-dgram,
23 no-dso,
24 no-dynamic-engine,
25 no-engine no-shared,
26 no-err,
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| /third_party/rust/crates/rustix/src/backend/linux_raw/ |
| D | vdso_wrappers.rs | 3 //! <https://man7.org/linux/man-pages/man7/vdso.7.html>
18 #[cfg(all(asm, target_arch = "x86"))]
19 use core::arch::asm;
29 pub(crate) fn clock_gettime(which_clock: ClockId) -> __kernel_timespec { in clock_gettime()
32 // the side effect of writing to the result buffer, and no others. in clock_gettime()
46 pub(crate) fn clock_gettime_dynamic(which_clock: DynamicClockId<'_>) -> io::Result<Timespec> { in clock_gettime_dynamic()
69 // the side effect of writing to the result buffer, and no others. in clock_gettime_dynamic()
71 const EINVAL: c::c_int = -(c::EINVAL as c::c_int); in clock_gettime_dynamic()
89 use crate::backend::arch::asm;
92 pub(in crate::backend) unsafe fn syscall0(nr: SyscallNumber<'_>) -> RetReg<R0> { in syscall0()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MachObjectWriter.cpp | 1 //===-- AArch64MachObjectWriter.cpp - ARM Mach Object Writer --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
37 unsigned &Log2Size, const MCAssembler &Asm);
43 void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm,
53 unsigned &Log2Size, const MCAssembler &Asm) { in getAArch64FixupKindMachOInfo() argument
69 if (Sym->getKind() == MCSymbolRefExpr::VK_GOT) in getAArch64FixupKindMachOInfo()
74 if (Sym->getKind() == MCSymbolRefExpr::VK_GOT) in getAArch64FixupKindMachOInfo()
84 switch (Sym->getKind()) { in getAArch64FixupKindMachOInfo()
99 // This encompasses the relocation for the whole 21-bit value. in getAArch64FixupKindMachOInfo()
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| /third_party/openssl/ |
| D | appveyor.yml | 2 - Visual Studio 2017
5 - x64
6 - x86
11 - VSVER: 15
14 - shared
15 - minimal
18 -
21 - master
23 - shared
24 - plain
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| /third_party/rust/crates/rustix/src/backend/linux_raw/arch/inline/ |
| D | x86.rs | 1 //! 32-bit x86 Linux system calls.
16 use core::arch::asm;
22 ) -> RetReg<R0> { in indirect_syscall0()
24 asm!( in indirect_syscall0()
38 ) -> RetReg<R0> { in indirect_syscall1()
40 asm!( in indirect_syscall1()
55 ) -> ! { in indirect_syscall1_noreturn()
56 asm!( in indirect_syscall1_noreturn()
71 ) -> RetReg<R0> { in indirect_syscall2()
73 asm!( in indirect_syscall2()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMachObjectWriter.cpp | 1 //===-- ARMMachObjectWriter.cpp - ARM Mach Object Writer ------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
31 const MCAssembler &Asm,
40 const MCAssembler &Asm,
47 const MCAssembler &Asm,
55 void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm,
85 // have no relocations supported. in getARMFixupKindMachOInfo()
92 // Handle 24-bit branch kinds. in getARMFixupKindMachOInfo()
114 // 0 - :lower16: for movw instructions in getARMFixupKindMachOInfo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/tools/emacs/ |
| D | 50spirv-tools.el | 7 ;; http://www.apache.org/licenses/LICENSE-2.0
16 ;; will be disassembled using spirv-dis, and the result colorized with
17 ;; asm-mode in emacs. The file may be edited within the constraints
18 ;; of validity, and when re-saved will be re-assembled using spirv-as.
21 ;; This may change if the ability is added to spirv-as.
27 ;; See https://github.com/KhronosGroup/SPIRV-Tools/issues/359
29 (require 'jka-compr)
30 (require 'asm-mode)
32 (add-to-list 'jka-compr-compression-info-list
34 "Assembling SPIRV" "spirv-as" ("-o" "-")
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| /third_party/spirv-tools/tools/emacs/ |
| D | 50spirv-tools.el | 7 ;; http://www.apache.org/licenses/LICENSE-2.0
16 ;; will be disassembled using spirv-dis, and the result colorized with
17 ;; asm-mode in emacs. The file may be edited within the constraints
18 ;; of validity, and when re-saved will be re-assembled using spirv-as.
21 ;; This may change if the ability is added to spirv-as.
27 ;; See https://github.com/KhronosGroup/SPIRV-Tools/issues/359
29 (require 'jka-compr)
30 (require 'asm-mode)
32 (add-to-list 'jka-compr-compression-info-list
34 "Assembling SPIRV" "spirv-as" ("-o" "-")
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