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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/
Dallwinner,sun8i-ce.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/crypto/allwinner,sun8i-ce.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner Crypto Engine driver
10 - Corentin Labbe <clabbe.montjoie@gmail.com>
15 - allwinner,sun8i-h3-crypto
16 - allwinner,sun8i-r40-crypto
17 - allwinner,sun50i-a64-crypto
18 - allwinner,sun50i-h5-crypto
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsun8i-h3.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include "sunxi-h3-h5.dtsi"
44 #include <dt-bindings/thermal/thermal.h>
47 cpu0_opp_table: opp-table-cpu {
48 compatible = "operating-points-v2";
49 opp-shared;
51 opp-648000000 {
52 opp-hz = /bits/ 64 <648000000>;
53 opp-microvolt = <1040000 1040000 1300000>;
54 clock-latency-ns = <244144>; /* 8 32k periods */
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Dsun8i-v3s.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
45 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
51 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
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Dsun8i-r40.dtsi2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>
5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun8i-de2.h>
46 #include <dt-bindings/clock/sun8i-r40-ccu.h>
47 #include <dt-bindings/clock/sun8i-tcon-top.h>
48 #include <dt-bindings/reset/sun8i-r40-ccu.h>
49 #include <dt-bindings/reset/sun8i-de2.h>
50 #include <dt-bindings/thermal/thermal.h>
53 #address-cells = <1>;
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Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
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/kernel/linux/linux-5.10/drivers/crypto/allwinner/
DKconfig6 Say Y here to get to see options for Allwinner hardware crypto devices
19 Some Allwinner SoC have a crypto accelerator named
25 will be called sun4i-ss.
32 Select this option if you want to provide kernel-side support for
33 the Pseudo-Random Number Generator found in the Security System.
36 tristate "Support for Allwinner Crypto Engine cryptographic offloader"
46 Select y here to have support for the crypto Engine availlable on
47 Allwinner SoC H2+, H3, H5, H6, R40 and A64.
48 The Crypto Engine handle AES/3DES ciphers in ECB/CBC mode.
51 will be called sun8i-ce.
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/kernel/linux/linux-5.10/drivers/crypto/allwinner/sun8i-ce/
Dsun8i-ce-trng.c1 // SPDX-License-Identifier: GPL-2.0
3 * sun8i-ce-trng.c - hardware cryptographic offloader for
4 * Allwinner H3/A64/H5/H2+/H6/R40 SoC
6 * Copyright (C) 2015-2020 Corentin Labbe <clabbe@baylibre.com>
12 #include "sun8i-ce.h"
13 #include <linux/dma-mapping.h>
18 * The first present in H3/H5/R40/A64 and the second present in H6.
39 todo -= todo % 32; in sun8i_ce_trng_read()
43 return -ENOMEM; in sun8i_ce_trng_read()
46 ce->hwrng_stat_req++; in sun8i_ce_trng_read()
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Dsun8i-ce-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * sun8i-ce-core.c - hardware cryptographic offloader for
4 * Allwinner H3/A64/H5/H2+/H6/R40 SoC
6 * Copyright (C) 2015-2019 Corentin Labbe <clabbe.montjoie@gmail.com>
8 * Core file which registers crypto algorithms supported by the CryptoEngine.
13 #include <linux/crypto.h>
15 #include <linux/dma-mapping.h>
25 #include <crypto/internal/rng.h>
26 #include <crypto/internal/skcipher.h>
28 #include "sun8i-ce.h"
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Dsun8i-ce.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sun8i-ce.h - hardware cryptographic offloader for
4 * Allwinner H3/A64/H5/H2+/H6 SoC
6 * Copyright (C) 2016-2019 Corentin LABBE <clabbe.montjoie@gmail.com>
8 #include <crypto/aes.h>
9 #include <crypto/des.h>
10 #include <crypto/engine.h>
11 #include <crypto/skcipher.h>
14 #include <linux/crypto.h>
16 #include <crypto/internal/hash.h>
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Dsun8i-ce-prng.c1 // SPDX-License-Identifier: GPL-2.0
3 * sun8i-ce-prng.c - hardware cryptographic offloader for
4 * Allwinner H3/A64/H5/H2+/H6/R40 SoC
6 * Copyright (C) 2015-2020 Corentin Labbe <clabbe@baylibre.com>
12 #include "sun8i-ce.h"
13 #include <linux/dma-mapping.h>
15 #include <crypto/internal/rng.h>
29 memzero_explicit(ctx->seed, ctx->slen); in sun8i_ce_prng_exit()
30 kfree(ctx->seed); in sun8i_ce_prng_exit()
31 ctx->seed = NULL; in sun8i_ce_prng_exit()
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Dsun8i-ce-hash.c1 // SPDX-License-Identifier: GPL-2.0
3 * sun8i-ce-hash.c - hardware cryptographic offloader for
4 * Allwinner H3/A64/H5/H2+/H6/R40 SoC
6 * Copyright (C) 2015-2020 Corentin Labbe <clabbe@baylibre.com>
13 #include <linux/dma-mapping.h>
16 #include <crypto/internal/hash.h>
17 #include <crypto/sha.h>
18 #include <crypto/md5.h>
19 #include "sun8i-ce.h"
24 struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); in sun8i_ce_hash_crainit()
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Dsun8i-ce-cipher.c1 // SPDX-License-Identifier: GPL-2.0
3 * sun8i-ce-cipher.c - hardware cryptographic offloader for
4 * Allwinner H3/A64/H5/H2+/H6/R40 SoC
6 * Copyright (C) 2016-2019 Corentin LABBE <clabbe.montjoie@gmail.com>
15 #include <linux/crypto.h>
16 #include <linux/dma-mapping.h>
19 #include <crypto/scatterwalk.h>
20 #include <crypto/internal/des.h>
21 #include <crypto/internal/skcipher.h>
22 #include "sun8i-ce.h"
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // based on the Allwinner H3 dtsi:
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/reset/sun50i-a64-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/reset/sun8i-r-ccu.h>
13 #include <dt-bindings/thermal/thermal.h>
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Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-tcon-top.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/thermal/thermal.h>
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/kernel/linux/linux-5.10/drivers/rtc/
Drtc-sun6i.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2014, Chen-Yu Tsai <wens@csie.org>
7 * based on rtc-sunxi.c
15 #include <linux/clk-provider.h>
107 * The year range is 1970 - 2033. This range is selected to match Allwinner's
111 #define SUN6I_YEAR_OFF (SUN6I_YEAR_MIN - 1900)
116 * - number of GPIO pins that can be configured to hold a certain level
117 * - crypto-key related registers (H5, H6)
118 * - boot process related (super standby, secondary processor entry address)
120 * - SYS power domain controls (R40)
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/kernel/linux/linux-5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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