| /device/soc/winnermicro/wm800/board/platform/drivers/io/ |
| D | wm_io.c | 35 u16 offset; in io_cfg_option1() local
39 offset = TLS_IO_AB_OFFSET; in io_cfg_option1()
42 offset = 0; in io_cfg_option1()
45 …tls_reg_write32(HR_GPIO_AF_SEL + offset, tls_reg_read32(HR_GPIO_AF_SEL + offset) | BIT(pin)); /* … in io_cfg_option1()
46 tls_reg_write32(HR_GPIO_AF_S1 + offset, tls_reg_read32(HR_GPIO_AF_S1 + offset) & (~BIT(pin))); in io_cfg_option1()
47 tls_reg_write32(HR_GPIO_AF_S0 + offset, tls_reg_read32(HR_GPIO_AF_S0 + offset) & (~BIT(pin))); in io_cfg_option1()
53 u16 offset; in io_cfg_option2() local
57 offset = TLS_IO_AB_OFFSET; in io_cfg_option2()
60 offset = 0; in io_cfg_option2()
63 …tls_reg_write32(HR_GPIO_AF_SEL + offset, tls_reg_read32(HR_GPIO_AF_SEL + offset) | BIT(pin)); /* … in io_cfg_option2()
[all …]
|
| /device/soc/winnermicro/wm800/board/platform/drivers/gpio/ |
| D | wm_gpio.c | 97 u16 offset; in tls_gpio_cfg() local
101 offset = TLS_IO_AB_OFFSET; in tls_gpio_cfg()
104 offset = 0; in tls_gpio_cfg()
112 …tls_reg_write32(HR_GPIO_DIR + offset, tls_reg_read32(HR_GPIO_DIR + offset) | BIT(pin)); /* 1 … in tls_gpio_cfg()
114 …tls_reg_write32(HR_GPIO_DIR + offset, tls_reg_read32(HR_GPIO_DIR + offset) & (~BIT(pin))); /* … in tls_gpio_cfg()
119 …tls_reg_write32(HR_GPIO_PULLUP_EN + offset, tls_reg_read32(HR_GPIO_PULLUP_EN + offset) | BIT(pin)); in tls_gpio_cfg()
121 …tls_reg_write32(HR_GPIO_PULLDOWN_EN + offset, tls_reg_read32(HR_GPIO_PULLDOWN_EN + offset)&(~BIT(p… in tls_gpio_cfg()
125 …tls_reg_write32(HR_GPIO_PULLUP_EN + offset, tls_reg_read32(HR_GPIO_PULLUP_EN + offset) & (~BIT(pin… in tls_gpio_cfg()
127 …tls_reg_write32(HR_GPIO_PULLDOWN_EN + offset, tls_reg_read32(HR_GPIO_PULLDOWN_EN + offset) &(~BIT(… in tls_gpio_cfg()
132 …tls_reg_write32(HR_GPIO_PULLUP_EN + offset, tls_reg_read32(HR_GPIO_PULLUP_EN + offset) | BIT(pin)); in tls_gpio_cfg()
[all …]
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| /device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/hal/halmac/ |
| D | halmac_dbg.c | 18 monitor_reg_read_8(struct halmac_adapter *adapter, u32 offset,
21 monitor_reg_read_16(struct halmac_adapter *adapter, u32 offset,
24 monitor_reg_read_32(struct halmac_adapter *adapter, u32 offset,
28 u32 offset, u32 size, u8 *value,
31 monitor_reg_write_8(struct halmac_adapter *adapter, u32 offset,
34 monitor_reg_write_16(struct halmac_adapter *adapter, u32 offset,
37 monitor_reg_write_32(struct halmac_adapter *adapter, u32 offset,
57 monitor_reg_read_8(struct halmac_adapter *adapter, u32 offset, in monitor_reg_read_8() argument
63 val = api->halmac_reg_read_8(adapter, offset); in monitor_reg_read_8()
64 PLTFM_MONITOR_READ(offset, 1, val, func, line); in monitor_reg_read_8()
[all …]
|
| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
| D | mali_kbase_debug_job_fault_backend.c | 80 int offset = 0; in kbase_debug_job_fault_reg_snapshot_init() local
92 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
94 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
99 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
101 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
107 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
109 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
115 kctx->reg_dump[offset] = MMU_REG(mmu_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
116 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
122 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
[all …]
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/ |
| D | mali_kbase_debug_job_fault_backend.c | 44 int offset = 0; in kbase_debug_job_fault_reg_snapshot_init() local
57 kctx->reg_dump[offset] = GPU_CONTROL_REG(gpu_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
58 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
63 kctx->reg_dump[offset] = JOB_CONTROL_REG(job_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
64 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
70 kctx->reg_dump[offset] = JOB_SLOT_REG(j, job_slot_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
71 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
77 kctx->reg_dump[offset] = MMU_REG(mmu_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
78 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
84 kctx->reg_dump[offset] = MMU_AS_REG(j, as_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
[all …]
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
| D | mali_kbase_debug_job_fault_backend.c | 86 int offset = 0; in kbase_debug_job_fault_reg_snapshot_init() local
98 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
100 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
105 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
107 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
113 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
115 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
121 kctx->reg_dump[offset] = MMU_REG(mmu_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
122 offset += 2; in kbase_debug_job_fault_reg_snapshot_init()
128 kctx->reg_dump[offset] = in kbase_debug_job_fault_reg_snapshot_init()
[all …]
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/ |
| D | mali_kbase_debug_job_fault_backend.c | 51 int offset = 0; in kbase_debug_job_fault_reg_snapshot_init() local
64 kctx->reg_dump[offset] = GPU_CONTROL_REG(gpu_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
65 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
70 kctx->reg_dump[offset] = JOB_CONTROL_REG(job_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
71 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
77 kctx->reg_dump[offset] = JOB_SLOT_REG(j, job_slot_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
78 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
84 kctx->reg_dump[offset] = MMU_REG(mmu_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
85 offset += 0x2; in kbase_debug_job_fault_reg_snapshot_init()
91 kctx->reg_dump[offset] = MMU_AS_REG(j, as_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
[all …]
|
| /device/soc/bestechnic/bes2600/liteos_m/sdk/bsp/platform/hal/ |
| D | hal_pwm.c | 64 uint8_t offset; in hal_pwm_enable() local
116 offset = id - HAL_PWM_ID_0; in hal_pwm_enable()
119 offset = id - HAL_PWM1_ID_0; in hal_pwm_enable()
123 offset = id - HAL_PWM_ID_0; in hal_pwm_enable()
130 hal_cmu_clock_enable(pwm_o_mod[index] + offset); in hal_pwm_enable()
132 hal_cmu_reset_clear(pwm_o_mod[index] + offset); in hal_pwm_enable()
135 pwm[index]->EN &= ~(1 << offset); in hal_pwm_enable()
145 if (offset == 0) { in hal_pwm_enable()
148 } else if (offset == 1) { in hal_pwm_enable()
151 } else if (offset == 2) { in hal_pwm_enable()
[all …]
|
| /device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/hal/halmac/halmac_88xx/halmac_8822c/ |
| D | halmac_sdio_8822c.c | 286 reg_r8_sdio_8822c(struct halmac_adapter *adapter, u32 offset) in reg_r8_sdio_8822c() argument
293 if ((offset & 0xFFFF0000) == 0) { in reg_r8_sdio_8822c()
298 value8 = (u8)r_indir_sdio_88xx(adapter, offset, in reg_r8_sdio_8822c()
301 offset |= WLAN_IOREG_OFFSET; in reg_r8_sdio_8822c()
302 status = cnv_to_sdio_bus_offset_88xx(adapter, &offset); in reg_r8_sdio_8822c()
307 value8 = (u8)PLTFM_SDIO_CMD53_R8(offset); in reg_r8_sdio_8822c()
310 status = cnv_to_sdio_bus_offset_88xx(adapter, &offset); in reg_r8_sdio_8822c()
315 value8 = PLTFM_SDIO_CMD52_R(offset); in reg_r8_sdio_8822c()
331 reg_w8_sdio_8822c(struct halmac_adapter *adapter, u32 offset, u8 value) in reg_w8_sdio_8822c() argument
341 (offset & 0xFFFF0000) == 0) { in reg_w8_sdio_8822c()
[all …]
|
| /device/board/isoftstone/zhiyuan/kernel/driver/drivers/video/sunxi/lcd_fb/ |
| D | dev_fb.c | 75 unsigned int offset = vma->vm_pgoff << PAGE_SHIFT; in lcd_fb_mmap() local
77 if (offset < info->fix.smem_len) { in lcd_fb_mmap()
106 u32 mask = ((1 << bf->length) - 1) << bf->offset; in convert_bitfield()
108 return (val << bf->offset) & mask; in convert_bitfield()
202 var->blue.offset = 0; in pixel_format_to_var()
203 var->green.offset = var->blue.offset + var->blue.length; in pixel_format_to_var()
204 var->red.offset = var->green.offset + var->green.length; in pixel_format_to_var()
205 var->transp.offset = var->red.offset + var->red.length; in pixel_format_to_var()
213 var->red.offset = 0; in pixel_format_to_var()
214 var->green.offset = var->red.offset + var->red.length; in pixel_format_to_var()
[all …]
|
| /device/soc/st/common/platform/stm32mp1xx_hal/STM32MP1xx_HAL_Driver/Src/ |
| D | stm32mp1xx_hal_exti.c | 155 uint32_t offset; in HAL_EXTI_SetConfigLine() local
167 offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); in HAL_EXTI_SetConfigLine()
175 regaddr = (&EXTI->RTSR1 + (EXTI_CONFIG_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
192 regaddr = (&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
222 regaddr = (&EXTI->C1IMR1 + (EXTI_MODE_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
241 regaddr = (&EXTI->C1EMR1 + (EXTI_MODE_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
262 regaddr = (&EXTI->C2IMR1 + (EXTI_MODE_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
281 regaddr = (&EXTI->C2EMR1 + (EXTI_MODE_OFFSET * offset)); in HAL_EXTI_SetConfigLine()
315 uint32_t offset; in HAL_EXTI_GetConfigLine() local
327 offset = ((pExtiConfig->Line & EXTI_REG_MASK) >> EXTI_REG_SHIFT); in HAL_EXTI_GetConfigLine()
[all …]
|
| /device/board/isoftstone/yangfan/kernel/src/driv/media/isp/ |
| D | bridge_v20.c | 46 u32 offset = 0, size; in dump_dbg_reg() local
58 reg_buf->isp_offset[ISP2X_ID_DPCC] = offset; in dump_dbg_reg()
59 memcpy_fromio(®_buf->reg[offset], hw->base_addr + ISP_DPCC0_MODE, size); in dump_dbg_reg()
60 offset += size; in dump_dbg_reg()
66 reg_buf->isp_offset[ISP2X_ID_BLS] = offset; in dump_dbg_reg()
67 memcpy_fromio(®_buf->reg[offset], hw->base_addr + ISP_BLS_CTRL, size); in dump_dbg_reg()
68 offset += size; in dump_dbg_reg()
74 reg_buf->isp_offset[ISP2X_ID_SDG] = offset; in dump_dbg_reg()
75 memcpy_fromio(®_buf->reg[offset], hw->base_addr + ISP_GAMMA_DX_LO, size); in dump_dbg_reg()
76 offset += size; in dump_dbg_reg()
[all …]
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| /device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/hal/ |
| D | HalPwrSeqCmd.c | 55 u32 offset = 0; in HalPwrSeqCmdParsing() local
73 offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); in HalPwrSeqCmdParsing()
82 value = SdioLocalCmd52Read1Byte(padapter, offset); in HalPwrSeqCmdParsing()
88 SdioLocalCmd52Write1Byte(padapter, offset, value); in HalPwrSeqCmdParsing()
94 offset = SPI_LOCAL_OFFSET | offset; in HalPwrSeqCmdParsing()
97 value = rtw_read8(padapter, offset); in HalPwrSeqCmdParsing()
103 rtw_write8(padapter, offset, value); in HalPwrSeqCmdParsing()
110 offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); in HalPwrSeqCmdParsing()
113 if (bHWICSupport && offset == 0x06) { in HalPwrSeqCmdParsing()
121 offset = SPI_LOCAL_OFFSET | offset; in HalPwrSeqCmdParsing()
[all …]
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| /device/board/isoftstone/zhiyuan/kernel/driver/drivers/video/sunxi/disp2/disp/ |
| D | dev_fb.c | 213 var->blue.offset = 0; in disp_fb_to_var()
214 var->green.offset = var->blue.offset + var->blue.length; in disp_fb_to_var()
215 var->red.offset = var->green.offset + var->green.length; in disp_fb_to_var()
216 var->transp.offset = var->red.offset + var->red.length; in disp_fb_to_var()
224 var->red.offset = 0; in disp_fb_to_var()
225 var->green.offset = var->red.offset + var->red.length; in disp_fb_to_var()
226 var->blue.offset = var->green.offset + var->green.length; in disp_fb_to_var()
227 var->transp.offset = var->blue.offset + var->blue.length; in disp_fb_to_var()
235 var->transp.offset = 0; in disp_fb_to_var()
236 var->blue.offset = var->transp.offset + var->transp.length; in disp_fb_to_var()
[all …]
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| /device/soc/rockchip/common/vendor/drivers/rockchip/ |
| D | mtd_vendor_storage.c | 34 u16 offset; member
126 int err, offset; in mtd_vendor_storage_init() local
141 for (offset = 0; offset < mtd->size; offset += mtd->erasesize) { in mtd_vendor_storage_init()
142 if (!mtd_block_isbad(mtd, offset)) { in mtd_vendor_storage_init()
143 err = mtd_read(mtd, offset, sizeof(*g_vendor), &bytes_read, (u8 *)g_vendor); in mtd_vendor_storage_init()
151 nand_info.blk_offset = offset; in mtd_vendor_storage_init()
154 } else if (nand_info.blk_offset == offset) { in mtd_vendor_storage_init()
160 … for (offset = mtd->erasesize - nand_info.ops_size; offset >= 0; offset -= nand_info.ops_size) { in mtd_vendor_storage_init()
161 …err = mtd_read(mtd, nand_info.blk_offset + offset, sizeof(*g_vendor), &bytes_read, (u8 *)g_vendor); in mtd_vendor_storage_init()
169 if (nand_info.page_offset < offset) { in mtd_vendor_storage_init()
[all …]
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| /device/board/isoftstone/yangfan/kernel/src/driv/soc/ |
| D | mtd_vendor_storage.c | 34 u16 offset; member
119 int err, offset; in mtd_vendor_storage_init() local
133 for (offset = 0; offset < mtd->size; offset += mtd->erasesize) { in mtd_vendor_storage_init()
134 if (!mtd_block_isbad(mtd, offset)) { in mtd_vendor_storage_init()
135 err = mtd_read(mtd, offset, sizeof(*g_vendor), in mtd_vendor_storage_init()
144 nand_info.blk_offset = offset; in mtd_vendor_storage_init()
147 } else if (nand_info.blk_offset == offset) in mtd_vendor_storage_init()
152 for (offset = mtd->erasesize - nand_info.ops_size; in mtd_vendor_storage_init()
153 offset >= 0; in mtd_vendor_storage_init()
154 offset -= nand_info.ops_size) { in mtd_vendor_storage_init()
[all …]
|
| /device/board/osware/imx8mm/drivers/audio/soc/include/ |
| D | sai_driver.h | 80 #define FSL_SAI_TCSR(offset) (0x00 + (offset)) /* SAI Transmit Control */ argument
81 #define FSL_SAI_TCR1(offset) (0x04 + (offset)) /* SAI Transmit Configuration 1 */ argument
82 #define FSL_SAI_TCR2(offset) (0x08 + (offset)) /* SAI Transmit Configuration 2 */ argument
83 #define FSL_SAI_TCR3(offset) (0x0c + (offset)) /* SAI Transmit Configuration 3 */ argument
84 #define FSL_SAI_TCR4(offset) (0x10 + (offset)) /* SAI Transmit Configuration 4 */ argument
85 #define FSL_SAI_TCR5(offset) (0x14 + (offset)) /* SAI Transmit Configuration 5 */ argument
108 #define FSL_SAI_RCSR(offset) (0x80 + (offset)) /* SAI Receive Control */ argument
109 #define FSL_SAI_RCR1(offset) (0x84 + (offset)) /* SAI Receive Configuration 1 */ argument
110 #define FSL_SAI_RCR2(offset) (0x88 + (offset)) /* SAI Receive Configuration 2 */ argument
111 #define FSL_SAI_RCR3(offset) (0x8c + (offset)) /* SAI Receive Configuration 3 */ argument
[all …]
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| /device/soc/rockchip/common/sdk_linux/drivers/pinctrl/ |
| D | pinctrl-rk805.c | 267 static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset) in rk805_gpio_get() argument
272 if (!pci->pin_cfg[offset].val_msk) { in rk805_gpio_get()
273 dev_dbg(pci->dev, "getting gpio%d value is not support\n", offset); in rk805_gpio_get()
277 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val); in rk805_gpio_get()
279 dev_err(pci->dev, "get gpio%d value failed\n", offset); in rk805_gpio_get()
283 return !!(val & pci->pin_cfg[offset].val_msk); in rk805_gpio_get()
286 static void rk805_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) in rk805_gpio_set() argument
290 if (!pci->pin_cfg[offset].val_msk) { in rk805_gpio_set()
293 …ret = regmap_update_bits(pci->rk808->regmap, pci->pin_cfg[offset].reg, pci->pin_cfg[offset].val_ms… in rk805_gpio_set()
294 value ? pci->pin_cfg[offset].val_msk : 0); in rk805_gpio_set()
[all …]
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| /device/soc/rockchip/rk3588/kernel/drivers/pinctrl/ |
| D | pinctrl-rk806.c | 195 static int rk806_gpio_get(struct gpio_chip *chip, unsigned int offset) in rk806_gpio_get() argument
200 if (!pci->pin_cfg[offset].val_msk) { in rk806_gpio_get()
202 offset); in rk806_gpio_get()
206 ret = regmap_read(pci->rk806->regmap, pci->pin_cfg[offset].reg, &val); in rk806_gpio_get()
208 dev_err(pci->dev, "get gpio%d value failed\n", offset); in rk806_gpio_get()
212 return !!(val & pci->pin_cfg[offset].val_msk); in rk806_gpio_get()
216 unsigned int offset, in rk806_gpio_set() argument
222 if (!pci->pin_cfg[offset].val_msk) in rk806_gpio_set()
226 pci->pin_cfg[offset].reg, in rk806_gpio_set()
227 pci->pin_cfg[offset].val_msk, in rk806_gpio_set()
[all …]
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| /device/soc/rockchip/rk3588/kernel/drivers/net/ethernet/realtek/r8168/ |
| D | rtltool.c | 63 my_cmd.data = readb(tp->mmio_addr+my_cmd.offset); in rtl8168_tool_ioctl()
65 my_cmd.data = readw(tp->mmio_addr+(my_cmd.offset&~1)); in rtl8168_tool_ioctl()
67 my_cmd.data = readl(tp->mmio_addr+(my_cmd.offset&~3)); in rtl8168_tool_ioctl()
84 writeb(my_cmd.data, tp->mmio_addr+my_cmd.offset); in rtl8168_tool_ioctl()
86 writew(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~1)); in rtl8168_tool_ioctl()
88 writel(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~3)); in rtl8168_tool_ioctl()
101 my_cmd.data = rtl8168_mdio_prot_read(tp, my_cmd.offset); in rtl8168_tool_ioctl()
116 rtl8168_mdio_prot_write(tp, my_cmd.offset, my_cmd.data); in rtl8168_tool_ioctl()
125 my_cmd.data = rtl8168_ephy_read(tp, my_cmd.offset); in rtl8168_tool_ioctl()
140 rtl8168_ephy_write(tp, my_cmd.offset, my_cmd.data); in rtl8168_tool_ioctl()
[all …]
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| /device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/upg/ |
| D | boot_upg_tool.c | 26 hi_u32 kernel_comprss_flash_read(hi_u32 offset, hi_u8 *buffer, hi_u32 size) in kernel_comprss_flash_read() argument
30 ret = crypto_kernel_read(g_compress_src_addr, offset, buffer, size); in kernel_comprss_flash_read()
35 ret = hi_flash_read(g_compress_src_addr + offset, size, buffer); in kernel_comprss_flash_read()
44 hi_u32 kernel_comprss_flash_write(hi_u32 offset, hi_u8 *buffer, hi_u32 size) in kernel_comprss_flash_write() argument
50 ret = crypto_kernel_write(g_compress_dst_addr, offset, buffer, size); in kernel_comprss_flash_write()
55 ret = hi_flash_write(g_compress_dst_addr + offset, size, buffer, HI_FALSE); in kernel_comprss_flash_write()
63 hi_u32 kernel_comprss_flash_hash(hi_u32 offset, hi_u8 *buffer, hi_u32 size) in kernel_comprss_flash_hash() argument
69 if (offset >= sizeof(hi_upg_file_head)) { in kernel_comprss_flash_hash()
74 boot_msg4("code hash ret-size-offset-headsize", ret, size, offset, hash_size); in kernel_comprss_flash_hash()
80 if ((offset + size) > sizeof(hi_upg_file_head)) { in kernel_comprss_flash_hash()
[all …]
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| /device/soc/beken/bk7235/hals/utils/file/src/ |
| D | hal_file.c | 29 unsigned int offset; member
263 info->offset = info->len; in HalFileOpen()
265 info->offset = 0; in HalFileOpen()
302 if (info->offset + len > info->len) in HalFileRead()
303 len = info->len - info->offset; in HalFileRead()
306 memcpy(buf, info->content + info->offset, len); in HalFileRead()
307 info->offset += len; in HalFileRead()
327 if (info->offset + len > MAX_FILE_LENGTH) { in HalFileWrite()
328 printf("HalFileWrite warning : offset=%d, more size=%d\n", info->offset, len); in HalFileWrite()
329 len = MAX_FILE_LENGTH - info->offset; in HalFileWrite()
[all …]
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| /device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/hal/halmac/halmac_88xx/ |
| D | halmac_gpio_88xx.c | 120 u32 offset; in pinmux_gpio_mode_88xx() local
124 offset = REG_GPIO_PIN_CTRL + 2; in pinmux_gpio_mode_88xx()
126 offset = REG_GPIO_EXT_CTRL + 2; in pinmux_gpio_mode_88xx()
133 value16 = HALMAC_REG_R16(offset); in pinmux_gpio_mode_88xx()
136 HALMAC_REG_W16(offset, value16); in pinmux_gpio_mode_88xx()
155 u32 offset; in pinmux_gpio_output_88xx() local
159 offset = REG_GPIO_PIN_CTRL + 1; in pinmux_gpio_output_88xx()
161 offset = REG_GPIO_EXT_CTRL + 1; in pinmux_gpio_output_88xx()
168 value8 = HALMAC_REG_R8(offset); in pinmux_gpio_output_88xx()
171 HALMAC_REG_W8(offset, value8); in pinmux_gpio_output_88xx()
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/osal/include/ |
| D | drv_osal_lib.h | 283 hi_u32 module_reg_read(module_id id, hi_u32 offset);
298 hi_void module_reg_write(module_id id, hi_u32 offset, hi_u32 val);
301 #define symc_read(offset) module_reg_read(CRYPTO_MODULE_ID_SYMC, offset) argument
302 #define symc_write(offset, val) module_reg_write(CRYPTO_MODULE_ID_SYMC, offset, val) argument
305 #define hash_read(offset) module_reg_read(CRYPTO_MODULE_ID_HASH, offset) argument
306 #define hash_write(offset, val) module_reg_write(CRYPTO_MODULE_ID_HASH, offset, val) argument
309 #define ifep_rsa_read(offset) module_reg_read(CRYPTO_MODULE_ID_IFEP_RSA, offset) argument
310 #define ifep_rsa_write(offset, val) module_reg_write(CRYPTO_MODULE_ID_IFEP_RSA, offset, val) argument
313 #define trng_read(offset) module_reg_read(CRYPTO_MODULE_ID_TRNG, offset) argument
314 #define trng_write(offset, val) module_reg_write(CRYPTO_MODULE_ID_TRNG, offset, val) argument
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| /device/soc/esp/esp32/components/partition_table/ |
| D | gen_esp32part.py | 119 if e.offset is not None and e.offset < last_end:
122 % (e.offset, last_end))
125 % (e.line_no, e.offset, last_end))
126 if e.offset is None:
130 e.offset = last_end
132 e.size = -e.size - e.offset
133 last_end = e.offset + e.size
197 for p in sorted(self, key=lambda x:x.offset):
198 if p.offset < offset_part_table + PARTITION_TABLE_SIZE:
199 …raise InputError('Partition offset 0x%x is below 0x%x' % (p.offset, offset_part_table + PARTITION_…
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