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Searched refs:SCR (Results 1 – 25 of 32) sorted by relevance

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/kernel/linux/linux-5.10/Documentation/s390/
Dconfig3270.sh22 SCR=$ROOT/tmp/mkdev3270
23 SCRTMP=$SCR.a
37 echo "#!/bin/sh" > $SCR || exit 1
38 echo " " >> $SCR
39 echo "# Script built by /sbin/config3270" >> $SCR
41 echo rm -rf "$D/$SUBD/*" >> $SCR
46 echo mkdir -p $D/$SUBD >> $SCR
56 echo mknod $D/$TUB c $fsmaj 0 >> $SCR
57 echo chmod 666 $D/$TUB >> $SCR
61 echo mknod $D/$TUB$devno c $fsmaj $min >> $SCR
[all …]
/kernel/linux/linux-5.10/drivers/net/wan/
Dhdlc_ppp.c86 enum {INV = 0x10, IRC = 0x20, ZRC = 0x40, SCR = 0x80, SCA = 0x100, enumerator
282 {IRC|SCR|3, INV , INV , INV , INV , INV , INV }, /* START */
284 { INV , INV ,STR|2, SCR|3 ,SCR|3, SCR|5 , INV }, /* TO+ */
286 { STA|0 ,IRC|SCR|SCA|5, 2 , SCA|5 ,SCA|6, SCA|5 ,SCR|SCA|5}, /* RCR+ */
287 { STA|0 ,IRC|SCR|SCN|3, 2 , SCN|3 ,SCN|4, SCN|3 ,SCR|SCN|3}, /* RCR- */
288 { STA|0 , STA|1 , 2 , IRC|4 ,SCR|3, 6 , SCR|3 }, /* RCA */
289 { STA|0 , STA|1 , 2 ,IRC|SCR|3,SCR|3,IRC|SCR|5, SCR|3 }, /* RCN */
291 { 0 , 1 , 1 , 3 , 3 , 5 , SCR|3 }, /* RTA */
321 if (action & (SCR | STR)) /* set Configure-Req/Terminate-Req timer */ in ppp_cp_event()
330 if (action & SCR) /* send Configure-Request */ in ppp_cp_event()
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dpixfmt-meta-uvc.rst26 SCR field or with that field identical to the previous header), or generally to
51 - The rest of the header, possibly including UVC PTS and SCR fields
/kernel/linux/linux-5.10/drivers/net/hamradio/
Dbaycom_ser_fdx.c101 #define SCR(iobase) (iobase+7) macro
362 outb(0x5a, SCR(iobase)); in ser12_check_uart()
363 b1 = inb(SCR(iobase)); in ser12_check_uart()
364 outb(0xa5, SCR(iobase)); in ser12_check_uart()
365 b2 = inb(SCR(iobase)); in ser12_check_uart()
Dbaycom_ser_hdx.c87 #define SCR(iobase) (iobase+7) macro
444 outb(0x5a, SCR(iobase)); in ser12_check_uart()
445 b1 = inb(SCR(iobase)); in ser12_check_uart()
446 outb(0xa5, SCR(iobase)); in ser12_check_uart()
447 b2 = inb(SCR(iobase)); in ser12_check_uart()
Dyam.c158 #define SCR(iobase) (iobase+7) macro
515 outb(0x5a, SCR(iobase)); in yam_check_uart()
516 b1 = inb(SCR(iobase)); in yam_check_uart()
517 outb(0xa5, SCR(iobase)); in yam_check_uart()
518 b2 = inb(SCR(iobase)); in yam_check_uart()
/kernel/linux/linux-5.10/arch/m68k/68000/
Dm68VZ328.c66 SCR = 0x10; /* allow user access to internal registers */ in init_hardware()
/kernel/linux/linux-5.10/drivers/clk/meson/
Dgxbb.h17 #define SCR 0x2C /* 0x0b offset in data sheet */ macro
/kernel/linux/linux-5.10/Documentation/driver-api/mmc/
Dmmc-tools.rst37 - Print and parse SCR data.
/kernel/linux/linux-5.10/drivers/tty/
Dsynclink_gt.c375 #define SCR 0x8c /* serial control */ macro
401 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
403 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
2701 unsigned short val = rd_reg16(info, SCR); in wait_mgsl_event()
2703 wr_reg16(info, SCR, (unsigned short)(val | IRQ_RXIDLE)); in wait_mgsl_event()
2766 wr_reg16(info, SCR, in wait_mgsl_event()
2767 (unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE)); in wait_mgsl_event()
3843 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT2)); in enable_loopback()
3925 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14)); in rx_start()
3933 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14)); in rx_start()
[all …]
/kernel/liteos_m/arch/arm/cortex-m7/gcc/
Dlos_interrupt.c121 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
Dlos_interrupt.c123 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m7/iar/
Dlos_interrupt.c125 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m4/iar/
Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m3/keil/
Dlos_interrupt.c121 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
Dlos_interrupt.c123 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
Dlos_interrupt.c123 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
Dlos_interrupt.c122 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
Dlos_interrupt.c123 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); in HalInterrupt()
/kernel/linux/linux-5.10/arch/m68k/include/asm/
DMC68EZ328.h35 #define SCR BYTE_REF(SCR_ADDR) macro
DMC68VZ328.h37 #define SCR BYTE_REF(SCR_ADDR) macro

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