| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_hwseq.c | 104 uint32_t alpha_mode = 2; in dce_set_blender_mode() local
110 alpha_mode = 0; in dce_set_blender_mode()
115 alpha_mode = 0; in dce_set_blender_mode()
132 BLND_ALPHA_MODE, alpha_mode, in dce_set_blender_mode()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | mpc.h | 66 enum mpcc_alpha_blend_mode alpha_mode; /* alpha blend mode */ member
153 uint32_t alpha_mode; member
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| /kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/ |
| D | rockchip_drm_vop.h | 182 struct vop_reg alpha_mode; member
268 enum alpha_mode { enum
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| D | rockchip_vop_reg.c | 268 .alpha_mode = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 1),
284 .alpha_mode = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 1),
301 .alpha_mode = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 1),
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| D | rockchip_drm_vop.c | 1012 VOP_WIN_SET(vop, win, alpha_mode, ALPHA_PER_PIX); in vop_plane_atomic_update()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_mpc.c | 78 MPCC_ALPHA_BLND_MODE, blnd_cfg->alpha_mode, in mpc1_update_blending()
462 MPCC_ALPHA_BLND_MODE, &s->alpha_mode, in mpc1_read_mpcc_state()
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| D | dcn10_hw_sequencer_debug.c | 402 s.mode, s.alpha_mode, s.pre_multiplied_alpha, s.overlap_only, in dcn10_get_mpcc_states()
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| D | dcn10_hw_sequencer.c | 335 s.mode, s.alpha_mode, s.pre_multiplied_alpha, s.overlap_only, in dcn10_log_hw_state()
2394 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; in dcn10_update_mpcc()
2397 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; in dcn10_update_mpcc()
2399 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; in dcn10_update_mpcc()
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | au1200fb.c | 116 unsigned int alpha_mode; member
1308 val |= ((pdata->alpha_mode << 1) & LCD_WINCTRL0_AEN); in set_window()
1394 pdata->alpha_mode = (lcd->window[plane].winctrl0 & LCD_WINCTRL0_AEN) >> 1; in get_window()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_mpc.c | 58 MPCC_ALPHA_BLND_MODE, blnd_cfg->alpha_mode, in mpc2_update_blending()
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| D | dcn20_hwseq.c | 2278 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; in dcn20_update_mpcc()
2281 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; in dcn20_update_mpcc()
2283 blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; in dcn20_update_mpcc()
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| /kernel/linux/linux-5.10/drivers/media/pci/ivtv/ |
| D | ivtv-ioctl.c | 1533 static const char * const alpha_mode[4] = { in ivtv_log_status() local
1568 alpha_mode[(data[0] >> 1) & 0x3], in ivtv_log_status()
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| /kernel/linux/patches/linux-5.10/yangfan_patch/ |
| D | drivers.patch | 27556 - VOP_WIN_SET(vop, win, alpha_mode, ALPHA_PER_PIX);
27559 + VOP_WIN_SET(vop, win, alpha_mode, 1);
31553 struct vop_reg alpha_mode;
31628 + struct vop_reg alpha_mode;
32207 enum alpha_mode {
34775 - .alpha_mode = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 1),
34791 - .alpha_mode = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 1),
34808 - .alpha_mode = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 1),
35920 + .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
35954 + .alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
[all …]
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0005_linux_include.patch | 22741 + unsigned int alpha_mode;
22795 + unsigned int alpha_mode;
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