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Searched refs:dcef_clock (Results 1 – 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega20_hwmgr.h148 PP_Clock dcef_clock; member
221 uint32_t dcef_clock; member
Dvega12_hwmgr.h169 uint32_t dcef_clock; member
Dvega10_hwmgr.h190 uint32_t dcef_clock; member
Dvega20_hwmgr.c717 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100; in vega20_setup_default_dpm_tables()
802 data->vbios_boot_state.dcef_clock = boot_up_values.ulDCEFClk; in vega20_init_smc_table()
811 (uint32_t)(data->vbios_boot_state.dcef_clock / 100), in vega20_init_smc_table()
1616 max_sustainable_clocks->dcef_clock = data->vbios_boot_state.dcef_clock / 100; in vega20_init_max_sustainable_clocks()
1637 &(max_sustainable_clocks->dcef_clock), in vega20_init_max_sustainable_clocks()
Dvega12_hwmgr.c731 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dcef_clock / 100; in vega12_setup_default_dpm_tables()
830 data->vbios_boot_state.dcef_clock = boot_up_values.ulDCEFClk; in vega12_init_smc_table()
837 (uint32_t)(data->vbios_boot_state.dcef_clock / 100), in vega12_init_smc_table()
Dvega10_hwmgr.c2664 data->vbios_boot_state.dcef_clock = boot_up_values.ulDCEFClk; in vega10_init_smc_table()
2676 (uint32_t)(data->vbios_boot_state.dcef_clock / 100), in vega10_init_smc_table()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/
Dsmu_v11_0.h70 uint32_t dcef_clock; member
Damdgpu_smu.h327 uint32_t dcef_clock; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsmu_v11_0.c824 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v11_0_init_max_sustainable_clocks()
853 &(max_sustainable_clocks->dcef_clock), in smu_v11_0_init_max_sustainable_clocks()
1444 (unsigned int) sustainable_clocks->dcef_clock * 1000; in smu_v11_0_get_max_sustainable_clocks_by_dc()
Dnavi10_ppt.c1580 min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; in navi10_notify_smc_display_config()
1586 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in navi10_notify_smc_display_config()
Dsienna_cichlid_ppt.c1411 min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; in sienna_cichlid_notify_smc_display_config()
1417 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in sienna_cichlid_notify_smc_display_config()