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Searched refs:In64BitMode (Results 1 – 25 of 25) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Subtarget.cpp224 if (In64BitMode || isTargetWin32()) in isLegalToCallImmediateAddr()
235 if (In64BitMode) { in initSubtargetFeatures()
253 if (!In64BitMode) { in initSubtargetFeatures()
272 if (In64BitMode) in initSubtargetFeatures()
284 if (In64BitMode && !HasX86_64) in initSubtargetFeatures()
293 isTargetKFreeBSD() || In64BitMode) in initSubtargetFeatures()
331 In64BitMode(TargetTriple.getArch() == Triple::x86_64), in X86Subtarget()
DX86InstrVMX.td24 Requires<[In64BitMode]>;
32 Requires<[In64BitMode]>;
52 "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>,
60 "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>,
68 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>,
76 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>,
DX86InstrMPX.td24 Requires<[In64BitMode]>;
35 Requires<[In64BitMode]>;
42 Requires<[In64BitMode]>;
57 Requires<[In64BitMode]>, NotMemoryFoldable;
69 Requires<[In64BitMode]>, NotMemoryFoldable;
DX86InstrSVM.td37 Requires<[In64BitMode]>;
45 Requires<[In64BitMode]>;
53 Requires<[In64BitMode]>;
61 "invlpga\t{%rax, %ecx|rax, ecx}", []>, TB, Requires<[In64BitMode]>;
DX86InstrControl.td26 "ret{q}", []>, OpSize32, Requires<[In64BitMode]>;
32 "ret{q}\t$amt", []>, OpSize32, Requires<[In64BitMode]>;
38 "{l}ret{|f}q", []>, Requires<[In64BitMode]>;
44 "{l}ret{|f}q\t$amt", []>, Requires<[In64BitMode]>;
54 def IRET64 : RI <0xcf, RawFrm, (outs), (ins), "iretq", []>, Requires<[In64BitMode]>;
122 "jrcxz\t$dst", []>, AdSize64, Requires<[In64BitMode]>;
142 [(brind GR64:$dst)]>, Requires<[In64BitMode]>,
145 [(brind (loadi64 addr:$dst))]>, Requires<[In64BitMode]>,
179 [(X86NoTrackBrind GR64 : $dst)]>, Requires<[In64BitMode]>,
183 Requires<[In64BitMode]>, Sched<[WriteJumpLd]>, NOTRACK;
[all …]
DX86InstrSystem.td52 Requires<[In64BitMode]>;
58 Requires<[In64BitMode]>;
119 Requires<[In64BitMode]>;
126 Requires<[In64BitMode]>;
138 Requires<[In64BitMode]>;
145 Requires<[In64BitMode]>;
278 OpSize32, Requires<[In64BitMode]>;
280 OpSize32, Requires<[In64BitMode]>;
303 OpSize32, Requires<[In64BitMode]>;
310 OpSize32, Requires<[In64BitMode]>;
[all …]
DX86Subtarget.h478 bool In64BitMode; variable
552 return In64BitMode; in is64Bit()
565 return In64BitMode && (TargetTriple.getEnvironment() == Triple::GNUX32 || in isTarget64BitILP32()
571 return In64BitMode && (TargetTriple.getEnvironment() != Triple::GNUX32 && in isTarget64BitLP64()
798 bool isTargetWin64() const { return In64BitMode && isOSWindows(); } in isTargetWin64()
800 bool isTargetWin32() const { return !In64BitMode && isOSWindows(); } in isTargetWin32()
DX86InstrExtension.td22 "{cltq|cdqe}", []>, Sched<[WriteALU]>, Requires<[In64BitMode]>;
34 "{cqto|cqo}", []>, Sched<[WriteALU]>, Requires<[In64BitMode]>;
158 Sched<[WriteALU]>, Requires<[In64BitMode]>;
162 Sched<[WriteALULd]>, Requires<[In64BitMode]>;
170 Sched<[WriteALU]>, OpSize16, Requires<[In64BitMode]>;
173 Sched<[WriteALU]>, OpSize32, Requires<[In64BitMode]>;
177 Sched<[WriteALULd]>, OpSize16, Requires<[In64BitMode]>;
180 Sched<[WriteALULd]>, OpSize32, Requires<[In64BitMode]>;
DX86InstrInfo.td953 def In64BitMode : Predicate<"Subtarget->is64Bit()">,
1214 Requires<[In64BitMode]>;
1222 Requires<[In64BitMode]>;
1237 Requires<[In64BitMode]>;
1315 Requires<[In64BitMode]>;
1328 Requires<[In64BitMode]>;
1348 OpSize32, Requires<[In64BitMode]>;
1352 OpSize32, Requires<[In64BitMode]>, NotMemoryFoldable;
1357 OpSize32, Requires<[In64BitMode]>;
1360 OpSize32, Requires<[In64BitMode]>;
[all …]
DX86InstrShiftRotate.td83 Requires<[In64BitMode]>;
101 Requires<[In64BitMode]>;
118 Requires<[In64BitMode]>;
183 Requires<[In64BitMode]>;
201 Requires<[In64BitMode]>;
218 Requires<[In64BitMode]>;
286 Requires<[In64BitMode]>;
304 Requires<[In64BitMode]>;
321 Requires<[In64BitMode]>;
408 "rcl{q}\t$dst", []>, Requires<[In64BitMode]>;
[all …]
DX86InstrArithmetic.td32 OpSize32, Requires<[In64BitMode]>;
105 Requires<[In64BitMode]>;
143 Requires<[In64BitMode]>;
311 Requires<[In64BitMode]>;
342 Requires<[In64BitMode]>;
388 Requires<[In64BitMode]>;
423 Requires<[In64BitMode]>;
480 let Predicates = [UseIncDec, In64BitMode] in {
528 let Predicates = [UseIncDec, In64BitMode] in {
976 let Predicates = [In64BitMode] in
[all …]
DX86InstrCompiler.td113 Requires<[In64BitMode]>;
134 Requires<[In64BitMode]>;
146 Requires<[In64BitMode]>, Sched<[WriteALU]>;
201 Requires<[In64BitMode]>;
210 Requires<[In64BitMode]>;
394 Requires<[NotLP64, In64BitMode]>;
437 Requires<[NotLP64, In64BitMode]>;
503 Requires<[In64BitMode]>;
507 Requires<[In64BitMode]>;
533 Requires<[In64BitMode]>;
[all …]
DX86InstrFPStack.td761 TB, Requires<[HasFXSR, In64BitMode]>;
770 TB, Requires<[HasFXSR, In64BitMode]>;
DX86InstrMMX.td596 let Uses = [RDI], Predicates = [HasMMX, HasSSE1,In64BitMode] in
DX86.td22 def Mode64Bit : SubtargetFeature<"64bit-mode", "In64BitMode", "true",
DX86InstrFormats.td983 : I<o, F, outs, ins, asm, pattern>, PS, Requires<[HasMMX,In64BitMode]>;
DX86InstrSSE.td4002 let Uses = [RDI], Predicates = [HasAVX,In64BitMode] in
4013 let Uses = [RDI], Predicates = [UseSSE2,In64BitMode] in
4906 TB, Requires<[HasSSE3, In64BitMode]>;
4914 def : InstAlias<"mwait\t{%rax, %rcx|rcx, rax}", (MWAITrr)>, Requires<[In64BitMode]>;
4919 Requires<[In64BitMode]>;
DX86ISelLowering.cpp5530 bool In64BitMode = DAG.getTargetLoweringInfo().isTypeLegal(MVT::i64); in getConstVector() local
5531 if (!In64BitMode && VT.getVectorElementType() == MVT::i64) { in getConstVector()
5561 bool In64BitMode = DAG.getTargetLoweringInfo().isTypeLegal(MVT::i64); in getConstVector() local
5562 if (!In64BitMode && VT.getVectorElementType() == MVT::i64) { in getConstVector()
DX86InstrAVX512.td3883 Requires<[HasAVX512, In64BitMode]>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td76 [(retflag)]>, Requires<[In64BitMode]>;
81 Requires<[In64BitMode]>;
85 Requires<[In64BitMode]>;
89 Requires<[In64BitMode]>;
92 Requires<[In64BitMode]>;
148 Requires<[In64BitMode]>;
154 Requires<[In64BitMode]>;
158 Requires<[In64BitMode]>;
161 Requires<[In64BitMode]>;
173 Requires<[In64BitMode]>;
[all …]
DPPCInstrVSX.td1649 Requires<[In64BitMode]>;
1654 Requires<[In64BitMode]>;
1665 Requires<[In64BitMode]>;
1670 Requires<[In64BitMode]>;
1693 []>, Requires<[In64BitMode]>;
1697 []>, Requires<[In64BitMode]>;
DPPCInstrInfo.td935 def In64BitMode : Predicate<"PPCSubTarget->isPPC64()">;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsInstrFPU.td102 // S64 - single precision in 32 64bit fp registers (In64BitMode)
104 // D64 - double precision in 32 64bit fp registers (In64BitMode)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTarget.td1376 /// def : MnemonicAlias<"pushf", "pushfq">, Requires<[In64BitMode]>;
1381 /// def : MnemonicAlias<"pushf", "pushfq", "att">, Requires<[In64BitMode]>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenSubtargetInfo.inc23226 if (Bits[X86::Mode64Bit]) In64BitMode = true;