| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 3990 PPCInstrInfo::isSignOrZeroExtended(const MachineInstr &MI, bool SignExt, in isSignOrZeroExtended() argument
3997 if (SignExt ? isSignExtendingOp(MI): in isSignOrZeroExtended()
4014 return SignExt ? FuncInfo->isLiveInSExt(VReg) : in isSignOrZeroExtended()
4041 return Attrs.hasAttribute(SignExt ? Attribute::SExt : in isSignOrZeroExtended()
4053 return isSignOrZeroExtended(*SrcMI, SignExt, Depth); in isSignOrZeroExtended()
4077 return isSignOrZeroExtended(*SrcMI, SignExt, Depth); in isSignOrZeroExtended()
4105 if (SrcMI == NULL || !isSignOrZeroExtended(*SrcMI, SignExt, Depth+1)) in isSignOrZeroExtended()
4136 if(SignExt) in isSignOrZeroExtended()
4137 return isSignOrZeroExtended(*MISrc1, SignExt, Depth+1) && in isSignOrZeroExtended()
4138 isSignOrZeroExtended(*MISrc2, SignExt, Depth+1); in isSignOrZeroExtended()
[all …]
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| D | PPCInstrInfo.h | 406 bool isSignOrZeroExtended(const MachineInstr &MI, bool SignExt,
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceInstMIPS32.cpp | 37 bool OperandMIPS32Mem::canHoldOffset(Type Ty, bool SignExt, int32_t Offset) { in canHoldOffset() argument
38 (void)SignExt; in canHoldOffset()
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| D | IceTargetLoweringMIPS32.cpp | 1782 constexpr bool SignExt = true; in newBaseRegister() local
1783 if (!OperandMIPS32Mem::canHoldOffset(Base->getType(), SignExt, Offset)) { in newBaseRegister()
2098 constexpr bool SignExt = true; in legalizeMemOperand() local
2099 if (!OperandMIPS32Mem::canHoldOffset(Mem->getType(), SignExt, Offset)) { in legalizeMemOperand()
2278 constexpr bool SignExt = false; in hiOperand() local
2279 if (!OperandMIPS32Mem::canHoldOffset(SplitType, SignExt, NextOffsetVal)) { in hiOperand()
3418 constexpr bool SignExt = false; in lowerCall() local
3419 if (OperandMIPS32Mem::canHoldOffset(Ty, SignExt, StackArg.second)) { in lowerCall()
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| D | IceInstARM32.cpp | 347 bool OperandARM32Mem::canHoldOffset(Type Ty, bool SignExt, int32_t Offset) { in canHoldOffset() argument
348 int32_t Bits = SignExt ? TypeARM32Attributes[Ty].SExtAddrOffsetBits in canHoldOffset()
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| D | IceInstMIPS32.h | 150 static bool canHoldOffset(Type Ty, bool SignExt, int32_t Offset);
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| D | IceInstARM32.h | 148 static bool canHoldOffset(Type Ty, bool SignExt, int32_t Offset);
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| D | IceTargetLoweringARM32.cpp | 3577 constexpr bool SignExt = false; in lowerCall() local
3578 if (OperandARM32Mem::canHoldOffset(Ty, SignExt, StackArg.second)) { in lowerCall()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | IndVarSimplify.cpp | 1159 auto GuessNonIVOperand = [&](bool SignExt) { in cloneArithmeticIVUser() argument
1163 auto GetExtend = [this, SignExt](const SCEV *S, Type *Ty) { in cloneArithmeticIVUser()
1164 if (SignExt) in cloneArithmeticIVUser()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 22513 SDValue SignExt = Curr; in LowerEXTEND_VECTOR_INREG() local
22536 SignExt = DAG.getNode(X86ISD::VSRAI, dl, DestVT, Curr, in LowerEXTEND_VECTOR_INREG()
22544 SignExt = DAG.getVectorShuffle(MVT::v4i32, dl, SignExt, Sign, {0, 4, 1, 5}); in LowerEXTEND_VECTOR_INREG()
22545 SignExt = DAG.getBitcast(VT, SignExt); in LowerEXTEND_VECTOR_INREG()
22548 return SignExt; in LowerEXTEND_VECTOR_INREG()
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