Searched refs:code_offset (Results 1 – 10 of 10) sorted by relevance
| /third_party/mesa3d/src/imagination/vulkan/ |
| D | pvr_job_context.c | 325 uint32_t code_offset; in pvr_pds_render_ctx_sr_program_create_and_upload() local
338 code_offset = ALIGN_POT(program.data_size, pds_data_alignment); in pvr_pds_render_ctx_sr_program_create_and_upload()
342 &staging_buffer[code_offset], in pvr_pds_render_ctx_sr_program_create_and_upload()
353 &staging_buffer[code_offset], in pvr_pds_render_ctx_sr_program_create_and_upload()
384 uint32_t code_offset; in pvr_pds_compute_ctx_sr_program_create_and_upload() local
404 code_offset = ALIGN_POT(program.data_size, pds_data_alignment); in pvr_pds_compute_ctx_sr_program_create_and_upload()
407 pvr_pds_generate_compute_barrier_conditional(&staging_buffer[code_offset], in pvr_pds_compute_ctx_sr_program_create_and_upload()
438 &staging_buffer[code_offset], in pvr_pds_compute_ctx_sr_program_create_and_upload()
439 (uint32_t)(buffer_ptr - &staging_buffer[code_offset]), in pvr_pds_compute_ctx_sr_program_create_and_upload()
795 PVR_DEV_ADDR(sr_prog->pds.store_program.code_offset); in pvr_render_ctx_ws_static_state_init()
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| D | pvr_device.c | 2258 const uint32_t code_offset = ALIGN_POT(data_aligned_size, code_alignment); in pvr_gpu_upload_pds() local
2260 const uint64_t bo_size = (!!code) ? (code_offset + code_aligned_size) in pvr_gpu_upload_pds()
2294 memcpy((uint8_t *)pds_upload_out->pvr_bo->bo->map + code_offset, in pvr_gpu_upload_pds()
2298 pds_upload_out->code_offset = in pvr_gpu_upload_pds()
2299 (pds_upload_out->pvr_bo->vma->dev_addr.addr + code_offset) - in pvr_gpu_upload_pds()
2306 pds_upload_out->code_offset = 0; in pvr_gpu_upload_pds()
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| D | pvr_private.h | 242 uint32_t code_offset; member
892 uint32_t code_offset; member
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| D | pvr_cmd_buffer.c | 667 PVR_DEV_ADDR(load_op->pds_tex_state_prog.code_offset); in pvr_pds_bgnd_pack_state()
1363 .pds_code_offset = program->code_offset, in pvr_compute_generate_idfwdf()
1403 .pds_code_offset = program->code_offset, in pvr_compute_generate_fence()
2979 info.pds_code_offset = pipeline->state.descriptor.pds_code.code_offset; in pvr_compute_update_shared()
3055 .pds_code_offset = pipeline->state.primary_program.code_offset, in pvr_compute_update_kernel()
3269 PVR_DEV_ADDR(vertex_descriptor_state->pds_code.code_offset); in pvr_emit_dirty_pds_state()
3785 PVR_DEV_ADDR(descriptor_shader_state->pds_code.code_offset); in pvr_setup_fragment_state_pointers()
4391 PVR_DEV_ADDR(state->pds_shader.code_offset); in pvr_emit_dirty_vdm_state()
4506 state->pds_shader.code_offset = program->program.code_offset; in pvr_validate_draw_state()
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_rgp_elf_object_pack.c | 240 uint32_t code_offset = rgp_shader_data->base_address - in ac_rgp_file_write_elf_text() local
242 uint32_t gap_between_code = code_offset - in ac_rgp_file_write_elf_text()
244 symbol_offset += code_offset; in ac_rgp_file_write_elf_text()
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| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_code.h | 208 uint32_t code_offset; /* US_CODE_OFFSET */ member
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| D | r300_fragprog_emit.c | 526 code->code_offset = in r300BuildFragmentProgramHwCode()
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| /third_party/python/Objects/ |
| D | codeobject.c | 451 int code_offset = 0; in code_getlnotab() local
460 int bdelta = bounds.ar_start - code_offset; in code_getlnotab()
466 code_offset = bounds.ar_start; in code_getlnotab()
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| /third_party/mesa3d/src/gallium/drivers/r300/ |
| D | r300_fs.c | 324 OUT_CB_REG(R300_US_CODE_OFFSET, code->code_offset); in r300_emit_fs_code_to_buffer()
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | anv_pipeline.c | 1164 uint32_t code_offset) in anv_pipeline_add_executable() argument
1235 stage->code, code_offset, stream); in anv_pipeline_add_executable()
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