| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/Disassembler/ |
| D | MSP430Disassembler.cpp | 324 static MSP430CC::CondCodes getCondCode(unsigned Cond) { in getCondCode() function
353 MI.addOperand(MCOperand::createImm(getCondCode(Cond))); in getInstructionCJ()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 890 DAG.getCondCode(ISD::SETEQ)); in lowerFP_TO_UINT()
900 DAG.getCondCode(ISD::SETEQ)); in lowerFP_TO_SINT()
980 CC = DAG.getCondCode(InverseCC); in LowerSELECT_CC()
986 CC = DAG.getCondCode(SwapInvCC); in LowerSELECT_CC()
1014 CC = DAG.getCondCode(CCSwapped); in LowerSELECT_CC()
1022 CC = DAG.getCondCode(CCSwapped); in LowerSELECT_CC()
1054 DAG.getCondCode(CCOpcode)); in LowerSELECT_CC()
1080 DAG.getCondCode(ISD::SETNE)); in LowerSELECT_CC()
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| D | SIISelLowering.cpp | 4233 DAG.getCondCode(CCOpcode)); in lowerICMPIntrinsic()
4265 Src1, DAG.getCondCode(CCOpcode)); in lowerFCMPIntrinsic()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 870 DAG.getCondCode(CCCode), NewLHS, NewRHS, in SoftenFloatOp_BR_CC()
939 DAG.getCondCode(CCCode)), in SoftenFloatOp_SELECT_CC()
961 NewRHS, DAG.getCondCode(CCCode)); in SoftenFloatOp_SETCC()
964 DAG.getCondCode(CCCode)), 0); in SoftenFloatOp_SETCC()
1737 DAG.getCondCode(CCCode), NewLHS, NewRHS, in ExpandFloatOp_BR_CC()
1836 DAG.getCondCode(CCCode)), 0); in ExpandFloatOp_SELECT_CC()
1853 DAG.getCondCode(CCCode)), 0); in ExpandFloatOp_SETCC()
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| D | LegalizeDAG.cpp | 1652 CC = DAG.getCondCode(InvCC); in LegalizeSetCCCondCode()
1665 CC = DAG.getCondCode(InvCC); in LegalizeSetCCCondCode()
3597 DAG.getCondCode(ISD::SETNE), Tmp3, in ExpandNode()
3727 CC = DAG.getCondCode(ISD::SETNE); in ExpandNode()
3759 Tmp4 = DAG.getCondCode(ISD::SETNE); in ExpandNode()
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| D | LegalizeIntegerTypes.cpp | 3878 LHSHi, RHSHi, DAG.getCondCode(CCCode)); in IntegerExpandSetCCOperands()
3934 DAG.getCondCode(CCCode)); in IntegerExpandSetCCOperands()
3963 DAG.getCondCode(CCCode), NewLHS, NewRHS, in ExpandIntOp_BR_CC()
3982 DAG.getCondCode(CCCode)), 0); in ExpandIntOp_SELECT_CC()
3999 DAG.UpdateNodeOperands(N, NewLHS, NewRHS, DAG.getCondCode(CCCode)), 0); in ExpandIntOp_SETCC()
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| D | SelectionDAG.cpp | 1587 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { in getCondCode() function in SelectionDAG
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| D | SelectionDAGBuilder.cpp | 7040 Opers.push_back(DAG.getCondCode(getFCmpCondCode(FPCmp->getPredicate()))); in visitConstrainedFPIntrinsic()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 746 SDValue getCondCode(ISD::CondCode Cond);
1007 {VT, MVT::Other}, {Chain, LHS, RHS, getCondCode(Cond)});
1008 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
1028 False, getCondCode(Cond));
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 878 ARMCC::CondCodes getCondCode() const { in getCondCode() function in __anon3b97cc8a0111::ARMOperand
2288 ARMCC::CondCodes CC = getCondCode(); in isITCondCodeNoAL()
2295 ARMCC::CondCodes CC = getCondCode(); in isITCondCodeRestrictedI()
2302 ARMCC::CondCodes CC = getCondCode(); in isITCondCodeRestrictedS()
2310 ARMCC::CondCodes CC = getCondCode(); in isITCondCodeRestrictedU()
2317 ARMCC::CondCodes CC = getCondCode(); in isITCondCodeRestrictedFP()
2344 Inst.addOperand(MCOperand::createImm(unsigned(getCondCode()))); in addCondCodeOperands()
2345 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; in addCondCodeOperands()
2395 Inst.addOperand(MCOperand::createImm(unsigned(getCondCode()))); in addITCondCodeOperands()
2400 Inst.addOperand(MCOperand::createImm(unsigned(ARMCC::getOppositeCondition(getCondCode())))); in addITCondCodeInvOperands()
[all …]
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| /third_party/mesa3d/src/nouveau/codegen/ |
| D | nv50_ir_from_nir.cpp | 144 CondCode getCondCode(nir_op);
702 Converter::getCondCode(nir_op op) in getCondCode() function in __anon914d0f6a0111::Converter
2644 getCondCode(op), in visit()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 514 AArch64CC::CondCode getCondCode() const { in getCondCode() function in __anon8353751c0111::AArch64Operand
1564 Inst.addOperand(MCOperand::createImm(getCondCode())); in addCondCodeOperands()
2030 OS << "<condcode " << getCondCode() << ">"; in print()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6252 DAG.getCondCode(ISD::SETEQ)); in LowerVSETCC()
9260 DAG.getCondCode(CC)); in LowerFSETCC()
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