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/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/common/hal/include/
Daud_hal.h34 #define aud_hal_set_audio_config_value(value) aud_ll_set_audio_config_va… argument
38 #define aud_hal_set_audio_config_samp_rate_adc(value) aud_ll_set_audio_config_sa… argument
42 #define aud_hal_set_audio_config_dac_enable(value) aud_ll_set_audio_config_da… argument
46 #define aud_hal_set_audio_config_adc_enable(value) aud_ll_set_audio_config_ad… argument
50 #define aud_hal_set_audio_config_dtmf_enable(value) aud_hal_set_audio_config_d… argument
54 #define aud_hal_set_audio_config_line_enable(value) aud_ll_set_audio_config_li… argument
58 #define aud_hal_set_audio_config_samp_rate_dac(value) aud_ll_set_audio_config_sa… argument
62 #define aud_hal_set_dtmf_config0_value(value) aud_ll_set_dtmf_config0_va… argument
66 #define aud_hal_set_dtmf_config0_tone_pattern(value) aud_ll_set_dtmf_config0_to… argument
70 #define aud_hal_set_dtmf_config0_tone_mode(value) aud_ll_set_dtmf_config0_to… argument
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/device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/hal/halmac/
Dhalmac_tx_desc_ap.h24 #define SET_TX_DESC_DISQSELSEQ(txdesc, value) \ argument
27 #define SET_TX_DESC_DISQSELSEQ_NO_CLR(txdesc, value) \ argument
38 #define SET_TX_DESC_IE_END_BODY(txdesc, value) \ argument
41 #define SET_TX_DESC_IE_END_BODY_NO_CLR(txdesc, value) \ argument
54 #define SET_TX_DESC_GF(txdesc, value) \ argument
57 #define SET_TX_DESC_GF_NO_CLR(txdesc, value) \ argument
68 #define SET_TX_DESC_AGG_EN_V1(txdesc, value) \ argument
71 #define SET_TX_DESC_AGG_EN_V1_NO_CLR(txdesc, value) \ argument
84 #define SET_TX_DESC_NO_ACM(txdesc, value) \ argument
87 #define SET_TX_DESC_NO_ACM_NO_CLR(txdesc, value) \ argument
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Dhalmac_original_c2h_ap.h33 #define C2H_SET_CMD_ID(c2h_pkt, value) \ argument
35 #define C2H_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
38 #define C2H_SET_SEQ(c2h_pkt, value) \ argument
40 #define C2H_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
43 #define DBG_SET_CMD_ID(c2h_pkt, value) \ argument
45 #define DBG_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
48 #define DBG_SET_SEQ(c2h_pkt, value) \ argument
50 #define DBG_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
53 #define DBG_SET_DBG_STR1(c2h_pkt, value) \ argument
55 #define DBG_SET_DBG_STR1_NO_CLR(c2h_pkt, value) \ argument
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Dhalmac_original_h2c_ap.h95 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
97 #define ORIGINAL_H2C_SET_CMD_ID_NO_CLR(h2c_pkt, value) \ argument
100 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
102 #define ORIGINAL_H2C_SET_CLASS_NO_CLR(h2c_pkt, value) \ argument
105 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
107 #define H2C2H_LB_SET_CMD_ID_NO_CLR(h2c_pkt, value) \ argument
110 #define H2C2H_LB_SET_CLASS(h2c_pkt, value) \ argument
112 #define H2C2H_LB_SET_CLASS_NO_CLR(h2c_pkt, value) \ argument
115 #define H2C2H_LB_SET_SEQ(h2c_pkt, value) \ argument
117 #define H2C2H_LB_SET_SEQ_NO_CLR(h2c_pkt, value) \ argument
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Dhalmac_tx_desc_ie_ap.h23 #define IE0_SET_TX_DESC_IE_END(txdesc_ie, value) \ argument
26 #define IE0_SET_TX_DESC_IE_END_NO_CLR(txdesc_ie, value) \ argument
32 #define IE0_SET_TX_DESC_IE_UP(txdesc_ie, value) \ argument
35 #define IE0_SET_TX_DESC_IE_UP_NO_CLR(txdesc_ie, value) \ argument
41 #define IE0_SET_TX_DESC_IE_NUM(txdesc_ie, value) \ argument
44 #define IE0_SET_TX_DESC_IE_NUM_NO_CLR(txdesc_ie, value) \ argument
50 #define IE0_SET_TX_DESC_ARFR_TABLE_SEL(txdesc_ie, value) \ argument
53 #define IE0_SET_TX_DESC_ARFR_TABLE_SEL_NO_CLR(txdesc_ie, value) \ argument
59 #define IE0_SET_TX_DESC_ARFR_HT_EN(txdesc_ie, value) \ argument
62 #define IE0_SET_TX_DESC_ARFR_HT_EN_NO_CLR(txdesc_ie, value) \ argument
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Dhalmac_tx_desc_buffer_ap.h22 #define SET_TX_DESC_BUFFER_RDG_EN(txdesc, value) \ argument
25 #define SET_TX_DESC_BUFFER_RDG_EN_NO_CLR(txdesc, value) \ argument
31 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL(txdesc, value) \ argument
34 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL_NO_CLR(txdesc, value) \ argument
40 #define SET_TX_DESC_BUFFER_AGG_EN(txdesc, value) \ argument
43 #define SET_TX_DESC_BUFFER_AGG_EN_NO_CLR(txdesc, value) \ argument
49 #define SET_TX_DESC_BUFFER_PKT_OFFSET(txdesc, value) \ argument
52 #define SET_TX_DESC_BUFFER_PKT_OFFSET_NO_CLR(txdesc, value) \ argument
58 #define SET_TX_DESC_BUFFER_OFFSET(txdesc, value) \ argument
61 #define SET_TX_DESC_BUFFER_OFFSET_NO_CLR(txdesc, value) \ argument
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Dhalmac_fw_offload_h2c_ap.h109 #define H2C_CMD_HEADER_SET_CATEGORY(h2c_pkt, value) \ argument
111 #define H2C_CMD_HEADER_SET_CATEGORY_NO_CLR(h2c_pkt, value) \ argument
114 #define H2C_CMD_HEADER_SET_ACK(h2c_pkt, value) \ argument
116 #define H2C_CMD_HEADER_SET_ACK_NO_CLR(h2c_pkt, value) \ argument
120 #define H2C_CMD_HEADER_SET_TOTAL_LEN(h2c_pkt, value) \ argument
122 #define H2C_CMD_HEADER_SET_TOTAL_LEN_NO_CLR(h2c_pkt, value) \ argument
126 #define H2C_CMD_HEADER_SET_SEQ_NUM(h2c_pkt, value) \ argument
128 #define H2C_CMD_HEADER_SET_SEQ_NUM_NO_CLR(h2c_pkt, value) \ argument
131 #define FW_OFFLOAD_H2C_SET_CATEGORY(h2c_pkt, value) \ argument
133 #define FW_OFFLOAD_H2C_SET_CATEGORY_NO_CLR(h2c_pkt, value) \ argument
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Dhalmac_fw_offload_c2h_ap.h110 #define C2H_HDR_SET_CMD_ID(c2h_pkt, value) \ argument
112 #define C2H_HDR_SET_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
115 #define C2H_HDR_SET_SEQ(c2h_pkt, value) \ argument
117 #define C2H_HDR_SET_SEQ_NO_CLR(c2h_pkt, value) \ argument
120 #define C2H_HDR_SET_C2H_SUB_CMD_ID(c2h_pkt, value) \ argument
122 #define C2H_HDR_SET_C2H_SUB_CMD_ID_NO_CLR(c2h_pkt, value) \ argument
125 #define C2H_HDR_SET_LEN(c2h_pkt, value) \ argument
127 #define C2H_HDR_SET_LEN_NO_CLR(c2h_pkt, value) \ argument
130 #define C2H_DBG_SET_DBG_MSG(c2h_pkt, value) \ argument
132 #define C2H_DBG_SET_DBG_MSG_NO_CLR(c2h_pkt, value) \ argument
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Dhalmac_tx_desc_chip.h22 #define SET_TX_DESC_DISQSELSEQ_8814A(txdesc, value) \ argument
25 #define SET_TX_DESC_GF_8814A(txdesc, value) SET_TX_DESC_GF(txdesc, value) argument
27 #define SET_TX_DESC_NO_ACM_8814A(txdesc, value) \ argument
30 #define SET_TX_DESC_AMSDU_PAD_EN_8814A(txdesc, value) \ argument
33 #define SET_TX_DESC_LS_8814A(txdesc, value) SET_TX_DESC_LS(txdesc, value) argument
35 #define SET_TX_DESC_HTC_8814A(txdesc, value) SET_TX_DESC_HTC(txdesc, value) argument
37 #define SET_TX_DESC_BMC_8814A(txdesc, value) SET_TX_DESC_BMC(txdesc, value) argument
39 #define SET_TX_DESC_OFFSET_8814A(txdesc, value) \ argument
42 #define SET_TX_DESC_TXPKTSIZE_8814A(txdesc, value) \ argument
48 #define SET_TX_DESC_MOREDATA_8814A(txdesc, value) \ argument
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Dhalmac_h2c_extra_info_ap.h35 #define PARAM_INFO_SET_LEN(extra_info, value) \ argument
37 #define PARAM_INFO_SET_LEN_NO_CLR(extra_info, value) \ argument
40 #define PARAM_INFO_SET_IO_CMD(extra_info, value) \ argument
42 #define PARAM_INFO_SET_IO_CMD_NO_CLR(extra_info, value) \ argument
46 #define PARAM_INFO_SET_MSK_EN(extra_info, value) \ argument
48 #define PARAM_INFO_SET_MSK_EN_NO_CLR(extra_info, value) \ argument
52 #define PARAM_INFO_SET_LLT_PG_BNDY(extra_info, value) \ argument
54 #define PARAM_INFO_SET_LLT_PG_BNDY_NO_CLR(extra_info, value) \ argument
58 #define PARAM_INFO_SET_EFUSE_RSVDPAGE_LOC(extra_info, value) \ argument
60 #define PARAM_INFO_SET_EFUSE_RSVDPAGE_LOC_NO_CLR(extra_info, value) \ argument
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Dhalmac_tx_desc_buffer_nic.h22 #define SET_TX_DESC_BUFFER_RDG_EN(txdesc, value) \ argument
25 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL(txdesc, value) \ argument
29 #define SET_TX_DESC_BUFFER_AGG_EN(txdesc, value) \ argument
32 #define SET_TX_DESC_BUFFER_PKT_OFFSET(txdesc, value) \ argument
36 #define SET_TX_DESC_BUFFER_OFFSET(txdesc, value) \ argument
39 #define SET_TX_DESC_BUFFER_TXPKTSIZE(txdesc, value) \ argument
46 #define SET_TX_DESC_BUFFER_USERATE(txdesc, value) \ argument
50 #define SET_TX_DESC_BUFFER_AMSDU(txdesc, value) \ argument
53 #define SET_TX_DESC_BUFFER_EN_HWSEQ(txdesc, value) \ argument
57 #define SET_TX_DESC_BUFFER_EN_HWEXSEQ(txdesc, value) \ argument
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Dhalmac_tx_desc_buffer_chip.h22 #define SET_TX_DESC_BUFFER_RDG_EN_8814B(txdesc, value) \ argument
26 #define SET_TX_DESC_BUFFER_BCNPKT_TSF_CTRL_8814B(txdesc, value) \ argument
30 #define SET_TX_DESC_BUFFER_AGG_EN_8814B(txdesc, value) \ argument
34 #define SET_TX_DESC_BUFFER_PKT_OFFSET_8814B(txdesc, value) \ argument
38 #define SET_TX_DESC_BUFFER_OFFSET_8814B(txdesc, value) \ argument
42 #define SET_TX_DESC_BUFFER_TXPKTSIZE_8814B(txdesc, value) \ argument
49 #define SET_TX_DESC_BUFFER_USERATE_8814B(txdesc, value) \ argument
53 #define SET_TX_DESC_BUFFER_AMSDU_8814B(txdesc, value) \ argument
56 #define SET_TX_DESC_BUFFER_EN_HWSEQ_8814B(txdesc, value) \ argument
60 #define SET_TX_DESC_BUFFER_EN_HWEXSEQ_8814B(txdesc, value) \ argument
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Dhalmac_original_h2c_nic.h95 #define ORIGINAL_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
98 #define ORIGINAL_H2C_SET_CLASS(h2c_pkt, value) \ argument
101 #define H2C2H_LB_SET_CMD_ID(h2c_pkt, value) \ argument
104 #define H2C2H_LB_SET_CLASS(h2c_pkt, value) \ argument
107 #define H2C2H_LB_SET_SEQ(h2c_pkt, value) \ argument
110 #define H2C2H_LB_SET_PAYLOAD1(h2c_pkt, value) \ argument
113 #define H2C2H_LB_SET_PAYLOAD2(h2c_pkt, value) \ argument
117 #define D0_SCAN_OFFLOAD_CTRL_SET_CMD_ID(h2c_pkt, value) \ argument
121 #define D0_SCAN_OFFLOAD_CTRL_SET_CLASS(h2c_pkt, value) \ argument
125 #define D0_SCAN_OFFLOAD_CTRL_SET_D0_SCAN_FUN_EN(h2c_pkt, value) \ argument
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Dhalmac_tx_desc_nic.h24 #define SET_TX_DESC_DISQSELSEQ(txdesc, value) \ argument
32 #define SET_TX_DESC_IE_END_BODY(txdesc, value) \ argument
42 #define SET_TX_DESC_GF(txdesc, value) \ argument
50 #define SET_TX_DESC_AGG_EN_V1(txdesc, value) \ argument
60 #define SET_TX_DESC_NO_ACM(txdesc, value) \ argument
68 #define SET_TX_DESC_BK_V1(txdesc, value) \ argument
78 #define SET_TX_DESC_BCNPKT_TSF_CTRL(txdesc, value) \ argument
89 #define SET_TX_DESC_AMSDU_PAD_EN(txdesc, value) \ argument
99 #define SET_TX_DESC_LS(txdesc, value) \ argument
109 #define SET_TX_DESC_HTC(txdesc, value) \ argument
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Dhalmac_original_c2h_nic.h33 #define C2H_SET_CMD_ID(c2h_pkt, value) \ argument
36 #define C2H_SET_SEQ(c2h_pkt, value) \ argument
39 #define DBG_SET_CMD_ID(c2h_pkt, value) \ argument
42 #define DBG_SET_SEQ(c2h_pkt, value) \ argument
45 #define DBG_SET_DBG_STR1(c2h_pkt, value) \ argument
48 #define DBG_SET_DBG_STR2(c2h_pkt, value) \ argument
51 #define DBG_SET_DBG_STR3(c2h_pkt, value) \ argument
54 #define DBG_SET_DBG_STR4(c2h_pkt, value) \ argument
57 #define DBG_SET_DBG_STR5(c2h_pkt, value) \ argument
60 #define DBG_SET_DBG_STR6(c2h_pkt, value) \ argument
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Dhalmac_tx_desc_ie_nic.h22 #define IE0_SET_TX_DESC_IE_END(txdesc_ie, value) \ argument
26 #define IE0_SET_TX_DESC_IE_UP(txdesc_ie, value) \ argument
30 #define IE0_SET_TX_DESC_IE_NUM(txdesc_ie, value) \ argument
34 #define IE0_SET_TX_DESC_ARFR_TABLE_SEL(txdesc_ie, value) \ argument
38 #define IE0_SET_TX_DESC_ARFR_HT_EN(txdesc_ie, value) \ argument
42 #define IE0_SET_TX_DESC_ARFR_OFDM_EN(txdesc_ie, value) \ argument
46 #define IE0_SET_TX_DESC_ARFR_CCK_EN(txdesc_ie, value) \ argument
50 #define IE0_SET_TX_DESC_HW_RTS_EN(txdesc_ie, value) \ argument
54 #define IE0_SET_TX_DESC_RTS_EN(txdesc_ie, value) \ argument
58 #define IE0_SET_TX_DESC_CTS2SELF(txdesc_ie, value) \ argument
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Dhalmac_tx_desc_ie_chip.h22 #define IE0_SET_TX_DESC_IE_END_8814B(txdesc_ie, value) \ argument
25 #define IE0_SET_TX_DESC_IE_UP_8814B(txdesc_ie, value) \ argument
29 #define IE0_SET_TX_DESC_IE_NUM_8814B(txdesc_ie, value) \ argument
33 #define IE0_SET_TX_DESC_ARFR_TABLE_SEL_8814B(txdesc_ie, value) \ argument
37 #define IE0_SET_TX_DESC_ARFR_HT_EN_8814B(txdesc_ie, value) \ argument
41 #define IE0_SET_TX_DESC_ARFR_OFDM_EN_8814B(txdesc_ie, value) \ argument
45 #define IE0_SET_TX_DESC_ARFR_CCK_EN_8814B(txdesc_ie, value) \ argument
49 #define IE0_SET_TX_DESC_HW_RTS_EN_8814B(txdesc_ie, value) \ argument
53 #define IE0_SET_TX_DESC_RTS_EN_8814B(txdesc_ie, value) \ argument
57 #define IE0_SET_TX_DESC_CTS2SELF_8814B(txdesc_ie, value) \ argument
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Dhalmac_fw_offload_h2c_nic.h110 #define H2C_CMD_HEADER_SET_CATEGORY(h2c_pkt, value) \ argument
113 #define H2C_CMD_HEADER_SET_ACK(h2c_pkt, value) \ argument
117 #define H2C_CMD_HEADER_SET_TOTAL_LEN(h2c_pkt, value) \ argument
121 #define H2C_CMD_HEADER_SET_SEQ_NUM(h2c_pkt, value) \ argument
125 #define FW_OFFLOAD_H2C_SET_CATEGORY(h2c_pkt, value) \ argument
128 #define FW_OFFLOAD_H2C_SET_ACK(h2c_pkt, value) \ argument
132 #define FW_OFFLOAD_H2C_SET_CMD_ID(h2c_pkt, value) \ argument
136 #define FW_OFFLOAD_H2C_SET_SUB_CMD_ID(h2c_pkt, value) \ argument
140 #define FW_OFFLOAD_H2C_SET_TOTAL_LEN(h2c_pkt, value) \ argument
144 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \ argument
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Dhalmac_fw_offload_c2h_nic.h110 #define C2H_HDR_SET_CMD_ID(c2h_pkt, value) \ argument
113 #define C2H_HDR_SET_SEQ(c2h_pkt, value) \ argument
117 #define C2H_HDR_SET_C2H_SUB_CMD_ID(c2h_pkt, value) \ argument
120 #define C2H_HDR_SET_LEN(c2h_pkt, value) \ argument
123 #define C2H_DBG_SET_DBG_MSG(c2h_pkt, value) \ argument
127 #define BT_COEX_INFO_SET_DATA_START(c2h_pkt, value) \ argument
131 #define SCAN_STATUS_RPT_SET_H2C_RETURN_CODE(c2h_pkt, value) \ argument
135 #define SCAN_STATUS_RPT_SET_H2C_SEQ(c2h_pkt, value) \ argument
139 #define SCAN_STATUS_RPT_SET_TSF_0(c2h_pkt, value) \ argument
143 #define SCAN_STATUS_RPT_SET_TSF_1(c2h_pkt, value) \ argument
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/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/driver/sys_ctrl/
Dsys_audio_driver.c21 uint32_t sys_drv_aud_select_clock(uint32_t value) in sys_drv_aud_select_clock()
36 uint32_t sys_drv_aud_clock_en(uint32_t value) in sys_drv_aud_clock_en()
51 uint32_t sys_drv_aud_vdd1v_en(uint32_t value) in sys_drv_aud_vdd1v_en()
60 uint32_t sys_drv_aud_vdd1v5_en(uint32_t value) in sys_drv_aud_vdd1v5_en()
69 uint32_t sys_drv_aud_mic1_en(uint32_t value) in sys_drv_aud_mic1_en()
78 uint32_t sys_drv_aud_mic2_en(uint32_t value) in sys_drv_aud_mic2_en()
87 uint32_t sys_drv_aud_audpll_en(uint32_t value) in sys_drv_aud_audpll_en()
96 uint32_t sys_drv_aud_aud_en(uint32_t value) in sys_drv_aud_aud_en()
105 uint32_t sys_drv_aud_dacdrv_en(uint32_t value) in sys_drv_aud_dacdrv_en()
114 uint32_t sys_drv_aud_bias_en(uint32_t value) in sys_drv_aud_bias_en()
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/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/bk7235/hal/
Dsys_hal.c96 void sys_hal_flash_set_clk(uint32_t value) in sys_hal_flash_set_clk()
101 void sys_hal_flash_set_clk_div(uint32_t value) in sys_hal_flash_set_clk_div()
503 void sys_hal_rtc_wakeup_enable(uint32_t value) in sys_hal_rtc_wakeup_enable()
557 uint32_t value = 0; in sys_hal_module_power_ctrl() local
601 uint32_t value = 0; in sys_hal_module_power_state_get() local
619 uint32_t value = 0; in sys_hal_module_RF_power_ctrl() local
709 void sys_hal_all_modules_clk_div_set(clk_div_reg_e reg, uint32_t value) in sys_hal_all_modules_clk_div_set()
731 void sys_hal_cpu_clk_div_set(uint32_t core_index, uint32_t value) in sys_hal_cpu_clk_div_set()
785 int32 sys_hal_lp_vol_set(uint32_t value) in sys_hal_lp_vol_set()
1171 void sys_hal_set_cksel_sadc(uint32_t value) in sys_hal_set_cksel_sadc()
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Dsystem_ll.h118 static inline void system_ll_set_cpu0_int_mask(system_hw_t *hw, uint32_t value) in system_ll_set_cpu0_int_mask()
128 static inline void system_ll_set_core0_halt_indicate(system_hw_t *hw, uint32_t value) in system_ll_set_core0_halt_indicate()
138 static inline void system_ll_set_cpu0_clk_div(system_hw_t *hw, uint32_t value) in system_ll_set_cpu0_clk_div()
148 static inline void system_ll_set_cpu1_int_mask(system_hw_t *hw, uint32_t value) in system_ll_set_cpu1_int_mask()
158 static inline void system_ll_set_core1_halt_indicate(system_hw_t *hw, uint32_t value) in system_ll_set_core1_halt_indicate()
168 static inline void system_ll_set_cpu1_clk_div(system_hw_t *hw, uint32_t value) in system_ll_set_cpu1_clk_div()
178 static inline void system_ll_set_core_clk_div(system_hw_t *hw, uint32_t value) in system_ll_set_core_clk_div()
188 static inline void system_ll_set_core_clk_sel(system_hw_t *hw, uint32_t value) in system_ll_set_core_clk_sel()
198 static inline void system_ll_set_bus_clk_div(system_hw_t *hw, uint32_t value) in system_ll_set_bus_clk_div()
208 static inline void system_ll_set_uart0_clk_div(system_hw_t *hw, uint32_t value) in system_ll_set_uart0_clk_div()
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Dsys_ll_op_if.h40 static inline void sys_ll_set_analog_reg_value(uint32_t addr, uint32_t value) in sys_ll_set_analog_reg_value()
51 static inline void sys_ll_set_analog_reg_bits(uint32_t addr, uint32_t value, uint32_t pos, uint32_t… in sys_ll_set_analog_reg_bits()
151 static inline void sys_ll_set_cpu_storage_connect_op_select_value(uint32_t value) in sys_ll_set_cpu_storage_connect_op_select_value()
165 static inline void sys_ll_set_cpu_storage_connect_op_select_boot_mode(uint32_t value) in sys_ll_set_cpu_storage_connect_op_select_boot_mode()
183 static inline void sys_ll_set_cpu_storage_connect_op_select_rf_switch_en(uint32_t value) in sys_ll_set_cpu_storage_connect_op_select_rf_switch_en()
201 static inline void sys_ll_set_cpu_storage_connect_op_select_rf_for_wifiorbt(uint32_t value) in sys_ll_set_cpu_storage_connect_op_select_rf_for_wifiorbt()
219 static inline void sys_ll_set_cpu_storage_connect_op_select_jtag_core_sel(uint32_t value) in sys_ll_set_cpu_storage_connect_op_select_jtag_core_sel()
237 static inline void sys_ll_set_cpu_storage_connect_op_select_flash_sel(uint32_t value) in sys_ll_set_cpu_storage_connect_op_select_flash_sel()
252 static inline void sys_ll_set_cpu0_int_halt_clk_op_value(uint32_t value) in sys_ll_set_cpu0_int_halt_clk_op_value()
266 static inline void sys_ll_set_cpu0_int_halt_clk_op_cpu0_sw_rst(uint32_t value) in sys_ll_set_cpu0_int_halt_clk_op_cpu0_sw_rst()
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/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/bk7235/soc/
Ddma2d_ll.h31 static inline void dma2d_ll_set_dma2d_control_reg_value(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_value()
42 static inline void dma2d_ll_set_dma2d_control_reg_tran_start(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_tran_start()
53 static inline void dma2d_ll_set_dma2d_control_reg_tran_suspend(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_tran_suspend()
64 static inline void dma2d_ll_set_dma2d_control_reg_tran_abort(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_tran_abort()
75 static inline void dma2d_ll_set_dma2d_control_reg_line_offset_mode(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_line_offset_mode()
86 static inline void dma2d_ll_set_dma2d_control_reg_error_int_en(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_error_int_en()
97 static inline void dma2d_ll_set_dma2d_control_reg_complete_int_en(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_complete_int_en()
108 static inline void dma2d_ll_set_dma2d_control_reg_waterm_int_en(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_waterm_int_en()
119 static inline void dma2d_ll_set_dma2d_control_reg_clut_error_int_en(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_clut_error_int_en()
130 static inline void dma2d_ll_set_dma2d_control_reg_clut_cmplt_int_en(dma2d_hw_t *hw, uint32_t value) in dma2d_ll_set_dma2d_control_reg_clut_cmplt_int_en()
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/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/common/hal/
Di2s_hal.c107 bk_err_t i2s_hal_en_set(uint32_t value) in i2s_hal_en_set()
113 bk_err_t i2s_hal_int_set(i2s_isr_id_t int_id, uint32_t value) in i2s_hal_int_set()
177 bk_err_t i2s_hal_role_set(uint32_t value) in i2s_hal_role_set()
183 bk_err_t i2s_hal_work_mode_set(uint32_t value) in i2s_hal_work_mode_set()
189 bk_err_t i2s_hal_lrck_invert_set(uint32_t value) in i2s_hal_lrck_invert_set()
195 bk_err_t i2s_hal_sck_invert_set(uint32_t value) in i2s_hal_sck_invert_set()
201 bk_err_t i2s_hal_lsb_first_set(uint32_t value) in i2s_hal_lsb_first_set()
207 bk_err_t i2s_hal_sync_len_set(uint32_t value) in i2s_hal_sync_len_set()
213 bk_err_t i2s_hal_data_len_set(uint32_t value) in i2s_hal_data_len_set()
219 bk_err_t i2s_hal_pcm_dlen_set(uint32_t value) in i2s_hal_pcm_dlen_set()
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