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Searched defs:CONFIG (Results 1 – 21 of 21) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/gpu/arm/mali400/umplock/
DMakefile44 CONFIG ?= arm macro
47 CONFIG ?= $(shell uname -m) macro
/device/soc/rockchip/common/kernel/drivers/gpu/arm/mali400/umplock/
DMakefile44 CONFIG ?= arm macro
47 CONFIG ?= $(shell uname -m) macro
/device/soc/rockchip/common/kernel/drivers/gpu/arm/mali400/ump/
DMakefile26 CONFIG := default macro
/device/soc/rockchip/common/vendor/drivers/gpu/arm/mali400/ump/
DMakefile26 CONFIG := default macro
/device/soc/hpmicro/sdk/hpm_sdk/soc/ip/
Dhpm_bacc_regs.h13 __RW uint32_t CONFIG; /* 0x0: Access timing for access */ member
Dhpm_pllctlv2_regs.h21 __RW uint32_t CONFIG; /* 0x94: PLL0 confguration register */ member
Dhpm_tsns_regs.h18 __RW uint32_t CONFIG; /* 0x14: Configuration */ member
Dhpm_spi_regs.h35 __R uint32_t CONFIG; /* 0x7C: Configuration Register */ member
Dhpm_adc12_regs.h13 __RW uint32_t CONFIG[12]; /* 0x0 - 0x2C: */ member
Dhpm_adc16_regs.h13 __RW uint32_t CONFIG[12]; /* 0x0 - 0x2C: */ member
/device/soc/st/common/platform/stm32mp1xx_hal/STM32MP1xx_HAL_Driver/Inc/
Dstm32mp1xx_hal.h130 #define IS_SYSCFG_ETHERNET_CONFIG(CONFIG) (((CONFIG) == SYSCFG_ETH_MII) || \ argument
173 #define IS_SYSCFG_CODE_CONFIG(CONFIG) ((CONFIG) < (0x10)) argument
/device/soc/bestechnic/bes2600/liteos_m/sdk/bsp/platform/hal/
Dreg_dma.h34 __IO uint32_t CONFIG; // 0x110+N*0x20 DMA Channel Configuration Register member
Dreg_ir.h29 __IO uint32_t CONFIG; //0x20 member
/device/soc/st/stm32f4xx/sdk/Drivers/STM32F4xx_HAL_Driver/Inc/
Dstm32f4xx_hal_cryp.h610 #define IS_CRYP_INIT(CONFIG)(((CONFIG) == CRYP_KEYIVCONFIG_ALWAYS) || \ argument
/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM5301/
Dhpm_sysctl_regs.h46 __RW uint32_t CONFIG; /* 0x1404: Reset Setting */ member
/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM6360/
Dhpm_sysctl_regs.h45 __RW uint32_t CONFIG; /* 0x1404: Reset Setting */ member
/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM5361/
Dhpm_sysctl_regs.h46 __RW uint32_t CONFIG; /* 0x1404: Reset Setting */ member
/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM6880/
Dhpm_sysctl_regs.h45 __RW uint32_t CONFIG; /* 0x1404: Reset Setting */ member
/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM6280/
Dhpm_sysctl_regs.h51 __RW uint32_t CONFIG; /* 0x1404: Reset Setting */ member
/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM6750/
Dhpm_sysctl_regs.h51 __RW uint32_t CONFIG; /* 0x1404: Reset Setting */ member
/device/soc/goodix/gr551x/sdk_liteos/gr551x_sdk/toolchain/gr551x/include/
Dgr551xx.h80 __IOM uint32_t CONFIG; /**< AES_REG_CONFIG, Address offset: 0x04 */ member
251 …__IOM uint32_t CONFIG; /**< HMAC_REG_CONFIG register, Adderss offset: 0x04 */ member
713 __IOM uint32_t CONFIG; /**< RNG_CONFIG, Address offset: 0x014 */ member