1 /* mbed Microcontroller Library 2 * CMSIS-style functionality to support dynamic vectors 3 ******************************************************************************* 4 * Copyright (c) 2011 ARM Limited. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 3. Neither the name of ARM Limited nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 26 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 ******************************************************************************* 30 */ 31 32 #ifndef MBED_CMSIS_NVIC_H 33 #define MBED_CMSIS_NVIC_H 34 35 #include "cmsis.h" 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 typedef void (*NVIC_DEFAULT_FAULT_HANDLER_T)(void); 42 43 void NVIC_DisableAllIRQs(void); 44 45 void NVIC_InitVectors(void); 46 47 void NVIC_SetDefaultFaultHandler(NVIC_DEFAULT_FAULT_HANDLER_T handler); 48 49 void NVIC_SetDefaultFaultHandler_cp(NVIC_DEFAULT_FAULT_HANDLER_T handler); 50 51 void NVIC_SetResetHandler(NVIC_DEFAULT_FAULT_HANDLER_T handler); 52 53 void NVIC_SetIrqHandler(uint16_t irq, NVIC_DEFAULT_FAULT_HANDLER_T handler); 54 55 void NVIC_SetIrqHandler_cp(uint16_t irq, NVIC_DEFAULT_FAULT_HANDLER_T handler); 56 57 IRQn_Type NVIC_GetCurrentActiveIRQ(void); 58 59 void NVIC_PowerDownSleep(uint32_t *buf, uint32_t cnt); 60 61 void NVIC_PowerDownWakeup(uint32_t *buf, uint32_t cnt); 62 63 uint32_t* NVIC_GetVectorTab(); 64 65 #ifdef __ARM_ARCH_ISA_ARM 66 enum EXCEPTION_ID_T { 67 EXCEPTION_NONE = -1, 68 EXCEPTION_UNDEF = -2, 69 EXCEPTION_SVC = -3, 70 EXCEPTION_PABT = -4, 71 EXCEPTION_DABT = -5, 72 EXCEPTION_HYP = -6, 73 EXCEPTION_IRQ = -7, 74 EXCEPTION_FIQ = -8, 75 }; 76 77 struct FAULT_REGS_T { 78 uint32_t r[16]; 79 uint32_t spsr; 80 }; 81 82 struct UNDEF_FAULT_INFO_T { 83 enum EXCEPTION_ID_T id; 84 uint32_t opcode; 85 uint32_t state; 86 }; 87 88 struct SVC_FAULT_INFO_T { 89 enum EXCEPTION_ID_T id; 90 uint32_t svc_num; 91 }; 92 93 struct PABT_FAULT_INFO_T { 94 enum EXCEPTION_ID_T id; 95 uint32_t IFSR; 96 uint32_t IFAR; 97 }; 98 99 struct DABT_FAULT_INFO_T { 100 enum EXCEPTION_ID_T id; 101 uint32_t DFSR; 102 uint32_t DFAR; 103 }; 104 105 typedef void (*GIC_FAULT_DUMP_HANDLER_T)(const uint32_t *regs, const uint32_t *extra, uint32_t extra_len); 106 107 void GIC_DisableAllIRQs(void); 108 109 void GIC_InitVectors(void); 110 111 void GIC_SetFaultDumpHandler(GIC_FAULT_DUMP_HANDLER_T handler); 112 113 IRQn_Type IRQ_GetCurrentActiveIRQ(void); 114 #endif 115 116 #ifdef __cplusplus 117 } 118 #endif 119 120 #endif 121