1 /**
2 ******************************************************************************
3 * @file stm32mp1xx_hal_adc_ex.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Converter (ADC)
7 * peripheral:
8 * + Operation functions
9 * ++ Start, stop, get result of conversions of ADC group injected,
10 * using 2 possible modes: polling, interruption.
11 * ++ Calibration
12 * +++ ADC automatic self-calibration
13 * +++ Calibration factors get or set
14 * ++ Multimode feature when available
15 * + Control functions
16 * ++ Channels configuration on ADC group injected
17 * + State functions
18 * ++ ADC group injected contexts queue management
19 * Other functions (generic functions) are available in file
20 * "stm32mp1xx_hal_adc.c".
21 *
22 @verbatim
23 [..]
24 (@) Sections "ADC peripheral features" and "How to use this driver" are
25 available in file of generic functions "stm32mp1xx_hal_adc.c".
26 [..]
27 @endverbatim
28 ******************************************************************************
29 * @attention
30 *
31 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
32 * All rights reserved.</center></h2>
33 *
34 * This software component is licensed by ST under BSD 3-Clause license,
35 * the "License"; You may not use this file except in compliance with the
36 * License. You may obtain a copy of the License at:
37 * opensource.org/licenses/BSD-3-Clause
38 *
39 ******************************************************************************
40 */
41
42 /* Includes ------------------------------------------------------------------*/
43 #include "stm32mp1xx_hal.h"
44
45 /** @addtogroup STM32MP1xx_HAL_Driver
46 * @{
47 */
48
49 /** @defgroup ADCEx ADCEx
50 * @brief ADC Extended HAL module driver
51 * @{
52 */
53
54 #ifdef HAL_ADC_MODULE_ENABLED
55
56 /* Private typedef -----------------------------------------------------------*/
57 /* Private define ------------------------------------------------------------*/
58
59 /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
60 * @{
61 */
62
63 #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\
64 ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\
65 ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can be updated anytime once the ADC is enabled */
66
67 /* Fixed timeout value for ADC calibration. */
68 /* Values defined to be higher than worst cases: maximum ratio between ADC */
69 /* and CPU clock frequencies. */
70 /* Example of profile low frequency : ADC frequency at 15.625kHz (ADC clock */
71 /* source PLL4_Q 4MHz, ADC clock prescaler 256), CPU frequency 650MHz. */
72 /* Calibration time max = 16384 / fADC (refer to datasheet) */
73 /* = 682000000 CPU cycles */
74 #define ADC_CALIBRATION_TIMEOUT (682000000U) /*!< ADC calibration time-out value */
75
76 /**
77 * @}
78 */
79
80 /* Private macro -------------------------------------------------------------*/
81 /* Private variables ---------------------------------------------------------*/
82 /* Private function prototypes -----------------------------------------------*/
83 /* Exported functions --------------------------------------------------------*/
84
85 /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
86 * @{
87 */
88
89 /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
90 * @brief Extended IO operation functions
91 *
92 @verbatim
93 ===============================================================================
94 ##### IO operation functions #####
95 ===============================================================================
96 [..] This section provides functions allowing to:
97
98 (+) Perform the ADC self-calibration for single or differential ending.
99 (+) Get calibration factors for single or differential ending.
100 (+) Set calibration factors for single or differential ending.
101
102 (+) Start conversion of ADC group injected.
103 (+) Stop conversion of ADC group injected.
104 (+) Poll for conversion complete on ADC group injected.
105 (+) Get result of ADC group injected channel conversion.
106 (+) Start conversion of ADC group injected and enable interruptions.
107 (+) Stop conversion of ADC group injected and disable interruptions.
108
109 (+) When multimode feature is available, start multimode and enable DMA transfer.
110 (+) Stop multimode and disable ADC DMA transfer.
111 (+) Get result of multimode conversion.
112
113 @endverbatim
114 * @{
115 */
116
117 /**
118 * @brief Perform an ADC automatic self-calibration
119 * Calibration prerequisite: ADC must be disabled (execute this
120 * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
121 * @param hadc ADC handle
122 * @param CalibrationMode Selection of calibration offset or
123 * linear calibration offset.
124 * @arg ADC_CALIB_OFFSET Channel in mode calibration offset
125 * @arg ADC_CALIB_OFFSET_LINEARITY Channel in mode linear calibration offset
126 * @param SingleDiff Selection of single-ended or differential input
127 * This parameter can be one of the following values:
128 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
129 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
130 * @retval HAL status
131 */
HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef * hadc,uint32_t CalibrationMode,uint32_t SingleDiff)132 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t CalibrationMode, uint32_t SingleDiff)
133 {
134 HAL_StatusTypeDef tmp_hal_status;
135 __IO uint32_t wait_loop_index = 0UL;
136
137 /* Check the parameters */
138 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
139 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
140
141 /* Process locked */
142 __HAL_LOCK(hadc);
143
144 /* Calibration prerequisite: ADC must be disabled. */
145
146 /* Disable the ADC (if not already disabled) */
147 tmp_hal_status = ADC_Disable(hadc);
148
149 /* Check if ADC is effectively disabled */
150 if (tmp_hal_status == HAL_OK)
151 {
152 /* Set ADC state */
153 ADC_STATE_CLR_SET(hadc->State,
154 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
155 HAL_ADC_STATE_BUSY_INTERNAL);
156
157 /* Start ADC calibration in mode single-ended or differential */
158 LL_ADC_StartCalibration(hadc->Instance , CalibrationMode, SingleDiff );
159
160 /* Wait for calibration completion */
161 while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
162 {
163 wait_loop_index++;
164 if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
165 {
166 /* Update ADC state machine to error */
167 ADC_STATE_CLR_SET(hadc->State,
168 HAL_ADC_STATE_BUSY_INTERNAL,
169 HAL_ADC_STATE_ERROR_INTERNAL);
170
171 /* Process unlocked */
172 __HAL_UNLOCK(hadc);
173
174 return HAL_ERROR;
175 }
176 }
177
178 /* Set ADC state */
179 ADC_STATE_CLR_SET(hadc->State,
180 HAL_ADC_STATE_BUSY_INTERNAL,
181 HAL_ADC_STATE_READY);
182 }
183 else
184 {
185 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
186
187 /* Note: No need to update variable "tmp_hal_status" here: already set */
188 /* to state "HAL_ERROR" by function disabling the ADC. */
189 }
190
191 /* Process unlocked */
192 __HAL_UNLOCK(hadc);
193
194 /* Return function status */
195 return tmp_hal_status;
196 }
197
198 /**
199 * @brief Get the calibration factor.
200 * @param hadc ADC handle.
201 * @param SingleDiff This parameter can be only:
202 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
203 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
204 * @retval Calibration value.
205 */
HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)206 uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
207 {
208 /* Check the parameters */
209 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
210 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
211
212 /* Return the selected ADC calibration value */
213 return LL_ADC_GetCalibrationOffsetFactor(hadc->Instance, SingleDiff);
214 }
215
216 /**
217 * @brief Get the calibration factor from automatic conversion result
218 * @param hadc ADC handle
219 * @param LinearCalib_Buffer: Linear calibration factor
220 * @retval HAL state
221 */
HAL_ADCEx_LinearCalibration_GetValue(ADC_HandleTypeDef * hadc,uint32_t * LinearCalib_Buffer)222 HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t* LinearCalib_Buffer)
223 {
224 uint32_t cnt;
225 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
226 uint32_t temp_REG_IsConversionOngoing = 0UL;
227
228 /* Check the parameters */
229 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
230
231 /* Enable the ADC ADEN = 1 to be able to read the linear calibration factor */
232 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
233 {
234 tmp_hal_status = ADC_Enable(hadc);
235 }
236
237 if (tmp_hal_status == HAL_OK)
238 {
239 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
240 {
241 LL_ADC_REG_StopConversion(hadc->Instance);
242 temp_REG_IsConversionOngoing = 1UL;
243 }
244 for(cnt = ADC_LINEAR_CALIB_REG_COUNT; cnt > 0UL; cnt--)
245 {
246 LinearCalib_Buffer[cnt-1U]=LL_ADC_GetCalibrationLinearFactor(hadc->Instance, ADC_CR_LINCALRDYW6 >> (ADC_LINEAR_CALIB_REG_COUNT-cnt));
247 }
248 if (temp_REG_IsConversionOngoing != 0UL)
249 {
250 LL_ADC_REG_StartConversion(hadc->Instance);
251 }
252 }
253
254 return tmp_hal_status;
255 }
256
257 /**
258 * @brief Set the calibration factor to overwrite automatic conversion result.
259 * ADC must be enabled and no conversion is ongoing.
260 * @param hadc ADC handle
261 * @param SingleDiff This parameter can be only:
262 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
263 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
264 * @param CalibrationFactor Calibration factor (coded on 7 bits maximum)
265 * @retval HAL state
266 */
HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff,uint32_t CalibrationFactor)267 HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff,
268 uint32_t CalibrationFactor)
269 {
270 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
271 uint32_t tmp_adc_is_conversion_on_going_regular;
272 uint32_t tmp_adc_is_conversion_on_going_injected;
273
274 /* Check the parameters */
275 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
276 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
277 assert_param(IS_ADC_CALFACT(CalibrationFactor));
278
279 /* Process locked */
280 __HAL_LOCK(hadc);
281
282 /* Verification of hardware constraints before modifying the calibration */
283 /* factors register: ADC must be enabled, no conversion on going. */
284 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
285 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
286
287 if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL)
288 && (tmp_adc_is_conversion_on_going_regular == 0UL)
289 && (tmp_adc_is_conversion_on_going_injected == 0UL)
290 )
291 {
292 /* Set the selected ADC calibration value */
293 LL_ADC_SetCalibrationOffsetFactor(hadc->Instance, SingleDiff, CalibrationFactor);
294 }
295 else
296 {
297 /* Update ADC state machine */
298 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
299 /* Update ADC error code */
300 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
301
302 /* Update ADC state machine to error */
303 tmp_hal_status = HAL_ERROR;
304 }
305
306 /* Process unlocked */
307 __HAL_UNLOCK(hadc);
308
309 /* Return function status */
310 return tmp_hal_status;
311 }
312
313 /**
314 * @brief Set the linear calibration factor
315 * @param hadc ADC handle
316 * @param LinearCalib_Buffer: Linear calibration factor
317 * @retval HAL state
318 */
HAL_ADCEx_LinearCalibration_SetValue(ADC_HandleTypeDef * hadc,uint32_t * LinearCalib_Buffer)319 HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t* LinearCalib_Buffer)
320 {
321 uint32_t cnt;
322 __IO uint32_t wait_loop_index = 0;
323
324 /* Check the parameters */
325 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
326
327 /* - Exit from deep-power-down mode and ADC voltage regulator enable */
328 /* Exit deep power down mode if still in that state */
329 if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_DEEPPWD))
330 {
331 /* Exit deep power down mode */
332 CLEAR_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD);
333
334 /* System was in deep power down mode, calibration must
335 be relaunched or a previously saved calibration factor
336 re-applied once the ADC voltage regulator is enabled */
337 }
338
339
340 if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
341 {
342 /* Enable ADC internal voltage regulator */
343 SET_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN);
344 /* Delay for ADC stabilization time */
345 /* Wait loop initialization and execution */
346 /* Note: Variable divided by 2 to compensate partially */
347 /* CPU processing cycles. */
348 wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / (1000000UL * 2UL)));
349 while(wait_loop_index != 0UL)
350 {
351 wait_loop_index--;
352 }
353 }
354
355
356 /* Verification that ADC voltage regulator is correctly enabled, whether */
357 /* or not ADC is coming from state reset (if any potential problem of */
358 /* clocking, voltage regulator would not be enabled). */
359 if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
360 {
361 /* Update ADC state machine to error */
362 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
363
364 /* Set ADC error code to ADC peripheral internal error */
365 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
366
367 return HAL_ERROR;
368 }
369 for(cnt = 0UL; cnt < ADC_LINEAR_CALIB_REG_COUNT; cnt++)
370 {
371 LL_ADC_SetCalibrationLinearFactor(hadc->Instance, ADC_CR_LINCALRDYW6 >> cnt, LinearCalib_Buffer[cnt]);
372 }
373 return HAL_OK;
374 }
375
376 /**
377 * @brief Enable ADC, start conversion of injected group.
378 * @note Interruptions enabled in this function: None.
379 * @note Case of multimode enabled when multimode feature is available:
380 * HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
381 * then for ADC master.
382 * For ADC slave, ADC is enabled only (conversion is not started).
383 * For ADC master, ADC is enabled and multimode conversion is started.
384 * @param hadc ADC handle.
385 * @retval HAL status
386 */
HAL_ADCEx_InjectedStart(ADC_HandleTypeDef * hadc)387 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc)
388 {
389 HAL_StatusTypeDef tmp_hal_status;
390 uint32_t tmp_config_injected_queue;
391 #if defined(ADC_MULTIMODE_SUPPORT)
392 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
393 #endif
394
395 /* Check the parameters */
396 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
397
398 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
399 {
400 return HAL_BUSY;
401 }
402 else
403 {
404 /* In case of software trigger detection enabled, JQDIS must be set
405 (which can be done only if ADSTART and JADSTART are both cleared).
406 If JQDIS is not set at that point, returns an error
407 - since software trigger detection is disabled. User needs to
408 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
409 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
410 the queue is empty */
411 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
412
413 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
414 && (tmp_config_injected_queue == 0UL)
415 )
416 {
417 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
418 return HAL_ERROR;
419 }
420
421 /* Process locked */
422 __HAL_LOCK(hadc);
423
424 /* Enable the ADC peripheral */
425 tmp_hal_status = ADC_Enable(hadc);
426
427 /* Start conversion if ADC is effectively enabled */
428 if (tmp_hal_status == HAL_OK)
429 {
430 /* Check if a regular conversion is ongoing */
431 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
432 {
433 /* Reset ADC error code field related to injected conversions only */
434 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
435 }
436 else
437 {
438 /* Set ADC error code to none */
439 ADC_CLEAR_ERRORCODE(hadc);
440 }
441
442 /* Set ADC state */
443 /* - Clear state bitfield related to injected group conversion results */
444 /* - Set state bitfield related to injected operation */
445 ADC_STATE_CLR_SET(hadc->State,
446 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
447 HAL_ADC_STATE_INJ_BUSY);
448
449 #if defined(ADC_MULTIMODE_SUPPORT)
450 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
451 - if ADC instance is master or if multimode feature is not available
452 - if multimode setting is disabled (ADC instance slave in independent mode) */
453 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
454 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
455 )
456 {
457 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
458 }
459 #endif
460
461 /* Clear ADC group injected group conversion flag */
462 /* (To ensure of no unknown state from potential previous ADC operations) */
463 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
464
465 /* Process unlocked */
466 /* Unlock before starting ADC conversions: in case of potential */
467 /* interruption, to let the process to ADC IRQ Handler. */
468 __HAL_UNLOCK(hadc);
469
470 /* Enable conversion of injected group, if automatic injected conversion */
471 /* is disabled. */
472 /* If software start has been selected, conversion starts immediately. */
473 /* If external trigger has been selected, conversion will start at next */
474 /* trigger event. */
475 /* Case of multimode enabled (when multimode feature is available): */
476 /* if ADC is slave, */
477 /* - ADC is enabled only (conversion is not started), */
478 /* - if multimode only concerns regular conversion, ADC is enabled */
479 /* and conversion is started. */
480 /* If ADC is master or independent, */
481 /* - ADC is enabled and conversion is started. */
482 #if defined(ADC_MULTIMODE_SUPPORT)
483 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
484 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
485 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
486 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
487 )
488 {
489 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
490 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
491 {
492 LL_ADC_INJ_StartConversion(hadc->Instance);
493 }
494 }
495 else
496 {
497 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
498 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
499 }
500 #else
501 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
502 {
503 /* Start ADC group injected conversion */
504 LL_ADC_INJ_StartConversion(hadc->Instance);
505 }
506 #endif
507
508 }
509 else
510 {
511 /* Process unlocked */
512 __HAL_UNLOCK(hadc);
513 }
514
515 /* Return function status */
516 return tmp_hal_status;
517 }
518 }
519
520 /**
521 * @brief Stop conversion of injected channels. Disable ADC peripheral if
522 * no regular conversion is on going.
523 * @note If ADC must be disabled and if conversion is on going on
524 * regular group, function HAL_ADC_Stop must be used to stop both
525 * injected and regular groups, and disable the ADC.
526 * @note If injected group mode auto-injection is enabled,
527 * function HAL_ADC_Stop must be used.
528 * @note In case of multimode enabled (when multimode feature is available),
529 * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
530 * For ADC master, conversion is stopped and ADC is disabled.
531 * For ADC slave, ADC is disabled only (conversion stop of ADC master
532 * has already stopped conversion of ADC slave).
533 * @param hadc ADC handle.
534 * @retval HAL status
535 */
HAL_ADCEx_InjectedStop(ADC_HandleTypeDef * hadc)536 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc)
537 {
538 HAL_StatusTypeDef tmp_hal_status;
539
540 /* Check the parameters */
541 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
542
543 /* Process locked */
544 __HAL_LOCK(hadc);
545
546 /* 1. Stop potential conversion on going on injected group only. */
547 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
548
549 /* Disable ADC peripheral if injected conversions are effectively stopped */
550 /* and if no conversion on regular group is on-going */
551 if (tmp_hal_status == HAL_OK)
552 {
553 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
554 {
555 /* 2. Disable the ADC peripheral */
556 tmp_hal_status = ADC_Disable(hadc);
557
558 /* Check if ADC is effectively disabled */
559 if (tmp_hal_status == HAL_OK)
560 {
561 /* Set ADC state */
562 ADC_STATE_CLR_SET(hadc->State,
563 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
564 HAL_ADC_STATE_READY);
565 }
566 }
567 /* Conversion on injected group is stopped, but ADC not disabled since */
568 /* conversion on regular group is still running. */
569 else
570 {
571 /* Set ADC state */
572 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
573 }
574 }
575
576 /* Process unlocked */
577 __HAL_UNLOCK(hadc);
578
579 /* Return function status */
580 return tmp_hal_status;
581 }
582
583 /**
584 * @brief Wait for injected group conversion to be completed.
585 * @param hadc ADC handle
586 * @param Timeout Timeout value in millisecond.
587 * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
588 * checked and cleared depending on AUTDLY bit status.
589 * @retval HAL status
590 */
HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)591 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
592 {
593 uint32_t tickstart;
594 uint32_t tmp_Flag_End;
595 uint32_t tmp_adc_inj_is_trigger_source_sw_start;
596 uint32_t tmp_adc_reg_is_trigger_source_sw_start;
597 uint32_t tmp_cfgr;
598 #if defined(ADC_MULTIMODE_SUPPORT)
599 const ADC_TypeDef *tmpADC_Master;
600 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
601 #endif
602
603 /* Check the parameters */
604 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
605
606 /* If end of sequence selected */
607 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
608 {
609 tmp_Flag_End = ADC_FLAG_JEOS;
610 }
611 else /* end of conversion selected */
612 {
613 tmp_Flag_End = ADC_FLAG_JEOC;
614 }
615
616 /* Get timeout */
617 tickstart = HAL_GetTick();
618
619 /* Wait until End of Conversion or Sequence flag is raised */
620 while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL)
621 {
622 /* Check if timeout is disabled (set to infinite wait) */
623 if (Timeout != HAL_MAX_DELAY)
624 {
625 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
626 {
627 /* Update ADC state machine to timeout */
628 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
629
630 /* Process unlocked */
631 __HAL_UNLOCK(hadc);
632
633 return HAL_TIMEOUT;
634 }
635 }
636 }
637
638 /* Retrieve ADC configuration */
639 tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance);
640 tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance);
641 /* Get relevant register CFGR in ADC instance of ADC master or slave */
642 /* in function of multimode state (for devices with multimode */
643 /* available). */
644 #if defined(ADC_MULTIMODE_SUPPORT)
645 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
646 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
647 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
648 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
649 )
650 {
651 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
652 }
653 else
654 {
655 tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance);
656 tmp_cfgr = READ_REG(tmpADC_Master->CFGR);
657 }
658 #else
659 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
660 #endif
661
662 /* Update ADC state machine */
663 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
664
665 /* Determine whether any further conversion upcoming on group injected */
666 /* by external trigger or by automatic injected conversion */
667 /* from group regular. */
668 if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) ||
669 ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) &&
670 ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) &&
671 (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL))))
672 {
673 /* Check whether end of sequence is reached */
674 if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS))
675 {
676 /* Particular case if injected contexts queue is enabled: */
677 /* when the last context has been fully processed, JSQR is reset */
678 /* by the hardware. Even if no injected conversion is planned to come */
679 /* (queue empty, triggers are ignored), it can start again */
680 /* immediately after setting a new context (JADSTART is still set). */
681 /* Therefore, state of HAL ADC injected group is kept to busy. */
682 if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL)
683 {
684 /* Set ADC state */
685 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
686
687 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL)
688 {
689 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
690 }
691 }
692 }
693 }
694
695 /* Clear polled flag */
696 if (tmp_Flag_End == ADC_FLAG_JEOS)
697 {
698 /* Clear end of sequence JEOS flag of injected group if low power feature */
699 /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
700 /* For injected groups, no new conversion will start before JEOS is */
701 /* cleared. */
702 if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL)
703 {
704 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
705 }
706 }
707 else
708 {
709 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
710 }
711
712 /* Return API HAL status */
713 return HAL_OK;
714 }
715
716 /**
717 * @brief Enable ADC, start conversion of injected group with interruption.
718 * @note Interruptions enabled in this function according to initialization
719 * setting : JEOC (end of conversion) or JEOS (end of sequence)
720 * @note Case of multimode enabled (when multimode feature is enabled):
721 * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
722 * then for ADC master.
723 * For ADC slave, ADC is enabled only (conversion is not started).
724 * For ADC master, ADC is enabled and multimode conversion is started.
725 * @param hadc ADC handle.
726 * @retval HAL status.
727 */
HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef * hadc)728 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc)
729 {
730 HAL_StatusTypeDef tmp_hal_status;
731 uint32_t tmp_config_injected_queue;
732 #if defined(ADC_MULTIMODE_SUPPORT)
733 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
734 #endif
735
736 /* Check the parameters */
737 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
738
739 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
740 {
741 return HAL_BUSY;
742 }
743 else
744 {
745 /* In case of software trigger detection enabled, JQDIS must be set
746 (which can be done only if ADSTART and JADSTART are both cleared).
747 If JQDIS is not set at that point, returns an error
748 - since software trigger detection is disabled. User needs to
749 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
750 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
751 the queue is empty */
752 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
753
754 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
755 && (tmp_config_injected_queue == 0UL)
756 )
757 {
758 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
759 return HAL_ERROR;
760 }
761
762 /* Process locked */
763 __HAL_LOCK(hadc);
764
765 /* Enable the ADC peripheral */
766 tmp_hal_status = ADC_Enable(hadc);
767
768 /* Start conversion if ADC is effectively enabled */
769 if (tmp_hal_status == HAL_OK)
770 {
771 /* Check if a regular conversion is ongoing */
772 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
773 {
774 /* Reset ADC error code field related to injected conversions only */
775 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
776 }
777 else
778 {
779 /* Set ADC error code to none */
780 ADC_CLEAR_ERRORCODE(hadc);
781 }
782
783 /* Set ADC state */
784 /* - Clear state bitfield related to injected group conversion results */
785 /* - Set state bitfield related to injected operation */
786 ADC_STATE_CLR_SET(hadc->State,
787 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
788 HAL_ADC_STATE_INJ_BUSY);
789
790 #if defined(ADC_MULTIMODE_SUPPORT)
791 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
792 - if ADC instance is master or if multimode feature is not available
793 - if multimode setting is disabled (ADC instance slave in independent mode) */
794 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
795 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
796 )
797 {
798 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
799 }
800 #endif
801
802 /* Clear ADC group injected group conversion flag */
803 /* (To ensure of no unknown state from potential previous ADC operations) */
804 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
805
806 /* Process unlocked */
807 /* Unlock before starting ADC conversions: in case of potential */
808 /* interruption, to let the process to ADC IRQ Handler. */
809 __HAL_UNLOCK(hadc);
810
811 /* Enable ADC Injected context queue overflow interrupt if this feature */
812 /* is enabled. */
813 if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL)
814 {
815 __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
816 }
817
818 /* Enable ADC end of conversion interrupt */
819 switch (hadc->Init.EOCSelection)
820 {
821 case ADC_EOC_SEQ_CONV:
822 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
823 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
824 break;
825 /* case ADC_EOC_SINGLE_CONV */
826 default:
827 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
828 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
829 break;
830 }
831
832 /* Enable conversion of injected group, if automatic injected conversion */
833 /* is disabled. */
834 /* If software start has been selected, conversion starts immediately. */
835 /* If external trigger has been selected, conversion will start at next */
836 /* trigger event. */
837 /* Case of multimode enabled (when multimode feature is available): */
838 /* if ADC is slave, */
839 /* - ADC is enabled only (conversion is not started), */
840 /* - if multimode only concerns regular conversion, ADC is enabled */
841 /* and conversion is started. */
842 /* If ADC is master or independent, */
843 /* - ADC is enabled and conversion is started. */
844 #if defined(ADC_MULTIMODE_SUPPORT)
845 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
846 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
847 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
848 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
849 )
850 {
851 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
852 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
853 {
854 LL_ADC_INJ_StartConversion(hadc->Instance);
855 }
856 }
857 else
858 {
859 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
860 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
861 }
862 #else
863 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
864 {
865 /* Start ADC group injected conversion */
866 LL_ADC_INJ_StartConversion(hadc->Instance);
867 }
868 #endif
869
870 }
871 else
872 {
873 /* Process unlocked */
874 __HAL_UNLOCK(hadc);
875 }
876
877 /* Return function status */
878 return tmp_hal_status;
879 }
880 }
881
882 /**
883 * @brief Stop conversion of injected channels, disable interruption of
884 * end-of-conversion. Disable ADC peripheral if no regular conversion
885 * is on going.
886 * @note If ADC must be disabled and if conversion is on going on
887 * regular group, function HAL_ADC_Stop must be used to stop both
888 * injected and regular groups, and disable the ADC.
889 * @note If injected group mode auto-injection is enabled,
890 * function HAL_ADC_Stop must be used.
891 * @note Case of multimode enabled (when multimode feature is available):
892 * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
893 * then for ADC slave.
894 * For ADC master, conversion is stopped and ADC is disabled.
895 * For ADC slave, ADC is disabled only (conversion stop of ADC master
896 * has already stopped conversion of ADC slave).
897 * @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
898 * @param hadc ADC handle
899 * @retval HAL status
900 */
HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef * hadc)901 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc)
902 {
903 HAL_StatusTypeDef tmp_hal_status;
904
905 /* Check the parameters */
906 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
907
908 /* Process locked */
909 __HAL_LOCK(hadc);
910
911 /* 1. Stop potential conversion on going on injected group only. */
912 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
913
914 /* Disable ADC peripheral if injected conversions are effectively stopped */
915 /* and if no conversion on the other group (regular group) is intended to */
916 /* continue. */
917 if (tmp_hal_status == HAL_OK)
918 {
919 /* Disable ADC end of conversion interrupt for injected channels */
920 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF));
921
922 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
923 {
924 /* 2. Disable the ADC peripheral */
925 tmp_hal_status = ADC_Disable(hadc);
926
927 /* Check if ADC is effectively disabled */
928 if (tmp_hal_status == HAL_OK)
929 {
930 /* Set ADC state */
931 ADC_STATE_CLR_SET(hadc->State,
932 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
933 HAL_ADC_STATE_READY);
934 }
935 }
936 /* Conversion on injected group is stopped, but ADC not disabled since */
937 /* conversion on regular group is still running. */
938 else
939 {
940 /* Set ADC state */
941 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
942 }
943 }
944
945 /* Process unlocked */
946 __HAL_UNLOCK(hadc);
947
948 /* Return function status */
949 return tmp_hal_status;
950 }
951
952 #if defined(ADC_MULTIMODE_SUPPORT)
953 /**
954 * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
955 * @note Multimode must have been previously configured using
956 * HAL_ADCEx_MultiModeConfigChannel() function.
957 * Interruptions enabled in this function:
958 * overrun, DMA half transfer, DMA transfer complete.
959 * Each of these interruptions has its dedicated callback function.
960 * @note State field of Slave ADC handle is not updated in this configuration:
961 * user should not rely on it for information related to Slave regular
962 * conversions.
963 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
964 * @param pData Destination Buffer address.
965 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
966 * @retval HAL status
967 */
HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef * hadc,uint32_t * pData,uint32_t Length)968 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length)
969 {
970 HAL_StatusTypeDef tmp_hal_status;
971 ADC_HandleTypeDef tmphadcSlave;
972 ADC_Common_TypeDef *tmpADC_Common;
973
974 /* Check the parameters */
975 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
976 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
977 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
978
979 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
980 {
981 return HAL_BUSY;
982 }
983 else
984 {
985 /* Process locked */
986 __HAL_LOCK(hadc);
987
988 /* Set a temporary handle of the ADC slave associated to the ADC master */
989 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
990
991 if (tmphadcSlave.Instance == NULL)
992 {
993 /* Set ADC state */
994 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
995
996 /* Process unlocked */
997 __HAL_UNLOCK(hadc);
998
999 return HAL_ERROR;
1000 }
1001
1002 /* Enable the ADC peripherals: master and slave (in case if not already */
1003 /* enabled previously) */
1004 tmp_hal_status = ADC_Enable(hadc);
1005 if (tmp_hal_status == HAL_OK)
1006 {
1007 tmp_hal_status = ADC_Enable(&tmphadcSlave);
1008 }
1009
1010 /* Start multimode conversion of ADCs pair */
1011 if (tmp_hal_status == HAL_OK)
1012 {
1013 /* Set ADC state */
1014 ADC_STATE_CLR_SET(hadc->State,
1015 (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP),
1016 HAL_ADC_STATE_REG_BUSY);
1017
1018 /* Set ADC error code to none */
1019 ADC_CLEAR_ERRORCODE(hadc);
1020
1021 /* Set the DMA transfer complete callback */
1022 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1023
1024 /* Set the DMA half transfer complete callback */
1025 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1026
1027 /* Set the DMA error callback */
1028 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
1029
1030 /* Pointer to the common control register */
1031 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1032
1033 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
1034 /* start (in case of SW start): */
1035
1036 /* Clear regular group conversion flag and overrun flag */
1037 /* (To ensure of no unknown state from potential previous ADC operations) */
1038 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1039
1040 /* Process unlocked */
1041 /* Unlock before starting ADC conversions: in case of potential */
1042 /* interruption, to let the process to ADC IRQ Handler. */
1043 __HAL_UNLOCK(hadc);
1044
1045 /* Enable ADC overrun interrupt */
1046 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1047
1048 /* Start the DMA channel */
1049 tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
1050
1051 /* Enable conversion of regular group. */
1052 /* If software start has been selected, conversion starts immediately. */
1053 /* If external trigger has been selected, conversion will start at next */
1054 /* trigger event. */
1055 /* Start ADC group regular conversion */
1056 LL_ADC_REG_StartConversion(hadc->Instance);
1057 }
1058 else
1059 {
1060 /* Process unlocked */
1061 __HAL_UNLOCK(hadc);
1062 }
1063
1064 /* Return function status */
1065 return tmp_hal_status;
1066 }
1067 }
1068
1069 /**
1070 * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
1071 * @note Multimode is kept enabled after this function. MultiMode DMA bits
1072 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1073 * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1074 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1075 * resort to HAL_ADCEx_DisableMultiMode() API.
1076 * @note In case of DMA configured in circular mode, function
1077 * HAL_ADC_Stop_DMA() must be called after this function with handle of
1078 * ADC slave, to properly disable the DMA channel.
1079 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1080 * @retval HAL status
1081 */
HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef * hadc)1082 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1083 {
1084 HAL_StatusTypeDef tmp_hal_status;
1085 uint32_t tickstart;
1086 ADC_HandleTypeDef tmphadcSlave;
1087 uint32_t tmphadcSlave_conversion_on_going;
1088 HAL_StatusTypeDef tmphadcSlave_disable_status;
1089
1090 /* Check the parameters */
1091 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1092
1093 /* Process locked */
1094 __HAL_LOCK(hadc);
1095
1096
1097 /* 1. Stop potential multimode conversion on going, on regular and injected groups */
1098 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
1099
1100 /* Disable ADC peripheral if conversions are effectively stopped */
1101 if (tmp_hal_status == HAL_OK)
1102 {
1103 /* Set a temporary handle of the ADC slave associated to the ADC master */
1104 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1105
1106 if (tmphadcSlave.Instance == NULL)
1107 {
1108 /* Update ADC state machine to error */
1109 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1110
1111 /* Process unlocked */
1112 __HAL_UNLOCK(hadc);
1113
1114 return HAL_ERROR;
1115 }
1116
1117 /* Procedure to disable the ADC peripheral: wait for conversions */
1118 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1119
1120 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1121 tickstart = HAL_GetTick();
1122
1123 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1124 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1125 || (tmphadcSlave_conversion_on_going == 1UL)
1126 )
1127 {
1128 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1129 {
1130 /* Update ADC state machine to error */
1131 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1132
1133 /* Process unlocked */
1134 __HAL_UNLOCK(hadc);
1135
1136 return HAL_ERROR;
1137 }
1138
1139 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1140 }
1141
1142 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1143 /* while DMA transfer is on going) */
1144 /* Note: DMA channel of ADC slave should be stopped after this function */
1145 /* with HAL_ADC_Stop_DMA() API. */
1146 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1147
1148 /* Check if DMA channel effectively disabled */
1149 if (tmp_hal_status == HAL_ERROR)
1150 {
1151 /* Update ADC state machine to error */
1152 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1153 }
1154
1155 /* Disable ADC overrun interrupt */
1156 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1157
1158 /* 2. Disable the ADC peripherals: master and slave */
1159 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1160 /* memory a potential failing status. */
1161 if (tmp_hal_status == HAL_OK)
1162 {
1163 tmphadcSlave_disable_status = ADC_Disable(&tmphadcSlave);
1164 if ((ADC_Disable(hadc) == HAL_OK) &&
1165 (tmphadcSlave_disable_status == HAL_OK))
1166 {
1167 tmp_hal_status = HAL_OK;
1168 }
1169 }
1170 else
1171 {
1172 /* In case of error, attempt to disable ADC master and slave without status assert */
1173 (void) ADC_Disable(hadc);
1174 (void) ADC_Disable(&tmphadcSlave);
1175 }
1176
1177 /* Set ADC state (ADC master) */
1178 ADC_STATE_CLR_SET(hadc->State,
1179 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1180 HAL_ADC_STATE_READY);
1181 }
1182
1183 /* Process unlocked */
1184 __HAL_UNLOCK(hadc);
1185
1186 /* Return function status */
1187 return tmp_hal_status;
1188 }
1189
1190 /**
1191 * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
1192 * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
1193 * @retval The converted data values.
1194 */
HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef * hadc)1195 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc)
1196 {
1197 const ADC_Common_TypeDef *tmpADC_Common;
1198
1199 /* Check the parameters */
1200 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1201
1202 /* Prevent unused argument(s) compilation warning if no assert_param check */
1203 /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */
1204 UNUSED(hadc);
1205
1206 /* Pointer to the common control register */
1207 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1208
1209 /* Return the multi mode conversion value */
1210 return tmpADC_Common->CDR;
1211 }
1212 #endif /* ADC_MULTIMODE_SUPPORT */
1213
1214 /**
1215 * @brief Get ADC injected group conversion result.
1216 * @note Reading register JDRx automatically clears ADC flag JEOC
1217 * (ADC group injected end of unitary conversion).
1218 * @note This function does not clear ADC flag JEOS
1219 * (ADC group injected end of sequence conversion)
1220 * Occurrence of flag JEOS rising:
1221 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
1222 * to flag JEOC.
1223 * - If sequencer is composed of several ranks, during the scan
1224 * sequence flag JEOC only is raised, at the end of the scan sequence
1225 * both flags JEOC and EOS are raised.
1226 * Flag JEOS must not be cleared by this function because
1227 * it would not be compliant with low power features
1228 * (feature low power auto-wait, not available on all STM32 families).
1229 * To clear this flag, either use function:
1230 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1231 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
1232 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
1233 * @param hadc ADC handle
1234 * @param InjectedRank the converted ADC injected rank.
1235 * This parameter can be one of the following values:
1236 * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1
1237 * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2
1238 * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3
1239 * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4
1240 * @retval ADC group injected conversion data
1241 */
HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef * hadc,uint32_t InjectedRank)1242 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef *hadc, uint32_t InjectedRank)
1243 {
1244 uint32_t tmp_jdr;
1245
1246 /* Check the parameters */
1247 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1248 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
1249
1250 /* Get ADC converted value */
1251 switch (InjectedRank)
1252 {
1253 case ADC_INJECTED_RANK_4:
1254 tmp_jdr = hadc->Instance->JDR4;
1255 break;
1256 case ADC_INJECTED_RANK_3:
1257 tmp_jdr = hadc->Instance->JDR3;
1258 break;
1259 case ADC_INJECTED_RANK_2:
1260 tmp_jdr = hadc->Instance->JDR2;
1261 break;
1262 case ADC_INJECTED_RANK_1:
1263 default:
1264 tmp_jdr = hadc->Instance->JDR1;
1265 break;
1266 }
1267
1268 /* Return ADC converted value */
1269 return tmp_jdr;
1270 }
1271
1272 /**
1273 * @brief Injected conversion complete callback in non-blocking mode.
1274 * @param hadc ADC handle
1275 * @retval None
1276 */
HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef * hadc)1277 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc)
1278 {
1279 /* Prevent unused argument(s) compilation warning */
1280 UNUSED(hadc);
1281
1282 /* NOTE : This function should not be modified. When the callback is needed,
1283 function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
1284 */
1285 }
1286
1287 /**
1288 * @brief Injected context queue overflow callback.
1289 * @note This callback is called if injected context queue is enabled
1290 (parameter "QueueInjectedContext" in injected channel configuration)
1291 and if a new injected context is set when queue is full (maximum 2
1292 contexts).
1293 * @param hadc ADC handle
1294 * @retval None
1295 */
HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef * hadc)1296 __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc)
1297 {
1298 /* Prevent unused argument(s) compilation warning */
1299 UNUSED(hadc);
1300
1301 /* NOTE : This function should not be modified. When the callback is needed,
1302 function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
1303 */
1304 }
1305
1306 /**
1307 * @brief Analog watchdog 2 callback in non-blocking mode.
1308 * @param hadc ADC handle
1309 * @retval None
1310 */
HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef * hadc)1311 __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc)
1312 {
1313 /* Prevent unused argument(s) compilation warning */
1314 UNUSED(hadc);
1315
1316 /* NOTE : This function should not be modified. When the callback is needed,
1317 function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
1318 */
1319 }
1320
1321 /**
1322 * @brief Analog watchdog 3 callback in non-blocking mode.
1323 * @param hadc ADC handle
1324 * @retval None
1325 */
HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef * hadc)1326 __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc)
1327 {
1328 /* Prevent unused argument(s) compilation warning */
1329 UNUSED(hadc);
1330
1331 /* NOTE : This function should not be modified. When the callback is needed,
1332 function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
1333 */
1334 }
1335
1336
1337 /**
1338 * @brief End Of Sampling callback in non-blocking mode.
1339 * @param hadc ADC handle
1340 * @retval None
1341 */
HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef * hadc)1342 __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc)
1343 {
1344 /* Prevent unused argument(s) compilation warning */
1345 UNUSED(hadc);
1346
1347 /* NOTE : This function should not be modified. When the callback is needed,
1348 function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
1349 */
1350 }
1351
1352 /**
1353 * @brief Stop ADC conversion of regular group (and injected channels in
1354 * case of auto_injection mode), disable ADC peripheral if no
1355 * conversion is on going on injected group.
1356 * @param hadc ADC handle
1357 * @retval HAL status.
1358 */
HAL_ADCEx_RegularStop(ADC_HandleTypeDef * hadc)1359 HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc)
1360 {
1361 HAL_StatusTypeDef tmp_hal_status;
1362
1363 /* Check the parameters */
1364 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1365
1366 /* Process locked */
1367 __HAL_LOCK(hadc);
1368
1369 /* 1. Stop potential regular conversion on going */
1370 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1371
1372 /* Disable ADC peripheral if regular conversions are effectively stopped
1373 and if no injected conversions are on-going */
1374 if (tmp_hal_status == HAL_OK)
1375 {
1376 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1377 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1378
1379 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1380 {
1381 /* 2. Disable the ADC peripheral */
1382 tmp_hal_status = ADC_Disable(hadc);
1383
1384 /* Check if ADC is effectively disabled */
1385 if (tmp_hal_status == HAL_OK)
1386 {
1387 /* Set ADC state */
1388 ADC_STATE_CLR_SET(hadc->State,
1389 HAL_ADC_STATE_INJ_BUSY,
1390 HAL_ADC_STATE_READY);
1391 }
1392 }
1393 /* Conversion on injected group is stopped, but ADC not disabled since */
1394 /* conversion on regular group is still running. */
1395 else
1396 {
1397 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1398 }
1399 }
1400
1401 /* Process unlocked */
1402 __HAL_UNLOCK(hadc);
1403
1404 /* Return function status */
1405 return tmp_hal_status;
1406 }
1407
1408
1409 /**
1410 * @brief Stop ADC conversion of ADC groups regular and injected,
1411 * disable interrution of end-of-conversion,
1412 * disable ADC peripheral if no conversion is on going
1413 * on injected group.
1414 * @param hadc ADC handle
1415 * @retval HAL status.
1416 */
HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef * hadc)1417 HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc)
1418 {
1419 HAL_StatusTypeDef tmp_hal_status;
1420
1421 /* Check the parameters */
1422 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1423
1424 /* Process locked */
1425 __HAL_LOCK(hadc);
1426
1427 /* 1. Stop potential regular conversion on going */
1428 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1429
1430 /* Disable ADC peripheral if conversions are effectively stopped
1431 and if no injected conversion is on-going */
1432 if (tmp_hal_status == HAL_OK)
1433 {
1434 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1435 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1436
1437 /* Disable all regular-related interrupts */
1438 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1439
1440 /* 2. Disable ADC peripheral if no injected conversions are on-going */
1441 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1442 {
1443 tmp_hal_status = ADC_Disable(hadc);
1444 /* if no issue reported */
1445 if (tmp_hal_status == HAL_OK)
1446 {
1447 /* Set ADC state */
1448 ADC_STATE_CLR_SET(hadc->State,
1449 HAL_ADC_STATE_INJ_BUSY,
1450 HAL_ADC_STATE_READY);
1451 }
1452 }
1453 else
1454 {
1455 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1456 }
1457 }
1458
1459 /* Process unlocked */
1460 __HAL_UNLOCK(hadc);
1461
1462 /* Return function status */
1463 return tmp_hal_status;
1464 }
1465
1466 /**
1467 * @brief Stop ADC conversion of regular group (and injected group in
1468 * case of auto_injection mode), disable ADC DMA transfer, disable
1469 * ADC peripheral if no conversion is on going
1470 * on injected group.
1471 * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
1472 * For multimode (when multimode feature is available),
1473 * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
1474 * @param hadc ADC handle
1475 * @retval HAL status.
1476 */
HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef * hadc)1477 HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc)
1478 {
1479 HAL_StatusTypeDef tmp_hal_status;
1480
1481 /* Check the parameters */
1482 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1483
1484 /* Process locked */
1485 __HAL_LOCK(hadc);
1486
1487 /* 1. Stop potential regular conversion on going */
1488 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1489
1490 /* Disable ADC peripheral if conversions are effectively stopped
1491 and if no injected conversion is on-going */
1492 if (tmp_hal_status == HAL_OK)
1493 {
1494 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1495 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1496
1497 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1498 MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_DMNGT_0 |ADC_CFGR_DMNGT_1, 0UL);
1499
1500 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1501 /* while DMA transfer is on going) */
1502 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1503
1504 /* Check if DMA channel effectively disabled */
1505 if (tmp_hal_status != HAL_OK)
1506 {
1507 /* Update ADC state machine to error */
1508 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1509 }
1510
1511 /* Disable ADC overrun interrupt */
1512 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1513
1514 /* 2. Disable the ADC peripheral */
1515 /* Update "tmp_hal_status" only if DMA channel disabling passed, */
1516 /* to keep in memory a potential failing status. */
1517 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1518 {
1519 if (tmp_hal_status == HAL_OK)
1520 {
1521 tmp_hal_status = ADC_Disable(hadc);
1522 }
1523 else
1524 {
1525 (void)ADC_Disable(hadc);
1526 }
1527
1528 /* Check if ADC is effectively disabled */
1529 if (tmp_hal_status == HAL_OK)
1530 {
1531 /* Set ADC state */
1532 ADC_STATE_CLR_SET(hadc->State,
1533 HAL_ADC_STATE_INJ_BUSY,
1534 HAL_ADC_STATE_READY);
1535 }
1536 }
1537 else
1538 {
1539 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1540 }
1541 }
1542
1543 /* Process unlocked */
1544 __HAL_UNLOCK(hadc);
1545
1546 /* Return function status */
1547 return tmp_hal_status;
1548 }
1549
1550 #if defined(ADC_MULTIMODE_SUPPORT)
1551 /**
1552 * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going.
1553 * @note Multimode is kept enabled after this function. Multimode DMA bits
1554 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1555 * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1556 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1557 * resort to HAL_ADCEx_DisableMultiMode() API.
1558 * @note In case of DMA configured in circular mode, function
1559 * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
1560 * ADC slave, to properly disable the DMA channel.
1561 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1562 * @retval HAL status
1563 */
HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef * hadc)1564 HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1565 {
1566 HAL_StatusTypeDef tmp_hal_status;
1567 uint32_t tickstart;
1568 ADC_HandleTypeDef tmphadcSlave;
1569 uint32_t tmphadcSlave_conversion_on_going;
1570
1571 /* Check the parameters */
1572 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1573
1574 /* Process locked */
1575 __HAL_LOCK(hadc);
1576
1577
1578 /* 1. Stop potential multimode conversion on going, on regular groups */
1579 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1580
1581 /* Disable ADC peripheral if conversions are effectively stopped */
1582 if (tmp_hal_status == HAL_OK)
1583 {
1584 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1585 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1586
1587 /* Set a temporary handle of the ADC slave associated to the ADC master */
1588 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1589
1590 if (tmphadcSlave.Instance == NULL)
1591 {
1592 /* Update ADC state machine to error */
1593 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1594
1595 /* Process unlocked */
1596 __HAL_UNLOCK(hadc);
1597
1598 return HAL_ERROR;
1599 }
1600
1601 /* Procedure to disable the ADC peripheral: wait for conversions */
1602 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1603
1604 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1605 tickstart = HAL_GetTick();
1606
1607 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1608 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1609 || (tmphadcSlave_conversion_on_going == 1UL)
1610 )
1611 {
1612 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1613 {
1614 /* Update ADC state machine to error */
1615 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1616
1617 /* Process unlocked */
1618 __HAL_UNLOCK(hadc);
1619
1620 return HAL_ERROR;
1621 }
1622
1623 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1624 }
1625
1626 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1627 /* while DMA transfer is on going) */
1628 /* Note: DMA channel of ADC slave should be stopped after this function */
1629 /* with HAL_ADCEx_RegularStop_DMA() API. */
1630 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1631
1632 /* Check if DMA channel effectively disabled */
1633 if (tmp_hal_status != HAL_OK)
1634 {
1635 /* Update ADC state machine to error */
1636 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1637 }
1638
1639 /* Disable ADC overrun interrupt */
1640 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1641
1642 /* 2. Disable the ADC peripherals: master and slave if no injected */
1643 /* conversion is on-going. */
1644 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1645 /* memory a potential failing status. */
1646 if (tmp_hal_status == HAL_OK)
1647 {
1648 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1649 {
1650 tmp_hal_status = ADC_Disable(hadc);
1651 if (tmp_hal_status == HAL_OK)
1652 {
1653 if (LL_ADC_INJ_IsConversionOngoing((&tmphadcSlave)->Instance) == 0UL)
1654 {
1655 tmp_hal_status = ADC_Disable(&tmphadcSlave);
1656 }
1657 }
1658 }
1659
1660 if (tmp_hal_status == HAL_OK)
1661 {
1662 /* Both Master and Slave ADC's could be disabled. Update Master State */
1663 /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
1664 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1665 }
1666 else
1667 {
1668 /* injected (Master or Slave) conversions are still on-going,
1669 no Master State change */
1670 }
1671 }
1672 }
1673
1674 /* Process unlocked */
1675 __HAL_UNLOCK(hadc);
1676
1677 /* Return function status */
1678 return tmp_hal_status;
1679 }
1680 #endif /* ADC_MULTIMODE_SUPPORT */
1681
1682 /**
1683 * @}
1684 */
1685
1686 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
1687 * @brief ADC Extended Peripheral Control functions
1688 *
1689 @verbatim
1690 ===============================================================================
1691 ##### Peripheral Control functions #####
1692 ===============================================================================
1693 [..] This section provides functions allowing to:
1694 (+) Configure channels on injected group
1695 (+) Configure multimode when multimode feature is available
1696 (+) Enable or Disable Injected Queue
1697 (+) Disable ADC voltage regulator
1698 (+) Enter ADC deep-power-down mode
1699
1700 @endverbatim
1701 * @{
1702 */
1703
1704 /**
1705 * @brief Configure a channel to be assigned to ADC group injected.
1706 * @note Possibility to update parameters on the fly:
1707 * This function initializes injected group, following calls to this
1708 * function can be used to reconfigure some parameters of structure
1709 * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
1710 * The setting of these parameters is conditioned to ADC state:
1711 * Refer to comments of structure "ADC_InjectionConfTypeDef".
1712 * @note In case of usage of internal measurement channels:
1713 * Vbat/VrefInt/TempSensor/VddCore.
1714 * These internal paths can be disabled using function
1715 * HAL_ADC_DeInit().
1716 * @note Caution: For Injected Context Queue use, a context must be fully
1717 * defined before start of injected conversion. All channels are configured
1718 * consecutively for the same ADC instance. Therefore, the number of calls to
1719 * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
1720 * InjectedNbrOfConversion for each context.
1721 * - Example 1: If 1 context is intended to be used (or if there is no use of the
1722 * Injected Queue Context feature) and if the context contains 3 injected ranks
1723 * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
1724 * called once for each channel (i.e. 3 times) before starting a conversion.
1725 * This function must not be called to configure a 4th injected channel:
1726 * it would start a new context into context queue.
1727 * - Example 2: If 2 contexts are intended to be used and each of them contains
1728 * 3 injected ranks (InjectedNbrOfConversion = 3),
1729 * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
1730 * for each context (3 channels x 2 contexts = 6 calls). Conversion can
1731 * start once the 1st context is set, that is after the first three
1732 * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
1733 * @param hadc ADC handle
1734 * @param sConfigInjected Structure of ADC injected group and ADC channel for
1735 * injected group.
1736 * @retval HAL status
1737 */
HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef * hadc,ADC_InjectionConfTypeDef * sConfigInjected)1738 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef *sConfigInjected)
1739 {
1740 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1741 uint32_t tmpOffsetShifted;
1742 uint32_t tmp_config_internal_channel;
1743 uint32_t tmp_adc_is_conversion_on_going_regular;
1744 uint32_t tmp_adc_is_conversion_on_going_injected;
1745 __IO uint32_t wait_loop_index = 0;
1746
1747 uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0U;
1748
1749 /* Check the parameters */
1750 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1751 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
1752 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
1753 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
1754 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
1755 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
1756 assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
1757 assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
1758 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
1759 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode));
1760
1761 if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
1762 {
1763 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
1764 assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
1765 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
1766 }
1767
1768 /* Check offset range according to oversampling setting */
1769 if (hadc->Init.OversamplingMode == ENABLE)
1770 {
1771 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset/(hadc->Init.Oversampling.Ratio+1U)));
1772 }
1773 else
1774 {
1775 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
1776 }
1777
1778 /* JDISCEN and JAUTO bits can't be set at the same time */
1779 assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
1780
1781 /* DISCEN and JAUTO bits can't be set at the same time */
1782 assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
1783
1784 /* Verification of channel number */
1785 if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
1786 {
1787 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
1788 }
1789 else
1790 {
1791 if (hadc->Instance == ADC1)
1792 {
1793 assert_param(IS_ADC1_DIFF_CHANNEL(sConfigInjected->InjectedChannel));
1794 }
1795 if (hadc->Instance == ADC2)
1796 {
1797 assert_param(IS_ADC2_DIFF_CHANNEL(sConfigInjected->InjectedChannel));
1798 }
1799 }
1800
1801 /* Process locked */
1802 __HAL_LOCK(hadc);
1803
1804 /* Configuration of injected group sequencer: */
1805 /* Hardware constraint: Must fully define injected context register JSQR */
1806 /* before make it entering into injected sequencer queue. */
1807 /* */
1808 /* - if scan mode is disabled: */
1809 /* * Injected channels sequence length is set to 0x00: 1 channel */
1810 /* converted (channel on injected rank 1) */
1811 /* Parameter "InjectedNbrOfConversion" is discarded. */
1812 /* * Injected context register JSQR setting is simple: register is fully */
1813 /* defined on one call of this function (for injected rank 1) and can */
1814 /* be entered into queue directly. */
1815 /* - if scan mode is enabled: */
1816 /* * Injected channels sequence length is set to parameter */
1817 /* "InjectedNbrOfConversion". */
1818 /* * Injected context register JSQR setting more complex: register is */
1819 /* fully defined over successive calls of this function, for each */
1820 /* injected channel rank. It is entered into queue only when all */
1821 /* injected ranks have been set. */
1822 /* Note: Scan mode is not present by hardware on this device, but used */
1823 /* by software for alignment over all STM32 devices. */
1824
1825 if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) ||
1826 (sConfigInjected->InjectedNbrOfConversion == 1U))
1827 {
1828 /* Configuration of context register JSQR: */
1829 /* - number of ranks in injected group sequencer: fixed to 1st rank */
1830 /* (scan mode disabled, only rank 1 used) */
1831 /* - external trigger to start conversion */
1832 /* - external trigger polarity */
1833 /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
1834
1835 if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
1836 {
1837 /* Enable external trigger if trigger selection is different of */
1838 /* software start. */
1839 /* Note: This configuration keeps the hardware feature of parameter */
1840 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1841 /* software start. */
1842 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1843 {
1844 tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1)
1845 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1846 | sConfigInjected->ExternalTrigInjecConvEdge
1847 );
1848 }
1849 else
1850 {
1851 tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1));
1852 }
1853
1854 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt);
1855 /* For debug and informative reasons, hadc handle saves JSQR setting */
1856 hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt;
1857
1858 }
1859 }
1860 else
1861 {
1862 /* Case of scan mode enabled, several channels to set into injected group */
1863 /* sequencer. */
1864 /* */
1865 /* Procedure to define injected context register JSQR over successive */
1866 /* calls of this function, for each injected channel rank: */
1867 /* 1. Start new context and set parameters related to all injected */
1868 /* channels: injected sequence length and trigger. */
1869
1870 /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
1871 /* call of the context under setting */
1872 if (hadc->InjectionConfig.ChannelCount == 0U)
1873 {
1874 /* Initialize number of channels that will be configured on the context */
1875 /* being built */
1876 hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion;
1877 /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
1878 call, this context will be written in JSQR register at the last call.
1879 At this point, the context is merely reset */
1880 hadc->InjectionConfig.ContextQueue = 0x00000000U;
1881
1882 /* Configuration of context register JSQR: */
1883 /* - number of ranks in injected group sequencer */
1884 /* - external trigger to start conversion */
1885 /* - external trigger polarity */
1886
1887 /* Enable external trigger if trigger selection is different of */
1888 /* software start. */
1889 /* Note: This configuration keeps the hardware feature of parameter */
1890 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1891 /* software start. */
1892 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1893 {
1894 tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U)
1895 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1896 | sConfigInjected->ExternalTrigInjecConvEdge
1897 );
1898 }
1899 else
1900 {
1901 tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U));
1902 }
1903
1904 }
1905
1906 /* 2. Continue setting of context under definition with parameter */
1907 /* related to each channel: channel rank sequence */
1908 /* Clear the old JSQx bits for the selected rank */
1909 tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
1910
1911 /* Set the JSQx bits for the selected rank */
1912 tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank);
1913
1914 /* Decrease channel count */
1915 hadc->InjectionConfig.ChannelCount--;
1916
1917 /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel()
1918 call, aggregate the setting to those already built during the previous
1919 HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
1920 hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt;
1921
1922 /* 4. End of context setting: if this is the last channel set, then write context
1923 into register JSQR and make it enter into queue */
1924 if (hadc->InjectionConfig.ChannelCount == 0U)
1925 {
1926 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
1927 }
1928 }
1929
1930 /* Parameters update conditioned to ADC state: */
1931 /* Parameters that can be updated when ADC is disabled or enabled without */
1932 /* conversion on going on injected group: */
1933 /* - Injected context queue: Queue disable (active context is kept) or */
1934 /* enable (context decremented, up to 2 contexts queued) */
1935 /* - Injected discontinuous mode: can be enabled only if auto-injected */
1936 /* mode is disabled. */
1937 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1938 {
1939 /* ADC channels preselection */
1940 hadc->Instance->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel) & 0x1FUL));
1941
1942 /* If auto-injected mode is disabled: no constraint */
1943 if (sConfigInjected->AutoInjectedConv == DISABLE)
1944 {
1945 MODIFY_REG(hadc->Instance->CFGR,
1946 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1947 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) |
1948 ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)sConfigInjected->InjectedDiscontinuousConvMode));
1949 }
1950 /* If auto-injected mode is enabled: Injected discontinuous setting is */
1951 /* discarded. */
1952 else
1953 {
1954 MODIFY_REG(hadc->Instance->CFGR,
1955 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1956 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext));
1957 }
1958
1959 }
1960
1961 /* Parameters update conditioned to ADC state: */
1962 /* Parameters that can be updated when ADC is disabled or enabled without */
1963 /* conversion on going on regular and injected groups: */
1964 /* - Automatic injected conversion: can be enabled if injected group */
1965 /* external triggers are disabled. */
1966 /* - Channel sampling time */
1967 /* - Channel offset */
1968 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
1969 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
1970
1971 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
1972 && (tmp_adc_is_conversion_on_going_injected == 0UL)
1973 )
1974 {
1975 /* If injected group external triggers are disabled (set to injected */
1976 /* software start): no constraint */
1977 if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
1978 || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
1979 {
1980 if (sConfigInjected->AutoInjectedConv == ENABLE)
1981 {
1982 SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1983 }
1984 else
1985 {
1986 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1987 }
1988 }
1989 /* If Automatic injected conversion was intended to be set and could not */
1990 /* due to injected group external triggers enabled, error is reported. */
1991 else
1992 {
1993 if (sConfigInjected->AutoInjectedConv == ENABLE)
1994 {
1995 /* Update ADC state machine to error */
1996 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1997
1998 tmp_hal_status = HAL_ERROR;
1999 }
2000 else
2001 {
2002 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
2003 }
2004 }
2005
2006 if (sConfigInjected->InjecOversamplingMode == ENABLE)
2007 {
2008 assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio));
2009 assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift));
2010
2011 /* JOVSE must be reset in case of triggered regular mode */
2012 assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS) == (ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS)));
2013
2014 /* Configuration of Injected Oversampler: */
2015 /* - Oversampling Ratio */
2016 /* - Right bit shift */
2017
2018 /* Enable OverSampling mode */
2019 MODIFY_REG(hadc->Instance->CFGR2,
2020 ADC_CFGR2_JOVSE |
2021 ADC_CFGR2_OVSR |
2022 ADC_CFGR2_OVSS,
2023 ADC_CFGR2_JOVSE |
2024 ((sConfigInjected->InjecOversampling.Ratio - 1UL) << ADC_CFGR2_OSR_Pos) |
2025 sConfigInjected->InjecOversampling.RightBitShift
2026 );
2027 }
2028 else
2029 {
2030 /* Disable Regular OverSampling */
2031 CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
2032 }
2033
2034 /* Set sampling time of the selected ADC channel */
2035 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
2036
2037 /* Configure the offset: offset enable/disable, channel, offset value */
2038
2039 /* Shift the offset with respect to the selected ADC resolution. */
2040 /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
2041 tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
2042
2043 if (sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
2044 {
2045 /* Set ADC selected offset number */
2046 LL_ADC_SetOffset(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected->InjectedChannel,
2047 tmpOffsetShifted);
2048
2049 /* Set ADC selected offset signed saturation */
2050 LL_ADC_SetOffsetSignedSaturation(hadc->Instance, sConfigInjected->InjectedOffsetNumber, (sConfigInjected->InjectedOffsetSignedSaturation == ENABLE) ? LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE : LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE);
2051
2052 /* Set ADC selected offset right shift */
2053 LL_ADC_SetDataRightShift(hadc->Instance, sConfigInjected->InjectedOffsetNumber, (sConfigInjected->InjectedOffsetRightShift == (uint32_t)ENABLE) ? LL_ADC_OFFSET_RSHIFT_ENABLE : LL_ADC_OFFSET_RSHIFT_DISABLE);
2054
2055 }
2056 else
2057 {
2058 /* Scan each offset register to check if the selected channel is targeted. */
2059 /* If this is the case, the corresponding offset number is disabled. */
2060 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1))
2061 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
2062 {
2063 LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_1, sConfigInjected->InjectedChannel, LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE);
2064 }
2065 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2))
2066 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
2067 {
2068 LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_2, sConfigInjected->InjectedChannel, LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE);
2069 }
2070 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3))
2071 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
2072 {
2073 LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_4, sConfigInjected->InjectedChannel, LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE);
2074 }
2075 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4))
2076 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
2077 {
2078 LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_4, sConfigInjected->InjectedChannel, LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE);
2079 }
2080 }
2081
2082 }
2083
2084 /* Parameters update conditioned to ADC state: */
2085 /* Parameters that can be updated only when ADC is disabled: */
2086 /* - Single or differential mode */
2087 /* - Internal measurement channels: Vbat/VrefInt/TempSensor/VddCore */
2088 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2089 {
2090 /* Set mode single-ended or differential input of the selected ADC channel */
2091 LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSingleDiff);
2092
2093 /* Configuration of differential mode */
2094 /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */
2095 if (sConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED)
2096 {
2097 /* Set sampling time of the selected ADC channel */
2098 LL_ADC_SetChannelSamplingTime(hadc->Instance,
2099 (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfigInjected->InjectedChannel)
2100 + 1UL) & 0x1FUL)), sConfigInjected->InjectedSamplingTime);
2101 }
2102
2103 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor/VddCore */
2104 /* internal measurement paths enable: If internal channel selected, */
2105 /* enable dedicated internal buffers and path. */
2106 /* Note: these internal measurement paths can be disabled using */
2107 /* HAL_ADC_DeInit(). */
2108
2109 if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel))
2110 {
2111 /* Configuration of common ADC parameters (continuation) */
2112 /* Software is allowed to change common parameters only when all ADCs */
2113 /* of the common group are disabled. */
2114 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2115 {
2116 tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
2117
2118 /* If the requested internal measurement path has already been enabled, */
2119 /* bypass the configuration processing. */
2120 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL))
2121 {
2122 if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
2123 {
2124 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel);
2125
2126 /* Delay for temperature sensor stabilization time */
2127 /* Wait loop initialization and execution */
2128 /* Note: Variable divided by 2 to compensate partially */
2129 /* CPU processing cycles, scaling in us split to not */
2130 /* exceed 32 bits register capacity and handle low frequency. */
2131 wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * (SystemCoreClock / (100000UL * 2UL)));
2132 while(wait_loop_index != 0UL)
2133 {
2134 wait_loop_index--;
2135 }
2136 }
2137 }
2138 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL))
2139 {
2140 if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
2141 {
2142 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel);
2143 }
2144 }
2145 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL))
2146 {
2147 if (ADC_VREFINT_INSTANCE(hadc))
2148 {
2149 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel);
2150 }
2151 }
2152 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VCORE) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VDDCORE) == 0UL))
2153 {
2154 if (ADC_VDDCORE_INSTANCE(hadc))
2155 {
2156 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VDDCORE | tmp_config_internal_channel);
2157 }
2158 }
2159 else
2160 {
2161 /* nothing to do */
2162 }
2163 }
2164 /* If the requested internal measurement path has already been enabled */
2165 /* and other ADC of the common group are enabled, internal */
2166 /* measurement paths cannot be enabled. */
2167 else
2168 {
2169 /* Update ADC state machine to error */
2170 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2171
2172 tmp_hal_status = HAL_ERROR;
2173 }
2174 }
2175
2176 }
2177
2178 /* Process unlocked */
2179 __HAL_UNLOCK(hadc);
2180
2181 /* Return function status */
2182 return tmp_hal_status;
2183 }
2184
2185 #if defined(ADC_MULTIMODE_SUPPORT)
2186 /**
2187 * @brief Enable ADC multimode and configure multimode parameters
2188 * @note Possibility to update parameters on the fly:
2189 * This function initializes multimode parameters, following
2190 * calls to this function can be used to reconfigure some parameters
2191 * of structure "ADC_MultiModeTypeDef" on the fly, without resetting
2192 * the ADCs.
2193 * The setting of these parameters is conditioned to ADC state.
2194 * For parameters constraints, see comments of structure
2195 * "ADC_MultiModeTypeDef".
2196 * @note To move back configuration from multimode to single mode, ADC must
2197 * be reset (using function HAL_ADC_Init() ).
2198 * @param hadc Master ADC handle
2199 * @param multimode Structure of ADC multimode configuration
2200 * @retval HAL status
2201 */
HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef * hadc,ADC_MultiModeTypeDef * multimode)2202 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode)
2203 {
2204 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2205 ADC_Common_TypeDef *tmpADC_Common;
2206 ADC_HandleTypeDef tmphadcSlave;
2207 uint32_t tmphadcSlave_conversion_on_going;
2208
2209 /* Check the parameters */
2210 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2211 assert_param(IS_ADC_MULTIMODE(multimode->Mode));
2212 if (multimode->Mode != ADC_MODE_INDEPENDENT)
2213 {
2214 assert_param(IS_ADC_DUAL_DATA_MODE(multimode->DualModeData));
2215 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
2216 }
2217
2218 /* Process locked */
2219 __HAL_LOCK(hadc);
2220
2221 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
2222
2223 if (tmphadcSlave.Instance == NULL)
2224 {
2225 /* Update ADC state machine to error */
2226 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2227
2228 /* Process unlocked */
2229 __HAL_UNLOCK(hadc);
2230
2231 return HAL_ERROR;
2232 }
2233
2234 /* Parameters update conditioned to ADC state: */
2235 /* Parameters that can be updated when ADC is disabled or enabled without */
2236 /* conversion on going on regular group: */
2237 /* - Multimode DATA Format configuration */
2238 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
2239 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
2240 && (tmphadcSlave_conversion_on_going == 0UL))
2241 {
2242 /* Pointer to the common control register */
2243 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
2244
2245 /* If multimode is selected, configure all multimode parameters. */
2246 /* Otherwise, reset multimode parameters (can be used in case of */
2247 /* transition from multimode to independent mode). */
2248 if (multimode->Mode != ADC_MODE_INDEPENDENT)
2249 {
2250 MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_DAMDF, multimode->DualModeData);
2251
2252 /* Parameters that can be updated only when ADC is disabled: */
2253 /* - Multimode mode selection */
2254 /* - Multimode delay */
2255 /* Note: Delay range depends on selected resolution: */
2256 /* from 1 to 9 clock cycles for 16 bits */
2257 /* from 1 to 9 clock cycles for 14 bits, */
2258 /* from 1 to 8 clock cycles for 12 bits */
2259 /* from 1 to 6 clock cycles for 10 and 8 bits */
2260 /* If a higher delay is selected, it will be clipped to maximum delay */
2261 /* range */
2262
2263 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2264 {
2265 MODIFY_REG(tmpADC_Common->CCR,
2266 ADC_CCR_DUAL |
2267 ADC_CCR_DELAY,
2268 multimode->Mode |
2269 multimode->TwoSamplingDelay
2270 );
2271 }
2272 }
2273 else /* ADC_MODE_INDEPENDENT */
2274 {
2275 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DAMDF);
2276
2277 /* Parameters that can be updated only when ADC is disabled: */
2278 /* - Multimode mode selection */
2279 /* - Multimode delay */
2280 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2281 {
2282 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
2283 }
2284 }
2285 }
2286 /* If one of the ADC sharing the same common group is enabled, no update */
2287 /* could be done on neither of the multimode structure parameters. */
2288 else
2289 {
2290 /* Update ADC state machine to error */
2291 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2292
2293 tmp_hal_status = HAL_ERROR;
2294 }
2295
2296 /* Process unlocked */
2297 __HAL_UNLOCK(hadc);
2298
2299 /* Return function status */
2300 return tmp_hal_status;
2301 }
2302 #endif /* ADC_MULTIMODE_SUPPORT */
2303
2304 /**
2305 * @brief Enable Injected Queue
2306 * @note This function resets CFGR register JQDIS bit in order to enable the
2307 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2308 * are both equal to 0 to ensure that no regular nor injected
2309 * conversion is ongoing.
2310 * @param hadc ADC handle
2311 * @retval HAL status
2312 */
HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef * hadc)2313 HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef *hadc)
2314 {
2315 HAL_StatusTypeDef tmp_hal_status;
2316 uint32_t tmp_adc_is_conversion_on_going_regular;
2317 uint32_t tmp_adc_is_conversion_on_going_injected;
2318
2319 /* Check the parameters */
2320 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2321
2322 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2323 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2324
2325 /* Parameter can be set only if no conversion is on-going */
2326 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2327 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2328 )
2329 {
2330 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
2331
2332 /* Update state, clear previous result related to injected queue overflow */
2333 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF);
2334
2335 tmp_hal_status = HAL_OK;
2336 }
2337 else
2338 {
2339 tmp_hal_status = HAL_ERROR;
2340 }
2341
2342 return tmp_hal_status;
2343 }
2344
2345 /**
2346 * @brief Disable Injected Queue
2347 * @note This function sets CFGR register JQDIS bit in order to disable the
2348 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2349 * are both equal to 0 to ensure that no regular nor injected
2350 * conversion is ongoing.
2351 * @param hadc ADC handle
2352 * @retval HAL status
2353 */
HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef * hadc)2354 HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef *hadc)
2355 {
2356 HAL_StatusTypeDef tmp_hal_status;
2357 uint32_t tmp_adc_is_conversion_on_going_regular;
2358 uint32_t tmp_adc_is_conversion_on_going_injected;
2359
2360 /* Check the parameters */
2361 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2362
2363 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2364 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2365
2366 /* Parameter can be set only if no conversion is on-going */
2367 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2368 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2369 )
2370 {
2371 LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE);
2372 tmp_hal_status = HAL_OK;
2373 }
2374 else
2375 {
2376 tmp_hal_status = HAL_ERROR;
2377 }
2378
2379 return tmp_hal_status;
2380 }
2381
2382 /**
2383 * @brief Disable ADC voltage regulator.
2384 * @note Disabling voltage regulator allows to save power. This operation can
2385 * be carried out only when ADC is disabled.
2386 * @note To enable again the voltage regulator, the user is expected to
2387 * resort to HAL_ADC_Init() API.
2388 * @param hadc ADC handle
2389 * @retval HAL status
2390 */
HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef * hadc)2391 HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc)
2392 {
2393 HAL_StatusTypeDef tmp_hal_status;
2394
2395 /* Check the parameters */
2396 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2397
2398 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2399 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2400 {
2401 LL_ADC_DisableInternalRegulator(hadc->Instance);
2402 tmp_hal_status = HAL_OK;
2403 }
2404 else
2405 {
2406 tmp_hal_status = HAL_ERROR;
2407 }
2408
2409 return tmp_hal_status;
2410 }
2411
2412 /**
2413 * @brief Enter ADC deep-power-down mode
2414 * @note This mode is achieved in setting DEEPPWD bit and allows to save power
2415 * in reducing leakage currents. It is particularly interesting before
2416 * entering stop modes.
2417 * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
2418 * ADC voltage regulator. This means that this API encompasses
2419 * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
2420 * calibration is lost.
2421 * @note To exit the ADC deep-power-down mode, the user is expected to
2422 * resort to HAL_ADC_Init() API as well as to relaunch a calibration
2423 * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
2424 * saved calibration factor.
2425 * @param hadc ADC handle
2426 * @retval HAL status
2427 */
HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef * hadc)2428 HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc)
2429 {
2430 HAL_StatusTypeDef tmp_hal_status;
2431
2432 /* Check the parameters */
2433 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2434
2435 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2436 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2437 {
2438 LL_ADC_EnableDeepPowerDown(hadc->Instance);
2439 tmp_hal_status = HAL_OK;
2440 }
2441 else
2442 {
2443 tmp_hal_status = HAL_ERROR;
2444 }
2445
2446 return tmp_hal_status;
2447 }
2448
2449 /**
2450 * @}
2451 */
2452
2453 /**
2454 * @}
2455 */
2456
2457 #endif /* HAL_ADC_MODULE_ENABLED */
2458 /**
2459 * @}
2460 */
2461
2462 /**
2463 * @}
2464 */
2465
2466 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2467