1 /* 2 * include/linux/amlogic/media/registers/regs/hcodec_regs.h 3 * 4 * Copyright (C) 2017 Amlogic, Inc. All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 */ 17 18 #ifndef HCODEC_REG_HEADERS___ 19 #define HCODEC_REG_HEADERS___ 20 21 #define HCODEC_ASSIST_MMC_CTRL0 0x1001 22 #define HCODEC_ASSIST_MMC_CTRL1 0x1002 23 /*add from M8M2*/ 24 #define HCODEC_ASSIST_MMC_CTRL2 0x1003 25 #define HCODEC_ASSIST_MMC_CTRL3 0x1004 26 /**/ 27 #define HCODEC_MFDIN_REG0_CRST 0x1010 28 #define HCODEC_MFDIN_REG1_CTRL 0x1011 29 #define HCODEC_MFDIN_REG2_STAT 0x1012 30 #define HCODEC_MFDIN_REG3_CANV 0x1013 31 #define HCODEC_MFDIN_REG4_LNR0 0x1014 32 #define HCODEC_MFDIN_REG5_LNR1 0x1015 33 #define HCODEC_MFDIN_REG6_DCFG 0x1016 34 #define HCODEC_MFDIN_REG7_SCMD 0x1017 35 #define HCODEC_MFDIN_REG8_DMBL 0x1018 36 #define HCODEC_MFDIN_REG9_ENDN 0x1019 37 #define HCODEC_MFDIN_REGA_CAV1 0x101a 38 #define HCODEC_MFDIN_REGB_AMPC 0x101b 39 #define HCODEC_ASSIST_AMR1_INT0 0x1025 40 #define HCODEC_ASSIST_AMR1_INT1 0x1026 41 #define HCODEC_ASSIST_AMR1_INT2 0x1027 42 #define HCODEC_ASSIST_AMR1_INT3 0x1028 43 #define HCODEC_ASSIST_AMR1_INT4 0x1029 44 #define HCODEC_ASSIST_AMR1_INT5 0x102a 45 #define HCODEC_ASSIST_AMR1_INT6 0x102b 46 #define HCODEC_ASSIST_AMR1_INT7 0x102c 47 #define HCODEC_ASSIST_AMR1_INT8 0x102d 48 #define HCODEC_ASSIST_AMR1_INT9 0x102e 49 #define HCODEC_ASSIST_AMR1_INTA 0x102f 50 #define HCODEC_ASSIST_AMR1_INTB 0x1030 51 #define HCODEC_ASSIST_AMR1_INTC 0x1031 52 #define HCODEC_ASSIST_AMR1_INTD 0x1032 53 #define HCODEC_ASSIST_AMR1_INTE 0x1033 54 #define HCODEC_ASSIST_AMR1_INTF 0x1034 55 #define HCODEC_ASSIST_AMR2_INT0 0x1035 56 #define HCODEC_ASSIST_AMR2_INT1 0x1036 57 #define HCODEC_ASSIST_AMR2_INT2 0x1037 58 #define HCODEC_ASSIST_AMR2_INT3 0x1038 59 #define HCODEC_ASSIST_AMR2_INT4 0x1039 60 #define HCODEC_ASSIST_AMR2_INT5 0x103a 61 #define HCODEC_ASSIST_AMR2_INT6 0x103b 62 #define HCODEC_ASSIST_AMR2_INT7 0x103c 63 #define HCODEC_ASSIST_AMR2_INT8 0x103d 64 #define HCODEC_ASSIST_AMR2_INT9 0x103e 65 #define HCODEC_ASSIST_AMR2_INTA 0x103f 66 #define HCODEC_ASSIST_AMR2_INTB 0x1040 67 #define HCODEC_ASSIST_AMR2_INTC 0x1041 68 #define HCODEC_ASSIST_AMR2_INTD 0x1042 69 #define HCODEC_ASSIST_AMR2_INTE 0x1043 70 #define HCODEC_ASSIST_AMR2_INTF 0x1044 71 #define HCODEC_ASSIST_MBX_SSEL 0x1045 72 #define HCODEC_ASSIST_TIMER0_LO 0x1060 73 #define HCODEC_ASSIST_TIMER0_HI 0x1061 74 #define HCODEC_ASSIST_TIMER1_LO 0x1062 75 #define HCODEC_ASSIST_TIMER1_HI 0x1063 76 #define HCODEC_ASSIST_DMA_INT 0x1064 77 #define HCODEC_ASSIST_DMA_INT_MSK 0x1065 78 #define HCODEC_ASSIST_DMA_INT2 0x1066 79 #define HCODEC_ASSIST_DMA_INT_MSK2 0x1067 80 #define HCODEC_ASSIST_MBOX0_IRQ_REG 0x1070 81 #define HCODEC_ASSIST_MBOX0_CLR_REG 0x1071 82 #define HCODEC_ASSIST_MBOX0_MASK 0x1072 83 #define HCODEC_ASSIST_MBOX0_FIQ_SEL 0x1073 84 #define HCODEC_ASSIST_MBOX1_IRQ_REG 0x1074 85 #define HCODEC_ASSIST_MBOX1_CLR_REG 0x1075 86 #define HCODEC_ASSIST_MBOX1_MASK 0x1076 87 #define HCODEC_ASSIST_MBOX1_FIQ_SEL 0x1077 88 #define HCODEC_ASSIST_MBOX2_IRQ_REG 0x1078 89 #define HCODEC_ASSIST_MBOX2_CLR_REG 0x1079 90 #define HCODEC_ASSIST_MBOX2_MASK 0x107a 91 #define HCODEC_ASSIST_MBOX2_FIQ_SEL 0x107b 92 93 #define HCODEC_MC_CTRL_REG 0x1900 94 #define HCODEC_MC_MB_INFO 0x1901 95 #define HCODEC_MC_PIC_INFO 0x1902 96 #define HCODEC_MC_HALF_PEL_ONE 0x1903 97 #define HCODEC_MC_HALF_PEL_TWO 0x1904 98 #define HCODEC_POWER_CTL_MC 0x1905 99 #define HCODEC_MC_CMD 0x1906 100 #define HCODEC_MC_CTRL0 0x1907 101 #define HCODEC_MC_PIC_W_H 0x1908 102 #define HCODEC_MC_STATUS0 0x1909 103 #define HCODEC_MC_STATUS1 0x190a 104 #define HCODEC_MC_CTRL1 0x190b 105 #define HCODEC_MC_MIX_RATIO0 0x190c 106 #define HCODEC_MC_MIX_RATIO1 0x190d 107 #define HCODEC_MC_DP_MB_XY 0x190e 108 #define HCODEC_MC_OM_MB_XY 0x190f 109 #define HCODEC_PSCALE_RST 0x1910 110 #define HCODEC_PSCALE_CTRL 0x1911 111 #define HCODEC_PSCALE_PICI_W 0x1912 112 #define HCODEC_PSCALE_PICI_H 0x1913 113 #define HCODEC_PSCALE_PICO_W 0x1914 114 #define HCODEC_PSCALE_PICO_H 0x1915 115 #define HCODEC_PSCALE_PICO_START_X 0x1916 116 #define HCODEC_PSCALE_PICO_START_Y 0x1917 117 #define HCODEC_PSCALE_DUMMY 0x1918 118 #define HCODEC_PSCALE_FILT0_COEF0 0x1919 119 #define HCODEC_PSCALE_FILT0_COEF1 0x191a 120 #define HCODEC_PSCALE_CMD_CTRL 0x191b 121 #define HCODEC_PSCALE_CMD_BLK_X 0x191c 122 #define HCODEC_PSCALE_CMD_BLK_Y 0x191d 123 #define HCODEC_PSCALE_STATUS 0x191e 124 #define HCODEC_PSCALE_BMEM_ADDR 0x191f 125 #define HCODEC_PSCALE_BMEM_DAT 0x1920 126 #define HCODEC_PSCALE_DRAM_BUF_CTRL 0x1921 127 #define HCODEC_PSCALE_MCMD_CTRL 0x1922 128 #define HCODEC_PSCALE_MCMD_XSIZE 0x1923 129 #define HCODEC_PSCALE_MCMD_YSIZE 0x1924 130 #define HCODEC_PSCALE_RBUF_START_BLKX 0x1925 131 #define HCODEC_PSCALE_RBUF_START_BLKY 0x1926 132 #define HCODEC_PSCALE_PICO_SHIFT_XY 0x1928 133 #define HCODEC_PSCALE_CTRL1 0x1929 134 #define HCODEC_PSCALE_SRCKEY_CTRL0 0x192a 135 #define HCODEC_PSCALE_SRCKEY_CTRL1 0x192b 136 #define HCODEC_PSCALE_CANVAS_RD_ADDR 0x192c 137 #define HCODEC_PSCALE_CANVAS_WR_ADDR 0x192d 138 #define HCODEC_PSCALE_CTRL2 0x192e 139 /*add from M8M2*/ 140 #define HCODEC_HDEC_MC_OMEM_AUTO 0x1930 141 #define HCODEC_HDEC_MC_MBRIGHT_IDX 0x1931 142 #define HCODEC_HDEC_MC_MBRIGHT_RD 0x1932 143 /**/ 144 #define HCODEC_MC_MPORT_CTRL 0x1940 145 #define HCODEC_MC_MPORT_DAT 0x1941 146 #define HCODEC_MC_WT_PRED_CTRL 0x1942 147 #define HCODEC_MC_MBBOT_ST_EVEN_ADDR 0x1944 148 #define HCODEC_MC_MBBOT_ST_ODD_ADDR 0x1945 149 #define HCODEC_MC_DPDN_MB_XY 0x1946 150 #define HCODEC_MC_OMDN_MB_XY 0x1947 151 #define HCODEC_MC_HCMDBUF_H 0x1948 152 #define HCODEC_MC_HCMDBUF_L 0x1949 153 #define HCODEC_MC_HCMD_H 0x194a 154 #define HCODEC_MC_HCMD_L 0x194b 155 #define HCODEC_MC_IDCT_DAT 0x194c 156 #define HCODEC_MC_CTRL_GCLK_CTRL 0x194d 157 #define HCODEC_MC_OTHER_GCLK_CTRL 0x194e 158 #define HCODEC_MC_CTRL2 0x194f 159 #define HCODEC_MDEC_PIC_DC_CTRL 0x198e 160 #define HCODEC_MDEC_PIC_DC_STATUS 0x198f 161 #define HCODEC_ANC0_CANVAS_ADDR 0x1990 162 #define HCODEC_ANC1_CANVAS_ADDR 0x1991 163 #define HCODEC_ANC2_CANVAS_ADDR 0x1992 164 #define HCODEC_ANC3_CANVAS_ADDR 0x1993 165 #define HCODEC_ANC4_CANVAS_ADDR 0x1994 166 #define HCODEC_ANC5_CANVAS_ADDR 0x1995 167 #define HCODEC_ANC6_CANVAS_ADDR 0x1996 168 #define HCODEC_ANC7_CANVAS_ADDR 0x1997 169 #define HCODEC_ANC8_CANVAS_ADDR 0x1998 170 #define HCODEC_ANC9_CANVAS_ADDR 0x1999 171 #define HCODEC_ANC10_CANVAS_ADDR 0x199a 172 #define HCODEC_ANC11_CANVAS_ADDR 0x199b 173 #define HCODEC_ANC12_CANVAS_ADDR 0x199c 174 #define HCODEC_ANC13_CANVAS_ADDR 0x199d 175 #define HCODEC_ANC14_CANVAS_ADDR 0x199e 176 #define HCODEC_ANC15_CANVAS_ADDR 0x199f 177 #define HCODEC_ANC16_CANVAS_ADDR 0x19a0 178 #define HCODEC_ANC17_CANVAS_ADDR 0x19a1 179 #define HCODEC_ANC18_CANVAS_ADDR 0x19a2 180 #define HCODEC_ANC19_CANVAS_ADDR 0x19a3 181 #define HCODEC_ANC20_CANVAS_ADDR 0x19a4 182 #define HCODEC_ANC21_CANVAS_ADDR 0x19a5 183 #define HCODEC_ANC22_CANVAS_ADDR 0x19a6 184 #define HCODEC_ANC23_CANVAS_ADDR 0x19a7 185 #define HCODEC_ANC24_CANVAS_ADDR 0x19a8 186 #define HCODEC_ANC25_CANVAS_ADDR 0x19a9 187 #define HCODEC_ANC26_CANVAS_ADDR 0x19aa 188 #define HCODEC_ANC27_CANVAS_ADDR 0x19ab 189 #define HCODEC_ANC28_CANVAS_ADDR 0x19ac 190 #define HCODEC_ANC29_CANVAS_ADDR 0x19ad 191 #define HCODEC_ANC30_CANVAS_ADDR 0x19ae 192 #define HCODEC_ANC31_CANVAS_ADDR 0x19af 193 #define HCODEC_DBKR_CANVAS_ADDR 0x19b0 194 #define HCODEC_DBKW_CANVAS_ADDR 0x19b1 195 #define HCODEC_REC_CANVAS_ADDR 0x19b2 196 #define HCODEC_CURR_CANVAS_CTRL 0x19b3 197 #define HCODEC_MDEC_PIC_DC_THRESH 0x19b8 198 #define HCODEC_MDEC_PICR_BUF_STATUS 0x19b9 199 #define HCODEC_MDEC_PICW_BUF_STATUS 0x19ba 200 #define HCODEC_MCW_DBLK_WRRSP_CNT 0x19bb 201 #define HCODEC_MC_MBBOT_WRRSP_CNT 0x19bc 202 #define HCODEC_MDEC_PICW_BUF2_STATUS 0x19bd 203 #define HCODEC_WRRSP_FIFO_PICW_DBK 0x19be 204 #define HCODEC_WRRSP_FIFO_PICW_MC 0x19bf 205 #define HCODEC_AV_SCRATCH_0 0x19c0 206 #define HCODEC_AV_SCRATCH_1 0x19c1 207 #define HCODEC_AV_SCRATCH_2 0x19c2 208 #define HCODEC_AV_SCRATCH_3 0x19c3 209 #define HCODEC_AV_SCRATCH_4 0x19c4 210 #define HCODEC_AV_SCRATCH_5 0x19c5 211 #define HCODEC_AV_SCRATCH_6 0x19c6 212 #define HCODEC_AV_SCRATCH_7 0x19c7 213 #define HCODEC_AV_SCRATCH_8 0x19c8 214 #define HCODEC_AV_SCRATCH_9 0x19c9 215 #define HCODEC_AV_SCRATCH_A 0x19ca 216 #define HCODEC_AV_SCRATCH_B 0x19cb 217 #define HCODEC_AV_SCRATCH_C 0x19cc 218 #define HCODEC_AV_SCRATCH_D 0x19cd 219 #define HCODEC_AV_SCRATCH_E 0x19ce 220 #define HCODEC_AV_SCRATCH_F 0x19cf 221 #define HCODEC_AV_SCRATCH_G 0x19d0 222 #define HCODEC_AV_SCRATCH_H 0x19d1 223 #define HCODEC_AV_SCRATCH_I 0x19d2 224 #define HCODEC_AV_SCRATCH_J 0x19d3 225 #define HCODEC_AV_SCRATCH_K 0x19d4 226 #define HCODEC_AV_SCRATCH_L 0x19d5 227 #define HCODEC_AV_SCRATCH_M 0x19d6 228 #define HCODEC_AV_SCRATCH_N 0x19d7 229 #define HCODEC_WRRSP_CO_MB 0x19d8 230 #define HCODEC_WRRSP_DCAC 0x19d9 231 /*add from M8M2*/ 232 #define HCODEC_WRRSP_VLD 0x19da 233 #define HCODEC_MDEC_DOUBLEW_CFG0 0x19db 234 #define HCODEC_MDEC_DOUBLEW_CFG1 0x19dc 235 #define HCODEC_MDEC_DOUBLEW_CFG2 0x19dd 236 #define HCODEC_MDEC_DOUBLEW_CFG3 0x19de 237 #define HCODEC_MDEC_DOUBLEW_CFG4 0x19df 238 #define HCODEC_MDEC_DOUBLEW_CFG5 0x19e0 239 #define HCODEC_MDEC_DOUBLEW_CFG6 0x19e1 240 #define HCODEC_MDEC_DOUBLEW_CFG7 0x19e2 241 #define HCODEC_MDEC_DOUBLEW_STATUS 0x19e3 242 /**/ 243 #define HCODEC_DBLK_RST 0x1950 244 #define HCODEC_DBLK_CTRL 0x1951 245 #define HCODEC_DBLK_MB_WID_HEIGHT 0x1952 246 #define HCODEC_DBLK_STATUS 0x1953 247 #define HCODEC_DBLK_CMD_CTRL 0x1954 248 #define HCODEC_DBLK_MB_XY 0x1955 249 #define HCODEC_DBLK_QP 0x1956 250 #define HCODEC_DBLK_Y_BHFILT 0x1957 251 #define HCODEC_DBLK_Y_BHFILT_HIGH 0x1958 252 #define HCODEC_DBLK_Y_BVFILT 0x1959 253 #define HCODEC_DBLK_CB_BFILT 0x195a 254 #define HCODEC_DBLK_CR_BFILT 0x195b 255 #define HCODEC_DBLK_Y_HFILT 0x195c 256 #define HCODEC_DBLK_Y_HFILT_HIGH 0x195d 257 #define HCODEC_DBLK_Y_VFILT 0x195e 258 #define HCODEC_DBLK_CB_FILT 0x195f 259 #define HCODEC_DBLK_CR_FILT 0x1960 260 #define HCODEC_DBLK_BETAX_QP_SEL 0x1961 261 #define HCODEC_DBLK_CLIP_CTRL0 0x1962 262 #define HCODEC_DBLK_CLIP_CTRL1 0x1963 263 #define HCODEC_DBLK_CLIP_CTRL2 0x1964 264 #define HCODEC_DBLK_CLIP_CTRL3 0x1965 265 #define HCODEC_DBLK_CLIP_CTRL4 0x1966 266 #define HCODEC_DBLK_CLIP_CTRL5 0x1967 267 #define HCODEC_DBLK_CLIP_CTRL6 0x1968 268 #define HCODEC_DBLK_CLIP_CTRL7 0x1969 269 #define HCODEC_DBLK_CLIP_CTRL8 0x196a 270 #define HCODEC_DBLK_STATUS1 0x196b 271 #define HCODEC_DBLK_GCLK_FREE 0x196c 272 #define HCODEC_DBLK_GCLK_OFF 0x196d 273 #define HCODEC_DBLK_AVSFLAGS 0x196e 274 #define HCODEC_DBLK_CBPY 0x1970 275 #define HCODEC_DBLK_CBPY_ADJ 0x1971 276 #define HCODEC_DBLK_CBPC 0x1972 277 #define HCODEC_DBLK_CBPC_ADJ 0x1973 278 #define HCODEC_DBLK_VHMVD 0x1974 279 #define HCODEC_DBLK_STRONG 0x1975 280 #define HCODEC_DBLK_RV8_QUANT 0x1976 281 #define HCODEC_DBLK_CBUS_HCMD2 0x1977 282 #define HCODEC_DBLK_CBUS_HCMD1 0x1978 283 #define HCODEC_DBLK_CBUS_HCMD0 0x1979 284 #define HCODEC_DBLK_VLD_HCMD2 0x197a 285 #define HCODEC_DBLK_VLD_HCMD1 0x197b 286 #define HCODEC_DBLK_VLD_HCMD0 0x197c 287 #define HCODEC_DBLK_OST_YBASE 0x197d 288 #define HCODEC_DBLK_OST_CBCRDIFF 0x197e 289 #define HCODEC_DBLK_CTRL1 0x197f 290 #define HCODEC_MCRCC_CTL1 0x1980 291 #define HCODEC_MCRCC_CTL2 0x1981 292 #define HCODEC_MCRCC_CTL3 0x1982 293 #define HCODEC_GCLK_EN 0x1983 294 #define HCODEC_MDEC_SW_RESET 0x1984 295 296 #define HCODEC_VLD_STATUS_CTRL 0x1c00 297 #define HCODEC_MPEG1_2_REG 0x1c01 298 #define HCODEC_F_CODE_REG 0x1c02 299 #define HCODEC_PIC_HEAD_INFO 0x1c03 300 #define HCODEC_SLICE_VER_POS_PIC_TYPE 0x1c04 301 #define HCODEC_QP_VALUE_REG 0x1c05 302 #define HCODEC_MBA_INC 0x1c06 303 #define HCODEC_MB_MOTION_MODE 0x1c07 304 #define HCODEC_POWER_CTL_VLD 0x1c08 305 #define HCODEC_MB_WIDTH 0x1c09 306 #define HCODEC_SLICE_QP 0x1c0a 307 #define HCODEC_PRE_START_CODE 0x1c0b 308 #define HCODEC_SLICE_START_BYTE_01 0x1c0c 309 #define HCODEC_SLICE_START_BYTE_23 0x1c0d 310 #define HCODEC_RESYNC_MARKER_LENGTH 0x1c0e 311 #define HCODEC_DECODER_BUFFER_INFO 0x1c0f 312 #define HCODEC_FST_FOR_MV_X 0x1c10 313 #define HCODEC_FST_FOR_MV_Y 0x1c11 314 #define HCODEC_SCD_FOR_MV_X 0x1c12 315 #define HCODEC_SCD_FOR_MV_Y 0x1c13 316 #define HCODEC_FST_BAK_MV_X 0x1c14 317 #define HCODEC_FST_BAK_MV_Y 0x1c15 318 #define HCODEC_SCD_BAK_MV_X 0x1c16 319 #define HCODEC_SCD_BAK_MV_Y 0x1c17 320 #define HCODEC_VLD_DECODE_CONTROL 0x1c18 321 #define HCODEC_VLD_REVERVED_19 0x1c19 322 #define HCODEC_VIFF_BIT_CNT 0x1c1a 323 #define HCODEC_BYTE_ALIGN_PEAK_HI 0x1c1b 324 #define HCODEC_BYTE_ALIGN_PEAK_LO 0x1c1c 325 #define HCODEC_NEXT_ALIGN_PEAK 0x1c1d 326 #define HCODEC_VC1_CONTROL_REG 0x1c1e 327 #define HCODEC_PMV1_X 0x1c20 328 #define HCODEC_PMV1_Y 0x1c21 329 #define HCODEC_PMV2_X 0x1c22 330 #define HCODEC_PMV2_Y 0x1c23 331 #define HCODEC_PMV3_X 0x1c24 332 #define HCODEC_PMV3_Y 0x1c25 333 #define HCODEC_PMV4_X 0x1c26 334 #define HCODEC_PMV4_Y 0x1c27 335 #define HCODEC_M4_TABLE_SELECT 0x1c28 336 #define HCODEC_M4_CONTROL_REG 0x1c29 337 #define HCODEC_BLOCK_NUM 0x1c2a 338 #define HCODEC_PATTERN_CODE 0x1c2b 339 #define HCODEC_MB_INFO 0x1c2c 340 #define HCODEC_VLD_DC_PRED 0x1c2d 341 #define HCODEC_VLD_ERROR_MASK 0x1c2e 342 #define HCODEC_VLD_DC_PRED_C 0x1c2f 343 #define HCODEC_LAST_SLICE_MV_ADDR 0x1c30 344 #define HCODEC_LAST_MVX 0x1c31 345 #define HCODEC_LAST_MVY 0x1c32 346 #define HCODEC_VLD_C38 0x1c38 347 #define HCODEC_VLD_C39 0x1c39 348 #define HCODEC_VLD_STATUS 0x1c3a 349 #define HCODEC_VLD_SHIFT_STATUS 0x1c3b 350 #define HCODEC_VOFF_STATUS 0x1c3c 351 #define HCODEC_VLD_C3D 0x1c3d 352 #define HCODEC_VLD_DBG_INDEX 0x1c3e 353 #define HCODEC_VLD_DBG_DATA 0x1c3f 354 #define HCODEC_VLD_MEM_VIFIFO_START_PTR 0x1c40 355 #define HCODEC_VLD_MEM_VIFIFO_CURR_PTR 0x1c41 356 #define HCODEC_VLD_MEM_VIFIFO_END_PTR 0x1c42 357 #define HCODEC_VLD_MEM_VIFIFO_BYTES_AVAIL 0x1c43 358 #define HCODEC_VLD_MEM_VIFIFO_CONTROL 0x1c44 359 #define HCODEC_VLD_MEM_VIFIFO_WP 0x1c45 360 #define HCODEC_VLD_MEM_VIFIFO_RP 0x1c46 361 #define HCODEC_VLD_MEM_VIFIFO_LEVEL 0x1c47 362 #define HCODEC_VLD_MEM_VIFIFO_BUF_CNTL 0x1c48 363 #define HCODEC_VLD_TIME_STAMP_CNTL 0x1c49 364 #define HCODEC_VLD_TIME_STAMP_SYNC_0 0x1c4a 365 #define HCODEC_VLD_TIME_STAMP_SYNC_1 0x1c4b 366 #define HCODEC_VLD_TIME_STAMP_0 0x1c4c 367 #define HCODEC_VLD_TIME_STAMP_1 0x1c4d 368 #define HCODEC_VLD_TIME_STAMP_2 0x1c4e 369 #define HCODEC_VLD_TIME_STAMP_3 0x1c4f 370 #define HCODEC_VLD_TIME_STAMP_LENGTH 0x1c50 371 #define HCODEC_VLD_MEM_VIFIFO_WRAP_COUNT 0x1c51 372 #define HCODEC_VLD_MEM_VIFIFO_MEM_CTL 0x1c52 373 #define HCODEC_VLD_MEM_VBUF_RD_PTR 0x1c53 374 #define HCODEC_VLD_MEM_VBUF2_RD_PTR 0x1c54 375 #define HCODEC_VLD_MEM_SWAP_ADDR 0x1c55 376 #define HCODEC_VLD_MEM_SWAP_CTL 0x1c56 377 378 #define HCODEC_VCOP_CTRL_REG 0x1e00 379 #define HCODEC_QP_CTRL_REG 0x1e01 380 #define HCODEC_INTRA_QUANT_MATRIX 0x1e02 381 #define HCODEC_NON_I_QUANT_MATRIX 0x1e03 382 #define HCODEC_DC_SCALER 0x1e04 383 #define HCODEC_DC_AC_CTRL 0x1e05 384 #define HCODEC_DC_AC_SCALE_MUL 0x1e06 385 #define HCODEC_DC_AC_SCALE_DIV 0x1e07 386 #define HCODEC_POWER_CTL_IQIDCT 0x1e08 387 #define HCODEC_RV_AI_Y_X 0x1e09 388 #define HCODEC_RV_AI_U_X 0x1e0a 389 #define HCODEC_RV_AI_V_X 0x1e0b 390 #define HCODEC_RV_AI_MB_COUNT 0x1e0c 391 #define HCODEC_NEXT_INTRA_DMA_ADDRESS 0x1e0d 392 #define HCODEC_IQIDCT_CONTROL 0x1e0e 393 #define HCODEC_IQIDCT_DEBUG_INFO_0 0x1e0f 394 #define HCODEC_DEBLK_CMD 0x1e10 395 #define HCODEC_IQIDCT_DEBUG_IDCT 0x1e11 396 #define HCODEC_DCAC_DMA_CTRL 0x1e12 397 #define HCODEC_DCAC_DMA_ADDRESS 0x1e13 398 #define HCODEC_DCAC_CPU_ADDRESS 0x1e14 399 #define HCODEC_DCAC_CPU_DATA 0x1e15 400 #define HCODEC_DCAC_MB_COUNT 0x1e16 401 #define HCODEC_IQ_QUANT 0x1e17 402 #define HCODEC_VC1_BITPLANE_CTL 0x1e18 403 404 #define HCODEC_MSP 0x1300 405 #define HCODEC_MPSR 0x1301 406 #define HCODEC_MINT_VEC_BASE 0x1302 407 #define HCODEC_MCPU_INTR_GRP 0x1303 408 #define HCODEC_MCPU_INTR_MSK 0x1304 409 #define HCODEC_MCPU_INTR_REQ 0x1305 410 #define HCODEC_MPC_P 0x1306 411 #define HCODEC_MPC_D 0x1307 412 #define HCODEC_MPC_E 0x1308 413 #define HCODEC_MPC_W 0x1309 414 #define HCODEC_MINDEX0_REG 0x130a 415 #define HCODEC_MINDEX1_REG 0x130b 416 #define HCODEC_MINDEX2_REG 0x130c 417 #define HCODEC_MINDEX3_REG 0x130d 418 #define HCODEC_MINDEX4_REG 0x130e 419 #define HCODEC_MINDEX5_REG 0x130f 420 #define HCODEC_MINDEX6_REG 0x1310 421 #define HCODEC_MINDEX7_REG 0x1311 422 #define HCODEC_MMIN_REG 0x1312 423 #define HCODEC_MMAX_REG 0x1313 424 #define HCODEC_MBREAK0_REG 0x1314 425 #define HCODEC_MBREAK1_REG 0x1315 426 #define HCODEC_MBREAK2_REG 0x1316 427 #define HCODEC_MBREAK3_REG 0x1317 428 #define HCODEC_MBREAK_TYPE 0x1318 429 #define HCODEC_MBREAK_CTRL 0x1319 430 #define HCODEC_MBREAK_STAUTS 0x131a 431 #define HCODEC_MDB_ADDR_REG 0x131b 432 #define HCODEC_MDB_DATA_REG 0x131c 433 #define HCODEC_MDB_CTRL 0x131d 434 #define HCODEC_MSFTINT0 0x131e 435 #define HCODEC_MSFTINT1 0x131f 436 #define HCODEC_CSP 0x1320 437 #define HCODEC_CPSR 0x1321 438 #define HCODEC_CINT_VEC_BASE 0x1322 439 #define HCODEC_CCPU_INTR_GRP 0x1323 440 #define HCODEC_CCPU_INTR_MSK 0x1324 441 #define HCODEC_CCPU_INTR_REQ 0x1325 442 #define HCODEC_CPC_P 0x1326 443 #define HCODEC_CPC_D 0x1327 444 #define HCODEC_CPC_E 0x1328 445 #define HCODEC_CPC_W 0x1329 446 #define HCODEC_CINDEX0_REG 0x132a 447 #define HCODEC_CINDEX1_REG 0x132b 448 #define HCODEC_CINDEX2_REG 0x132c 449 #define HCODEC_CINDEX3_REG 0x132d 450 #define HCODEC_CINDEX4_REG 0x132e 451 #define HCODEC_CINDEX5_REG 0x132f 452 #define HCODEC_CINDEX6_REG 0x1330 453 #define HCODEC_CINDEX7_REG 0x1331 454 #define HCODEC_CMIN_REG 0x1332 455 #define HCODEC_CMAX_REG 0x1333 456 #define HCODEC_CBREAK0_REG 0x1334 457 #define HCODEC_CBREAK1_REG 0x1335 458 #define HCODEC_CBREAK2_REG 0x1336 459 #define HCODEC_CBREAK3_REG 0x1337 460 #define HCODEC_CBREAK_TYPE 0x1338 461 #define HCODEC_CBREAK_CTRL 0x1339 462 #define HCODEC_CBREAK_STAUTS 0x133a 463 #define HCODEC_CDB_ADDR_REG 0x133b 464 #define HCODEC_CDB_DATA_REG 0x133c 465 #define HCODEC_CDB_CTRL 0x133d 466 #define HCODEC_CSFTINT0 0x133e 467 #define HCODEC_CSFTINT1 0x133f 468 #define HCODEC_IMEM_DMA_CTRL 0x1340 469 #define HCODEC_IMEM_DMA_ADR 0x1341 470 #define HCODEC_IMEM_DMA_COUNT 0x1342 471 #define HCODEC_WRRSP_IMEM 0x1343 472 #define HCODEC_LMEM_DMA_CTRL 0x1350 473 #define HCODEC_LMEM_DMA_ADR 0x1351 474 #define HCODEC_LMEM_DMA_COUNT 0x1352 475 #define HCODEC_WRRSP_LMEM 0x1353 476 #define HCODEC_MAC_CTRL1 0x1360 477 #define HCODEC_ACC0REG1 0x1361 478 #define HCODEC_ACC1REG1 0x1362 479 #define HCODEC_MAC_CTRL2 0x1370 480 #define HCODEC_ACC0REG2 0x1371 481 #define HCODEC_ACC1REG2 0x1372 482 #define HCODEC_CPU_TRACE 0x1380 483 484 #define HCODEC_HENC_SCRATCH_0 0x1ac0 485 #define HCODEC_HENC_SCRATCH_1 0x1ac1 486 #define HCODEC_HENC_SCRATCH_2 0x1ac2 487 #define HCODEC_HENC_SCRATCH_3 0x1ac3 488 #define HCODEC_HENC_SCRATCH_4 0x1ac4 489 #define HCODEC_HENC_SCRATCH_5 0x1ac5 490 #define HCODEC_HENC_SCRATCH_6 0x1ac6 491 #define HCODEC_HENC_SCRATCH_7 0x1ac7 492 #define HCODEC_HENC_SCRATCH_8 0x1ac8 493 #define HCODEC_HENC_SCRATCH_9 0x1ac9 494 #define HCODEC_HENC_SCRATCH_A 0x1aca 495 #define HCODEC_HENC_SCRATCH_B 0x1acb 496 #define HCODEC_HENC_SCRATCH_C 0x1acc 497 #define HCODEC_HENC_SCRATCH_D 0x1acd 498 #define HCODEC_HENC_SCRATCH_E 0x1ace 499 #define HCODEC_HENC_SCRATCH_F 0x1acf 500 #define HCODEC_HENC_SCRATCH_G 0x1ad0 501 #define HCODEC_HENC_SCRATCH_H 0x1ad1 502 #define HCODEC_HENC_SCRATCH_I 0x1ad2 503 #define HCODEC_HENC_SCRATCH_J 0x1ad3 504 #define HCODEC_HENC_SCRATCH_K 0x1ad4 505 #define HCODEC_HENC_SCRATCH_L 0x1ad5 506 #define HCODEC_HENC_SCRATCH_M 0x1ad6 507 #define HCODEC_HENC_SCRATCH_N 0x1ad7 508 #define HCODEC_IE_DATA_FEED_BUFF_INFO 0x1ad8 509 #define HCODEC_VLC_STATUS_CTRL 0x1d00 510 #define HCODEC_VLC_CONFIG 0x1d01 511 #define HCODEC_VLC_VB_START_PTR 0x1d10 512 #define HCODEC_VLC_VB_END_PTR 0x1d11 513 #define HCODEC_VLC_VB_WR_PTR 0x1d12 514 #define HCODEC_VLC_VB_RD_PTR 0x1d13 515 #define HCODEC_VLC_VB_SW_RD_PTR 0x1d14 516 #define HCODEC_VLC_VB_LEFT 0x1d15 517 #define HCODEC_VLC_VB_CONTROL 0x1d16 518 #define HCODEC_VLC_VB_MEM_CTL 0x1d17 519 #define HCODEC_VLC_VB_INT_PTR 0x1d18 520 #define HCODEC_VLC_WRRSP 0x1d19 521 #define HCODEC_VLC_TOTAL_BYTES 0x1d1a 522 #define HCODEC_VLC_VB_BUFF 0x1d1b 523 #define HCODEC_VLC_VB_PRE_BUFF_HI 0x1d1c 524 #define HCODEC_VLC_VB_PRE_BUFF_LOW 0x1d1d 525 #define HCODEC_VLC_STREAM_BUFF 0x1d1e 526 #define HCODEC_VLC_PUSH_STREAM 0x1d1f 527 #define HCODEC_VLC_PUSH_ELEMENT 0x1d20 528 #define HCODEC_VLC_ELEMENT_DATA 0x1d21 529 /*add from M8m2*/ 530 #define HCODEC_VLC_SPECIAL_CTL 0x1d22 531 #define HCODEC_VLC_HCMD_T_L_INFO 0x1d23 532 #define HCODEC_VLC_HCMD_CUR_INFO 0x1d24 533 /* add from GXBB */ 534 #define HCODEC_VLC_ADV_CONFIG 0x1d25 535 #define HCODEC_VLC_HCMD_MBXY_AUTO 0x1d26 536 #define HCODEC_VLC_INT_CONTROL_INTER 0x1d2f 537 /**/ 538 #define HCODEC_VLC_INT_CONTROL 0x1d30 539 #define HCODEC_VLC_PIC_SIZE 0x1d31 540 #define HCODEC_VLC_PIC_INFO 0x1d32 541 #define HCODEC_VLC_PIC_POSITION 0x1d33 542 #define HCODEC_VLC_INPUT_STATUS 0x1d34 543 #define HCODEC_VLC_MB_INFO 0x1d35 544 #define HCODEC_VLC_ENC_PEND_CMD 0x1d36 545 #define HCODEC_HENC_TOP_INFO_0 0x1d37 546 #define HCODEC_HENC_LEFT_INFO_0 0x1d38 547 #define HCODEC_HENC_TOP_INFO_1 0x1d39 548 #define HCODEC_HENC_LEFT_INFO_1 0x1d3a 549 #define HCODEC_VLC_IPRED_MODE_HI 0x1d3b 550 #define HCODEC_VLC_IPRED_MODE_LO 0x1d3c 551 #define HCODEC_VLC_DELTA_QP 0x1d3d 552 #define HCODEC_VLC_MB_HEADER_INFO 0x1d3e 553 #define HCODEC_VLC_P_MB_HEADER_INFO 0x1d3f 554 #define HCODEC_VLC_COEFF_BUF_STATUS 0x1d40 555 #define HCODEC_VLC_COEFF_RD_REQ 0x1d41 556 #define HCODEC_VLC_COEFF 0x1d42 557 #define HCODEC_VLC_COEFF_INFO 0x1d43 558 #define HCODEC_VLC_DC_BUF_STATUS 0x1d44 559 #define HCODEC_VLC_DC_RD_REQ 0x1d45 560 #define HCODEC_VLC_DC 0x1d46 561 #define HCODEC_VLC_DC_INFO 0x1d47 562 #define HCODEC_VLC_MV_INDEX 0x1d48 563 #define HCODEC_VLC_MV 0x1d49 564 #define HCODEC_HENC_TOP_MV_0 0x1d4a 565 #define HCODEC_HENC_TOP_MV_1 0x1d4b 566 #define HCODEC_HENC_TOP_MV_2 0x1d4c 567 #define HCODEC_HENC_TOP_MV_3 0x1d4d 568 #define HCODEC_HENC_LEFT_MV_0 0x1d4e 569 #define HCODEC_HENC_LEFT_MV_1 0x1d4f 570 #define HCODEC_HENC_LEFT_MV_2 0x1d50 571 #define HCODEC_HENC_LEFT_MV_3 0x1d51 572 #define HCODEC_TOP_LEFT_READY 0x1d52 573 #define HCODEC_MB_SKIP_RUN 0x1d53 574 #define HCODEC_VLC_HCMD_CONFIG 0x1d54 575 #define HCODEC_VLC_HCMD_DBLK_INFO 0x1d55 576 #define HCODEC_VLC_DBG_IDX 0x1d56 577 #define HCODEC_VLC_DBG_READ 0x1d57 578 #define HCODEC_VLC_JPEG_CTRL 0x1d58 579 #define HCODEC_VLC_JPEG_COEFF_BUF_STAT 0x1d59 580 #define HCODEC_VLC_HUFFMAN_ADDR 0x1d5a 581 #define HCODEC_VLC_HUFFMAN_DATA 0x1d5b 582 #define HCODEC_VLC_ENC_MV_BITS 0x1d5c 583 #define HCODEC_VLC_ENC_COEFF_BITS 0x1d5d 584 #define HCODEC_QDCT_STATUS_CTRL 0x1f00 585 #define HCODEC_QDCT_CONFIG 0x1f01 586 #define HCODEC_IGNORE_CONFIG 0x1f02 587 #define HCODEC_IGNORE_CONFIG_2 0x1f03 588 #define HCODEC_QDCT_MB_START_PTR 0x1f10 589 #define HCODEC_QDCT_MB_END_PTR 0x1f11 590 #define HCODEC_QDCT_MB_WR_PTR 0x1f12 591 #define HCODEC_QDCT_MB_RD_PTR 0x1f13 592 #define HCODEC_QDCT_MB_LEVEL 0x1f14 593 #define HCODEC_QDCT_MB_CONTROL 0x1f15 594 #define HCODEC_QDCT_MB_MEM_CTL 0x1f16 595 #define HCODEC_QDCT_MB_BUFF 0x1f17 596 #define HCODEC_QDCT_MB_MAGIC_WORD 0x1f18 597 #define HCODEC_QDCT_DCT_STATUS 0x1f19 598 #define HCODEC_QDCT_Q_STATUS 0x1f1a 599 #define HCODEC_QDCT_PIC_INFO 0x1f1b 600 #define HCODEC_QDCT_Q_QUANT_I 0x1f1c 601 #define HCODEC_QDCT_Q_QUANT_P 0x1f1d 602 #define HCODEC_QDCT_MB_PAUSE_CTL 0x1f1e 603 #define HCODEC_QDCT_TOP_CONTROL 0x1f1f 604 #define HCODEC_QDCT_TOP_BASE_MEM 0x1f20 605 #define HCODEC_QDCT_TOP_MEM_CTL 0x1f21 606 #define HCODEC_QDCT_TOP_WRRSP 0x1f22 607 #define HCODEC_QDCT_DBG_IDX 0x1f23 608 #define HCODEC_QDCT_DBG_READ 0x1f24 609 #define HCODEC_QDCT_JPEG_CTRL 0x1f25 610 #define HCODEC_QDCT_JPEG_X_START_END 0x1f26 611 #define HCODEC_QDCT_JPEG_Y_START_END 0x1f27 612 #define HCODEC_QDCT_JPEG_QUANT_ADDR 0x1f28 613 #define HCODEC_QDCT_JPEG_QUANT_DATA 0x1f29 614 #define HCODEC_QDCT_JPEG_SOF_RESUME 0x1f2a 615 #define HCODEC_QDCT_JPEG_DCT_STATUS0 0x1f2b 616 #define HCODEC_QDCT_JPEG_DCT_STATUS1 0x1f2c 617 #define HCODEC_QDCT_JPEG_DCT_COEFF01 0x1f2d 618 #define HCODEC_QDCT_JPEG_DCT_COEFF23 0x1f2e 619 #define HCODEC_QDCT_JPEG_DCT_COEFF45 0x1f2f 620 #define HCODEC_QDCT_JPEG_DCT_COEFF67 0x1f30 621 #define HCODEC_QDCT_JPEG_DCT_COEFF89 0x1f31 622 /*add from M8M2*/ 623 #define HCODEC_QDCT_I_PRED_REF_WR_IDX 0x1f32 624 #define HCODEC_QDCT_I_PRED_REF_WR_DATA 0x1f33 625 /* add from GXBB */ 626 #define HCODEC_QDCT_ADV_CONFIG 0x1f34 627 #define HCODEC_IE_WEIGHT 0x1f35 628 #define HCODEC_Q_QUANT_CONTROL 0x1f36 629 #define HCODEC_MBBOT_EVEN_ADDR 0x1f37 630 #define HCODEC_MBBOT_ODD_ADDR 0x1f38 631 #define HCODEC_QUANT_TABLE_DATA 0x1f39 632 #define HCODEC_SAD_CONTROL_0 0x1f3a 633 #define HCODEC_SAD_CONTROL_1 0x1f3b 634 #define HCODEC_QDCT_VLC_QUANT_CTL_0 0x1f3c 635 #define HCODEC_QDCT_VLC_QUANT_CTL_1 0x1f3d 636 #define HCODEC_QDCT_INT_STATUS 0x1f3e 637 #define HCODEC_QDCT_MIX_I_PRED_STATUS 0x1f3f 638 /**/ 639 #define HCODEC_IE_CONTROL 0x1f40 640 #define HCODEC_IE_MB_POSITION 0x1f41 641 #define HCODEC_IE_ME_MB_INFO 0x1f42 642 #define HCODEC_SAD_CONTROL 0x1f43 643 #define HCODEC_IE_RESULT_BUFFER 0x1f44 644 #define HCODEC_IE_I4_PRED_MODE_HI 0x1f45 645 #define HCODEC_IE_I4_PRED_MODE_LO 0x1f46 646 #define HCODEC_IE_C_PRED_MODE 0x1f47 647 #define HCODEC_IE_CUR_REF_SEL 0x1f48 648 #define HCODEC_ME_CONTROL 0x1f49 649 #define HCODEC_ME_START_POSITION 0x1f4a 650 #define HCODEC_ME_STATUS 0x1f4b 651 #define HCODEC_ME_DEBUG 0x1f4c 652 #define HCODEC_ME_SKIP_LINE 0x1f4d 653 #define HCODEC_ME_AB_MEM_CTL 0x1f4e 654 #define HCODEC_ME_PIC_INFO 0x1f4f 655 #define HCODEC_ME_SAD_ENOUGH_01 0x1f50 656 #define HCODEC_ME_SAD_ENOUGH_23 0x1f51 657 #define HCODEC_ME_STEP0_CLOSE_MV 0x1f52 658 #define HCODEC_ME_F_SKIP_SAD 0x1f53 659 #define HCODEC_ME_F_SKIP_WEIGHT 0x1f54 660 #define HCODEC_ME_MV_MERGE_CTL 0x1f55 661 #define HCODEC_ME_MV_WEIGHT_01 0x1f56 662 #define HCODEC_ME_MV_WEIGHT_23 0x1f57 663 #define HCODEC_ME_SAD_RANGE_INC 0x1f58 664 #define HCODEC_ME_SUB_MERGE_CTL 0x1f59 665 #define HCODEC_ME_SUB_REF_MV_CTL 0x1f5a 666 #define HCODEC_ME_SUB_ANY_WEIGHT_SAD 0x1f5b 667 #define HCODEC_ME_SUB_FIX_SAD 0x1f5c 668 #define HCODEC_ME_SUB_FIX_MIN_SAD 0x1f5d 669 #define HCODEC_ME_SUB_SNAP_GLITCH 0x1f5e 670 #define HCODEC_ME_SUB_ACT_CTL 0x1f5f 671 /* add from GXBB */ 672 #define HCODEC_ME_WEIGHT 0x1f60 673 #define HCODEC_ME_SAD_0 0x1f61 674 #define HCODEC_ME_SAD_1 0x1f62 675 #define HCODEC_ME_SAD_2 0x1f63 676 #define HCODEC_ME_SAD_3 0x1f64 677 #define HCODEC_IE_SAD_0 0x1f65 678 #define HCODEC_IE_SAD_1 0x1f66 679 #define HCODEC_IE_SAD_2 0x1f67 680 #define HCODEC_IE_SAD_3 0x1f68 681 #define HCODEC_ADV_MV_CTL0 0x1f69 682 #define HCODEC_ADV_MV_CTL1 0x1f6a 683 #define HCODEC_ADV_MV_CTL2 0x1f6b 684 685 /* add from GXTVBB */ 686 #define HCODEC_V3_SKIP_CONTROL 0x1f6c 687 #define HCODEC_V3_TOP_LEFT_CTL 0x1f6d 688 #define HCODEC_V3_TOP_MV 0x1f6e 689 #define HCODEC_V3_LEFT_MV 0x1f6f 690 #define HCODEC_V3_SKIP_WEIGHT 0x1f70 691 #define HCODEC_V3_L1_SKIP_MAX_SAD 0x1f71 692 #define HCODEC_V3_L2_SKIP_WEIGHT 0x1f72 693 #define HCODEC_V3_MV_SAD_TABLE 0x1f73 694 #define HCODEC_V3_F_ZERO_CTL_0 0x1f74 695 #define HCODEC_V3_F_ZERO_CTL_1 0x1f75 696 #define HCODEC_V3_TOP_INTRA_INFO 0x1f76 697 #define HCODEC_V3_LEFT_INTRA_INFO 0x1f77 698 #define HCODEC_V3_IPRED_TYPE_WEIGHT_0 0x1f78 699 #define HCODEC_V3_IPRED_TYPE_WEIGHT_1 0x1f79 700 #define HCODEC_V3_LEFT_SMALL_MAX_SAD 0x1f7a 701 702 /* add from GXL */ 703 #define HCODEC_V4_FORCE_SKIP_CFG 0x1f7b 704 705 /* add from TXL */ 706 #define HCODEC_V5_MB_DIFF_SUM 0x1f7c 707 #define HCODEC_V5_SMALL_DIFF_CNT 0x1f7d 708 #define HCODEC_V5_SIMPLE_MB_CTL 0x1f7e 709 #define HCODEC_V5_SIMPLE_MB_DQUANT 0x1f7f 710 #define HCODEC_V5_SIMPLE_MB_ME_WEIGHT 0x1f80 711 #endif 712 713