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1 /*
2  * Copyright (c) 2021-2023 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_IOMUX_H
10 #define HPM_IOMUX_H
11 
12 /* IOC_PA00_FUNC_CTL function mux definitions */
13 #define IOC_PA00_FUNC_CTL_GPIO_A_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
14 #define IOC_PA00_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
15 #define IOC_PA00_FUNC_CTL_SPI0_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
16 #define IOC_PA00_FUNC_CTL_I2S1_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
17 #define IOC_PA00_FUNC_CTL_I2S2_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
18 #define IOC_PA00_FUNC_CTL_CAM0_D_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
19 
20 /* IOC_PA01_FUNC_CTL function mux definitions */
21 #define IOC_PA01_FUNC_CTL_GPIO_A_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
22 #define IOC_PA01_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
23 #define IOC_PA01_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
24 #define IOC_PA01_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
25 #define IOC_PA01_FUNC_CTL_I2S1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
26 #define IOC_PA01_FUNC_CTL_CAM0_D_8             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
27 
28 /* IOC_PA02_FUNC_CTL function mux definitions */
29 #define IOC_PA02_FUNC_CTL_GPIO_A_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
30 #define IOC_PA02_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
31 #define IOC_PA02_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
32 #define IOC_PA02_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
33 #define IOC_PA02_FUNC_CTL_I2S1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
34 #define IOC_PA02_FUNC_CTL_CAM0_D_9             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
35 
36 /* IOC_PA03_FUNC_CTL function mux definitions */
37 #define IOC_PA03_FUNC_CTL_GPIO_A_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
38 #define IOC_PA03_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
39 #define IOC_PA03_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
40 #define IOC_PA03_FUNC_CTL_I2S1_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
41 #define IOC_PA03_FUNC_CTL_I2S2_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
42 #define IOC_PA03_FUNC_CTL_CAM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
43 
44 /* IOC_PA04_FUNC_CTL function mux definitions */
45 #define IOC_PA04_FUNC_CTL_GPIO_A_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
46 #define IOC_PA04_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
47 #define IOC_PA04_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
48 #define IOC_PA04_FUNC_CTL_SPI0_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
49 #define IOC_PA04_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
50 #define IOC_PA04_FUNC_CTL_I2S2_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
51 #define IOC_PA04_FUNC_CTL_CAM0_D_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
52 
53 /* IOC_PA05_FUNC_CTL function mux definitions */
54 #define IOC_PA05_FUNC_CTL_GPIO_A_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
55 #define IOC_PA05_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
56 #define IOC_PA05_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
57 #define IOC_PA05_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
58 #define IOC_PA05_FUNC_CTL_SPI0_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
59 #define IOC_PA05_FUNC_CTL_I2S1_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
60 #define IOC_PA05_FUNC_CTL_DAOL_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
61 #define IOC_PA05_FUNC_CTL_CAM0_HSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
62 
63 /* IOC_PA06_FUNC_CTL function mux definitions */
64 #define IOC_PA06_FUNC_CTL_GPIO_A_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
65 #define IOC_PA06_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
66 #define IOC_PA06_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
67 #define IOC_PA06_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
68 #define IOC_PA06_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
69 #define IOC_PA06_FUNC_CTL_I2S1_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
70 #define IOC_PA06_FUNC_CTL_DAOR_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
71 #define IOC_PA06_FUNC_CTL_CAM0_VSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
72 
73 /* IOC_PA07_FUNC_CTL function mux definitions */
74 #define IOC_PA07_FUNC_CTL_GPIO_A_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
75 #define IOC_PA07_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
76 #define IOC_PA07_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
77 #define IOC_PA07_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
78 #define IOC_PA07_FUNC_CTL_CAM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
79 #define IOC_PA07_FUNC_CTL_SOC_REF1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
80 
81 /* IOC_PA08_FUNC_CTL function mux definitions */
82 #define IOC_PA08_FUNC_CTL_GPIO_A_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
83 #define IOC_PA08_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
84 #define IOC_PA08_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
85 #define IOC_PA08_FUNC_CTL_I2S1_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
86 #define IOC_PA08_FUNC_CTL_I2S2_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
87 #define IOC_PA08_FUNC_CTL_CAM0_D_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
88 
89 /* IOC_PA09_FUNC_CTL function mux definitions */
90 #define IOC_PA09_FUNC_CTL_GPIO_A_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
91 #define IOC_PA09_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
92 #define IOC_PA09_FUNC_CTL_I2S1_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
93 #define IOC_PA09_FUNC_CTL_I2S2_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
94 #define IOC_PA09_FUNC_CTL_CAM0_D_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
95 #define IOC_PA09_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
96 
97 /* IOC_PA10_FUNC_CTL function mux definitions */
98 #define IOC_PA10_FUNC_CTL_GPIO_A_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
99 #define IOC_PA10_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
100 #define IOC_PA10_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
101 #define IOC_PA10_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
102 #define IOC_PA10_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
103 #define IOC_PA10_FUNC_CTL_I2S1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
104 #define IOC_PA10_FUNC_CTL_DAOL_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
105 #define IOC_PA10_FUNC_CTL_CAM0_XCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
106 
107 /* IOC_PA11_FUNC_CTL function mux definitions */
108 #define IOC_PA11_FUNC_CTL_GPIO_A_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
109 #define IOC_PA11_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
110 #define IOC_PA11_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
111 #define IOC_PA11_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
112 #define IOC_PA11_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
113 #define IOC_PA11_FUNC_CTL_I2S1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
114 #define IOC_PA11_FUNC_CTL_DAOR_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
115 #define IOC_PA11_FUNC_CTL_CAM0_PIXCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
116 
117 /* IOC_PA12_FUNC_CTL function mux definitions */
118 #define IOC_PA12_FUNC_CTL_GPIO_A_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
119 #define IOC_PA12_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
120 #define IOC_PA12_FUNC_CTL_UART9_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
121 #define IOC_PA12_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
122 #define IOC_PA12_FUNC_CTL_SPI1_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
123 #define IOC_PA12_FUNC_CTL_I2S1_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
124 #define IOC_PA12_FUNC_CTL_DIS0_B_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
125 #define IOC_PA12_FUNC_CTL_CAM0_PIXCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
126 
127 /* IOC_PA13_FUNC_CTL function mux definitions */
128 #define IOC_PA13_FUNC_CTL_GPIO_A_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
129 #define IOC_PA13_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
130 #define IOC_PA13_FUNC_CTL_UART9_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
131 #define IOC_PA13_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
132 #define IOC_PA13_FUNC_CTL_SPI1_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
133 #define IOC_PA13_FUNC_CTL_I2S1_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
134 #define IOC_PA13_FUNC_CTL_DIS0_B_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
135 #define IOC_PA13_FUNC_CTL_CAM0_HSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
136 
137 /* IOC_PA14_FUNC_CTL function mux definitions */
138 #define IOC_PA14_FUNC_CTL_GPIO_A_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
139 #define IOC_PA14_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
140 #define IOC_PA14_FUNC_CTL_UART8_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
141 #define IOC_PA14_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
142 #define IOC_PA14_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
143 #define IOC_PA14_FUNC_CTL_I2S2_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
144 #define IOC_PA14_FUNC_CTL_I2S1_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
145 #define IOC_PA14_FUNC_CTL_DIS0_VSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
146 
147 /* IOC_PA15_FUNC_CTL function mux definitions */
148 #define IOC_PA15_FUNC_CTL_GPIO_A_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
149 #define IOC_PA15_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
150 #define IOC_PA15_FUNC_CTL_UART8_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
151 #define IOC_PA15_FUNC_CTL_UART8_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
152 #define IOC_PA15_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
153 #define IOC_PA15_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
154 #define IOC_PA15_FUNC_CTL_I2S2_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
155 #define IOC_PA15_FUNC_CTL_I2S1_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
156 #define IOC_PA15_FUNC_CTL_DIS0_EN              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
157 
158 /* IOC_PA16_FUNC_CTL function mux definitions */
159 #define IOC_PA16_FUNC_CTL_GPIO_A_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
160 #define IOC_PA16_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
161 #define IOC_PA16_FUNC_CTL_UART10_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
162 #define IOC_PA16_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
163 #define IOC_PA16_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
164 #define IOC_PA16_FUNC_CTL_I2S1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
165 #define IOC_PA16_FUNC_CTL_DIS0_B_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
166 #define IOC_PA16_FUNC_CTL_CAM0_XCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
167 
168 /* IOC_PA17_FUNC_CTL function mux definitions */
169 #define IOC_PA17_FUNC_CTL_GPIO_A_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
170 #define IOC_PA17_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
171 #define IOC_PA17_FUNC_CTL_UART10_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
172 #define IOC_PA17_FUNC_CTL_UART10_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
173 #define IOC_PA17_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
174 #define IOC_PA17_FUNC_CTL_I2S1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
175 #define IOC_PA17_FUNC_CTL_DIS0_B_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
176 #define IOC_PA17_FUNC_CTL_CAM0_VSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
177 
178 /* IOC_PA18_FUNC_CTL function mux definitions */
179 #define IOC_PA18_FUNC_CTL_GPIO_A_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
180 #define IOC_PA18_FUNC_CTL_UART10_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
181 #define IOC_PA18_FUNC_CTL_SPI1_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
182 #define IOC_PA18_FUNC_CTL_I2S1_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
183 #define IOC_PA18_FUNC_CTL_DIS0_B_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
184 #define IOC_PA18_FUNC_CTL_CAM0_D_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
185 
186 /* IOC_PA19_FUNC_CTL function mux definitions */
187 #define IOC_PA19_FUNC_CTL_GPIO_A_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
188 #define IOC_PA19_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
189 #define IOC_PA19_FUNC_CTL_UART11_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
190 #define IOC_PA19_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
191 #define IOC_PA19_FUNC_CTL_I2S2_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
192 #define IOC_PA19_FUNC_CTL_I2S1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
193 #define IOC_PA19_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
194 #define IOC_PA19_FUNC_CTL_DIS0_HSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
195 
196 /* IOC_PA20_FUNC_CTL function mux definitions */
197 #define IOC_PA20_FUNC_CTL_GPIO_A_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
198 #define IOC_PA20_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
199 #define IOC_PA20_FUNC_CTL_UART11_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
200 #define IOC_PA20_FUNC_CTL_UART11_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
201 #define IOC_PA20_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
202 #define IOC_PA20_FUNC_CTL_I2S2_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
203 #define IOC_PA20_FUNC_CTL_I2S1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
204 #define IOC_PA20_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
205 #define IOC_PA20_FUNC_CTL_DIS0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
206 
207 /* IOC_PA21_FUNC_CTL function mux definitions */
208 #define IOC_PA21_FUNC_CTL_GPIO_A_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
209 #define IOC_PA21_FUNC_CTL_UART11_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
210 #define IOC_PA21_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
211 #define IOC_PA21_FUNC_CTL_I2S3_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
212 #define IOC_PA21_FUNC_CTL_DAOL_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
213 #define IOC_PA21_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
214 #define IOC_PA21_FUNC_CTL_DIS0_R_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
215 
216 /* IOC_PA22_FUNC_CTL function mux definitions */
217 #define IOC_PA22_FUNC_CTL_GPIO_A_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
218 #define IOC_PA22_FUNC_CTL_UART11_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
219 #define IOC_PA22_FUNC_CTL_I2S1_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
220 #define IOC_PA22_FUNC_CTL_DAOR_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
221 #define IOC_PA22_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
222 #define IOC_PA22_FUNC_CTL_DIS0_G_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
223 #define IOC_PA22_FUNC_CTL_CAM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
224 
225 /* IOC_PA23_FUNC_CTL function mux definitions */
226 #define IOC_PA23_FUNC_CTL_GPIO_A_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
227 #define IOC_PA23_FUNC_CTL_UART10_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
228 #define IOC_PA23_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
229 #define IOC_PA23_FUNC_CTL_I2S2_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
230 #define IOC_PA23_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
231 #define IOC_PA23_FUNC_CTL_DIS0_G_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
232 #define IOC_PA23_FUNC_CTL_CAM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
233 
234 /* IOC_PA24_FUNC_CTL function mux definitions */
235 #define IOC_PA24_FUNC_CTL_GPIO_A_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
236 #define IOC_PA24_FUNC_CTL_UART8_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
237 #define IOC_PA24_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
238 #define IOC_PA24_FUNC_CTL_I2S2_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
239 #define IOC_PA24_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
240 #define IOC_PA24_FUNC_CTL_DIS0_G_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
241 #define IOC_PA24_FUNC_CTL_CAM0_D_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
242 
243 /* IOC_PA25_FUNC_CTL function mux definitions */
244 #define IOC_PA25_FUNC_CTL_GPIO_A_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
245 #define IOC_PA25_FUNC_CTL_UART8_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
246 #define IOC_PA25_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
247 #define IOC_PA25_FUNC_CTL_I2S2_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
248 #define IOC_PA25_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
249 #define IOC_PA25_FUNC_CTL_DIS0_G_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
250 #define IOC_PA25_FUNC_CTL_CAM0_D_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
251 
252 /* IOC_PA26_FUNC_CTL function mux definitions */
253 #define IOC_PA26_FUNC_CTL_GPIO_A_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
254 #define IOC_PA26_FUNC_CTL_UART12_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
255 #define IOC_PA26_FUNC_CTL_SPI2_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
256 #define IOC_PA26_FUNC_CTL_I2S3_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
257 #define IOC_PA26_FUNC_CTL_DAOL_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
258 #define IOC_PA26_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
259 #define IOC_PA26_FUNC_CTL_DIS0_R_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
260 
261 /* IOC_PA27_FUNC_CTL function mux definitions */
262 #define IOC_PA27_FUNC_CTL_GPIO_A_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
263 #define IOC_PA27_FUNC_CTL_UART12_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
264 #define IOC_PA27_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
265 #define IOC_PA27_FUNC_CTL_I2S3_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
266 #define IOC_PA27_FUNC_CTL_DAOR_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
267 #define IOC_PA27_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
268 #define IOC_PA27_FUNC_CTL_DIS0_R_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
269 
270 /* IOC_PA28_FUNC_CTL function mux definitions */
271 #define IOC_PA28_FUNC_CTL_GPIO_A_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
272 #define IOC_PA28_FUNC_CTL_UART13_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
273 #define IOC_PA28_FUNC_CTL_I2S3_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
274 #define IOC_PA28_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
275 #define IOC_PA28_FUNC_CTL_DIS0_R_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
276 #define IOC_PA28_FUNC_CTL_CAM0_D_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
277 
278 /* IOC_PA29_FUNC_CTL function mux definitions */
279 #define IOC_PA29_FUNC_CTL_GPIO_A_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
280 #define IOC_PA29_FUNC_CTL_UART9_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
281 #define IOC_PA29_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
282 #define IOC_PA29_FUNC_CTL_I2S2_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
283 #define IOC_PA29_FUNC_CTL_I2S3_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
284 #define IOC_PA29_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
285 #define IOC_PA29_FUNC_CTL_DIS0_G_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
286 #define IOC_PA29_FUNC_CTL_CAM0_D_9             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
287 
288 /* IOC_PA30_FUNC_CTL function mux definitions */
289 #define IOC_PA30_FUNC_CTL_GPIO_A_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
290 #define IOC_PA30_FUNC_CTL_UART9_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
291 #define IOC_PA30_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
292 #define IOC_PA30_FUNC_CTL_I2S2_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
293 #define IOC_PA30_FUNC_CTL_I2S3_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
294 #define IOC_PA30_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
295 #define IOC_PA30_FUNC_CTL_DIS0_G_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
296 #define IOC_PA30_FUNC_CTL_CAM0_D_8             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
297 
298 /* IOC_PA31_FUNC_CTL function mux definitions */
299 #define IOC_PA31_FUNC_CTL_GPIO_A_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
300 #define IOC_PA31_FUNC_CTL_UART13_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
301 #define IOC_PA31_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
302 #define IOC_PA31_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
303 #define IOC_PA31_FUNC_CTL_I2S3_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
304 #define IOC_PA31_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
305 #define IOC_PA31_FUNC_CTL_DIS0_R_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
306 
307 /* IOC_PB00_FUNC_CTL function mux definitions */
308 #define IOC_PB00_FUNC_CTL_GPIO_B_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
309 #define IOC_PB00_FUNC_CTL_UART13_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
310 #define IOC_PB00_FUNC_CTL_UART13_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
311 #define IOC_PB00_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
312 #define IOC_PB00_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
313 #define IOC_PB00_FUNC_CTL_I2S3_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
314 #define IOC_PB00_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
315 #define IOC_PB00_FUNC_CTL_DIS0_R_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
316 
317 /* IOC_PB01_FUNC_CTL function mux definitions */
318 #define IOC_PB01_FUNC_CTL_GPIO_B_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
319 #define IOC_PB01_FUNC_CTL_UART14_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
320 #define IOC_PB01_FUNC_CTL_I2S2_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
321 #define IOC_PB01_FUNC_CTL_I2S3_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
322 #define IOC_PB01_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
323 #define IOC_PB01_FUNC_CTL_DIS0_G_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
324 #define IOC_PB01_FUNC_CTL_SYSCTL_CLK_OBS_1     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
325 
326 /* IOC_PB02_FUNC_CTL function mux definitions */
327 #define IOC_PB02_FUNC_CTL_GPIO_B_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
328 #define IOC_PB02_FUNC_CTL_UART14_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
329 #define IOC_PB02_FUNC_CTL_I2S2_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
330 #define IOC_PB02_FUNC_CTL_I2S3_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
331 #define IOC_PB02_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
332 #define IOC_PB02_FUNC_CTL_DIS0_B_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
333 #define IOC_PB02_FUNC_CTL_SYSCTL_CLK_OBS_0     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
334 
335 /* IOC_PB03_FUNC_CTL function mux definitions */
336 #define IOC_PB03_FUNC_CTL_GPIO_B_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
337 #define IOC_PB03_FUNC_CTL_UART14_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
338 #define IOC_PB03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
339 #define IOC_PB03_FUNC_CTL_I2S3_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
340 #define IOC_PB03_FUNC_CTL_TRGM0_P_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
341 #define IOC_PB03_FUNC_CTL_DIS0_R_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
342 #define IOC_PB03_FUNC_CTL_CAM1_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
343 
344 /* IOC_PB04_FUNC_CTL function mux definitions */
345 #define IOC_PB04_FUNC_CTL_GPIO_B_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
346 #define IOC_PB04_FUNC_CTL_UART14_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
347 #define IOC_PB04_FUNC_CTL_UART14_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
348 #define IOC_PB04_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
349 #define IOC_PB04_FUNC_CTL_I2S3_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
350 #define IOC_PB04_FUNC_CTL_I2S2_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
351 #define IOC_PB04_FUNC_CTL_TRGM0_P_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
352 #define IOC_PB04_FUNC_CTL_DIS0_R_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
353 #define IOC_PB04_FUNC_CTL_CAM1_D_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
354 
355 /* IOC_PB05_FUNC_CTL function mux definitions */
356 #define IOC_PB05_FUNC_CTL_GPIO_B_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
357 #define IOC_PB05_FUNC_CTL_UART13_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
358 #define IOC_PB05_FUNC_CTL_I2S3_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
359 #define IOC_PB05_FUNC_CTL_I2S2_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
360 #define IOC_PB05_FUNC_CTL_TRGM0_P_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
361 #define IOC_PB05_FUNC_CTL_DIS0_B_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
362 #define IOC_PB05_FUNC_CTL_CAM1_D_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
363 
364 /* IOC_PB06_FUNC_CTL function mux definitions */
365 #define IOC_PB06_FUNC_CTL_GPIO_B_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
366 #define IOC_PB06_FUNC_CTL_UART15_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
367 #define IOC_PB06_FUNC_CTL_I2S3_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
368 #define IOC_PB06_FUNC_CTL_TRGM1_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
369 #define IOC_PB06_FUNC_CTL_DIS0_G_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
370 #define IOC_PB06_FUNC_CTL_CAM1_PIXCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
371 #define IOC_PB06_FUNC_CTL_SYSCTL_CLK_OBS_2     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
372 
373 /* IOC_PB07_FUNC_CTL function mux definitions */
374 #define IOC_PB07_FUNC_CTL_GPIO_B_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
375 #define IOC_PB07_FUNC_CTL_UART15_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
376 #define IOC_PB07_FUNC_CTL_I2S3_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
377 #define IOC_PB07_FUNC_CTL_TRGM1_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
378 #define IOC_PB07_FUNC_CTL_DIS0_B_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
379 #define IOC_PB07_FUNC_CTL_CAM1_HSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
380 #define IOC_PB07_FUNC_CTL_SYSCTL_CLK_OBS_3     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
381 
382 /* IOC_PB08_FUNC_CTL function mux definitions */
383 #define IOC_PB08_FUNC_CTL_GPIO_B_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
384 #define IOC_PB08_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
385 #define IOC_PB08_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
386 #define IOC_PB08_FUNC_CTL_I2S3_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
387 #define IOC_PB08_FUNC_CTL_I2S2_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
388 #define IOC_PB08_FUNC_CTL_TRGM0_P_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
389 #define IOC_PB08_FUNC_CTL_CAM1_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
390 
391 /* IOC_PB09_FUNC_CTL function mux definitions */
392 #define IOC_PB09_FUNC_CTL_GPIO_B_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
393 #define IOC_PB09_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
394 #define IOC_PB09_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
395 #define IOC_PB09_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
396 #define IOC_PB09_FUNC_CTL_I2S3_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
397 #define IOC_PB09_FUNC_CTL_I2S2_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
398 #define IOC_PB09_FUNC_CTL_TRGM0_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
399 #define IOC_PB09_FUNC_CTL_CAM1_D_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
400 
401 /* IOC_PB10_FUNC_CTL function mux definitions */
402 #define IOC_PB10_FUNC_CTL_GPIO_B_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
403 #define IOC_PB10_FUNC_CTL_UART12_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
404 #define IOC_PB10_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
405 #define IOC_PB10_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
406 #define IOC_PB10_FUNC_CTL_I2S3_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
407 #define IOC_PB10_FUNC_CTL_TRGM1_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
408 #define IOC_PB10_FUNC_CTL_CAM1_XCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
409 
410 /* IOC_PB11_FUNC_CTL function mux definitions */
411 #define IOC_PB11_FUNC_CTL_GPIO_B_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
412 #define IOC_PB11_FUNC_CTL_UART12_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
413 #define IOC_PB11_FUNC_CTL_UART12_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
414 #define IOC_PB11_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
415 #define IOC_PB11_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
416 #define IOC_PB11_FUNC_CTL_I2S3_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
417 #define IOC_PB11_FUNC_CTL_TRGM1_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
418 #define IOC_PB11_FUNC_CTL_CAM1_VSYNC           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
419 
420 /* IOC_PB12_FUNC_CTL function mux definitions */
421 #define IOC_PB12_FUNC_CTL_GPIO_B_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
422 #define IOC_PB12_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
423 #define IOC_PB12_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
424 #define IOC_PB12_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
425 #define IOC_PB12_FUNC_CTL_I2S3_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
426 #define IOC_PB12_FUNC_CTL_I2S2_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
427 #define IOC_PB12_FUNC_CTL_TRGM0_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
428 #define IOC_PB12_FUNC_CTL_CAM1_D_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
429 
430 /* IOC_PB13_FUNC_CTL function mux definitions */
431 #define IOC_PB13_FUNC_CTL_GPIO_B_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
432 #define IOC_PB13_FUNC_CTL_UART15_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
433 #define IOC_PB13_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
434 #define IOC_PB13_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
435 #define IOC_PB13_FUNC_CTL_I2S3_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
436 #define IOC_PB13_FUNC_CTL_TRGM1_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
437 #define IOC_PB13_FUNC_CTL_CAM1_D_8             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
438 
439 /* IOC_PB14_FUNC_CTL function mux definitions */
440 #define IOC_PB14_FUNC_CTL_GPIO_B_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
441 #define IOC_PB14_FUNC_CTL_UART15_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
442 #define IOC_PB14_FUNC_CTL_UART15_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
443 #define IOC_PB14_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
444 #define IOC_PB14_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
445 #define IOC_PB14_FUNC_CTL_I2S3_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
446 #define IOC_PB14_FUNC_CTL_TRGM1_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
447 #define IOC_PB14_FUNC_CTL_CAM1_D_9             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
448 
449 /* IOC_PB15_FUNC_CTL function mux definitions */
450 #define IOC_PB15_FUNC_CTL_GPIO_B_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
451 #define IOC_PB15_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
452 #define IOC_PB15_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
453 #define IOC_PB15_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
454 #define IOC_PB15_FUNC_CTL_DAOR_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
455 #define IOC_PB15_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
456 #define IOC_PB15_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
457 
458 /* IOC_PB16_FUNC_CTL function mux definitions */
459 #define IOC_PB16_FUNC_CTL_GPIO_B_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
460 #define IOC_PB16_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
461 #define IOC_PB16_FUNC_CTL_DAOR_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
462 #define IOC_PB16_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
463 
464 /* IOC_PB17_FUNC_CTL function mux definitions */
465 #define IOC_PB17_FUNC_CTL_GPIO_B_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
466 #define IOC_PB17_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
467 #define IOC_PB17_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
468 #define IOC_PB17_FUNC_CTL_DAOL_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
469 #define IOC_PB17_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
470 
471 /* IOC_PB18_FUNC_CTL function mux definitions */
472 #define IOC_PB18_FUNC_CTL_GPIO_B_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
473 #define IOC_PB18_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
474 #define IOC_PB18_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
475 #define IOC_PB18_FUNC_CTL_DAOL_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
476 #define IOC_PB18_FUNC_CTL_FEMC_DQ_25           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
477 #define IOC_PB18_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
478 
479 /* IOC_PB19_FUNC_CTL function mux definitions */
480 #define IOC_PB19_FUNC_CTL_GPIO_B_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
481 #define IOC_PB19_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
482 #define IOC_PB19_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
483 #define IOC_PB19_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
484 #define IOC_PB19_FUNC_CTL_FEMC_DQ_24           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
485 #define IOC_PB19_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
486 
487 /* IOC_PB20_FUNC_CTL function mux definitions */
488 #define IOC_PB20_FUNC_CTL_GPIO_B_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
489 #define IOC_PB20_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
490 #define IOC_PB20_FUNC_CTL_SPI2_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
491 #define IOC_PB20_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
492 #define IOC_PB20_FUNC_CTL_FEMC_DQ_23           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
493 #define IOC_PB20_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
494 
495 /* IOC_PB21_FUNC_CTL function mux definitions */
496 #define IOC_PB21_FUNC_CTL_GPIO_B_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
497 #define IOC_PB21_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
498 #define IOC_PB21_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
499 #define IOC_PB21_FUNC_CTL_FEMC_DQ_27           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
500 #define IOC_PB21_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
501 
502 /* IOC_PB22_FUNC_CTL function mux definitions */
503 #define IOC_PB22_FUNC_CTL_GPIO_B_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
504 #define IOC_PB22_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
505 #define IOC_PB22_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
506 #define IOC_PB22_FUNC_CTL_FEMC_DQ_26           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
507 #define IOC_PB22_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
508 
509 /* IOC_PB23_FUNC_CTL function mux definitions */
510 #define IOC_PB23_FUNC_CTL_GPIO_B_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
511 #define IOC_PB23_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
512 #define IOC_PB23_FUNC_CTL_SPI2_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
513 #define IOC_PB23_FUNC_CTL_FEMC_DQ_22           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
514 #define IOC_PB23_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
515 
516 /* IOC_PB24_FUNC_CTL function mux definitions */
517 #define IOC_PB24_FUNC_CTL_GPIO_B_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
518 #define IOC_PB24_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
519 #define IOC_PB24_FUNC_CTL_SPI2_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
520 #define IOC_PB24_FUNC_CTL_FEMC_DQ_29           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
521 #define IOC_PB24_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
522 
523 /* IOC_PB25_FUNC_CTL function mux definitions */
524 #define IOC_PB25_FUNC_CTL_GPIO_B_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
525 #define IOC_PB25_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
526 #define IOC_PB25_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
527 #define IOC_PB25_FUNC_CTL_FEMC_DQ_28           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
528 #define IOC_PB25_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
529 
530 /* IOC_PB26_FUNC_CTL function mux definitions */
531 #define IOC_PB26_FUNC_CTL_GPIO_B_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
532 #define IOC_PB26_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
533 #define IOC_PB26_FUNC_CTL_FEMC_DQ_21           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
534 #define IOC_PB26_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
535 
536 /* IOC_PB27_FUNC_CTL function mux definitions */
537 #define IOC_PB27_FUNC_CTL_GPIO_B_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
538 #define IOC_PB27_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
539 #define IOC_PB27_FUNC_CTL_FEMC_DQ_20           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
540 #define IOC_PB27_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
541 
542 /* IOC_PB28_FUNC_CTL function mux definitions */
543 #define IOC_PB28_FUNC_CTL_GPIO_B_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
544 #define IOC_PB28_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
545 #define IOC_PB28_FUNC_CTL_SPI3_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
546 #define IOC_PB28_FUNC_CTL_FEMC_DQ_19           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
547 #define IOC_PB28_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
548 
549 /* IOC_PB29_FUNC_CTL function mux definitions */
550 #define IOC_PB29_FUNC_CTL_GPIO_B_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
551 #define IOC_PB29_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
552 #define IOC_PB29_FUNC_CTL_SPI3_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
553 #define IOC_PB29_FUNC_CTL_FEMC_DQ_31           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
554 #define IOC_PB29_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
555 
556 /* IOC_PB30_FUNC_CTL function mux definitions */
557 #define IOC_PB30_FUNC_CTL_GPIO_B_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
558 #define IOC_PB30_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
559 #define IOC_PB30_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
560 #define IOC_PB30_FUNC_CTL_FEMC_DQ_30           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
561 #define IOC_PB30_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
562 
563 /* IOC_PB31_FUNC_CTL function mux definitions */
564 #define IOC_PB31_FUNC_CTL_GPIO_B_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
565 #define IOC_PB31_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
566 #define IOC_PB31_FUNC_CTL_FEMC_DQ_18           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
567 #define IOC_PB31_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
568 
569 /* IOC_PC00_FUNC_CTL function mux definitions */
570 #define IOC_PC00_FUNC_CTL_GPIO_C_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
571 #define IOC_PC00_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
572 #define IOC_PC00_FUNC_CTL_FEMC_DQ_17           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
573 #define IOC_PC00_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
574 
575 /* IOC_PC01_FUNC_CTL function mux definitions */
576 #define IOC_PC01_FUNC_CTL_GPIO_C_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
577 #define IOC_PC01_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
578 #define IOC_PC01_FUNC_CTL_SPI3_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
579 #define IOC_PC01_FUNC_CTL_FEMC_DQ_16           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
580 #define IOC_PC01_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
581 
582 /* IOC_PC02_FUNC_CTL function mux definitions */
583 #define IOC_PC02_FUNC_CTL_GPIO_C_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
584 #define IOC_PC02_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
585 #define IOC_PC02_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
586 #define IOC_PC02_FUNC_CTL_FEMC_DM_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
587 #define IOC_PC02_FUNC_CTL_TRGM0_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
588 
589 /* IOC_PC03_FUNC_CTL function mux definitions */
590 #define IOC_PC03_FUNC_CTL_GPIO_C_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
591 #define IOC_PC03_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
592 #define IOC_PC03_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
593 #define IOC_PC03_FUNC_CTL_FEMC_DM_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
594 #define IOC_PC03_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
595 
596 /* IOC_PC04_FUNC_CTL function mux definitions */
597 #define IOC_PC04_FUNC_CTL_GPIO_C_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
598 #define IOC_PC04_FUNC_CTL_UART10_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
599 #define IOC_PC04_FUNC_CTL_FEMC_A_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
600 #define IOC_PC04_FUNC_CTL_TRGM1_P_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
601 
602 /* IOC_PC05_FUNC_CTL function mux definitions */
603 #define IOC_PC05_FUNC_CTL_GPIO_C_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
604 #define IOC_PC05_FUNC_CTL_UART10_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
605 #define IOC_PC05_FUNC_CTL_FEMC_A_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
606 #define IOC_PC05_FUNC_CTL_TRGM1_P_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
607 
608 /* IOC_PC06_FUNC_CTL function mux definitions */
609 #define IOC_PC06_FUNC_CTL_GPIO_C_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
610 #define IOC_PC06_FUNC_CTL_UART8_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
611 #define IOC_PC06_FUNC_CTL_FEMC_A_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
612 #define IOC_PC06_FUNC_CTL_XPI1_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
613 #define IOC_PC06_FUNC_CTL_TRGM0_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
614 
615 /* IOC_PC07_FUNC_CTL function mux definitions */
616 #define IOC_PC07_FUNC_CTL_GPIO_C_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
617 #define IOC_PC07_FUNC_CTL_UART8_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
618 #define IOC_PC07_FUNC_CTL_FEMC_A_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
619 #define IOC_PC07_FUNC_CTL_XPI1_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
620 #define IOC_PC07_FUNC_CTL_TRGM0_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
621 
622 /* IOC_PC08_FUNC_CTL function mux definitions */
623 #define IOC_PC08_FUNC_CTL_GPIO_C_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
624 #define IOC_PC08_FUNC_CTL_UART11_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
625 #define IOC_PC08_FUNC_CTL_FEMC_A_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
626 #define IOC_PC08_FUNC_CTL_TRGM1_P_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
627 #define IOC_PC08_FUNC_CTL_ETH1_EVTO_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
628 
629 /* IOC_PC09_FUNC_CTL function mux definitions */
630 #define IOC_PC09_FUNC_CTL_GPIO_C_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
631 #define IOC_PC09_FUNC_CTL_UART11_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
632 #define IOC_PC09_FUNC_CTL_FEMC_A_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
633 #define IOC_PC09_FUNC_CTL_XPI1_CB_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
634 #define IOC_PC09_FUNC_CTL_TRGM1_P_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
635 #define IOC_PC09_FUNC_CTL_ETH1_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
636 
637 /* IOC_PC10_FUNC_CTL function mux definitions */
638 #define IOC_PC10_FUNC_CTL_GPIO_C_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
639 #define IOC_PC10_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
640 #define IOC_PC10_FUNC_CTL_FEMC_A_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
641 #define IOC_PC10_FUNC_CTL_XPI1_CB_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
642 #define IOC_PC10_FUNC_CTL_TRGM1_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
643 
644 /* IOC_PC11_FUNC_CTL function mux definitions */
645 #define IOC_PC11_FUNC_CTL_GPIO_C_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
646 #define IOC_PC11_FUNC_CTL_UART9_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
647 #define IOC_PC11_FUNC_CTL_FEMC_A_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
648 #define IOC_PC11_FUNC_CTL_XPI1_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
649 #define IOC_PC11_FUNC_CTL_TRGM0_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
650 
651 /* IOC_PC12_FUNC_CTL function mux definitions */
652 #define IOC_PC12_FUNC_CTL_GPIO_C_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
653 #define IOC_PC12_FUNC_CTL_UART9_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
654 #define IOC_PC12_FUNC_CTL_FEMC_A_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
655 #define IOC_PC12_FUNC_CTL_XPI1_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
656 #define IOC_PC12_FUNC_CTL_TRGM0_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
657 
658 /* IOC_PC13_FUNC_CTL function mux definitions */
659 #define IOC_PC13_FUNC_CTL_GPIO_C_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
660 #define IOC_PC13_FUNC_CTL_UART13_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
661 #define IOC_PC13_FUNC_CTL_FEMC_BA0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
662 
663 /* IOC_PC14_FUNC_CTL function mux definitions */
664 #define IOC_PC14_FUNC_CTL_GPIO_C_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
665 #define IOC_PC14_FUNC_CTL_UART13_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
666 #define IOC_PC14_FUNC_CTL_FEMC_BA1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
667 #define IOC_PC14_FUNC_CTL_XPI1_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
668 #define IOC_PC14_FUNC_CTL_TRGM3_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
669 #define IOC_PC14_FUNC_CTL_ETH1_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
670 
671 /* IOC_PC15_FUNC_CTL function mux definitions */
672 #define IOC_PC15_FUNC_CTL_GPIO_C_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
673 #define IOC_PC15_FUNC_CTL_UART12_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
674 #define IOC_PC15_FUNC_CTL_FEMC_A_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
675 #define IOC_PC15_FUNC_CTL_XPI1_CB_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
676 #define IOC_PC15_FUNC_CTL_TRGM1_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
677 
678 /* IOC_PC16_FUNC_CTL function mux definitions */
679 #define IOC_PC16_FUNC_CTL_GPIO_C_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
680 #define IOC_PC16_FUNC_CTL_UART14_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
681 #define IOC_PC16_FUNC_CTL_FEMC_DQS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
682 #define IOC_PC16_FUNC_CTL_XPI1_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
683 #define IOC_PC16_FUNC_CTL_TRGM2_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
684 
685 /* IOC_PC17_FUNC_CTL function mux definitions */
686 #define IOC_PC17_FUNC_CTL_GPIO_C_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
687 #define IOC_PC17_FUNC_CTL_UART14_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
688 #define IOC_PC17_FUNC_CTL_FEMC_A_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
689 #define IOC_PC17_FUNC_CTL_XPI1_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
690 #define IOC_PC17_FUNC_CTL_TRGM0_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
691 
692 /* IOC_PC18_FUNC_CTL function mux definitions */
693 #define IOC_PC18_FUNC_CTL_GPIO_C_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
694 #define IOC_PC18_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
695 #define IOC_PC18_FUNC_CTL_FEMC_RAS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
696 #define IOC_PC18_FUNC_CTL_TRGM3_P_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
697 
698 /* IOC_PC19_FUNC_CTL function mux definitions */
699 #define IOC_PC19_FUNC_CTL_GPIO_C_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
700 #define IOC_PC19_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
701 #define IOC_PC19_FUNC_CTL_FEMC_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
702 #define IOC_PC19_FUNC_CTL_XPI1_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
703 #define IOC_PC19_FUNC_CTL_TRGM3_P_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
704 #define IOC_PC19_FUNC_CTL_ETH1_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
705 
706 /* IOC_PC20_FUNC_CTL function mux definitions */
707 #define IOC_PC20_FUNC_CTL_GPIO_C_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
708 #define IOC_PC20_FUNC_CTL_UART12_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
709 #define IOC_PC20_FUNC_CTL_FEMC_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
710 #define IOC_PC20_FUNC_CTL_XPI1_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
711 #define IOC_PC20_FUNC_CTL_TRGM3_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
712 
713 /* IOC_PC21_FUNC_CTL function mux definitions */
714 #define IOC_PC21_FUNC_CTL_GPIO_C_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
715 #define IOC_PC21_FUNC_CTL_UART15_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
716 #define IOC_PC21_FUNC_CTL_FEMC_A_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
717 #define IOC_PC21_FUNC_CTL_XPI1_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
718 #define IOC_PC21_FUNC_CTL_TRGM2_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
719 
720 /* IOC_PC22_FUNC_CTL function mux definitions */
721 #define IOC_PC22_FUNC_CTL_GPIO_C_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
722 #define IOC_PC22_FUNC_CTL_UART15_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
723 #define IOC_PC22_FUNC_CTL_FEMC_A_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
724 #define IOC_PC22_FUNC_CTL_XPI1_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
725 #define IOC_PC22_FUNC_CTL_TRGM2_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
726 
727 /* IOC_PC23_FUNC_CTL function mux definitions */
728 #define IOC_PC23_FUNC_CTL_GPIO_C_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
729 #define IOC_PC23_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
730 #define IOC_PC23_FUNC_CTL_FEMC_CAS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
731 #define IOC_PC23_FUNC_CTL_TRGM3_P_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
732 #define IOC_PC23_FUNC_CTL_ETH1_EVTI_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
733 
734 /* IOC_PC24_FUNC_CTL function mux definitions */
735 #define IOC_PC24_FUNC_CTL_GPIO_C_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
736 #define IOC_PC24_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
737 #define IOC_PC24_FUNC_CTL_FEMC_WE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
738 #define IOC_PC24_FUNC_CTL_TRGM3_P_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
739 #define IOC_PC24_FUNC_CTL_ETH1_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
740 
741 /* IOC_PC25_FUNC_CTL function mux definitions */
742 #define IOC_PC25_FUNC_CTL_GPIO_C_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
743 #define IOC_PC25_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
744 #define IOC_PC25_FUNC_CTL_FEMC_CKE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
745 #define IOC_PC25_FUNC_CTL_XPI1_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
746 #define IOC_PC25_FUNC_CTL_TRGM2_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
747 
748 /* IOC_PC26_FUNC_CTL function mux definitions */
749 #define IOC_PC26_FUNC_CTL_GPIO_C_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
750 #define IOC_PC26_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
751 #define IOC_PC26_FUNC_CTL_FEMC_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
752 #define IOC_PC26_FUNC_CTL_XPI1_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
753 #define IOC_PC26_FUNC_CTL_TRGM2_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
754 
755 /* IOC_PC27_FUNC_CTL function mux definitions */
756 #define IOC_PC27_FUNC_CTL_GPIO_C_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
757 #define IOC_PC27_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
758 #define IOC_PC27_FUNC_CTL_FEMC_DQ_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
759 #define IOC_PC27_FUNC_CTL_PWM3_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
760 #define IOC_PC27_FUNC_CTL_ETH1_EVTO_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
761 
762 /* IOC_PC28_FUNC_CTL function mux definitions */
763 #define IOC_PC28_FUNC_CTL_GPIO_C_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
764 #define IOC_PC28_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
765 #define IOC_PC28_FUNC_CTL_FEMC_DQ_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
766 #define IOC_PC28_FUNC_CTL_PWM3_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
767 #define IOC_PC28_FUNC_CTL_ETH1_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
768 
769 /* IOC_PC29_FUNC_CTL function mux definitions */
770 #define IOC_PC29_FUNC_CTL_GPIO_C_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
771 #define IOC_PC29_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
772 #define IOC_PC29_FUNC_CTL_FEMC_DQ_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
773 #define IOC_PC29_FUNC_CTL_XPI1_CB_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
774 #define IOC_PC29_FUNC_CTL_PWM3_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
775 #define IOC_PC29_FUNC_CTL_ETH1_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
776 
777 /* IOC_PC30_FUNC_CTL function mux definitions */
778 #define IOC_PC30_FUNC_CTL_GPIO_C_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
779 #define IOC_PC30_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
780 #define IOC_PC30_FUNC_CTL_FEMC_DM_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
781 #define IOC_PC30_FUNC_CTL_XPI1_CB_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
782 #define IOC_PC30_FUNC_CTL_TRGM2_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
783 
784 /* IOC_PC31_FUNC_CTL function mux definitions */
785 #define IOC_PC31_FUNC_CTL_GPIO_C_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
786 #define IOC_PC31_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
787 #define IOC_PC31_FUNC_CTL_FEMC_DM_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
788 #define IOC_PC31_FUNC_CTL_XPI1_CB_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
789 #define IOC_PC31_FUNC_CTL_PWM2_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
790 
791 /* IOC_PD00_FUNC_CTL function mux definitions */
792 #define IOC_PD00_FUNC_CTL_GPIO_D_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
793 #define IOC_PD00_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
794 #define IOC_PD00_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
795 #define IOC_PD00_FUNC_CTL_FEMC_DQ_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
796 #define IOC_PD00_FUNC_CTL_PWM3_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
797 
798 /* IOC_PD01_FUNC_CTL function mux definitions */
799 #define IOC_PD01_FUNC_CTL_GPIO_D_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
800 #define IOC_PD01_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
801 #define IOC_PD01_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
802 #define IOC_PD01_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
803 #define IOC_PD01_FUNC_CTL_FEMC_DQ_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
804 #define IOC_PD01_FUNC_CTL_PWM3_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
805 #define IOC_PD01_FUNC_CTL_ETH1_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
806 
807 /* IOC_PD02_FUNC_CTL function mux definitions */
808 #define IOC_PD02_FUNC_CTL_GPIO_D_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
809 #define IOC_PD02_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
810 #define IOC_PD02_FUNC_CTL_FEMC_DQ_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
811 #define IOC_PD02_FUNC_CTL_XPI1_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
812 #define IOC_PD02_FUNC_CTL_PWM3_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
813 #define IOC_PD02_FUNC_CTL_ETH1_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
814 
815 /* IOC_PD03_FUNC_CTL function mux definitions */
816 #define IOC_PD03_FUNC_CTL_GPIO_D_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
817 #define IOC_PD03_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
818 #define IOC_PD03_FUNC_CTL_FEMC_DQ_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
819 #define IOC_PD03_FUNC_CTL_XPI1_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
820 #define IOC_PD03_FUNC_CTL_PWM2_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
821 
822 /* IOC_PD04_FUNC_CTL function mux definitions */
823 #define IOC_PD04_FUNC_CTL_GPIO_D_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
824 #define IOC_PD04_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
825 #define IOC_PD04_FUNC_CTL_FEMC_DQ_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
826 #define IOC_PD04_FUNC_CTL_XPI1_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
827 #define IOC_PD04_FUNC_CTL_PWM2_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
828 
829 /* IOC_PD05_FUNC_CTL function mux definitions */
830 #define IOC_PD05_FUNC_CTL_GPIO_D_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
831 #define IOC_PD05_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
832 #define IOC_PD05_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
833 #define IOC_PD05_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
834 #define IOC_PD05_FUNC_CTL_FEMC_DQ_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
835 #define IOC_PD05_FUNC_CTL_PWM3_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
836 
837 /* IOC_PD06_FUNC_CTL function mux definitions */
838 #define IOC_PD06_FUNC_CTL_GPIO_D_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
839 #define IOC_PD06_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
840 #define IOC_PD06_FUNC_CTL_FEMC_DQ_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
841 #define IOC_PD06_FUNC_CTL_XPI1_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
842 #define IOC_PD06_FUNC_CTL_PWM2_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
843 
844 /* IOC_PD07_FUNC_CTL function mux definitions */
845 #define IOC_PD07_FUNC_CTL_GPIO_D_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
846 #define IOC_PD07_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
847 #define IOC_PD07_FUNC_CTL_FEMC_DQ_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
848 #define IOC_PD07_FUNC_CTL_XPI1_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
849 #define IOC_PD07_FUNC_CTL_PWM2_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
850 
851 /* IOC_PD08_FUNC_CTL function mux definitions */
852 #define IOC_PD08_FUNC_CTL_GPIO_D_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
853 #define IOC_PD08_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
854 #define IOC_PD08_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
855 #define IOC_PD08_FUNC_CTL_FEMC_DQ_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
856 #define IOC_PD08_FUNC_CTL_XPI1_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
857 #define IOC_PD08_FUNC_CTL_PWM3_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
858 #define IOC_PD08_FUNC_CTL_ETH1_EVTI_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
859 
860 /* IOC_PD09_FUNC_CTL function mux definitions */
861 #define IOC_PD09_FUNC_CTL_GPIO_D_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
862 #define IOC_PD09_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
863 #define IOC_PD09_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
864 #define IOC_PD09_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
865 #define IOC_PD09_FUNC_CTL_FEMC_DQ_13           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
866 #define IOC_PD09_FUNC_CTL_XPI1_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
867 #define IOC_PD09_FUNC_CTL_PWM2_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
868 
869 /* IOC_PD10_FUNC_CTL function mux definitions */
870 #define IOC_PD10_FUNC_CTL_GPIO_D_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
871 #define IOC_PD10_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
872 #define IOC_PD10_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
873 #define IOC_PD10_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
874 #define IOC_PD10_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
875 #define IOC_PD10_FUNC_CTL_FEMC_DQ_12           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
876 #define IOC_PD10_FUNC_CTL_XPI1_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
877 #define IOC_PD10_FUNC_CTL_PWM2_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
878 
879 /* IOC_PD11_FUNC_CTL function mux definitions */
880 #define IOC_PD11_FUNC_CTL_GPIO_D_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
881 #define IOC_PD11_FUNC_CTL_UART8_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
882 #define IOC_PD11_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
883 #define IOC_PD11_FUNC_CTL_XPI1_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
884 #define IOC_PD11_FUNC_CTL_PWM3_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
885 #define IOC_PD11_FUNC_CTL_ETH1_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
886 
887 /* IOC_PD12_FUNC_CTL function mux definitions */
888 #define IOC_PD12_FUNC_CTL_GPIO_D_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
889 #define IOC_PD12_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
890 #define IOC_PD12_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
891 #define IOC_PD12_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
892 #define IOC_PD12_FUNC_CTL_FEMC_DQ_15           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
893 #define IOC_PD12_FUNC_CTL_XPI1_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
894 #define IOC_PD12_FUNC_CTL_PWM2_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
895 #define IOC_PD12_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
896 
897 /* IOC_PD13_FUNC_CTL function mux definitions */
898 #define IOC_PD13_FUNC_CTL_GPIO_D_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
899 #define IOC_PD13_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
900 #define IOC_PD13_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
901 #define IOC_PD13_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
902 #define IOC_PD13_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
903 #define IOC_PD13_FUNC_CTL_FEMC_DQ_14           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
904 #define IOC_PD13_FUNC_CTL_XPI1_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
905 #define IOC_PD13_FUNC_CTL_PWM2_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
906 
907 /* IOC_PD14_FUNC_CTL function mux definitions */
908 #define IOC_PD14_FUNC_CTL_GPIO_D_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
909 #define IOC_PD14_FUNC_CTL_UART8_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
910 #define IOC_PD14_FUNC_CTL_UART8_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
911 #define IOC_PD14_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
912 #define IOC_PD14_FUNC_CTL_XPI1_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
913 #define IOC_PD14_FUNC_CTL_PWM3_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
914 #define IOC_PD14_FUNC_CTL_ETH1_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
915 
916 /* IOC_PD15_FUNC_CTL function mux definitions */
917 #define IOC_PD15_FUNC_CTL_GPIO_D_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
918 #define IOC_PD15_FUNC_CTL_UART8_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
919 #define IOC_PD15_FUNC_CTL_XPI1_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
920 #define IOC_PD15_FUNC_CTL_PWM2_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
921 #define IOC_PD15_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
922 
923 /* IOC_PD16_FUNC_CTL function mux definitions */
924 #define IOC_PD16_FUNC_CTL_GPIO_D_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
925 #define IOC_PD16_FUNC_CTL_UART9_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
926 #define IOC_PD16_FUNC_CTL_UART9_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
927 #define IOC_PD16_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
928 #define IOC_PD16_FUNC_CTL_TRGM2_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
929 #define IOC_PD16_FUNC_CTL_SDC1_DATA_4          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
930 #define IOC_PD16_FUNC_CTL_ETH1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
931 
932 /* IOC_PD17_FUNC_CTL function mux definitions */
933 #define IOC_PD17_FUNC_CTL_GPIO_D_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
934 #define IOC_PD17_FUNC_CTL_UART11_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
935 #define IOC_PD17_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
936 #define IOC_PD17_FUNC_CTL_TRGM3_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
937 #define IOC_PD17_FUNC_CTL_SDC1_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
938 #define IOC_PD17_FUNC_CTL_ETH1_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
939 
940 /* IOC_PD18_FUNC_CTL function mux definitions */
941 #define IOC_PD18_FUNC_CTL_GPIO_D_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
942 #define IOC_PD18_FUNC_CTL_UART11_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
943 #define IOC_PD18_FUNC_CTL_UART11_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
944 #define IOC_PD18_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
945 #define IOC_PD18_FUNC_CTL_TRGM3_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
946 #define IOC_PD18_FUNC_CTL_SDC1_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
947 #define IOC_PD18_FUNC_CTL_ETH1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
948 
949 /* IOC_PD19_FUNC_CTL function mux definitions */
950 #define IOC_PD19_FUNC_CTL_GPIO_D_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
951 #define IOC_PD19_FUNC_CTL_UART9_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
952 #define IOC_PD19_FUNC_CTL_SPI0_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
953 #define IOC_PD19_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
954 #define IOC_PD19_FUNC_CTL_TRGM2_P_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
955 #define IOC_PD19_FUNC_CTL_SDC1_DATA_6          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
956 #define IOC_PD19_FUNC_CTL_ETH1_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
957 
958 /* IOC_PD20_FUNC_CTL function mux definitions */
959 #define IOC_PD20_FUNC_CTL_GPIO_D_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
960 #define IOC_PD20_FUNC_CTL_UART10_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
961 #define IOC_PD20_FUNC_CTL_UART10_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
962 #define IOC_PD20_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
963 #define IOC_PD20_FUNC_CTL_TRGM2_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
964 #define IOC_PD20_FUNC_CTL_SDC1_DS              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
965 #define IOC_PD20_FUNC_CTL_ETH1_TXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
966 
967 /* IOC_PD21_FUNC_CTL function mux definitions */
968 #define IOC_PD21_FUNC_CTL_GPIO_D_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
969 #define IOC_PD21_FUNC_CTL_UART8_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
970 #define IOC_PD21_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
971 #define IOC_PD21_FUNC_CTL_TRGM3_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
972 #define IOC_PD21_FUNC_CTL_SDC1_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
973 #define IOC_PD21_FUNC_CTL_ETH1_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
974 
975 /* IOC_PD22_FUNC_CTL function mux definitions */
976 #define IOC_PD22_FUNC_CTL_GPIO_D_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
977 #define IOC_PD22_FUNC_CTL_UART8_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
978 #define IOC_PD22_FUNC_CTL_SPI0_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
979 #define IOC_PD22_FUNC_CTL_TRGM3_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
980 #define IOC_PD22_FUNC_CTL_SDC1_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
981 #define IOC_PD22_FUNC_CTL_ETH1_RXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
982 
983 /* IOC_PD23_FUNC_CTL function mux definitions */
984 #define IOC_PD23_FUNC_CTL_GPIO_D_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
985 #define IOC_PD23_FUNC_CTL_UART10_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
986 #define IOC_PD23_FUNC_CTL_TRGM2_P_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
987 #define IOC_PD23_FUNC_CTL_SDC1_RSTN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
988 #define IOC_PD23_FUNC_CTL_ETH1_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
989 
990 /* IOC_PD24_FUNC_CTL function mux definitions */
991 #define IOC_PD24_FUNC_CTL_GPIO_D_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
992 #define IOC_PD24_FUNC_CTL_UART10_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
993 #define IOC_PD24_FUNC_CTL_SPI0_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
994 #define IOC_PD24_FUNC_CTL_TRGM2_P_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
995 #define IOC_PD24_FUNC_CTL_SDC1_DATA_7          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
996 #define IOC_PD24_FUNC_CTL_ETH1_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
997 
998 /* IOC_PD25_FUNC_CTL function mux definitions */
999 #define IOC_PD25_FUNC_CTL_GPIO_D_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1000 #define IOC_PD25_FUNC_CTL_UART10_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1001 #define IOC_PD25_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1002 #define IOC_PD25_FUNC_CTL_TRGM2_P_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1003 #define IOC_PD25_FUNC_CTL_SDC1_DATA_5          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1004 #define IOC_PD25_FUNC_CTL_ETH1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1005 
1006 /* IOC_PD26_FUNC_CTL function mux definitions */
1007 #define IOC_PD26_FUNC_CTL_GPIO_D_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1008 #define IOC_PD26_FUNC_CTL_UART9_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1009 #define IOC_PD26_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1010 #define IOC_PD26_FUNC_CTL_TRGM3_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1011 #define IOC_PD26_FUNC_CTL_SDC1_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1012 #define IOC_PD26_FUNC_CTL_ETH1_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1013 
1014 /* IOC_PD27_FUNC_CTL function mux definitions */
1015 #define IOC_PD27_FUNC_CTL_GPIO_D_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1016 #define IOC_PD27_FUNC_CTL_UART9_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1017 #define IOC_PD27_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1018 #define IOC_PD27_FUNC_CTL_TRGM3_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1019 #define IOC_PD27_FUNC_CTL_SDC1_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1020 #define IOC_PD27_FUNC_CTL_ETH1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1021 
1022 /* IOC_PD28_FUNC_CTL function mux definitions */
1023 #define IOC_PD28_FUNC_CTL_GPIO_D_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1024 #define IOC_PD28_FUNC_CTL_UART11_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1025 #define IOC_PD28_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1026 #define IOC_PD28_FUNC_CTL_PWM2_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1027 #define IOC_PD28_FUNC_CTL_SDC1_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1028 #define IOC_PD28_FUNC_CTL_ETH0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1029 
1030 /* IOC_PD29_FUNC_CTL function mux definitions */
1031 #define IOC_PD29_FUNC_CTL_GPIO_D_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1032 #define IOC_PD29_FUNC_CTL_UART11_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1033 #define IOC_PD29_FUNC_CTL_XPI0_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1034 #define IOC_PD29_FUNC_CTL_PWM2_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1035 #define IOC_PD29_FUNC_CTL_SDC1_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1036 #define IOC_PD29_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1037 
1038 /* IOC_PD30_FUNC_CTL function mux definitions */
1039 #define IOC_PD30_FUNC_CTL_GPIO_D_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1040 #define IOC_PD30_FUNC_CTL_UART14_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1041 #define IOC_PD30_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1042 #define IOC_PD30_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1043 #define IOC_PD30_FUNC_CTL_XPI0_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1044 #define IOC_PD30_FUNC_CTL_PWM2_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1045 #define IOC_PD30_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1046 
1047 /* IOC_PD31_FUNC_CTL function mux definitions */
1048 #define IOC_PD31_FUNC_CTL_GPIO_D_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1049 #define IOC_PD31_FUNC_CTL_UART14_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1050 #define IOC_PD31_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1051 #define IOC_PD31_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1052 #define IOC_PD31_FUNC_CTL_XPI0_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1053 #define IOC_PD31_FUNC_CTL_PWM2_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1054 #define IOC_PD31_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1055 
1056 /* IOC_PE00_FUNC_CTL function mux definitions */
1057 #define IOC_PE00_FUNC_CTL_GPIO_E_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1058 #define IOC_PE00_FUNC_CTL_UART12_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1059 #define IOC_PE00_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1060 #define IOC_PE00_FUNC_CTL_PWM2_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1061 #define IOC_PE00_FUNC_CTL_SDC1_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1062 #define IOC_PE00_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1063 
1064 /* IOC_PE01_FUNC_CTL function mux definitions */
1065 #define IOC_PE01_FUNC_CTL_GPIO_E_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1066 #define IOC_PE01_FUNC_CTL_UART12_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1067 #define IOC_PE01_FUNC_CTL_XPI0_CB_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1068 #define IOC_PE01_FUNC_CTL_PWM2_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1069 #define IOC_PE01_FUNC_CTL_SDC0_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1070 #define IOC_PE01_FUNC_CTL_ETH0_TXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1071 
1072 /* IOC_PE02_FUNC_CTL function mux definitions */
1073 #define IOC_PE02_FUNC_CTL_GPIO_E_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1074 #define IOC_PE02_FUNC_CTL_UART13_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1075 #define IOC_PE02_FUNC_CTL_SPI1_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1076 #define IOC_PE02_FUNC_CTL_XPI0_CB_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1077 #define IOC_PE02_FUNC_CTL_PWM3_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1078 #define IOC_PE02_FUNC_CTL_ETH0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1079 
1080 /* IOC_PE03_FUNC_CTL function mux definitions */
1081 #define IOC_PE03_FUNC_CTL_GPIO_E_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1082 #define IOC_PE03_FUNC_CTL_UART15_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1083 #define IOC_PE03_FUNC_CTL_SPI1_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1084 #define IOC_PE03_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1085 #define IOC_PE03_FUNC_CTL_XPI0_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1086 #define IOC_PE03_FUNC_CTL_PWM2_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1087 #define IOC_PE03_FUNC_CTL_ETH0_RXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1088 
1089 /* IOC_PE04_FUNC_CTL function mux definitions */
1090 #define IOC_PE04_FUNC_CTL_GPIO_E_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1091 #define IOC_PE04_FUNC_CTL_UART15_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1092 #define IOC_PE04_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1093 #define IOC_PE04_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1094 #define IOC_PE04_FUNC_CTL_XPI0_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1095 #define IOC_PE04_FUNC_CTL_PWM2_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1096 #define IOC_PE04_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1097 
1098 /* IOC_PE05_FUNC_CTL function mux definitions */
1099 #define IOC_PE05_FUNC_CTL_GPIO_E_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1100 #define IOC_PE05_FUNC_CTL_UART13_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1101 #define IOC_PE05_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1102 #define IOC_PE05_FUNC_CTL_PWM3_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1103 #define IOC_PE05_FUNC_CTL_SDC0_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1104 #define IOC_PE05_FUNC_CTL_ETH0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1105 
1106 /* IOC_PE06_FUNC_CTL function mux definitions */
1107 #define IOC_PE06_FUNC_CTL_GPIO_E_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1108 #define IOC_PE06_FUNC_CTL_UART13_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1109 #define IOC_PE06_FUNC_CTL_UART13_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1110 #define IOC_PE06_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1111 #define IOC_PE06_FUNC_CTL_PWM3_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1112 #define IOC_PE06_FUNC_CTL_SDC0_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1113 #define IOC_PE06_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1114 
1115 /* IOC_PE07_FUNC_CTL function mux definitions */
1116 #define IOC_PE07_FUNC_CTL_GPIO_E_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1117 #define IOC_PE07_FUNC_CTL_UART13_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1118 #define IOC_PE07_FUNC_CTL_SPI1_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1119 #define IOC_PE07_FUNC_CTL_XPI0_CB_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1120 #define IOC_PE07_FUNC_CTL_PWM3_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1121 #define IOC_PE07_FUNC_CTL_ETH0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1122 
1123 /* IOC_PE08_FUNC_CTL function mux definitions */
1124 #define IOC_PE08_FUNC_CTL_GPIO_E_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1125 #define IOC_PE08_FUNC_CTL_UART12_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1126 #define IOC_PE08_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1127 #define IOC_PE08_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1128 #define IOC_PE08_FUNC_CTL_SDC0_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1129 #define IOC_PE08_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1130 
1131 /* IOC_PE09_FUNC_CTL function mux definitions */
1132 #define IOC_PE09_FUNC_CTL_GPIO_E_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1133 #define IOC_PE09_FUNC_CTL_UART12_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1134 #define IOC_PE09_FUNC_CTL_UART12_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1135 #define IOC_PE09_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1136 #define IOC_PE09_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1137 #define IOC_PE09_FUNC_CTL_SDC0_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1138 #define IOC_PE09_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1139 
1140 /* IOC_PE10_FUNC_CTL function mux definitions */
1141 #define IOC_PE10_FUNC_CTL_GPIO_E_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1142 #define IOC_PE10_FUNC_CTL_UART15_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1143 #define IOC_PE10_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1144 #define IOC_PE10_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1145 #define IOC_PE10_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1146 #define IOC_PE10_FUNC_CTL_SDC0_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1147 #define IOC_PE10_FUNC_CTL_ETH1_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1148 
1149 /* IOC_PE11_FUNC_CTL function mux definitions */
1150 #define IOC_PE11_FUNC_CTL_GPIO_E_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1151 #define IOC_PE11_FUNC_CTL_UART15_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1152 #define IOC_PE11_FUNC_CTL_UART15_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1153 #define IOC_PE11_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1154 #define IOC_PE11_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1155 #define IOC_PE11_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1156 #define IOC_PE11_FUNC_CTL_SDC0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1157 #define IOC_PE11_FUNC_CTL_ETH1_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1158 
1159 /* IOC_PE12_FUNC_CTL function mux definitions */
1160 #define IOC_PE12_FUNC_CTL_GPIO_E_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1161 #define IOC_PE12_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1162 #define IOC_PE12_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1163 #define IOC_PE12_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1164 #define IOC_PE12_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1165 #define IOC_PE12_FUNC_CTL_SDC0_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1166 
1167 /* IOC_PE13_FUNC_CTL function mux definitions */
1168 #define IOC_PE13_FUNC_CTL_GPIO_E_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1169 #define IOC_PE13_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1170 #define IOC_PE13_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1171 #define IOC_PE13_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1172 #define IOC_PE13_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1173 #define IOC_PE13_FUNC_CTL_SDC0_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1174 
1175 /* IOC_PE14_FUNC_CTL function mux definitions */
1176 #define IOC_PE14_FUNC_CTL_GPIO_E_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1177 #define IOC_PE14_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1178 #define IOC_PE14_FUNC_CTL_UART14_CTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1179 #define IOC_PE14_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1180 #define IOC_PE14_FUNC_CTL_I2S0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1181 #define IOC_PE14_FUNC_CTL_PWM3_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1182 #define IOC_PE14_FUNC_CTL_SDC1_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1183 #define IOC_PE14_FUNC_CTL_ETH1_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1184 
1185 /* IOC_PE15_FUNC_CTL function mux definitions */
1186 #define IOC_PE15_FUNC_CTL_GPIO_E_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1187 #define IOC_PE15_FUNC_CTL_UART14_DE            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1188 #define IOC_PE15_FUNC_CTL_UART14_RTS           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1189 #define IOC_PE15_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1190 #define IOC_PE15_FUNC_CTL_I2S0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1191 #define IOC_PE15_FUNC_CTL_SDC1_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1192 #define IOC_PE15_FUNC_CTL_ETH1_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1193 #define IOC_PE15_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1194 
1195 /* IOC_PE16_FUNC_CTL function mux definitions */
1196 #define IOC_PE16_FUNC_CTL_GPIO_E_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1197 #define IOC_PE16_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1198 #define IOC_PE16_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1199 #define IOC_PE16_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1200 #define IOC_PE16_FUNC_CTL_PWM3_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1201 #define IOC_PE16_FUNC_CTL_SDC1_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1202 #define IOC_PE16_FUNC_CTL_ETH1_REFCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1203 
1204 /* IOC_PE17_FUNC_CTL function mux definitions */
1205 #define IOC_PE17_FUNC_CTL_GPIO_E_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1206 #define IOC_PE17_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1207 #define IOC_PE17_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1208 #define IOC_PE17_FUNC_CTL_I2S0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1209 #define IOC_PE17_FUNC_CTL_PWM3_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1210 #define IOC_PE17_FUNC_CTL_SDC0_WP              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1211 #define IOC_PE17_FUNC_CTL_ETH1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1212 #define IOC_PE17_FUNC_CTL_ETH0_EVTO_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1213 
1214 /* IOC_PE18_FUNC_CTL function mux definitions */
1215 #define IOC_PE18_FUNC_CTL_GPIO_E_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1216 #define IOC_PE18_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1217 #define IOC_PE18_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1218 #define IOC_PE18_FUNC_CTL_I2S0_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1219 #define IOC_PE18_FUNC_CTL_PWM3_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1220 #define IOC_PE18_FUNC_CTL_SDC0_CDN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1221 #define IOC_PE18_FUNC_CTL_ETH1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1222 #define IOC_PE18_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1223 
1224 /* IOC_PE19_FUNC_CTL function mux definitions */
1225 #define IOC_PE19_FUNC_CTL_GPIO_E_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1226 #define IOC_PE19_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1227 #define IOC_PE19_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1228 #define IOC_PE19_FUNC_CTL_I2S0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1229 #define IOC_PE19_FUNC_CTL_ACMP_COMP_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1230 #define IOC_PE19_FUNC_CTL_ETH1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1231 #define IOC_PE19_FUNC_CTL_ETH0_EVTI_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1232 
1233 /* IOC_PE20_FUNC_CTL function mux definitions */
1234 #define IOC_PE20_FUNC_CTL_GPIO_E_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1235 #define IOC_PE20_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1236 #define IOC_PE20_FUNC_CTL_I2S0_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1237 #define IOC_PE20_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1238 #define IOC_PE20_FUNC_CTL_SDC0_VSEL            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1239 #define IOC_PE20_FUNC_CTL_ETH1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1240 #define IOC_PE20_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1241 
1242 /* IOC_PE21_FUNC_CTL function mux definitions */
1243 #define IOC_PE21_FUNC_CTL_GPIO_E_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1244 #define IOC_PE21_FUNC_CTL_GPTMR4_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1245 #define IOC_PE21_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1246 #define IOC_PE21_FUNC_CTL_I2S0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1247 #define IOC_PE21_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1248 #define IOC_PE21_FUNC_CTL_SDC0_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1249 #define IOC_PE21_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1250 
1251 /* IOC_PE22_FUNC_CTL function mux definitions */
1252 #define IOC_PE22_FUNC_CTL_GPIO_E_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1253 #define IOC_PE22_FUNC_CTL_GPTMR4_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1254 #define IOC_PE22_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1255 #define IOC_PE22_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1256 #define IOC_PE22_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1257 #define IOC_PE22_FUNC_CTL_SDC0_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1258 #define IOC_PE22_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1259 #define IOC_PE22_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1260 
1261 /* IOC_PE23_FUNC_CTL function mux definitions */
1262 #define IOC_PE23_FUNC_CTL_GPIO_E_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1263 #define IOC_PE23_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1264 #define IOC_PE23_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1265 #define IOC_PE23_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1266 #define IOC_PE23_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1267 #define IOC_PE23_FUNC_CTL_SDC0_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1268 #define IOC_PE23_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1269 #define IOC_PE23_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1270 
1271 /* IOC_PE24_FUNC_CTL function mux definitions */
1272 #define IOC_PE24_FUNC_CTL_GPIO_E_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1273 #define IOC_PE24_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1274 #define IOC_PE24_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1275 #define IOC_PE24_FUNC_CTL_I2S0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1276 #define IOC_PE24_FUNC_CTL_ACMP_COMP_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1277 #define IOC_PE24_FUNC_CTL_SOC_REF1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1278 
1279 /* IOC_PE25_FUNC_CTL function mux definitions */
1280 #define IOC_PE25_FUNC_CTL_GPIO_E_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1281 #define IOC_PE25_FUNC_CTL_GPTMR4_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1282 #define IOC_PE25_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1283 #define IOC_PE25_FUNC_CTL_I2S0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1284 #define IOC_PE25_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1285 #define IOC_PE25_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1286 
1287 /* IOC_PE26_FUNC_CTL function mux definitions */
1288 #define IOC_PE26_FUNC_CTL_GPIO_E_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1289 #define IOC_PE26_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1290 #define IOC_PE26_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1291 #define IOC_PE26_FUNC_CTL_SPI2_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1292 #define IOC_PE26_FUNC_CTL_CAN3_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1293 #define IOC_PE26_FUNC_CTL_I2S0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1294 #define IOC_PE26_FUNC_CTL_SDC0_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1295 #define IOC_PE26_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1296 
1297 /* IOC_PE27_FUNC_CTL function mux definitions */
1298 #define IOC_PE27_FUNC_CTL_GPIO_E_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1299 #define IOC_PE27_FUNC_CTL_GPTMR4_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1300 #define IOC_PE27_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1301 #define IOC_PE27_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1302 #define IOC_PE27_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1303 #define IOC_PE27_FUNC_CTL_SDC0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1304 #define IOC_PE27_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1305 #define IOC_PE27_FUNC_CTL_ETH1_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1306 
1307 /* IOC_PE28_FUNC_CTL function mux definitions */
1308 #define IOC_PE28_FUNC_CTL_GPIO_E_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1309 #define IOC_PE28_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1310 #define IOC_PE28_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1311 #define IOC_PE28_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1312 #define IOC_PE28_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1313 #define IOC_PE28_FUNC_CTL_SDC0_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1314 #define IOC_PE28_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1315 #define IOC_PE28_FUNC_CTL_ETH1_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1316 
1317 /* IOC_PE29_FUNC_CTL function mux definitions */
1318 #define IOC_PE29_FUNC_CTL_GPIO_E_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1319 #define IOC_PE29_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1320 #define IOC_PE29_FUNC_CTL_SPI2_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1321 #define IOC_PE29_FUNC_CTL_CAN3_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1322 #define IOC_PE29_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1323 #define IOC_PE29_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1324 
1325 /* IOC_PE30_FUNC_CTL function mux definitions */
1326 #define IOC_PE30_FUNC_CTL_GPIO_E_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1327 #define IOC_PE30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1328 #define IOC_PE30_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1329 #define IOC_PE30_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1330 #define IOC_PE30_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1331 #define IOC_PE30_FUNC_CTL_USB1_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1332 
1333 /* IOC_PE31_FUNC_CTL function mux definitions */
1334 #define IOC_PE31_FUNC_CTL_GPIO_E_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1335 #define IOC_PE31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1336 #define IOC_PE31_FUNC_CTL_SPI2_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1337 #define IOC_PE31_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1338 #define IOC_PE31_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1339 #define IOC_PE31_FUNC_CTL_ETH0_REFCLK          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
1340 
1341 /* IOC_PF00_FUNC_CTL function mux definitions */
1342 #define IOC_PF00_FUNC_CTL_GPIO_F_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1343 #define IOC_PF00_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1344 #define IOC_PF00_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1345 #define IOC_PF00_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1346 #define IOC_PF00_FUNC_CTL_I2S0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1347 #define IOC_PF00_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1348 #define IOC_PF00_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1349 
1350 /* IOC_PF01_FUNC_CTL function mux definitions */
1351 #define IOC_PF01_FUNC_CTL_GPIO_F_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1352 #define IOC_PF01_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1353 #define IOC_PF01_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1354 #define IOC_PF01_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1355 #define IOC_PF01_FUNC_CTL_I2S0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1356 #define IOC_PF01_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1357 #define IOC_PF01_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1358 
1359 /* IOC_PF02_FUNC_CTL function mux definitions */
1360 #define IOC_PF02_FUNC_CTL_GPIO_F_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1361 #define IOC_PF02_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1362 #define IOC_PF02_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1363 #define IOC_PF02_FUNC_CTL_I2S0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1364 #define IOC_PF02_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1365 #define IOC_PF02_FUNC_CTL_ETH0_EVTI_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1366 
1367 /* IOC_PF03_FUNC_CTL function mux definitions */
1368 #define IOC_PF03_FUNC_CTL_GPIO_F_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1369 #define IOC_PF03_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1370 #define IOC_PF03_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1371 #define IOC_PF03_FUNC_CTL_SPI3_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1372 #define IOC_PF03_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1373 #define IOC_PF03_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1374 
1375 /* IOC_PF04_FUNC_CTL function mux definitions */
1376 #define IOC_PF04_FUNC_CTL_GPIO_F_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1377 #define IOC_PF04_FUNC_CTL_GPTMR5_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1378 #define IOC_PF04_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1379 #define IOC_PF04_FUNC_CTL_I2S0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1380 #define IOC_PF04_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1381 
1382 /* IOC_PF05_FUNC_CTL function mux definitions */
1383 #define IOC_PF05_FUNC_CTL_GPIO_F_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1384 #define IOC_PF05_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1385 #define IOC_PF05_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1386 #define IOC_PF05_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1387 #define IOC_PF05_FUNC_CTL_I2S0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1388 #define IOC_PF05_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1389 #define IOC_PF05_FUNC_CTL_USB1_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1390 
1391 /* IOC_PF06_FUNC_CTL function mux definitions */
1392 #define IOC_PF06_FUNC_CTL_GPIO_F_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1393 #define IOC_PF06_FUNC_CTL_GPTMR5_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1394 #define IOC_PF06_FUNC_CTL_UART8_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1395 #define IOC_PF06_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1396 #define IOC_PF06_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1397 #define IOC_PF06_FUNC_CTL_I2S0_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1398 #define IOC_PF06_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1399 #define IOC_PF06_FUNC_CTL_USB1_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1400 
1401 /* IOC_PF07_FUNC_CTL function mux definitions */
1402 #define IOC_PF07_FUNC_CTL_GPIO_F_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1403 #define IOC_PF07_FUNC_CTL_UART8_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1404 #define IOC_PF07_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1405 #define IOC_PF07_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1406 #define IOC_PF07_FUNC_CTL_I2S0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1407 #define IOC_PF07_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1408 #define IOC_PF07_FUNC_CTL_USB1_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1409 
1410 /* IOC_PF08_FUNC_CTL function mux definitions */
1411 #define IOC_PF08_FUNC_CTL_GPIO_F_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1412 #define IOC_PF08_FUNC_CTL_GPTMR5_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1413 #define IOC_PF08_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1414 #define IOC_PF08_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1415 #define IOC_PF08_FUNC_CTL_I2S0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1416 #define IOC_PF08_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1417 
1418 /* IOC_PF09_FUNC_CTL function mux definitions */
1419 #define IOC_PF09_FUNC_CTL_GPIO_F_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1420 #define IOC_PF09_FUNC_CTL_GPTMR5_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1421 #define IOC_PF09_FUNC_CTL_UART9_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1422 #define IOC_PF09_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1423 #define IOC_PF09_FUNC_CTL_SPI3_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1424 #define IOC_PF09_FUNC_CTL_I2S0_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1425 #define IOC_PF09_FUNC_CTL_ETH0_EVTO_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
1426 #define IOC_PF09_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1427 
1428 /* IOC_PF10_FUNC_CTL function mux definitions */
1429 #define IOC_PF10_FUNC_CTL_GPIO_F_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1430 #define IOC_PF10_FUNC_CTL_UART9_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1431 #define IOC_PF10_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1432 #define IOC_PF10_FUNC_CTL_SPI3_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1433 #define IOC_PF10_FUNC_CTL_I2S0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(9)
1434 #define IOC_PF10_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1435 
1436 /* IOC_PX00_FUNC_CTL function mux definitions */
1437 #define IOC_PX00_FUNC_CTL_GPIO_X_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1438 #define IOC_PX00_FUNC_CTL_XPI0_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1439 #define IOC_PX00_FUNC_CTL_SDC1_DATA_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1440 
1441 /* IOC_PX01_FUNC_CTL function mux definitions */
1442 #define IOC_PX01_FUNC_CTL_GPIO_X_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1443 #define IOC_PX01_FUNC_CTL_FEMC_DQS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
1444 #define IOC_PX01_FUNC_CTL_XPI0_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1445 #define IOC_PX01_FUNC_CTL_SDC1_DATA_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1446 
1447 /* IOC_PX02_FUNC_CTL function mux definitions */
1448 #define IOC_PX02_FUNC_CTL_GPIO_X_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1449 #define IOC_PX02_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1450 #define IOC_PX02_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1451 
1452 /* IOC_PX03_FUNC_CTL function mux definitions */
1453 #define IOC_PX03_FUNC_CTL_GPIO_X_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1454 #define IOC_PX03_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1455 #define IOC_PX03_FUNC_CTL_XPI1_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1456 
1457 /* IOC_PX04_FUNC_CTL function mux definitions */
1458 #define IOC_PX04_FUNC_CTL_GPIO_X_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1459 #define IOC_PX04_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1460 #define IOC_PX04_FUNC_CTL_SDC1_CMD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1461 #define IOC_PX04_FUNC_CTL_XPI1_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
1462 
1463 /* IOC_PX05_FUNC_CTL function mux definitions */
1464 #define IOC_PX05_FUNC_CTL_GPIO_X_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1465 #define IOC_PX05_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1466 #define IOC_PX05_FUNC_CTL_SDC1_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1467 
1468 /* IOC_PX06_FUNC_CTL function mux definitions */
1469 #define IOC_PX06_FUNC_CTL_GPIO_X_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1470 #define IOC_PX06_FUNC_CTL_FEMC_DQS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(12)
1471 #define IOC_PX06_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1472 
1473 /* IOC_PX07_FUNC_CTL function mux definitions */
1474 #define IOC_PX07_FUNC_CTL_GPIO_X_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1475 #define IOC_PX07_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1476 
1477 /* IOC_PX08_FUNC_CTL function mux definitions */
1478 #define IOC_PX08_FUNC_CTL_GPIO_X_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1479 #define IOC_PX08_FUNC_CTL_XPI0_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1480 #define IOC_PX08_FUNC_CTL_SDC1_DATA_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1481 
1482 /* IOC_PX09_FUNC_CTL function mux definitions */
1483 #define IOC_PX09_FUNC_CTL_GPIO_X_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1484 #define IOC_PX09_FUNC_CTL_XPI0_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1485 #define IOC_PX09_FUNC_CTL_SDC1_DATA_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
1486 
1487 /* IOC_PX10_FUNC_CTL function mux definitions */
1488 #define IOC_PX10_FUNC_CTL_GPIO_X_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1489 #define IOC_PX10_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1490 
1491 /* IOC_PX11_FUNC_CTL function mux definitions */
1492 #define IOC_PX11_FUNC_CTL_GPIO_X_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1493 #define IOC_PX11_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
1494 
1495 /* IOC_PY00_FUNC_CTL function mux definitions */
1496 #define IOC_PY00_FUNC_CTL_GPIO_Y_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1497 #define IOC_PY00_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1498 #define IOC_PY00_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1499 #define IOC_PY00_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1500 #define IOC_PY00_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1501 #define IOC_PY00_FUNC_CTL_I2S1_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1502 
1503 /* IOC_PY01_FUNC_CTL function mux definitions */
1504 #define IOC_PY01_FUNC_CTL_GPIO_Y_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1505 #define IOC_PY01_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1506 #define IOC_PY01_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1507 #define IOC_PY01_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1508 #define IOC_PY01_FUNC_CTL_I2S1_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1509 
1510 /* IOC_PY02_FUNC_CTL function mux definitions */
1511 #define IOC_PY02_FUNC_CTL_GPIO_Y_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1512 #define IOC_PY02_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1513 #define IOC_PY02_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1514 #define IOC_PY02_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1515 #define IOC_PY02_FUNC_CTL_CAN0_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1516 #define IOC_PY02_FUNC_CTL_I2S1_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1517 
1518 /* IOC_PY03_FUNC_CTL function mux definitions */
1519 #define IOC_PY03_FUNC_CTL_GPIO_Y_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1520 #define IOC_PY03_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1521 #define IOC_PY03_FUNC_CTL_SPI3_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1522 #define IOC_PY03_FUNC_CTL_CAN0_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1523 
1524 /* IOC_PY04_FUNC_CTL function mux definitions */
1525 #define IOC_PY04_FUNC_CTL_GPIO_Y_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1526 #define IOC_PY04_FUNC_CTL_GPTMR6_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1527 #define IOC_PY04_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1528 #define IOC_PY04_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1529 #define IOC_PY04_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1530 #define IOC_PY04_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1531 #define IOC_PY04_FUNC_CTL_CAN2_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1532 #define IOC_PY04_FUNC_CTL_DAOL_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1533 #define IOC_PY04_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1534 
1535 /* IOC_PY05_FUNC_CTL function mux definitions */
1536 #define IOC_PY05_FUNC_CTL_GPIO_Y_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1537 #define IOC_PY05_FUNC_CTL_GPTMR6_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1538 #define IOC_PY05_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1539 #define IOC_PY05_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1540 #define IOC_PY05_FUNC_CTL_SPI1_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1541 #define IOC_PY05_FUNC_CTL_CAN0_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1542 #define IOC_PY05_FUNC_CTL_DAOL_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1543 #define IOC_PY05_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1544 
1545 /* IOC_PY06_FUNC_CTL function mux definitions */
1546 #define IOC_PY06_FUNC_CTL_GPIO_Y_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1547 #define IOC_PY06_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1548 #define IOC_PY06_FUNC_CTL_CAN1_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1549 #define IOC_PY06_FUNC_CTL_I2S1_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1550 
1551 /* IOC_PY07_FUNC_CTL function mux definitions */
1552 #define IOC_PY07_FUNC_CTL_GPIO_Y_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1553 #define IOC_PY07_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1554 #define IOC_PY07_FUNC_CTL_CAN1_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1555 #define IOC_PY07_FUNC_CTL_I2S1_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1556 
1557 /* IOC_PY08_FUNC_CTL function mux definitions */
1558 #define IOC_PY08_FUNC_CTL_GPIO_Y_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1559 #define IOC_PY08_FUNC_CTL_GPTMR6_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1560 #define IOC_PY08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1561 #define IOC_PY08_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1562 #define IOC_PY08_FUNC_CTL_DAOR_P               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1563 #define IOC_PY08_FUNC_CTL_ACMP_COMP_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1564 
1565 /* IOC_PY09_FUNC_CTL function mux definitions */
1566 #define IOC_PY09_FUNC_CTL_GPIO_Y_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1567 #define IOC_PY09_FUNC_CTL_GPTMR6_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1568 #define IOC_PY09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1569 #define IOC_PY09_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1570 #define IOC_PY09_FUNC_CTL_DAOR_N               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1571 #define IOC_PY09_FUNC_CTL_ACMP_COMP_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1572 
1573 /* IOC_PY10_FUNC_CTL function mux definitions */
1574 #define IOC_PY10_FUNC_CTL_GPIO_Y_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1575 #define IOC_PY10_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1576 #define IOC_PY10_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1577 #define IOC_PY10_FUNC_CTL_CAN2_TXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1578 #define IOC_PY10_FUNC_CTL_I2S1_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1579 #define IOC_PY10_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1580 
1581 /* IOC_PY11_FUNC_CTL function mux definitions */
1582 #define IOC_PY11_FUNC_CTL_GPIO_Y_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1583 #define IOC_PY11_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
1584 #define IOC_PY11_FUNC_CTL_CAN2_RXD             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1585 #define IOC_PY11_FUNC_CTL_I2S1_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1586 #define IOC_PY11_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1587 
1588 /* IOC_PZ00_FUNC_CTL function mux definitions */
1589 #define IOC_PZ00_FUNC_CTL_GPIO_Z_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1590 #define IOC_PZ00_FUNC_CTL_UART15_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1591 #define IOC_PZ00_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1592 
1593 /* IOC_PZ01_FUNC_CTL function mux definitions */
1594 #define IOC_PZ01_FUNC_CTL_GPIO_Z_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1595 #define IOC_PZ01_FUNC_CTL_UART15_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1596 #define IOC_PZ01_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1597 
1598 /* IOC_PZ02_FUNC_CTL function mux definitions */
1599 #define IOC_PZ02_FUNC_CTL_GPIO_Z_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1600 #define IOC_PZ02_FUNC_CTL_UART10_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1601 #define IOC_PZ02_FUNC_CTL_SPI0_CSN             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1602 #define IOC_PZ02_FUNC_CTL_PDM0_D_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1603 
1604 /* IOC_PZ03_FUNC_CTL function mux definitions */
1605 #define IOC_PZ03_FUNC_CTL_GPIO_Z_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1606 #define IOC_PZ03_FUNC_CTL_UART10_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1607 #define IOC_PZ03_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1608 #define IOC_PZ03_FUNC_CTL_PDM0_D_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1609 
1610 /* IOC_PZ04_FUNC_CTL function mux definitions */
1611 #define IOC_PZ04_FUNC_CTL_GPIO_Z_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1612 #define IOC_PZ04_FUNC_CTL_GPTMR7_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1613 #define IOC_PZ04_FUNC_CTL_UART11_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1614 #define IOC_PZ04_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1615 #define IOC_PZ04_FUNC_CTL_I2S0_FCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1616 #define IOC_PZ04_FUNC_CTL_PDM0_D_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1617 
1618 /* IOC_PZ05_FUNC_CTL function mux definitions */
1619 #define IOC_PZ05_FUNC_CTL_GPIO_Z_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1620 #define IOC_PZ05_FUNC_CTL_UART11_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1621 #define IOC_PZ05_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
1622 #define IOC_PZ05_FUNC_CTL_PDM0_D_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1623 
1624 /* IOC_PZ06_FUNC_CTL function mux definitions */
1625 #define IOC_PZ06_FUNC_CTL_GPIO_Z_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1626 #define IOC_PZ06_FUNC_CTL_GPTMR7_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1627 #define IOC_PZ06_FUNC_CTL_UART12_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1628 #define IOC_PZ06_FUNC_CTL_I2S0_BCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1629 #define IOC_PZ06_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1630 
1631 /* IOC_PZ07_FUNC_CTL function mux definitions */
1632 #define IOC_PZ07_FUNC_CTL_GPIO_Z_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1633 #define IOC_PZ07_FUNC_CTL_UART12_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1634 #define IOC_PZ07_FUNC_CTL_I2S0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1635 #define IOC_PZ07_FUNC_CTL_PDM0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)
1636 
1637 /* IOC_PZ08_FUNC_CTL function mux definitions */
1638 #define IOC_PZ08_FUNC_CTL_GPIO_Z_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1639 #define IOC_PZ08_FUNC_CTL_GPTMR7_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1640 #define IOC_PZ08_FUNC_CTL_UART13_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1641 #define IOC_PZ08_FUNC_CTL_I2S0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1642 #define IOC_PZ08_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1643 
1644 /* IOC_PZ09_FUNC_CTL function mux definitions */
1645 #define IOC_PZ09_FUNC_CTL_GPIO_Z_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1646 #define IOC_PZ09_FUNC_CTL_UART13_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1647 #define IOC_PZ09_FUNC_CTL_I2S0_MCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(8)
1648 #define IOC_PZ09_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1649 
1650 /* IOC_PZ10_FUNC_CTL function mux definitions */
1651 #define IOC_PZ10_FUNC_CTL_GPIO_Z_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1652 #define IOC_PZ10_FUNC_CTL_GPTMR7_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
1653 #define IOC_PZ10_FUNC_CTL_UART14_RXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1654 #define IOC_PZ10_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1655 #define IOC_PZ10_FUNC_CTL_CAN1_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1656 #define IOC_PZ10_FUNC_CTL_ACMP_COMP_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1657 
1658 /* IOC_PZ11_FUNC_CTL function mux definitions */
1659 #define IOC_PZ11_FUNC_CTL_GPIO_Z_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
1660 #define IOC_PZ11_FUNC_CTL_UART14_TXD           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
1661 #define IOC_PZ11_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
1662 #define IOC_PZ11_FUNC_CTL_CAN3_STBY            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
1663 #define IOC_PZ11_FUNC_CTL_ACMP_COMP_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
1664 
1665 
1666 #endif /* HPM_IOMUX_H */
1667