1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_i2c.h 4 * @author MCD Application Team 5 * @version V1.4.0 6 * @date 04-August-2014 7 * @brief This file contains all the functions prototypes for the I2C firmware 8 * library. 9 ****************************************************************************** 10 * @attention 11 * 12 * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> 13 * 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 * You may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at: 17 * 18 * http://www.st.com/software_license_agreement_liberty_v2 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ****************************************************************************** 27 */ 28 29 /* Define to prevent recursive inclusion -------------------------------------*/ 30 #ifndef __STM32F4xx_I2C_H 31 #define __STM32F4xx_I2C_H 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /* Includes ------------------------------------------------------------------*/ 38 #include "stm32f4xx.h" 39 40 /** @addtogroup STM32F4xx_StdPeriph_Driver 41 * @{ 42 */ 43 44 /** @addtogroup I2C 45 * @{ 46 */ 47 48 /* Exported types ------------------------------------------------------------*/ 49 50 /** 51 * @brief I2C Init structure definition 52 */ 53 54 typedef struct 55 { 56 uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency. 57 This parameter must be set to a value lower than 400kHz */ 58 59 uint16_t I2C_Mode; /*!< Specifies the I2C mode. 60 This parameter can be a value of @ref I2C_mode */ 61 62 uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle. 63 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ 64 65 uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address. 66 This parameter can be a 7-bit or 10-bit address. */ 67 68 uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement. 69 This parameter can be a value of @ref I2C_acknowledgement */ 70 71 uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged. 72 This parameter can be a value of @ref I2C_acknowledged_address */ 73 }I2C_InitTypeDef; 74 75 /* Exported constants --------------------------------------------------------*/ 76 77 78 /** @defgroup I2C_Exported_Constants 79 * @{ 80 */ 81 82 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \ 83 ((PERIPH) == I2C2) || \ 84 ((PERIPH) == I2C3)) 85 86 /** @defgroup I2C_Digital_Filter 87 * @{ 88 */ 89 90 #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F) 91 /** 92 * @} 93 */ 94 95 96 /** @defgroup I2C_mode 97 * @{ 98 */ 99 100 #define I2C_Mode_I2C ((uint16_t)0x0000) 101 #define I2C_Mode_SMBusDevice ((uint16_t)0x0002) 102 #define I2C_Mode_SMBusHost ((uint16_t)0x000A) 103 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \ 104 ((MODE) == I2C_Mode_SMBusDevice) || \ 105 ((MODE) == I2C_Mode_SMBusHost)) 106 /** 107 * @} 108 */ 109 110 /** @defgroup I2C_duty_cycle_in_fast_mode 111 * @{ 112 */ 113 114 #define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */ 115 #define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */ 116 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \ 117 ((CYCLE) == I2C_DutyCycle_2)) 118 /** 119 * @} 120 */ 121 122 /** @defgroup I2C_acknowledgement 123 * @{ 124 */ 125 126 #define I2C_Ack_Enable ((uint16_t)0x0400) 127 #define I2C_Ack_Disable ((uint16_t)0x0000) 128 #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \ 129 ((STATE) == I2C_Ack_Disable)) 130 /** 131 * @} 132 */ 133 134 /** @defgroup I2C_transfer_direction 135 * @{ 136 */ 137 138 #define I2C_Direction_Transmitter ((uint8_t)0x00) 139 #define I2C_Direction_Receiver ((uint8_t)0x01) 140 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \ 141 ((DIRECTION) == I2C_Direction_Receiver)) 142 /** 143 * @} 144 */ 145 146 /** @defgroup I2C_acknowledged_address 147 * @{ 148 */ 149 150 #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000) 151 #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000) 152 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \ 153 ((ADDRESS) == I2C_AcknowledgedAddress_10bit)) 154 /** 155 * @} 156 */ 157 158 /** @defgroup I2C_registers 159 * @{ 160 */ 161 162 #define I2C_Register_CR1 ((uint8_t)0x00) 163 #define I2C_Register_CR2 ((uint8_t)0x04) 164 #define I2C_Register_OAR1 ((uint8_t)0x08) 165 #define I2C_Register_OAR2 ((uint8_t)0x0C) 166 #define I2C_Register_DR ((uint8_t)0x10) 167 #define I2C_Register_SR1 ((uint8_t)0x14) 168 #define I2C_Register_SR2 ((uint8_t)0x18) 169 #define I2C_Register_CCR ((uint8_t)0x1C) 170 #define I2C_Register_TRISE ((uint8_t)0x20) 171 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \ 172 ((REGISTER) == I2C_Register_CR2) || \ 173 ((REGISTER) == I2C_Register_OAR1) || \ 174 ((REGISTER) == I2C_Register_OAR2) || \ 175 ((REGISTER) == I2C_Register_DR) || \ 176 ((REGISTER) == I2C_Register_SR1) || \ 177 ((REGISTER) == I2C_Register_SR2) || \ 178 ((REGISTER) == I2C_Register_CCR) || \ 179 ((REGISTER) == I2C_Register_TRISE)) 180 /** 181 * @} 182 */ 183 184 /** @defgroup I2C_NACK_position 185 * @{ 186 */ 187 188 #define I2C_NACKPosition_Next ((uint16_t)0x0800) 189 #define I2C_NACKPosition_Current ((uint16_t)0xF7FF) 190 #define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \ 191 ((POSITION) == I2C_NACKPosition_Current)) 192 /** 193 * @} 194 */ 195 196 /** @defgroup I2C_SMBus_alert_pin_level 197 * @{ 198 */ 199 200 #define I2C_SMBusAlert_Low ((uint16_t)0x2000) 201 #define I2C_SMBusAlert_High ((uint16_t)0xDFFF) 202 #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \ 203 ((ALERT) == I2C_SMBusAlert_High)) 204 /** 205 * @} 206 */ 207 208 /** @defgroup I2C_PEC_position 209 * @{ 210 */ 211 212 #define I2C_PECPosition_Next ((uint16_t)0x0800) 213 #define I2C_PECPosition_Current ((uint16_t)0xF7FF) 214 #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \ 215 ((POSITION) == I2C_PECPosition_Current)) 216 /** 217 * @} 218 */ 219 220 /** @defgroup I2C_interrupts_definition 221 * @{ 222 */ 223 224 #define I2C_IT_BUF ((uint16_t)0x0400) 225 #define I2C_IT_EVT ((uint16_t)0x0200) 226 #define I2C_IT_ERR ((uint16_t)0x0100) 227 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00)) 228 /** 229 * @} 230 */ 231 232 /** @defgroup I2C_interrupts_definition 233 * @{ 234 */ 235 236 #define I2C_IT_SMBALERT ((uint32_t)0x01008000) 237 #define I2C_IT_TIMEOUT ((uint32_t)0x01004000) 238 #define I2C_IT_PECERR ((uint32_t)0x01001000) 239 #define I2C_IT_OVR ((uint32_t)0x01000800) 240 #define I2C_IT_AF ((uint32_t)0x01000400) 241 #define I2C_IT_ARLO ((uint32_t)0x01000200) 242 #define I2C_IT_BERR ((uint32_t)0x01000100) 243 #define I2C_IT_TXE ((uint32_t)0x06000080) 244 #define I2C_IT_RXNE ((uint32_t)0x06000040) 245 #define I2C_IT_STOPF ((uint32_t)0x02000010) 246 #define I2C_IT_ADD10 ((uint32_t)0x02000008) 247 #define I2C_IT_BTF ((uint32_t)0x02000004) 248 #define I2C_IT_ADDR ((uint32_t)0x02000002) 249 #define I2C_IT_SB ((uint32_t)0x02000001) 250 251 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00)) 252 253 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \ 254 ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \ 255 ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \ 256 ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \ 257 ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \ 258 ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \ 259 ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB)) 260 /** 261 * @} 262 */ 263 264 /** @defgroup I2C_flags_definition 265 * @{ 266 */ 267 268 /** 269 * @brief SR2 register flags 270 */ 271 272 #define I2C_FLAG_DUALF ((uint32_t)0x00800000) 273 #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) 274 #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) 275 #define I2C_FLAG_GENCALL ((uint32_t)0x00100000) 276 #define I2C_FLAG_TRA ((uint32_t)0x00040000) 277 #define I2C_FLAG_BUSY ((uint32_t)0x00020000) 278 #define I2C_FLAG_MSL ((uint32_t)0x00010000) 279 280 /** 281 * @brief SR1 register flags 282 */ 283 284 #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) 285 #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) 286 #define I2C_FLAG_PECERR ((uint32_t)0x10001000) 287 #define I2C_FLAG_OVR ((uint32_t)0x10000800) 288 #define I2C_FLAG_AF ((uint32_t)0x10000400) 289 #define I2C_FLAG_ARLO ((uint32_t)0x10000200) 290 #define I2C_FLAG_BERR ((uint32_t)0x10000100) 291 #define I2C_FLAG_TXE ((uint32_t)0x10000080) 292 #define I2C_FLAG_RXNE ((uint32_t)0x10000040) 293 #define I2C_FLAG_STOPF ((uint32_t)0x10000010) 294 #define I2C_FLAG_ADD10 ((uint32_t)0x10000008) 295 #define I2C_FLAG_BTF ((uint32_t)0x10000004) 296 #define I2C_FLAG_ADDR ((uint32_t)0x10000002) 297 #define I2C_FLAG_SB ((uint32_t)0x10000001) 298 299 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00)) 300 301 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \ 302 ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \ 303 ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \ 304 ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \ 305 ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \ 306 ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \ 307 ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \ 308 ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \ 309 ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \ 310 ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \ 311 ((FLAG) == I2C_FLAG_SB)) 312 /** 313 * @} 314 */ 315 316 /** @defgroup I2C_Events 317 * @{ 318 */ 319 320 /** 321 =============================================================================== 322 I2C Master Events (Events grouped in order of communication) 323 =============================================================================== 324 */ 325 326 /** 327 * @brief Communication start 328 * 329 * After sending the START condition (I2C_GenerateSTART() function) the master 330 * has to wait for this event. It means that the Start condition has been correctly 331 * released on the I2C bus (the bus is free, no other devices is communicating). 332 * 333 */ 334 /* --EV5 */ 335 #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ 336 337 /** 338 * @brief Address Acknowledge 339 * 340 * After checking on EV5 (start condition correctly released on the bus), the 341 * master sends the address of the slave(s) with which it will communicate 342 * (I2C_Send7bitAddress() function, it also determines the direction of the communication: 343 * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges 344 * his address. If an acknowledge is sent on the bus, one of the following events will 345 * be set: 346 * 347 * 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED 348 * event is set. 349 * 350 * 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED 351 * is set 352 * 353 * 3) In case of 10-Bit addressing mode, the master (just after generating the START 354 * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() 355 * function). Then master should wait on EV9. It means that the 10-bit addressing 356 * header has been correctly sent on the bus. Then master should send the second part of 357 * the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master 358 * should wait for event EV6. 359 * 360 */ 361 362 /* --EV6 */ 363 #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ 364 #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ 365 /* --EV9 */ 366 #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ 367 368 /** 369 * @brief Communication events 370 * 371 * If a communication is established (START condition generated and slave address 372 * acknowledged) then the master has to check on one of the following events for 373 * communication procedures: 374 * 375 * 1) Master Receiver mode: The master has to wait on the event EV7 then to read 376 * the data received from the slave (I2C_ReceiveData() function). 377 * 378 * 2) Master Transmitter mode: The master has to send data (I2C_SendData() 379 * function) then to wait on event EV8 or EV8_2. 380 * These two events are similar: 381 * - EV8 means that the data has been written in the data register and is 382 * being shifted out. 383 * - EV8_2 means that the data has been physically shifted out and output 384 * on the bus. 385 * In most cases, using EV8 is sufficient for the application. 386 * Using EV8_2 leads to a slower communication but ensure more reliable test. 387 * EV8_2 is also more suitable than EV8 for testing on the last data transmission 388 * (before Stop condition generation). 389 * 390 * @note In case the user software does not guarantee that this event EV7 is 391 * managed before the current byte end of transfer, then user may check on EV7 392 * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)). 393 * In this case the communication may be slower. 394 * 395 */ 396 397 /* Master RECEIVER mode -----------------------------*/ 398 /* --EV7 */ 399 #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ 400 401 /* Master TRANSMITTER mode --------------------------*/ 402 /* --EV8 */ 403 #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ 404 /* --EV8_2 */ 405 #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ 406 407 408 /** 409 =============================================================================== 410 I2C Slave Events (Events grouped in order of communication) 411 =============================================================================== 412 */ 413 414 415 /** 416 * @brief Communication start events 417 * 418 * Wait on one of these events at the start of the communication. It means that 419 * the I2C peripheral detected a Start condition on the bus (generated by master 420 * device) followed by the peripheral address. The peripheral generates an ACK 421 * condition on the bus (if the acknowledge feature is enabled through function 422 * I2C_AcknowledgeConfig()) and the events listed above are set : 423 * 424 * 1) In normal case (only one address managed by the slave), when the address 425 * sent by the master matches the own address of the peripheral (configured by 426 * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set 427 * (where XXX could be TRANSMITTER or RECEIVER). 428 * 429 * 2) In case the address sent by the master matches the second address of the 430 * peripheral (configured by the function I2C_OwnAddress2Config() and enabled 431 * by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED 432 * (where XXX could be TRANSMITTER or RECEIVER) are set. 433 * 434 * 3) In case the address sent by the master is General Call (address 0x00) and 435 * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) 436 * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED. 437 * 438 */ 439 440 /* --EV1 (all the events below are variants of EV1) */ 441 /* 1) Case of One Single Address managed by the slave */ 442 #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ 443 #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ 444 445 /* 2) Case of Dual address managed by the slave */ 446 #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ 447 #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ 448 449 /* 3) Case of General Call enabled for the slave */ 450 #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ 451 452 /** 453 * @brief Communication events 454 * 455 * Wait on one of these events when EV1 has already been checked and: 456 * 457 * - Slave RECEIVER mode: 458 * - EV2: When the application is expecting a data byte to be received. 459 * - EV4: When the application is expecting the end of the communication: master 460 * sends a stop condition and data transmission is stopped. 461 * 462 * - Slave Transmitter mode: 463 * - EV3: When a byte has been transmitted by the slave and the application is expecting 464 * the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and 465 * I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be 466 * used when the user software doesn't guarantee the EV3 is managed before the 467 * current byte end of transfer. 468 * - EV3_2: When the master sends a NACK in order to tell slave that data transmission 469 * shall end (before sending the STOP condition). In this case slave has to stop sending 470 * data bytes and expect a Stop condition on the bus. 471 * 472 * @note In case the user software does not guarantee that the event EV2 is 473 * managed before the current byte end of transfer, then user may check on EV2 474 * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)). 475 * In this case the communication may be slower. 476 * 477 */ 478 479 /* Slave RECEIVER mode --------------------------*/ 480 /* --EV2 */ 481 #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ 482 /* --EV4 */ 483 #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ 484 485 /* Slave TRANSMITTER mode -----------------------*/ 486 /* --EV3 */ 487 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ 488 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */ 489 /* --EV3_2 */ 490 #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ 491 492 /* 493 =============================================================================== 494 End of Events Description 495 =============================================================================== 496 */ 497 498 #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ 499 ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ 500 ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \ 501 ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \ 502 ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ 503 ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ 504 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \ 505 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \ 506 ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ 507 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \ 508 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \ 509 ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ 510 ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ 511 ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ 512 ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ 513 ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ 514 ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ 515 ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ 516 ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \ 517 ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE)) 518 /** 519 * @} 520 */ 521 522 /** @defgroup I2C_own_address1 523 * @{ 524 */ 525 526 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF) 527 /** 528 * @} 529 */ 530 531 /** @defgroup I2C_clock_speed 532 * @{ 533 */ 534 535 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000)) 536 /** 537 * @} 538 */ 539 540 /** 541 * @} 542 */ 543 544 /* Exported macro ------------------------------------------------------------*/ 545 /* Exported functions --------------------------------------------------------*/ 546 547 /* Function used to set the I2C configuration to the default reset state *****/ 548 void I2C_DeInit(I2C_TypeDef* I2Cx); 549 550 /* Initialization and Configuration functions *********************************/ 551 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); 552 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); 553 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 554 void I2C_DigitalFilterConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DigitalFilter); 555 void I2C_AnalogFilterCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 556 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); 557 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); 558 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction); 559 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); 560 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address); 561 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 562 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 563 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 564 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 565 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle); 566 void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition); 567 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert); 568 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 569 570 /* Data transfers functions ***************************************************/ 571 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); 572 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); 573 574 /* PEC management functions ***************************************************/ 575 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState); 576 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition); 577 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); 578 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); 579 580 /* DMA transfers management functions *****************************************/ 581 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 582 void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); 583 584 /* Interrupts, events and flags management functions **************************/ 585 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); 586 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState); 587 588 /* 589 =============================================================================== 590 I2C State Monitoring Functions 591 =============================================================================== 592 This I2C driver provides three different ways for I2C state monitoring 593 depending on the application requirements and constraints: 594 595 596 1. Basic state monitoring (Using I2C_CheckEvent() function) 597 ----------------------------------------------------------- 598 It compares the status registers (SR1 and SR2) content to a given event 599 (can be the combination of one or more flags). 600 It returns SUCCESS if the current status includes the given flags 601 and returns ERROR if one or more flags are missing in the current status. 602 603 - When to use 604 - This function is suitable for most applications as well as for startup 605 activity since the events are fully described in the product reference 606 manual (RM0090). 607 - It is also suitable for users who need to define their own events. 608 609 - Limitations 610 - If an error occurs (ie. error flags are set besides to the monitored 611 flags), the I2C_CheckEvent() function may return SUCCESS despite 612 the communication hold or corrupted real state. 613 In this case, it is advised to use error interrupts to monitor 614 the error events and handle them in the interrupt IRQ handler. 615 616 Note 617 For error management, it is advised to use the following functions: 618 - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). 619 - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs. 620 Where x is the peripheral instance (I2C1, I2C2 ...) 621 - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the 622 I2Cx_ER_IRQHandler() function in order to determine which error occurred. 623 - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() 624 and/or I2C_GenerateStop() in order to clear the error flag and source 625 and return to correct communication status. 626 627 628 2. Advanced state monitoring (Using the function I2C_GetLastEvent()) 629 -------------------------------------------------------------------- 630 Using the function I2C_GetLastEvent() which returns the image of both status 631 registers in a single word (uint32_t) (Status Register 2 value is shifted left 632 by 16 bits and concatenated to Status Register 1). 633 634 - When to use 635 - This function is suitable for the same applications above but it 636 allows to overcome the mentioned limitation of I2C_GetFlagStatus() 637 function. 638 - The returned value could be compared to events already defined in 639 this file or to custom values defined by user. 640 This function is suitable when multiple flags are monitored at the 641 same time. 642 - At the opposite of I2C_CheckEvent() function, this function allows 643 user to choose when an event is accepted (when all events flags are 644 set and no other flags are set or just when the needed flags are set 645 like I2C_CheckEvent() function. 646 647 - Limitations 648 - User may need to define his own events. 649 - Same remark concerning the error management is applicable for this 650 function if user decides to check only regular communication flags 651 (and ignores error flags). 652 653 654 3. Flag-based state monitoring (Using the function I2C_GetFlagStatus()) 655 ----------------------------------------------------------------------- 656 657 Using the function I2C_GetFlagStatus() which simply returns the status of 658 one single flag (ie. I2C_FLAG_RXNE ...). 659 660 - When to use 661 - This function could be used for specific applications or in debug 662 phase. 663 - It is suitable when only one flag checking is needed (most I2C 664 events are monitored through multiple flags). 665 - Limitations: 666 - When calling this function, the Status register is accessed. 667 Some flags are cleared when the status register is accessed. 668 So checking the status of one Flag, may clear other ones. 669 - Function may need to be called twice or more in order to monitor 670 one single event. 671 */ 672 673 /* 674 =============================================================================== 675 1. Basic state monitoring 676 =============================================================================== 677 */ 678 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT); 679 /* 680 =============================================================================== 681 2. Advanced state monitoring 682 =============================================================================== 683 */ 684 uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx); 685 /* 686 =============================================================================== 687 3. Flag-based state monitoring 688 =============================================================================== 689 */ 690 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); 691 692 693 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); 694 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); 695 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); 696 697 #ifdef __cplusplus 698 } 699 #endif 700 701 #endif /*__STM32F4xx_I2C_H */ 702 703 /** 704 * @} 705 */ 706 707 /** 708 * @} 709 */ 710 711 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 712