Searched defs:MASK (Results 1 – 13 of 13) sorted by relevance
279 #define IS_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET) argument333 #define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_AlarmSubSecondMask_All) || \ argument
825 #define IS_RTC_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7FU) == (uint32_t)RESET) argument829 #define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_ALARMSUBSECONDMASK_ALL) || \ argument
742 #define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \ argument
571 #define IS_FMPSMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPSMBUS_OA2_NOMASK) || \ argument
130 #define IS_ETH_MAC_ADDRESS_MASK(MASK) (((MASK) == ETH_MAC_ADDRESSMASK_BYTE6) || \ argument
902 #define IS_RTC_ALARM_MASK(MASK) (((MASK) & ~(RTC_ALARMMASK_ALL)) == 0UL) argument909 #define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == 0UL) || \ argument
598 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ argument
2152 …__IO uint32_t MASK; /*!< SDMMC mask register, Address offset: 0x3C … member
1035 #define IS_ETH_MAC_ADDRESS_MASK(MASK) (((MASK) == ETH_MAC_AddressMask_Byte6) || \ argument
163 #define _R(NAME,MAC,RCR,MASK, JumFrameSz) \ argument
1246 __IO uint32_t MASK; /*!< SDIO mask register, Address offset: 0x3C */ member
282 struct DMA_IRQ_REGS MASK; /* Address Offset: 0x0310 */ member
700 __IO uint32_t MASK; /*!< SDIO mask register, Address offset: 0x3C */ member