1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #include <soc/soc.h> 22 23 //TODO place all auto-generated Registers here!!! 24 25 #define ICU_R_BASE (SOC_ICU_REG_BASE) 26 27 #define ICU_R_CLK_MUX (ICU_R_BASE) 28 29 #define ICU_F_PWMS_CLK_MUX (BIT(7)) 30 #define ICU_F_PWMS_CLK_MUX_M (BIT(7)) 31 #define ICU_F_PWMS_CLK_MUX_V 0x1 32 #define ICU_F_PWMS_CLK_MUX_S 7 33 #define ICU_V_PWMS_CLK_MUX_26M 1 34 #define ICU_V_PWMS_CLK_MUX_DCO 0 35 36 #define ICU_R_PWM_CHAN_CLK_MUX (ICU_R_BASE + 4 * 1) 37 38 #define ICU_F_PWM_CHAN_CLK_MUX (BIT(0)) 39 #define ICU_F_PWM_CHAN_CLK_MUX_M (BIT(0)) 40 #define ICU_F_PWM_CHAN_CLK_MUX_V 0x1 41 #define ICU_F_PWM_CHAN_CLK_MUX_S 0 42 #define ICU_F_PWM_CHAN_CLK_MUX_MS(_ch) (ICU_F_PWM_CHAN_CLK_MUX_S + 1 * (_ch)) 43 #define ICU_V_PWM_CHAN_CLK_MUX_26M 1 44 #define ICU_V_PWM_CHAN_CLK_MUX_GLOBAL 0 45 46 #define ICU_R_PWM_CHAN_PWR (ICU_R_BASE + 4 * 2) 47 48 #define ICU_F_PWM_CHAN_PWR (BIT(9)) 49 #define ICU_F_PWM_CHAN_PWR_M (BIT(9)) 50 #define ICU_F_PWM_CHAN_PWR_V 0x1 51 #define ICU_F_PWM_CHAN_PWR_S 9 52 #define ICU_F_PWM_CHAN_PWR_MS(_ch) (ICU_F_PWM_CHAN_PWR_S + 1 * (_ch)) 53 #define ICU_V_PWM_CHAN_PWR_UP 0 54 #define ICU_V_PWM_CHAN_PWR_DOWN 1 55 56 #define ICU_R_TIMER_CHAN_PWR (ICU_R_BASE + 4 * 2) 57 58 #define ICU_F_TIMER_CHAN_PWR (BIT(20)) 59 #define ICU_F_TIMER_CHAN_PWR_M (BIT(20)) 60 #define ICU_F_TIMER_CHAN_PWR_V 0x1 61 #define ICU_F_TIMER_CHAN_PWR_S 20 62 #define ICU_F_TIMER_CHAN_PWR_MS(_ch) (ICU_F_TIMER_CHAN_PWR_S + (_ch) / 3) 63 #define ICU_V_TIMER_CHAN_PWR_UP 0 64 #define ICU_V_TIMER_CHAN_PWR_DOWN 1 65 66 67 #define ICU_V_CLK_MUX_26M 1 68 #define ICU_V_CLK_MUX_DCO 0 69 70 #define MAX_INT_GROUP_NUM 2 71 #define FIQ_MAX_COUNT 16 72 #define IRQ_MAX_COUNT 16 73 #define FIQ_STATIS_COUNT FIQ_MAX_COUNT 74 #define IRQ_STATIS_COUNT IRQ_MAX_COUNT 75 #define FIQ_START_COUNT_BIT IRQ_MAX_COUNT 76 #define INTC_MAX_COUNT (IRQ_MAX_COUNT + FIQ_MAX_COUNT) 77 78 #define ICU_IRQ_PWM (9) 79 80 #define ICU_PRI_FIQ_BT (7) 81 #define ICU_PRI_FIQ_BLE (8) 82 #define ICU_PRI_FIQ_BTDM (13) 83 #define ICU_PRI_FIQ_DPLL_UNLOCK (29) 84 #define ICU_PRI_FIQ_SPI_DMA (7) 85 #define ICU_PRI_FIQ_MAC_WAKEUP (9) 86 #define ICU_PRI_FIQ_SECURITY (12) 87 #define ICU_PRI_FIQ_MAC_GENERAL (1) 88 #define ICU_PRI_FIQ_MAC_PROT_TRIGGER (6) 89 #define ICU_PRI_FIQ_MAC_TX_TRIGGER (3) 90 #define ICU_PRI_FIQ_MAC_RX_TRIGGER (4) 91 #define ICU_PRI_FIQ_MAC_TX_RX_MISC (5) 92 #define ICU_PRI_FIQ_MAC_TX_RX_TIMER (2) 93 #define ICU_PRI_FIQ_MODEM (10) 94 95 #define ICU_PRI_IRQ_GENERDMA (28) 96 #define ICU_PRI_IRQ_LA (29) 97 #define ICU_PRI_IRQ_SEC (21) 98 #define ICU_PRI_IRQ_SDIO (22) 99 #define ICU_PRI_IRQ_SARADC (16) 100 #define ICU_PRI_IRQ_PWM (17) 101 #define ICU_PRI_IRQ_TIMER (18) 102 #define ICU_PRI_IRQ_GPIO (19) 103 #define ICU_PRI_IRQ_SPI (20) 104 #define ICU_PRI_IRQ_I2C2 (21) 105 #define ICU_PRI_IRQ_I2S_PCM (22) 106 #define ICU_PRI_IRQ_IRDA (23) 107 #define ICU_PRI_IRQ_I2C1 (24) 108 #define ICU_PRI_IRQ_UART2 (25) 109 #define ICU_PRI_IRQ_UART1 (26) 110 #define ICU_PRI_IRQ_QSPI (27) 111 112 #define IQR_PRI_DEFAULT (1) //Temp for BK7256 RISC-V 113 114 #ifdef __cplusplus 115 } 116 #endif 117