1 /* 2 * Copyright (c) 2021 Chipsea Technologies (Shenzhen) Corp., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef _CS1000LITE_SYS_CTRL_H_ 16 #define _CS1000LITE_SYS_CTRL_H_ 17 18 #include "chip.h" 19 20 // ============================================================================= 21 // MACROS 22 // ============================================================================= 23 24 // ============================================================================= 25 // TYPES 26 // ============================================================================= 27 28 // ============================================================================ 29 // CS1000LITE_SYS_CTRL_T 30 // ----------------------------------------------------------------------------- 31 /// 32 // ============================================================================= 33 #define REG_CS1000LITE_SYSCTRL_BASE 0x50010000 34 35 typedef volatile struct 36 { 37 __IO uint32_t chip_id; //0x00000000 38 __IO uint32_t clk_sel; //0x00000004 39 __IO uint32_t hclk_ctrl_mode; //0x00000008 40 __IO uint32_t others_clk_ctrl_mode; //0x0000000C 41 __IO uint32_t hclk_div; //0x00000010 42 __IO uint32_t msadc_clk_div; //0x00000014 43 __IO uint32_t cfg_mem_sram; //0x00000018 44 __IO uint32_t cfg_usb_ctrl; //0x0000001C 45 __IO uint32_t cfg_det_sdio_ctrl0; //0x00000020 46 __IO uint32_t cfg_det_sdio_ctrl1; //0x00000024 47 __IO uint32_t cfg_det_sdio_ctrl2; //0x00000028 48 __IO uint32_t cfg_det_sdio_int_status; //0x0000002C 49 __IO uint32_t MISC_CTRL; //0x00000030 50 __IO uint32_t TOUCH_CTRL; //0x00000034 51 __IO uint32_t UART_DET; //0x00000038 52 __IO uint32_t cfg_int_raw; //0x0000003C 53 __IO uint32_t cfg_int_status; //0x00000040 54 __IO uint32_t cfg_int_mask; //0x00000044 55 __IO uint32_t cfg_mdll128_cal; //0x00000048 56 __IO uint32_t cfg_mdll128_cal_result; //0x0000004C 57 __IO uint32_t cfg_mdll128_cal_busy; //0x00000050 58 __IO uint32_t mclk_div; //0x00000054 59 __IO uint32_t dcdc_ref_clk_div; //0x00000058 60 __IO uint32_t dcdc_ref_clk_ctrl0; //0x0000005C 61 __IO uint32_t dcdc_ref_clk_ctrl1; //0x00000060 62 __IO uint32_t UART_DET_FILTER; //0x00000064 63 __IO uint32_t TPORTS_SEL; //0x00000068 64 } HWP_CS1000LITE_SYS_CTRL_T; 65 66 static HWP_CS1000LITE_SYS_CTRL_T * const cs1000liteSysctrl = ((HWP_CS1000LITE_SYS_CTRL_T *)REG_CS1000LITE_SYSCTRL_BASE); 67 68 69 //chip_id 70 #define CS1000LITE_SYS_CTRL_CHIP_ID(n) (((n)&0xFFFF)<<0) 71 #define CS1000LITE_SYS_CTRL_METAL_ID(n) (((n)&0xFF)<<16) 72 #define CS1000LITE_SYS_CTRL_BOND_ID(n) (((n)&0xFF)<<24) 73 74 //clk_sel 75 #define CS1000LITE_SYS_CTRL_CFG_FAST_HWEN (1<<0) 76 #define CS1000LITE_SYS_CTRL_CFG_FAST_CLK_SEL (1<<1) 77 #define CS1000LITE_SYS_CTRL_CFG_CLK_PWM_SEL (1<<2) 78 #define CS1000LITE_SYS_CTRL_CFG_CLK_MSADC_SEL (1<<3) 79 #define CS1000LITE_SYS_CTRL_CFG_CLK_MSADC_INV_ANA (1<<4) 80 #define CS1000LITE_SYS_CTRL_CFG_52M_HWEN (1<<5) 81 #define CS1000LITE_SYS_CTRL_CFG_52M_CLK_EN (1<<6) 82 #define CS1000LITE_SYS_CTRL_CFG_LPO13M_HWEN (1<<7) 83 #define CS1000LITE_SYS_CTRL_CFG_LPO13M_CLK_EN (1<<8) 84 85 //hclk_ctrl_mode 86 #define CS1000LITE_SYS_CTRL_CFG_HCLK_MODE(n) (((n)&0xFFFFFFFF)<<0) 87 88 //others_clk_ctrl_mode 89 #define CS1000LITE_SYS_CTRL_CFG_OTHERS_CLK_MODE(n) (((n)&0xFFFF)<<0) 90 91 //hclk_div 92 #define CS1000LITE_SYS_CTRL_CFG_HCLK_DIV_DENOM(n) (((n)&0xFF)<<0) 93 #define CS1000LITE_SYS_CTRL_CFG_HCLK_DIV_UPDATE (1<<8) 94 95 //msadc_clk_div 96 #define CS1000LITE_SYS_CTRL_CFG_CLK_MSADC_DIV_DENOM(n) (((n)&0xFF)<<0) 97 #define CS1000LITE_SYS_CTRL_CFG_CLK_MSADC_DIV_UPDATE (1<<8) 98 99 //cfg_mem_sram 100 #define CS1000LITE_SYS_CTRL_CFG_MEM_SRAM(n) (((n)&0xFFFF)<<0) 101 102 //cfg_usb_ctrl 103 #define CS1000LITE_SYS_CTRL_CFG_USB_CTRL(n) (((n)&0x7FFFFFFF)<<0) 104 #define CS1000LITE_SYS_CTRL_RO_ANA_USB_LOCK (1<<31) 105 106 //cfg_det_sdio_ctrl0 107 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_TRIG_CMD_ARGUMENT(n) (((n)&0xFFFFFFFF)<<0) 108 109 //cfg_det_sdio_ctrl1 110 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_TRIG_CMD_ARGUMENT_MASK(n) (((n)&0xFFFFFFFF)<<0) 111 112 //cfg_det_sdio_ctrl2 113 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_INT_EN (1<<0) 114 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_CLEAR_SD_INT_TO_DEV (1<<1) 115 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_CMD_EDGE_SEL (1<<2) 116 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_DEV_IND (1<<3) 117 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_FUNCTION_ENABLE_REG(n) (((n)&3)<<4) 118 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_TRIG_CMD_IDEX(n) (((n)&0x3F)<<6) 119 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_MON_SEL(n) (((n)&3)<<12) 120 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_PWR_ON (1<<14) 121 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_PWR_ON_UPDATE (1<<15) 122 123 //cfg_det_sdio_int_status 124 #define CS1000LITE_SYS_CTRL_RO_DET_SDIO_INT_STATUS(n) (((n)&0xFF)<<0) 125 #define CS1000LITE_SYS_CTRL_RO_DET_SDIO_ULINK_HOST_ACK (1<<8) 126 127 //MISC_CTRL 128 #define CS1000LITE_SYS_CTRL_CFG_USB_IO_USED_FOR_GPIO (1<<0) 129 130 //TOUCH_CTRL 131 #define CS1000LITE_SYS_CTRL_CFG_CLK_TOUCH_DIV_MODE(n) (((n)&3)<<0) 132 133 //UART_DET 134 #define CS1000LITE_SYS_CTRL_CFG_UART_DET_TIMEOUT_TH(n) (((n)&0x3FFFFF)<<0) 135 #define CS1000LITE_SYS_CTRL_CFG_UART_DET_TH(n) (((n)&0xFF)<<22) 136 #define CS1000LITE_SYS_CTRL_CFG_UART_DET_EN (1<<30) 137 138 //cfg_int_raw 139 #define CS1000LITE_SYS_CTRL_INT_RAW (1<<0) 140 141 //cfg_int_status 142 #define CS1000LITE_SYS_CTRL_INT_STATUS (1<<0) 143 144 //cfg_int_mask 145 #define CS1000LITE_SYS_CTRL_CFG_INT_MASK (1<<0) 146 147 //cfg_mdll128_cal 148 #define CS1000LITE_SYS_CTRL_CFG_CAL_RG_CYCLE_P0(n) (((n)&0xFFFF)<<0) 149 #define CS1000LITE_SYS_CTRL_CFG_CAL_RG_CYCLE_P1(n) (((n)&0xFF)<<16) 150 #define CS1000LITE_SYS_CTRL_CFG_CAL_RG_INT_EN (1<<24) 151 #define CS1000LITE_SYS_CTRL_CFG_CAL_RG_START_PULSE (1<<25) 152 #define CS1000LITE_SYS_CTRL_CFG_CAL_RG_DONE_INT_CLR (1<<26) 153 154 //cfg_mdll128_cal_result 155 #define CS1000LITE_SYS_CTRL_CFG_CAL_RG_RESULT(n) (((n)&0xFFFFFFFF)<<0) 156 157 //cfg_mdll128_cal_busy 158 #define CS1000LITE_SYS_CTRL_CFG_CAL_RG_BUSY (1<<0) 159 160 //mclk_div 161 #define CS1000LITE_SYS_CTRL_CFG_CLK_MCLK_DIV_DENOM(n) (((n)&0xFF)<<0) 162 #define CS1000LITE_SYS_CTRL_CFG_CLK_MCLK_DIV_UPDATE (1<<8) 163 164 //dcdc_ref_clk_div 165 #define CS1000LITE_SYS_CTRL_CFG_DCDC_REF_CLK_DIV_DENOM(n) (((n)&0xFF)<<0) 166 #define CS1000LITE_SYS_CTRL_CFG_DCDC_REF_CLK_DIV_UPDATA (1<<8) 167 168 //dcdc_ref_clk_ctrl0 169 #define CS1000LITE_SYS_CTRL_CFG_DCDC_REF_CLK_TRIANGLE_CYCLE(n) (((n)&0xFFFF)<<0) 170 #define CS1000LITE_SYS_CTRL_CFG_DCDC_REF_CLK_TRIANGLE_AMP(n) (((n)&3)<<16) 171 #define CS1000LITE_SYS_CTRL_CFG_DCDC_REF_CLK_TRIANGLE_EN (1<<18) 172 173 //dcdc_ref_clk_ctrl1 174 #define CS1000LITE_SYS_CTRL_CFG_DCDC_RF_OFFSET(n) (((n)&15)<<0) 175 #define CS1000LITE_SYS_CTRL_CFG_DCDC_PA_OFFSET(n) (((n)&15)<<4) 176 #define CS1000LITE_SYS_CTRL_CFG_DCDC_CORE_OFFSET(n) (((n)&15)<<8) 177 #define CS1000LITE_SYS_CTRL_CFG_DCDC_RF_CLK_EN (1<<12) 178 #define CS1000LITE_SYS_CTRL_CFG_DCDC_PA_CLK_EN (1<<13) 179 #define CS1000LITE_SYS_CTRL_CFG_DCDC_CORE_CLK_EN (1<<14) 180 #define CS1000LITE_SYS_CTRL_CFG_DCDC_RF_CLK_HWEN (1<<15) 181 #define CS1000LITE_SYS_CTRL_CFG_DCDC_PA_CLK_HWEN (1<<16) 182 #define CS1000LITE_SYS_CTRL_CFG_DCDC_CORE_CLK_HWEN (1<<17) 183 #define CS1000LITE_SYS_CTRL_CFG_DCDC_RF_DIV(n) (((n)&3)<<18) 184 #define CS1000LITE_SYS_CTRL_CFG_DCDC_PA_DIV(n) (((n)&3)<<20) 185 #define CS1000LITE_SYS_CTRL_CFG_DCDC_CORE_DIV(n) (((n)&3)<<22) 186 187 //UART_DET_FILTER 188 #define CS1000LITE_SYS_CTRL_CFG_UART_DET_FILTER_NUM(n) (((n)&7)<<0) 189 190 //TPORTS_SEL 191 #define CS1000LITE_SYS_CTRL_CFG_TOP_TPORTS_SEL(n) (((n)&0xFF)<<0) 192 #define CS1000LITE_SYS_CTRL_CFG_CLK_TPORTS_SEL(n) (((n)&15)<<8) 193 194 #endif 195