1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #include <common/bk_err.h> 18 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 23 #define USE_HAL_DMA2D_REGISTER_CALLBACKS 0 24 25 typedef void (*dma2d_isr_t)(void); 26 27 28 /*!<Mode_ARGB8888/RGB888 */ 29 #define DMA2D_OCOLR_BLUE_1 (0x000000FFUL) /*!< Blue Value */ 30 #define DMA2D_OCOLR_GREEN_1 (0x0000FF00UL) /*!< Green Value */ 31 #define DMA2D_OCOLR_RED_1 (0x00FF0000UL) /*!< Red Value */ 32 #define DMA2D_OCOLR_YELLOW_1 (0x00FFFF00UL) /*!< Blue Value */ 33 #define DMA2D_OCOLR_ALPHA_1 (0xFF000000UL) /*!< Alpha Channel Value */ 34 35 /*!<Mode_RGB565 */ 36 #define DMA2D_OCOLR_BLUE_2 (0x0000001FUL) /*!< Blue Value */ 37 #define DMA2D_OCOLR_GREEN_2 (0x000007E0UL) /*!< Green Value */ 38 #define DMA2D_OCOLR_RED_2 (0x0000F800UL) /*!< Red Value */ 39 40 /*!<Mode_ARGB1555 */ 41 #define DMA2D_OCOLR_BLUE_3 (0x0000001FUL) /*!< Blue Value */ 42 #define DMA2D_OCOLR_GREEN_3 (0x000003E0UL) /*!< Green Value */ 43 #define DMA2D_OCOLR_RED_3 (0x00007C00UL) /*!< Red Value */ 44 #define DMA2D_OCOLR_ALPHA_3 (0x00008000UL) /*!< Alpha Channel Value */ 45 46 /*!<Mode_ARGB4444 */ 47 #define DMA2D_OCOLR_BLUE_4 (0x0000000FUL) /*!< Blue Value */ 48 #define DMA2D_OCOLR_GREEN_4 (0x000000F0UL) /*!< Green Value */ 49 #define DMA2D_OCOLR_RED_4 (0x00000F00UL) /*!< Red Value */ 50 #define DMA2D_OCOLR_ALPHA_4 (0x0000F000UL) /*!< Alpha Channel Value */ 51 52 #define DMA2D_BACKGROUND_LAYER 0x00000000U /*!< DMA2D Background Layer (layer 0) */ 53 #define DMA2D_FOREGROUND_LAYER 0x00000001U /*!< DMA2D Foreground Layer (layer 1) */ 54 #define MAX_DMA2D_LAYER 2U /*!< DMA2D maximum number of layers */ 55 56 /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode 57 * @{ 58 */ 59 #define DMA2D_NO_MODIF_ALPHA 0x00000000U /*!< No modification of the alpha channel value */ 60 #define DMA2D_REPLACE_ALPHA 0x00000001U /*!< Replace original alpha channel value by programmed alpha value */ 61 #define DMA2D_COMBINE_ALPHA 0x00000002U /*!< Replace original foreground image alpha channel value by ALPHA[7:0] multiplied with original alpha channel value */ 62 63 /** @defgroup DMA2D_Alpha_Inverted DMA2D Alpha Inversion 64 * @{ 65 */ 66 #define DMA2D_REGULAR_ALPHA 0x00000000U /*!< No modification of the alpha channel value */ 67 #define DMA2D_INVERTED_ALPHA 0x00000001U /*!< Invert the alpha channel value */ 68 69 /** @defgroup DMA2D_RB_Swap DMA2D Red and Blue Swap 70 * @{ 71 */ 72 #define DMA2D_RB_REGULAR 0x00000000U /*!< Select regular mode (RGB or ARGB) */ 73 #define DMA2D_RB_SWAP 0x00000001U /*!< Select swap mode (BGR or ABGR) */ 74 /** 75 * @} 76 */ 77 78 #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1) 79 80 typedef enum 81 { 82 DMA2D_CFG_ERROR_ISR = 0, 83 DMA2D_CLUT_TRANS_COMPLETE_ISR, 84 DMA2D_CLUT_TRANS_ERROR_ISR, 85 DMA2D_WARTERMARK_INT_ISR, 86 DMA2D_TRANS_COMPLETE_ISR, 87 DMA2D_TRANS_ERROR_ISR, 88 89 }DMA2D_ISR_ID; 90 #define DMA2D_ISR_NUM 6 91 92 #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */ 93 94 95 96 /** 97 * @brief UART enum defines 98 * @defgroup bk_api_uart_enum UART enums 99 * @ingroup bk_api_uart 100 * @{ 101 */ 102 103 /**< defgroup DMA2D_Mode */ 104 typedef enum { 105 DMA2D_M2M = 0x00000000U, /*!< DMA2D memory to memory transfer mode */ 106 DMA2D_M2M_PFC, /*!< DMA2D memory to memory with pixel format conversion transfer mode */ 107 DMA2D_M2M_BLEND, /*!< DMA2D memory to memory with blending transfer mode */ 108 DMA2D_R2M, /*!< DMA2D register to memory transfer mode */ 109 DMA2D_M2M_BLEND_FG, /*!< DMA2D memory to memory with blending transfer mode and fixed color FG */ 110 DMA2D_M2M_BLEND_BG /*!< DMA2D memory to memory with blending transfer mode and fixed color BG */ 111 } DMA2D_MODE; 112 113 114 /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode */ 115 typedef enum { 116 DMA2D_OUTPUT_ARGB8888 = 0, /*!< ARGB8888 DMA2D color mode */ 117 DMA2D_OUTPUT_RGB888, /*!< RGB888 DMA2D color mode */ 118 DMA2D_OUTPUT_RGB565, /*!< RGB565 DMA2D color mode */ 119 DMA2D_OUTPUT_ARGB1555, /*!< ARGB1555 DMA2D color mode */ 120 DMA2D_OUTPUT_ARGB4444, /*!< ARGB4444 DMA2D color mode */ 121 } OUTPUT_COLOR_MODE; 122 123 124 /**defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode */ 125 typedef enum { 126 DMA2D_INPUT_ARGB8888 = 0, /**< ARGB8888 DMA2D color mode */ 127 DMA2D_INPUT_RGB888, /**< RGB888 DMA2D color mode */ 128 DMA2D_INPUT_RGB565, /**!< RGB565 DMA2D color mode */ 129 DMA2D_INPUT_ARGB1555, /**< ARGB1555 DMA2D color mode */ 130 DMA2D_INPUT_ARGB4444, /**< ARGB4444 DMA2D color mode */ 131 DMA2D_INPUT_L8 = 5, 132 DMA2D_INPUT_AL44, 133 DMA2D_INPUT_AL88, 134 DMA2D_INPUT_L4, 135 DMA2D_INPUT_A8, 136 DMA2D_INPUT_A4, 137 } INPUT_COLOR_MODE; 138 139 typedef enum 140 { 141 DMA2D_CFG_ERROR = (0x1UL << 13U), 142 DMA2D_CLUT_TRANS_COMPLETE = (0x1UL << 12U), 143 DMA2D_CLUT_TRANS_ERROR = (0x1UL << 11U), 144 DMA2D_WARTERMARK_INT = (0x1UL << 10U), 145 DMA2D_TRANS_COMPLETE = (0x1UL << 9U), 146 DMA2D_TRANS_ERROR = (0x1UL << 8U), 147 DMA2D_ALL_INI = (0X3F << 8) 148 149 }DMA2D_INT_TYPE; 150 151 152 typedef enum 153 { 154 DMA2D_TRANS_ERROR_STATUS = 0x1, 155 DMA2D_TRANS_COMPLETE_STATUS, 156 DMA2D_WARTERMARK_INT_STATUS, 157 DMA2D_CLUT_TRANS_ERROR_STATUS, 158 DMA2D_CLUT_TRANS_COMPLETE_STATUS, 159 DMA2D_CFG_ERROR_STATUS 160 }DMA2D_INT_STATUS; 161 162 /** 163 * @brief DMA2D CLUT Structure definition 164 */ 165 typedef struct 166 { 167 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/ 168 169 uint32_t CLUTColorMode; /*!< Configures the DMA2D CLUT color mode. 170 This parameter can be one value of @ref DMA2D_CLUT_CM. */ 171 172 uint32_t Size; /*!< Configures the DMA2D CLUT size. 173 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/ 174 } DMA2D_CLUTCfgTypeDef; 175 176 /** 177 * @brief DMA2D Init structure definition 178 */ 179 typedef struct 180 { 181 DMA2D_MODE Mode; /*!< Configures the DMA2D transfer mode.his parameter can be one value of @ref DMA2D_Mode. */ 182 uint32_t ColorMode; /*!< Configures the color format of the output image. 183 This parameter can be one value of @ref DMA2D_Output_Color_Mode. */ 184 uint32_t OutputOffset; /*!< Specifies the Offset value. 185 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */ 186 uint32_t AlphaInverted; /*!< Select regular or inverted alpha value for the output pixel format converter. 187 This parameter can be one value of @ref DMA2D_Alpha_Inverted. */ 188 uint32_t LineOffsetMode; /*!< Configures how is expressed the line offset for the foreground, background and output. 189 This parameter can be one value of @ref DMA2D_Line_Offset_Mode. */ 190 uint32_t RedBlueSwap; /*!< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR) 191 for the output pixel format converter. 192 This parameter can be one value of @ref DMA2D_RB_Swap. */ 193 } DMA2D_INIT; 194 195 /** brief DMA2D Layer structure definition*/ 196 typedef struct 197 { 198 uint32_t InputOffset; /*!< Configures the DMA2D foreground or background offset. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */ 199 uint32_t InputColorMode; /*!< Configures the DMA2D foreground or background color mode. This parameter can be one value of @ref DMA2D_Input_Color_Mode. */ 200 uint32_t AlphaMode; /*!< Configures the DMA2D foreground or background alpha mode.This parameter can be one value of @ref DMA2D_Alpha_Mode. */ 201 uint32_t InputAlpha; /*the DMA2D foreground or background alpha value,This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF 202 - InputAlpha[24:31] is the alpha value ALPHA[0:7] */ 203 204 uint32_t Inputcolor; /*!< Specifies color value in case of A8 or A4 color mode. 205 @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between 206 Min_Data = 0x00000000 and Max_Data = 0xFFFFFF where 207 - Inputcolor[16:23] is the red value RED[0:7] 208 - Inputcolor[8:15] is the green value GREEN[0:7] 209 - Inputcolor[0:7] is the blue value BLUE[0:7]. */ 210 uint32_t AlphaInverted; /*!< Select regular or inverted alpha value.This parameter can be one value of @ref DMA2D_Alpha_Inverted. */ 211 uint32_t RedBlueSwap; /*!< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR). 212 This parameter can be one value of @ref DMA2D_RB_Swap. */ 213 214 } DMA2D_LAYER_CFG; 215 216 217 typedef struct __DMA2D_HandleTypeDef 218 { 219 DMA2D_INIT init; 220 DMA2D_LAYER_CFG LayerCfg[MAX_DMA2D_LAYER]; 221 }DMA2D_HandleTypeDef; 222 223 224 225 /** 226 * @brief DMA2D handle Structure definition 227 */ 228 229 #ifdef __cplusplus 230 } 231 #endif 232 233 234