1 /* 2 // Copyright (C) 2022 Beken Corporation 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef _I2S_H_ 16 #define _I2S_H_ 17 18 #define NUMBER_ROUND_UP(a,b) ((a) / (b) + (((a) % (b)) ? 1 : 0)) 19 #define NUMBER_ROUND_DOWN(a,b) ((a) / (b)) 20 21 #define I2S_BASE (0x00802500) 22 23 #define PCM_CTRL (I2S_BASE + 0 * 4) 24 #define BITRATIO_POSI (0) 25 #define BITRATIO_MASK (0xFF) 26 #define SMPRATIO_POSI (8) 27 #define SMPRATIO_MASK (0x1F) 28 #define PCM_DLEN_POSI (13) 29 #define PCM_DLEN_MASK (0x07) 30 #define DATALEN_POSI (16) 31 #define DATALEN_MASK (0x1F) 32 #define SYNCLEN_POSI (21) 33 #define SYNCLEN_MASK (0x07UL <<21) 34 #define LSB_FIRST (0x01UL << 24) 35 #define SCK_INV (0x01UL << 25) 36 #define LRCK_RP (0x01UL << 26) 37 #define MODE_SEL_POSI (27) 38 #define MODE_SEL_MASK (0x07) 39 #define MSTEN (0x01UL << 30) 40 #define SLAVEEN (0 << 30) 41 #define I2S_PCM_EN (0x01UL << 31) 42 43 #define PCM_CN (I2S_BASE + 1 * 4) 44 #define RX_INT_EN (0x01UL << 0) 45 #define TX_INT0_EN (0x01UL << 1) 46 #define TX_INT1_EN (0x01UL << 2) 47 #define TX_INT2_EN (0x01UL << 3) 48 #define RX_OVF_EN (0x01UL << 4) 49 #define TX_UDF0_EN (0x01UL << 5) 50 #define TX_UDF1_EN (0x01UL << 6) 51 #define TX_UDF2_EN (0x01UL << 7) 52 #define RX_FIFO_LEVEL_POSI (8) 53 #define RX_FIFO_LEVEL_MASK (0x03) 54 #define TX_FIFO0_LEVEL_POSI (10) 55 #define TX_FIFO0_LEVEL_MASK (0x03) 56 #define TX_FIFO1_LEVEL_POSI (12) 57 #define TX_FIFO1_LEVEL_MASK (0x03) 58 #define TX_FIFO2_LEVEL_POSI (14) 59 #define TX_FIFO2_LEVEL_MASK (0x03) 60 #define RX_FIFO_CLR (0x01UL << 16) 61 #define TX_FIFO0_CLR (0x01UL << 17) 62 #define TX_FIFO1_CLR (0x01UL << 18) 63 #define TX_FIFO2_CLR (0x01UL << 19) 64 65 #define PCM_STAT (I2S_BASE + 2 * 4) 66 #define RX_INT (0x01UL << 0) 67 #define TX_INT0 (0x01UL << 1) 68 #define TX_INT1 (0x01UL << 2) 69 #define TX_INT2 (0x01UL << 3) 70 #define RX_OVF (0x01UL << 4) 71 #define TX_UDF0 (0x01UL << 5) 72 #define TX_UDF1 (0x01UL << 6) 73 #define TX_UDF2 (0x01UL << 7) 74 #define RX_FIFO0_EMPTY (0x01UL << 8) 75 #define RX_FIFO0_FULL (0x01UL << 9) // modify according 7251 datasheet 76 #define TX_FIFO0_FULL (0x01UL << 10) 77 #define TX_FIFO0_EMPTY (0x01UL << 11) // modify according 7251 datasheet 78 #define TX_FIFO1_FULL (0x01UL << 12) 79 #define TX_FIFO1_ALMOST_FULL (0x01UL << 13) 80 #define TX_FIFO2_FULL (0x01UL << 14) 81 #define TX_FIFO2_ALMOST_FULL (0x01UL << 15) 82 83 #define PCM_DAT0 (I2S_BASE + 3 * 4) 84 #define PCM_DAT1 (I2S_BASE + 4 * 4) 85 #define PCM_DAT2 (I2S_BASE + 5 * 4) 86 #define PCM_CFG2 (I2S_BASE + 6 * 4) 87 88 #define TXFIFO_TXFIFO_MODE 6 89 #define TXFIFO_BITSEQ_MODE 4 90 #define TXFIFO_DOWN_SMPRATIO 0 91 92 //#define I2S_SYS_CLK 24576000 93 #define I2S_SYS_CLK 48000000 94 95 #define MASTER 1 96 #define SLAVE 0 97 98 #define SAMPLE_RATE8K 8000 99 #define SAMPLE_RATE16K 16000 100 #define SAMPLE_RATE_44_1K 44100 101 #define SAMPLE_RATE_48K 48000 102 103 #define DATA_WIDTH_16BIT 16 104 #define DATA_WIDTH_32BIT 32 105 106 #define FIFO_LEVEL_16 0 107 #define FIFO_LEVEL_32 1 108 #define FIFO_LEVEL_48 2 109 110 /******************************************************************************* 111 * mode micros 112 *******************************************************************************/ 113 #define I2S_MODE (0 << 0) 114 #define I2S_LEFT_JUSTIFIED (1 << 0) 115 #define I2S_RIGHT_JUSTIFIED (2 << 0) 116 #define I2S_RESERVE (3 << 0) 117 #define I2S_SHORT_FRAME_SYNC (4 << 0) 118 #define I2S_LONG_FRAME_SYNC (5 << 0) 119 #define I2S_NORMAL_2B_D (6 << 0) 120 #define I2S_DELAY_2B_D (7 << 0) 121 122 #define I2S_LRCK_NO_TURN (0 << 3) 123 #define I2S_SCK_NO_TURN (0 << 4) 124 #define I2S_MSB_FIRST (0 << 5) 125 126 #define I2S_SYNC_LENGTH_BIT (8) 127 #define I2S_PCM_DATA_LENGTH_BIT (12) 128 129 /******************************************************************************* 130 * Function Declarations 131 *******************************************************************************/ 132 UINT32 i2s_configure(UINT32 fifo_level, UINT32 sample_rate, UINT32 bits_per_sample, UINT32 mode); 133 UINT32 i2s_transfer(UINT32 *i2s_send_buf, UINT32 *i2s_recv_buf, UINT32 count, UINT32 param); 134 135 #endif //_I2S_H_ 136