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1 /*
2  * drivers/amlogic/media/stream_input/parser/streambuf_reg.h
3  *
4  * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  */
17 
18 #ifndef STREAMBUF_REG_H
19 #define STREAMBUF_REG_H
20 
21 #define HEVC_STREAM_REG_BASE        HEVC_STREAM_START_ADDR
22 
23 #define VLD_MEM_VIFIFO_REG_BASE     VLD_MEM_VIFIFO_START_PTR
24 #define AIU_MEM_AIFIFO_REG_BASE     AIU_MEM_AIFIFO_START_PTR
25 
26 #define START_PTR   0
27 #define CURR_PTR    1
28 #define END_PTR     2
29 #define BYTES_AVAIL 3
30 #define CONTROL     4
31 #define WP          5
32 #define RP          6
33 #define LEVEL       7
34 #define BUF_CTRL    8
35 
36 /*
37  *#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6
38  *#define _WRITE_ST_REG(r, val) \
39  *    __raw_writel(val, (volatile void __iomem *)(buf->reg_base+(r<<2)))
40  *#define _WRITE_ST_REG_BITS(r, val, s, e) \
41  *    __raw_writel((((_READ_ST_REG(r) & \
42  *    (((1L<<(e)-1)<<(s))-1)<<(s)))|((unsigned)((val)&((1L<<(e))-1))<<(s))), \
43  *    (volatile void __iomem *)(buf->reg_base+(r<<2)))
44  *#define _SET_ST_REG_MASK(r, val) \
45  *    __raw_writel(_READ_ST_REG(r)| (val), \
46  *    (volatile void __iomem *)(buf->reg_base+(r<<2)))
47  *#define _CLR_ST_REG_MASK(r, val) \
48  *    __raw_writel(_READ_ST_REG(r)&~(val), \
49  *    (volatile void __iomem *)(buf->reg_base+(r<<2)))
50  *#define _READ_ST_REG(r) \
51  *    (__raw_readl((volatile void __iomem *)(buf->reg_base+(r<<2))))
52  *
53  *#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6TVD
54  *#define _READ_VDEC2_ST_REG(r) \
55  *    (__raw_readl((volatile void __iomem *)(buf->reg_base + \
56  *    DOS_REG_ADDR(VDEC2_VLD_MEM_VIFIFO_START_PTR) - \
57  *    DOS_REG_ADDR(VLD_MEM_VIFIFO_START_PTR) + (r<<2))))
58  *#define _WRITE_VDEC2_ST_REG(r, val) \
59  *    __raw_writel(val, (volatile void __iomem *)(buf->reg_base + \
60  *    DOS_REG_ADDR(VDEC2_VLD_MEM_VIFIFO_START_PTR) - \
61  *    DOS_REG_ADDR(VLD_MEM_VIFIFO_START_PTR) + (r<<2)))
62  *#endif
63  *
64  *#define MEM_BUFCTRL_MANUAL      (1<<1)
65  *#define MEM_BUFCTRL_INIT        (1<<0)
66  *#define MEM_LEVEL_CNT_BIT       18
67  *#define MEM_FIFO_CNT_BIT        16
68  *#define MEM_FILL_ON_LEVEL       (1<<10)
69  *#define MEM_CTRL_EMPTY_EN       (1<<2)
70  *#define MEM_CTRL_FILL_EN        (1<<1)
71  *#define MEM_CTRL_INIT           (1<<0)
72  *
73  *#else
74  *#define _WRITE_ST_REG(r, val) \
75  *WRITE_MPEG_REG(buf->reg_base + (r), \
76  *						(val))
77  *#define _WRITE_ST_REG_BITS(r, val, s, e)\
78  * WRITE_MPEG_REG(buf->reg_base + (r), \
79  *						(val), (s), (e))
80  *#define _SET_ST_REG_MASK(r, val) SET_MPEG_REG_MASK(buf->reg_base + \
81  *						(r), (val))
82  *#define _CLR_ST_REG_MASK(r, val)  CLEAR_MPEG_REG_MASK(buf->reg_base + \
83  *						(r), (val))
84  *#define _READ_ST_REG(r) READ_MPEG_REG(buf->reg_base + (r))
85  *#endif
86  */
87 
88  /*TODO*/
89 #define _WRITE_ST_REG(r, val)  do { \
90 	if (buf->reg_base == VLD_MEM_VIFIFO_REG_BASE) \
91 		codec_dosbus_write((buf->reg_base+(r)), (val)); \
92 	else \
93 		codec_aiubus_write((buf->reg_base+(r)), (val)); \
94 	} while (0)
95 #define _READ_ST_REG(r) \
96 	((buf->reg_base == VLD_MEM_VIFIFO_REG_BASE) ? \
97 	 codec_dosbus_read(buf->reg_base+(r)) : \
98 	 codec_aiubus_read(buf->reg_base+(r)))
99 
100 #define _SET_ST_REG_MASK(r, val) _WRITE_ST_REG(r, _READ_ST_REG(r) | (val))
101 #define _CLR_ST_REG_MASK(r, val) _WRITE_ST_REG(r, _READ_ST_REG(r)&~(val))
102 #define _READ_VDEC2_ST_REG(r) (codec_dosbus_read(\
103 			(VDEC2_VLD_MEM_VIFIFO_START_PTR+(r))))
104 #define _WRITE_VDEC2_ST_REG(r, val) codec_dosbus_write(\
105 		(VDEC2_VLD_MEM_VIFIFO_START_PTR+r), val)
106 #define MEM_BUFCTRL_MANUAL      (1<<1)
107 #define MEM_BUFCTRL_INIT        (1<<0)
108 #define MEM_LEVEL_CNT_BIT       18
109 #define MEM_FIFO_CNT_BIT        16
110 #define MEM_FILL_ON_LEVEL       (1<<10)
111 #define MEM_CTRL_EMPTY_EN       (1<<2)
112 #define MEM_CTRL_FILL_EN        (1<<1)
113 #define MEM_CTRL_INIT           (1<<0)
114 #endif /* STREAMBUF_REG_H */
115