| /device/soc/st/stm32f4xx/sdk/Drivers/STM32F4xx_HAL_Driver/Inc/ |
| D | stm32f4xx_hal_cortex.h | 322 #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \ argument
325 #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \ argument
328 #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \ argument
331 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \ argument
334 #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \ argument
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| D | stm32f4xx_hal_dma.h | 737 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ argument
740 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ argument
760 #define IS_DMA_FIFO_MODE_STATE(STATE) (((STATE) == DMA_FIFOMODE_DISABLE ) || \ argument
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| D | stm32f4xx_hal_rtc_ex.h | 962 #define IS_RTC_TAMPER_PULLUP_STATE(STATE) (((STATE) == RTC_TAMPER_PULLUP_ENABLE) || \ argument
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| D | stm32f4xx_hal_uart.h | 824 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ argument
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| D | stm32f4xx_ll_fsmc.h | 847 #define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_NAND_ECC_DISABLE) || \ argument
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| D | stm32f4xx_ll_fmc.h | 1112 #define IS_FMC_ECC_STATE(STATE) (((STATE) == FMC_NAND_ECC_DISABLE) || \ argument
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| /device/soc/st/stm32f407zg/uniproton/board/common/STM32F4xx_StdPeriph_Driver/inc/ |
| D | stm32f4xx_tim.h | 361 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ argument
373 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ argument
409 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ argument
433 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ argument
461 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ argument
473 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ argument
485 #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ argument
497 #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ argument
828 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ argument
840 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ argument
[all …]
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| D | stm32f4xx_dma.h | 193 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \ argument
206 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \ argument
279 #define IS_DMA_FIFO_MODE_STATE(STATE) (((STATE) == DMA_FIFOMode_Disable ) || \ argument
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| D | stm32f4xx_fsmc.h | 336 #define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \ argument
347 #define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \ argument
520 #define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \ argument
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| D | stm32f4xx_dac.h | 184 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \ argument
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| D | stm32f4xx_fmc.h | 454 #define IS_FMC_BURSTMODE(STATE) (((STATE) == FMC_BurstAccessMode_Disable) || \ argument
466 #define IS_FMC_ASYNWAIT(STATE) (((STATE) == FMC_AsynchronousWait_Disable) || \ argument
672 #define IS_FMC_ECC_STATE(STATE) (((STATE) == FMC_ECC_Disable) || \ argument
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| D | stm32f4xx_i2c.h | 128 #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \ argument
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| D | stm32f4xx_sdio.h | 190 #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState… argument
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| D | stm32f4xx_sai.h | 415 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_Output_NotReleased) ||\ argument
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| /device/soc/esp/esp32/components/xtensa/ |
| D | stdatomic.c | 24 #define atomic_benchmark_intr_restore(STATE) argument
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| /device/soc/st/common/platform/stm32mp1xx_hal/STM32MP1xx_HAL_Driver/Inc/ |
| D | stm32mp1xx.h | 50 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) argument
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| D | stm32mp1xx_hal_dma.h | 885 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ argument
888 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ argument
908 #define IS_DMA_FIFO_MODE_STATE(STATE) (((STATE) == DMA_FIFOMODE_DISABLE ) || \ argument
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| D | stm32mp1xx_hal_sai.h | 830 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ argument
921 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ argument
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| D | stm32mp1xx_hal_dac.h | 423 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ argument
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| D | stm32mp1xx_hal.h | 156 #define IS_SYSCFG_SWITCH_STATE(STATE) ((((STATE) & SYSCFG_SWITCH_PA0_OPEN) == SYSCFG_SWITCH_PA… argument
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| /device/soc/goodix/gr551x/sdk_liteos/gr551x_sdk/drivers/inc/ |
| D | gr55xx_hal_dma.h | 387 __STATIC_INLINE bool IS_DMA_SOURCE_INC_STATE(uint32_t STATE) in IS_DMA_SOURCE_INC_STATE()
398 __STATIC_INLINE bool IS_DMA_DESTINATION_INC_STATE(uint32_t STATE) in IS_DMA_DESTINATION_INC_STATE()
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| /device/soc/st/stm32f4xx/sdk/Drivers/STM32F4xx_HAL_Driver/Src/ |
| D | stm32f4xx_ll_dma.c | 106 #define IS_LL_DMA_FIFO_MODE_STATE(STATE) (((STATE) == LL_DMA_FIFOMODE_DISABLE ) || \ argument
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| /device/soc/goodix/gr551x/sdk_liteos/gr551x_sdk/toolchain/gr551x/include/ |
| D | gr55xx.h | 94 static inline uint32_t IS_FUNCTIONAL_STATE(uint32_t STATE) in IS_FUNCTIONAL_STATE()
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| /device/soc/st/stm32f4xx/sdk/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
| D | stm32f4xx.h | 196 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) argument
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| /device/soc/hpmicro/sdk/hpm_sdk/soc/ip/ |
| D | hpm_lin_regs.h | 15 __R uint32_t STATE; /* 0x24: state register */ member
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