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1 /**
2   ******************************************************************************
3   * @file    stm32mp1xx_hal_tim_ex.h
4   * @author  MCD Application Team
5   * @brief   Header file of TIM HAL Extended module.
6   ******************************************************************************
7   * @attention
8   *
9   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10   * All rights reserved.</center></h2>
11   *
12   * This software component is licensed by ST under BSD 3-Clause license,
13   * the "License"; You may not use this file except in compliance with the
14   * License. You may obtain a copy of the License at:
15   *                        opensource.org/licenses/BSD-3-Clause
16   *
17   ******************************************************************************
18   */
19 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32MP1xx_HAL_TIM_EX_H
22 #define STM32MP1xx_HAL_TIM_EX_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32mp1xx_hal_def.h"
30 
31 /** @addtogroup STM32MP1xx_HAL_Driver
32   * @{
33   */
34 
35 /** @addtogroup TIMEx
36   * @{
37   */
38 
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
41   * @{
42   */
43 
44 /**
45   * @brief  TIM Hall sensor Configuration Structure definition
46   */
47 
48 typedef struct
49 {
50   uint32_t IC1Polarity;         /*!< Specifies the active edge of the input signal.
51                                      This parameter can be a value of @ref TIM_Input_Capture_Polarity */
52 
53   uint32_t IC1Prescaler;        /*!< Specifies the Input Capture Prescaler.
54                                      This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
55 
56   uint32_t IC1Filter;           /*!< Specifies the input capture filter.
57                                      This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
58 
59   uint32_t Commutation_Delay;   /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
60                                      This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
61 } TIM_HallSensor_InitTypeDef;
62 
63 /**
64   * @brief  TIM Break/Break2 input configuration
65   */
66 typedef struct
67 {
68   uint32_t Source;         /*!< Specifies the source of the timer break input.
69                                 This parameter can be a value of @ref TIMEx_Break_Input_Source */
70   uint32_t Enable;         /*!< Specifies whether or not the break input source is enabled.
71                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
72   uint32_t Polarity;       /*!< Specifies the break input source polarity.
73                                 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
74                                 Not relevant when analog watchdog output of the DFSDM1 used as break input source */
75 }
76 TIMEx_BreakInputConfigTypeDef;
77 
78 /**
79   * @}
80   */
81 /* End of exported types -----------------------------------------------------*/
82 
83 /* Exported constants --------------------------------------------------------*/
84 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
85   * @{
86   */
87 
88 /** @defgroup TIMEx_Remap TIM Extended Remapping
89   * @{
90   */
91 #define TIM_TIM1_ETR_GPIO        0x00000000U                                                 /* !< TIM1_ETR is connected to GPIO */
92 #define TIM_TIM1_ETR_ADC1_AWD1   (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)                     /* !< TIM1_ETR is connected to ADC1 AWD1 */
93 #define TIM_TIM1_ETR_ADC1_AWD2   (TIM1_AF1_ETRSEL_2)                                         /* !< TIM1_ETR is connected to ADC1 AWD2 */
94 #define TIM_TIM1_ETR_ADC1_AWD3   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0)                     /* !< TIM1_ETR is connected to ADC1 AWD3 */
95 #define TIM_TIM1_ETR_ADC2_AWD1   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1)                     /* !< TIM1_ETR is connected to ADC3 AWD1 */
96 #define TIM_TIM1_ETR_ADC2_AWD2   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC3 AWD2 */
97 #define TIM_TIM1_ETR_ADC2_AWD3   TIM1_AF1_ETRSEL_3                                           /* !< TIM1_ETR is connected to ADC3 AWD3 */
98 #if defined(TIM8)
99 #define TIM_TIM8_ETR_GPIO        0x00000000U                                                 /* !< TIM8_ETR is connected to GPIO */
100 #define TIM_TIM8_ETR_ADC1_AWD1   (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)                     /* !< TIM8_ETR is connected to ADC1 AWD1 */
101 #define TIM_TIM8_ETR_ADC1_AWD2   (TIM8_AF1_ETRSEL_2)                                         /* !< TIM8_ETR is connected to ADC1 AWD2 */
102 #define TIM_TIM8_ETR_ADC1_AWD3   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0)                     /* !< TIM8_ETR is connected to ADC1 AWD3 */
103 #define TIM_TIM8_ETR_ADC2_AWD1   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1)                     /* !< TIM8_ETR is connected to ADC3 AWD1 */
104 #define TIM_TIM8_ETR_ADC2_AWD2   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC3 AWD2 */
105 #define TIM_TIM8_ETR_ADC2_AWD3   TIM8_AF1_ETRSEL_3                                           /* !< TIM8_ETR is connected to ADC3 AWD3 */
106 #endif
107 #if defined(TIM2)
108 #define TIM_TIM2_ETR_GPIO        0x00000000U                                                 /* !< TIM2_ETR is connected to GPIO */
109 #define TIM_TIM2_ETR_RCC_LSE     (TIM2_AF1_ETRSEL_1 | TIM2_AF1_ETRSEL_0)                     /* !< TIM2_ETR is connected to RCC LSE */
110 #define TIM_TIM2_ETR_SAI1_FSA    (TIM2_AF1_ETRSEL_2)                                         /* !< TIM2_ETR is connected to SAI1 FS_A */
111 #define TIM_TIM2_ETR_SAI1_FSB    (TIM2_AF1_ETRSEL_2 | TIM2_AF1_ETRSEL_0)                     /* !< TIM2_ETR is connected to SAI1 FS_B */
112 #define TIM_TIM2_ETR_ETH_PPS     (TIM2_AF1_ETRSEL_2 | TIM2_AF1_ETRSEL_1)                     /* !< TIM2_ETR is connected to ETH PPS */
113 #endif
114 #if defined(TIM3)
115 #define TIM_TIM3_ETR_GPIO        0x00000000U                                                 /* !< TIM3_ETR is connected to GPIO */
116 #define TIM_TIM3_ETR_ETH_PPS     (TIM3_AF1_ETRSEL_2 | TIM3_AF1_ETRSEL_1)                     /* !< TIM3_ETR is connected to ETH PPS */
117 #endif
118 #if defined(TIM4)
119 #define TIM_TIM4_ETR_GPIO        0x00000000U                                                 /* !< TIM4_ETR is connected to GPIO */
120 #endif
121 #if defined(TIM5)
122 #define TIM_TIM5_ETR_GPIO        0x00000000U                                                 /* !< TIM5_ETR is connected to GPIO */
123 #define TIM_TIM5_ETR_SAI2_FSA    TIM5_AF1_ETRSEL_0                                           /* !< TIM5_ETR is connected to SAI2 FS_A */
124 #define TIM_TIM5_ETR_SAI2_FSB    TIM5_AF1_ETRSEL_1                                           /* !< TIM5_ETR is connected to SAI2 FS_B */
125 #define TIM_TIM5_ETR_OTG_SOF     (TIM5_AF1_ETRSEL_1 | TIM5_AF1_ETRSEL_0)                     /* !< TIM5_ETR is connected to OTG SOF */
126 #endif
127 /**
128   * @}
129   */
130 
131 /** @defgroup TIMEx_Break_Input TIM Extended Break input
132   * @{
133   */
134 #define TIM_BREAKINPUT_BRK     0x00000001U                                      /* !< Timer break input  */
135 #define TIM_BREAKINPUT_BRK2    0x00000002U                                      /* !< Timer break2 input */
136 /**
137   * @}
138   */
139 
140 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
141   * @{
142   */
143 #define TIM_BREAKINPUTSOURCE_BKIN     0x00000001U                               /* !< An external source (GPIO) is connected to the BKIN pin  */
144 #define TIM_BREAKINPUTSOURCE_DFSDM1   0x00000008U                               /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
145 /**
146   * @}
147   */
148 
149 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
150   * @{
151   */
152 #define TIM_BREAKINPUTSOURCE_DISABLE     0x00000000U                            /* !< Break input source is disabled */
153 #define TIM_BREAKINPUTSOURCE_ENABLE      0x00000001U                            /* !< Break input source is enabled */
154 /**
155   * @}
156   */
157 
158 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
159   * @{
160   */
161 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW     0x00000001U                       /* !< Break input source is active low */
162 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH    0x00000000U                       /* !< Break input source is active_high */
163 /**
164   * @}
165   */
166 
167 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection
168   * @{
169   */
170 
171 #define TIM_TIM1_TI1_GPIO                          0x00000000UL                              /* !< TIM1_TI1 is connected to GPIO */
172 #define TIM_TIM1_TI2_GPIO                          0x00000000UL                              /* !< TIM1_TI2 is connected to GPIO */
173 #define TIM_TIM1_TI3_GPIO                          0x00000000UL                              /* !< TIM1_TI3 is connected to GPIO */
174 #define TIM_TIM1_TI4_GPIO                          0x00000000UL                              /* !< TIM1_TI4 is connected to GPIO */
175 
176 #define TIM_TIM8_TI1_GPIO                          0x00000000UL                              /* !< TIM8_TI1 is connected to GPIO */
177 #define TIM_TIM8_TI2_GPIO                          0x00000000UL                              /* !< TIM8_TI2 is connected to GPIO */
178 #define TIM_TIM8_TI3_GPIO                          0x00000000UL                              /* !< TIM8_TI3 is connected to GPIO */
179 #define TIM_TIM8_TI4_GPIO                          0x00000000UL                              /* !< TIM8_TI4 is connected to GPIO */
180 
181 #define TIM_TIM2_TI1_GPIO                          0x00000000UL                              /* !< TIM2_TI1 is connected to GPIO */
182 #define TIM_TIM2_TI2_GPIO                          0x00000000UL                              /* !< TIM2_TI2 is connected to GPIO */
183 #define TIM_TIM2_TI3_GPIO                          0x00000000UL                              /* !< TIM2_TI3 is connected to GPIO */
184 #define TIM_TIM2_TI4_GPIO                          0x00000000UL                              /* !< TIM2_TI4 is connected to GPIO */
185 
186 #define TIM_TIM3_TI1_GPIO                          0x00000000UL                              /* !< TIM3_TI1 is connected to GPIO */
187 #define TIM_TIM3_TI2_GPIO                          0x00000000UL                              /* !< TIM3_TI2 is connected to GPIO */
188 #define TIM_TIM3_TI3_GPIO                          0x00000000UL                              /* !< TIM3_TI3 is connected to GPIO */
189 #define TIM_TIM3_TI4_GPIO                          0x00000000UL                              /* !< TIM3_TI4 is connected to GPIO */
190 
191 #define TIM_TIM4_TI1_GPIO                          0x00000000UL                              /* !< TIM4_TI1 is connected to GPIO */
192 #define TIM_TIM4_TI2_GPIO                          0x00000000UL                              /* !< TIM4_TI2 is connected to GPIO */
193 #define TIM_TIM4_TI3_GPIO                          0x00000000UL                              /* !< TIM4_TI3 is connected to GPIO */
194 #define TIM_TIM4_TI4_GPIO                          0x00000000UL                              /* !< TIM4_TI4 is connected to GPIO */
195 
196 #define TIM_TIM5_TI1_GPIO                          0x00000000U                               /* !< TIM5_TI1 is connected to GPIO */
197 #define TIM_TIM5_TI1_FDCAN1_TMP                    TIM_TISEL_TI1SEL_0                        /* !< TIM5_TI1 is connected to FDCAN1 TMP */
198 #define TIM_TIM5_TI1_FDCAN1_RTP                    TIM_TISEL_TI1SEL_1                        /* !< TIM5_TI1 is connected to FDCAN1 RTP */
199 #define TIM_TIM5_TI2_GPIO                          0x00000000UL                              /* !< TIM5_TI2 is connected to GPIO */
200 #define TIM_TIM5_TI3_GPIO                          0x00000000UL                              /* !< TIM5_TI3 is connected to GPIO */
201 #define TIM_TIM5_TI4_GPIO                          0x00000000UL                              /* !< TIM5_TI4 is connected to GPIO */
202 
203 #define TIM_TIM12_TI1_GPIO                         0x00000000UL                              /* !< TIM12_TI1 is connected to GPIO */
204 #define TIM_TIM12_TI1_HSI_CAL_CK                   TIM_TISEL_TI1SEL_0                        /* !< TIM12_TI1 is connected to HSI CAL CK */
205 #define TIM_TIM12_TI1_CSI_CAL_CK                   TIM_TISEL_TI1SEL_1                        /* !< TIM12_TI1 is connected to CSI CAL CK */
206 #define TIM_TIM12_TI2_GPIO                         0x00000000UL                              /* !< TIM12_TI2 is connected to GPIO */
207 
208 #define TIM_TIM13_TI1_GPIO                         0x00000000UL                              /* !< TIM13_TI1 is connected to GPIO */
209 
210 #define TIM_TIM14_TI1_GPIO                         0x00000000UL                              /* !< TIM14_TI1 is connected to GPIO */
211 
212 #define TIM_TIM15_TI1_GPIO                         0x00000000U                               /* !< TIM15_TI1 is connected to GPIO */
213 #define TIM_TIM15_TI1_TIM2_CH1                     TIM_TISEL_TI1SEL_0                        /* !< TIM15_TI1 is connected to TIM2 CH1 */
214 #define TIM_TIM15_TI1_TIM3_CH1                     TIM_TISEL_TI1SEL_1                        /* !< TIM15_TI1 is connected to TIM3 CH1 */
215 #define TIM_TIM15_TI1_TIM4_CH1                     (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to TIM4 CH1 */
216 #define TIM_TIM15_TI1_RCC_LSE                      (TIM_TISEL_TI1SEL_2)                      /* !< TIM15_TI1 is connected to RCC LSE  */
217 #define TIM_TIM15_TI1_RCC_CSI                      (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to RCC CSI  */
218 #define TIM_TIM15_TI1_RCC_MCO2                     (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to RCC MCO2 */
219 #define TIM_TIM15_TI1_HSI_CAL_CK                   (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0)  /* !< TIM15_TI1 is connected to HSI CAL CK */
220 #define TIM_TIM15_TI1_CSI_CAL_CK                   TIM_TISEL_TI1SEL_3                        /* !< TIM15_TI1 is connected to CSI CAL CK */
221 
222 #define TIM_TIM15_TI2_GPIO                         0x00000000U                               /* !< TIM15_TI2 is connected to GPIO */
223 #define TIM_TIM15_TI2_TIM2_CH2                     (TIM_TISEL_TI2SEL_0)                      /* !< TIM15_TI2 is connected to TIM2 CH2 */
224 #define TIM_TIM15_TI2_TIM3_CH2                     (TIM_TISEL_TI2SEL_1)                      /* !< TIM15_TI2 is connected to TIM3 CH2 */
225 #define TIM_TIM15_TI2_TIM4_CH2                     (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM4 CH2 */
226 
227 #define TIM_TIM16_TI1_GPIO                         0x00000000U                               /* !< TIM16 TI1 is connected to GPIO */
228 #define TIM_TIM16_TI1_RCC_LSI                      TIM_TISEL_TI1SEL_0                        /* !< TIM16 TI1 is connected to RCC LSI */
229 #define TIM_TIM16_TI1_RCC_LSE                      TIM_TISEL_TI1SEL_1                        /* !< TIM16 TI1 is connected to RCC LSE */
230 #define TIM_TIM16_TI1_WKUP_IT                      (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM16 TI1 is connected to WKUP_IT */
231 
232 #define TIM_TIM17_TI1_GPIO                         0x00000000U                               /* !< TIM17 TI1 is connected to GPIO */
233 #define TIM_TIM17_TI1_SPDIFRX_FS                   TIM_TISEL_TI1SEL_0                        /* !< TIM17 TI1 is connected to SPDIF FS */
234 #define TIM_TIM17_TI1_RCC_HSE_RTC                  TIM_TISEL_TI1SEL_1                        /* !< TIM17 TI1 is connected to RCC HSE RTC */
235 #define TIM_TIM17_TI1_RCC_MCO1                     (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM17 TI1 is connected to RCC MCO1 */
236 /**
237   * @}
238   */
239 
240 /**
241   * @}
242   */
243 /* End of exported constants -------------------------------------------------*/
244 
245 /* Exported macro ------------------------------------------------------------*/
246 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
247   * @{
248   */
249 
250 /**
251   * @}
252   */
253 /* End of exported macro -----------------------------------------------------*/
254 
255 /* Private macro -------------------------------------------------------------*/
256 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
257   * @{
258   */
259 #define IS_TIM_REMAP(__REMAP__) ((((__REMAP__) & 0xFFFC3FFFU) == 0x00000000U))
260 
261 #define IS_TIM_BREAKINPUT(__BREAKINPUT__)  (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK)  || \
262                                             ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
263 
264 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__)  ((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN)
265 
266 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__)  (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE)  || \
267                                                    ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
268 
269 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__)  (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW)  || \
270                                                          ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
271 
272 #define IS_TIM_TISEL(__TISEL__) ((((__TISEL__) & 0xF0F0F0F0U) == 0x00000000U))
273 
274 
275 /**
276   * @}
277   */
278 /* End of private macro ------------------------------------------------------*/
279 
280 /* Exported functions --------------------------------------------------------*/
281 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
282   * @{
283   */
284 
285 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
286   *  @brief    Timer Hall Sensor functions
287   * @{
288   */
289 /*  Timer Hall Sensor functions  **********************************************/
290 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig);
291 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
292 
293 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
294 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
295 
296 /* Blocking mode: Polling */
297 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
298 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
299 /* Non-Blocking mode: Interrupt */
300 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
301 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
302 /* Non-Blocking mode: DMA */
303 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
304 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
305 /**
306   * @}
307   */
308 
309 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
310   *  @brief   Timer Complementary Output Compare functions
311   * @{
312   */
313 /*  Timer Complementary Output Compare functions  *****************************/
314 /* Blocking mode: Polling */
315 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
316 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
317 
318 /* Non-Blocking mode: Interrupt */
319 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
320 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
321 
322 /* Non-Blocking mode: DMA */
323 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
324 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
325 /**
326   * @}
327   */
328 
329 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
330   *  @brief    Timer Complementary PWM functions
331   * @{
332   */
333 /*  Timer Complementary PWM functions  ****************************************/
334 /* Blocking mode: Polling */
335 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
336 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
337 
338 /* Non-Blocking mode: Interrupt */
339 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
340 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
341 /* Non-Blocking mode: DMA */
342 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
343 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
344 /**
345   * @}
346   */
347 
348 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
349   *  @brief    Timer Complementary One Pulse functions
350   * @{
351   */
352 /*  Timer Complementary One Pulse functions  **********************************/
353 /* Blocking mode: Polling */
354 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
355 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
356 
357 /* Non-Blocking mode: Interrupt */
358 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
359 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
360 /**
361   * @}
362   */
363 
364 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
365   *  @brief    Peripheral Control functions
366   * @{
367   */
368 /* Extended Control functions  ************************************************/
369 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
370                                               uint32_t  CommutationSource);
371 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
372                                                  uint32_t  CommutationSource);
373 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger,
374                                                   uint32_t  CommutationSource);
375 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
376                                                         TIM_MasterConfigTypeDef *sMasterConfig);
377 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
378                                                 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
379 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
380                                              TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
381 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
382 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
383 HAL_StatusTypeDef  HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);
384 
385 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
386 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
387 /**
388   * @}
389   */
390 
391 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
392   * @brief    Extended Callbacks functions
393   * @{
394   */
395 /* Extended Callback **********************************************************/
396 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
397 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
398 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
399 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
400 /**
401   * @}
402   */
403 
404 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
405   * @brief    Extended Peripheral State functions
406   * @{
407   */
408 /* Extended Peripheral State functions  ***************************************/
409 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
410 /**
411   * @}
412   */
413 
414 /**
415   * @}
416   */
417 /* End of exported functions -------------------------------------------------*/
418 
419 /* Private functions----------------------------------------------------------*/
420 /** @addtogroup TIMEx_Private_Functions TIMEx Private Functions
421   * @{
422   */
423 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
424 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
425 /**
426   * @}
427   */
428 /* End of private functions --------------------------------------------------*/
429 
430 /**
431   * @}
432   */
433 
434 /**
435   * @}
436   */
437 
438 #ifdef __cplusplus
439 }
440 #endif
441 
442 
443 #endif /* STM32MP1xx_HAL_TIM_EX_H */
444 
445 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
446