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Searched defs:__STATE__ (Results 1 – 13 of 13) sorted by relevance

/device/soc/goodix/gr551x/sdk_liteos/gr551x_sdk/drivers/inc/
Dgr55xx_hal_cortex.h336 #define IS_MPU_REGION_ENABLE(__STATE__) (((__STATE__) == MPU_REGION_ENABLE) || \ argument
344 #define IS_MPU_INSTRUCTION_ACCESS(__STATE__) (((__STATE__) == MPU_INSTRUCTION_ACCESS_ENABLE) || \ argument
352 #define IS_MPU_ACCESS_SHAREABLE(__STATE__) (((__STATE__) == MPU_ACCESS_SHAREABLE) || \ argument
360 #define IS_MPU_ACCESS_CACHEABLE(__STATE__) (((__STATE__) == MPU_ACCESS_CACHEABLE) || \ argument
368 #define IS_MPU_ACCESS_BUFFERABLE(__STATE__) (((__STATE__) == MPU_ACCESS_BUFFERABLE) || \ argument
Dgr55xx_hal_pwr.h251 #define IS_PWR_MEM_POWER_STAT(__STATE__) (((__STATE__) == PWR_MEM_POWER_OFF) || \ argument
260 #define IS_PWR_COMM_TIMER_POWER_STAT(__STATE__) (((__STATE__) == PWR_COMM_TIMER_POWER_DOWN) || \ argument
268 #define IS_PWR_COMM_CORE_POWER_STAT(__STATE__) (((__STATE__) == PWR_COMM_CORE_POWER_DOWN) || \ argument
/device/soc/st/common/platform/stm32mp1xx_hal/STM32MP1xx_HAL_Driver/Inc/
Dstm32mp1xx_hal_usart_ex.h194 #define IS_USART_SLAVEMODE(__STATE__) (((__STATE__) == USART_SLAVEMODE_DISABLE ) || \ argument
202 #define IS_USART_FIFO_MODE_STATE(__STATE__) (((__STATE__) == USART_FIFOMODE_DISABLE ) || \ argument
Dstm32mp1xx_hal_rtc_ex.h1520 #define IS_RTC_TAMPER_MASKFLAG_STATE(__STATE__) (((__STATE__) == RTC_TAMPERMASK_FLAG_ENABLE) || \ argument
1542 #define IS_RTC_TAMPER_PULLUP_STATE(__STATE__) (((__STATE__) == RTC_TAMPER_PULLUP_ENABLE) || \ argument
1558 #define IS_RTC_SECURE_FULL(__STATE__) (((__STATE__) == RTC_SECURE_FULL_YES) || \ argument
1563 #define IS_TAMP_SECURE_FULL(__STATE__) (((__STATE__) == TAMP_SECURE_FULL_YES) || \ argument
1566 #define IS_RTC_PRIVILEGE_FULL(__STATE__) (((__STATE__) == RTC_PRIVILEGE_FULL_YES) || \ argument
1571 #define IS_TAMP_PRIVILEGE_FULL(__STATE__) (((__STATE__) == TAMP_PRIVILEGE_FULL_YES) || \ argument
Dstm32mp1xx_hal_tim.h1690 #define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \ argument
1699 #define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) || \ argument
1702 #define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) || \ argument
1776 #define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) || \ argument
1779 #define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) || \ argument
1790 #define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \ argument
1800 #define IS_TIM_BREAK2_STATE(__STATE__) (((__STATE__) == TIM_BREAK2_ENABLE) || \ argument
1810 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \ argument
1842 #define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \ argument
Dstm32mp1xx_hal_tim_ex.h266 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) |… argument
Dstm32mp1xx_hal_uart.h1256 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ argument
Dstm32mp1xx_hal_rcc.h3028 #define __HAL_RCC_HSE_CONFIG(__STATE__) HAL_RCC_HSEConfig(__STATE__) argument
3063 #define __HAL_RCC_LSE_CONFIG(__STATE__) HAL_RCC_LSEConfig(__STATE__) argument
/device/soc/st/stm32f4xx/sdk/Drivers/STM32F4xx_HAL_Driver/Inc/
Dstm32f4xx_hal_tim.h1589 #define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \ argument
1598 #define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) || \ argument
1601 #define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) || \ argument
1676 #define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) || \ argument
1679 #define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) || \ argument
1690 #define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \ argument
1696 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \ argument
1708 #define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \ argument
Dstm32f4xx_ll_fsmc.h877 #define IS_FSMC_BURSTMODE(__STATE__) (((__STATE__) == FSMC_BURST_ACCESS_MODE_DISABLE) || \ argument
898 #define IS_FSMC_ASYNWAIT(__STATE__) (((__STATE__) == FSMC_ASYNCHRONOUS_WAIT_DISABLE) || \ argument
Dstm32f4xx_hal_rcc.h895 #define __HAL_RCC_HSE_CONFIG(__STATE__) \ argument
938 #define __HAL_RCC_LSE_CONFIG(__STATE__) \ argument
Dstm32f4xx_ll_fmc.h1142 #define IS_FMC_BURSTMODE(__STATE__) (((__STATE__) == FMC_BURST_ACCESS_MODE_DISABLE) || \ argument
1165 #define IS_FMC_ASYNWAIT(__STATE__) (((__STATE__) == FMC_ASYNCHRONOUS_WAIT_DISABLE) || \ argument
/device/soc/st/stm32f4xx/sdk/Drivers/STM32F4xx_HAL_Driver/Src/
Dstm32f4xx_ll_utils.c222 #define IS_LL_UTILS_HSE_BYPASS(__STATE__) (((__STATE__) == LL_UTILS_HSEBYPASS_ON) \ argument