1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #include <common/bk_err.h> 22 23 #define BK_ERR_DMA_HAL_INVALID_ADDR (BK_ERR_DMA_HAL_BASE - 1) 24 25 /** 26 * @brief DMA defines 27 * @addtogroup bk_api_dma_defs DMA API group 28 * @{ 29 */ 30 31 typedef uint8_t dma_unit_t; /**< DMA uint id */ 32 typedef uint8_t dma_chan_priority_t; /**< DMA channel priority */ 33 34 /** 35 * @} 36 */ 37 38 /** 39 * @brief DMA enum defines 40 * @defgroup bk_api_dma_enum DMA enums 41 * @ingroup bk_api_dma 42 * @{ 43 */ 44 45 typedef enum { 46 DMA_ID_0 = 0, /**< DMA channel 0 */ 47 DMA_ID_1, /**< DMA channel 1 */ 48 DMA_ID_2, /**< DMA channel 2 */ 49 DMA_ID_3, /**< DMA channel 3 */ 50 DMA_ID_4, /**< DMA channel 4 */ 51 DMA_ID_5, /**< DMA channel 5 */ 52 DMA_ID_6 , /**< DMA channel 6 */ 53 DMA_ID_7, /**< DMA channel 7 */ 54 DMA_ID_8, /**< DMA channel 8 */ 55 DMA_ID_9, /**< DMA channel 9 */ 56 DMA_ID_10, /**< DMA channel 10 */ 57 DMA_ID_11, /**< DMA channel 11 */ 58 DMA_ID_MAX, /**< DMA channel max */ 59 } dma_id_t; 60 61 typedef enum { 62 DMA_DEV_DTCM = 0, /**< DMA device DTCM */ 63 DMA_DEV_LA, /**< DMA device LA */ 64 DMA_DEV_HSSPI, /**< DMA device HSSPI */ 65 DMA_DEV_AUDIO, /**< DMA device AUDIO */ 66 DMA_DEV_SDIO, /**< DMA device SDIO */ 67 DMA_DEV_UART1, /**< DMA device UART1 */ 68 DMA_DEV_UART2, /**< DMA device UART2 */ 69 DMA_DEV_UART3, /**< DMA device UART3 */ 70 DMA_DEV_I2S, /**< DMA device I2S */ 71 DMA_DEV_GSPI0, /**< DMA device GSPI1 */ 72 DMA_DEV_GSPI1, /**< DMA device GSPI2 */ 73 DMA_DEV_GSPI2, /**< DMA device GSPI3 */ 74 DMA_DEV_JPEG, /**< DMA device JPEG */ 75 DMA_DEV_PSRAM_VIDEO, /**< DMA device PSRAM VIDEO */ 76 DMA_DEV_PSRAM_AUDIO, /**< DMA device PSRAM AUDIO */ 77 DMA_DEV_USB, /**< DMA device USB */ 78 DMA_DEV_LCD_CMD, /**< DMA device LCD CMD */ 79 DMA_DEV_LCD_DATA, /**< DMA device LCD DATA */ 80 DMA_DEV_MAX, 81 } dma_dev_t; 82 83 typedef enum { 84 DMA_DATA_WIDTH_8BITS = 0, /**< DMA data width 8bit */ 85 DMA_DATA_WIDTH_16BITS, /**< DMA data width 16bit */ 86 DMA_DATA_WIDTH_32BITS, /**< DMA data width 32bit */ 87 } dma_data_width_t; 88 89 typedef enum { 90 DMA_WORK_MODE_SINGLE = 0, /**< DMA work mode single_mode */ 91 DMA_WORK_MODE_REPEAT, /**< DMA work mode repeat_mode (forever repeat until software clear dma_en) */ 92 } dma_work_mode_t; 93 94 typedef enum { 95 DMA_PRIO_MODE_ROUND_ROBIN = 0, /**< DMA priority mode round-robin(all dma priority are the same) */ 96 DMA_PRIO_MODE_FIXED_PRIO, /**< DMA priority mode fixed prio(depend on chan_prio) */ 97 } dma_priority_mode_t; 98 99 typedef enum { 100 DMA_ADDR_INC_DISABLE = 0, /**< DMA disable addrress increase */ 101 DMA_ADDR_INC_ENABLE, /**< DMA enable addrress increase */ 102 } dma_addr_inc_t; 103 104 typedef enum { 105 DMA_ADDR_LOOP_DISABLE = 0, /**< DMA disable addrress loop */ 106 DMA_ADDR_LOOP_ENABLE, /**< DMA enable addrress loop */ 107 } dma_addr_loop_t; 108 109 /** 110 * @} 111 */ 112 113 /** 114 * @brief DMA struct defines 115 * @defgroup bk_api_dma_structs structs in DMA 116 * @ingroup bk_api_dma 117 * @{ 118 */ 119 120 typedef struct { 121 dma_dev_t dev; /**< DMA device */ 122 dma_data_width_t width; /**< DMA data width */ 123 dma_addr_inc_t addr_inc_en; /**< enable/disable DMA address increase */ 124 dma_addr_loop_t addr_loop_en; /**< enable/disable DMA address loop */ 125 uint32_t start_addr; /**< DMA start address */ 126 uint32_t end_addr; /**< DMA end address */ 127 } dma_port_config_t; 128 129 typedef struct { 130 dma_work_mode_t mode; /**< DMA work mode */ 131 dma_chan_priority_t chan_prio; /**< DMA channel prioprity */ 132 dma_port_config_t src; /**< DMA source configuration */ 133 dma_port_config_t dst; /**< DMA dest configuration */ 134 } dma_config_t; 135 136 /** 137 * @} 138 */ 139 140 #ifdef __cplusplus 141 } 142 #endif 143 144