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1 /*
2  * Copyright (c) 2022-2023 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 #ifndef HPM_CLOCK_DRV_H
8 #define HPM_CLOCK_DRV_H
9 
10 #include "hpm_common.h"
11 #include "hpm_sysctl_drv.h"
12 #include "hpm_csr_drv.h"
13 
14 
15 /**
16  * @brief Error codes for clock driver
17  */
18 enum {
19     status_clk_div_invalid = MAKE_STATUS(status_group_clk, 0),
20     status_clk_src_invalid = MAKE_STATUS(status_group_clk, 1),
21     status_clk_invalid = MAKE_STATUS(status_group_clk, 2),
22     status_clk_operation_unsupported = MAKE_STATUS(status_group_clk, 3),
23     status_clk_shared_ahb = MAKE_STATUS(status_group_clk, 4),
24     status_clk_shared_axis = MAKE_STATUS(status_group_clk, 5),
25     status_clk_shared_axic = MAKE_STATUS(status_group_clk, 6),
26     status_clk_shared_axiv = MAKE_STATUS(status_group_clk, 7),
27     status_clk_shared_axif = MAKE_STATUS(status_group_clk, 8),
28     status_clk_shared_axid = MAKE_STATUS(status_group_clk, 9),
29     status_clk_fixed = MAKE_STATUS(status_group_clk, 10),
30 
31 };
32 
33 
34 /**
35  * @brief Clock source group definitions
36  */
37 #define CLK_SRC_GROUP_COMMON            (0U)
38 #define CLK_SRC_GROUP_ADC               (1U)
39 #define CLK_SRC_GROUP_I2S               (2U)
40 #define CLK_SRC_GROUP_WDG               (3U)
41 #define CLK_SRC_GROUP_PWDG              (4U)
42 #define CLK_SRC_GROUP_PMIC              (5U)
43 #define CLK_SRC_GROUP_AXI_SOC           (6U)
44 #define CLK_SRC_GROUP_AXI_FAST          (7U)
45 #define CLK_SRC_GROUP_AXI_VIDEO         (8U)
46 #define CLK_SRC_GROUP_SRC               (9U)
47 #define CLK_SRC_GROUP_INVALID           (15U)
48 
49 #define MAKE_CLK_SRC(src_grp, index) (((uint8_t)(src_grp)<<4) | (index))
50 #define GET_CLK_SRC_GROUP(src) (((uint8_t)(src) >> 4) & 0x0FU)
51 #define GET_CLK_SRC_INDEX(src) ((uint8_t)(src) & 0x0FU)
52 
53 #define GET_CLOCK_SOURCE_FROM_CLK_SRC(clk_src) (clock_source_t)((uint32_t)(clk_src) & 0xFU)
54 
55 /**
56  * @brief Clock source definitions
57  */
58 typedef enum _clock_sources {
59     clk_src_osc24m = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 0),
60     clk_src_pll0_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 1),
61     clk_src_pll1_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 2),
62     clk_src_pll1_clk1 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 3),
63     clk_src_pll2_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 4),
64     clk_src_pll2_clk1 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 5),
65     clk_src_pll3_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 6),
66     clk_src_pll4_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 7),
67     clk_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 8),
68 
69     clk_adc_src_ana0 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 0),
70     clk_adc_src_ana1 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 0),
71     clk_adc_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 1),
72 
73     clk_i2s_src_aud0 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 0),
74     clk_i2s_src_aud1 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 0),
75     clk_i2s_src_aud2 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 0),
76     clk_i2s_src_aud3 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 0),
77     clk_i2s_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 1),
78 
79     clk_wdg_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_WDG, 0),
80     clk_wdg_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_WDG, 1),
81 
82     clk_pwdg_src_osc24m = MAKE_CLK_SRC(CLK_SRC_GROUP_PWDG, 0),
83     clk_pwdg_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_PWDG, 1),
84 
85     clk_src_invalid = MAKE_CLK_SRC(CLK_SRC_GROUP_INVALID, 15),
86 } clk_src_t;
87 
88 
89 #define RESOURCE_INVALID (0xFFFFU)
90 #define RESOURCE_SHARED_AXI_SOC (0xFFFEU)
91 
92 /* Clock NAME related Macros */
93 #define MAKE_CLOCK_NAME(resource, src_type, node) (((uint32_t)(resource) << 16) | ((uint32_t)(src_type) << 8) | ((uint32_t)node))
94 #define GET_CLK_SRC_GROUP_FROM_NAME(name)  (((uint32_t)(name) >> 8) & 0xFFUL)
95 #define GET_CLK_NODE_FROM_NAME(name) ((uint32_t)(name) & 0xFFUL)
96 #define GET_CLK_RESOURCE_FROM_NAME(name) ((uint32_t)(name) >> 16)
97 
98 /**
99  * @brief Peripheral Clock Type Description
100  */
101 typedef enum _clock_name {
102     clock_axif = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_axif),
103     clock_axis = MAKE_CLOCK_NAME(sysctl_resource_axis, CLK_SRC_GROUP_COMMON, clock_node_axis),
104     clock_axic = MAKE_CLOCK_NAME(sysctl_resource_axic, CLK_SRC_GROUP_COMMON, clock_node_axic),
105     clock_axiv = MAKE_CLOCK_NAME(sysctl_resource_axiv, CLK_SRC_GROUP_COMMON, clock_node_axiv),
106     clock_axig = MAKE_CLOCK_NAME(sysctl_resource_axig, CLK_SRC_GROUP_COMMON, clock_node_gpu0),
107     clock_axid = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_axid),
108 
109     /* Software definition for compatibility */
110     clock_ahb = MAKE_CLOCK_NAME(RESOURCE_SHARED_AXI_SOC, CLK_SRC_GROUP_AXI_SOC, clock_node_axis),
111 
112     clock_cpu0 = MAKE_CLOCK_NAME(sysctl_resource_cpu0, CLK_SRC_GROUP_COMMON, clock_node_cpu0),
113     clock_mchtmr0 = MAKE_CLOCK_NAME(sysctl_resource_mchtmr0, CLK_SRC_GROUP_COMMON, clock_node_mchtmr0),
114     clock_gpu0 = MAKE_CLOCK_NAME(sysctl_resource_gpu0, CLK_SRC_GROUP_COMMON, clock_node_gpu0),
115 
116     clock_can0 = MAKE_CLOCK_NAME(sysctl_resource_can0, CLK_SRC_GROUP_COMMON, clock_node_can0),
117     clock_can1 = MAKE_CLOCK_NAME(sysctl_resource_can1, CLK_SRC_GROUP_COMMON, clock_node_can1),
118     clock_can2 = MAKE_CLOCK_NAME(sysctl_resource_can2, CLK_SRC_GROUP_COMMON, clock_node_can2),
119     clock_can3 = MAKE_CLOCK_NAME(sysctl_resource_can3, CLK_SRC_GROUP_COMMON, clock_node_can3),
120     clock_can4 = MAKE_CLOCK_NAME(sysctl_resource_can4, CLK_SRC_GROUP_COMMON, clock_node_can4),
121     clock_can5 = MAKE_CLOCK_NAME(sysctl_resource_can5, CLK_SRC_GROUP_COMMON, clock_node_can5),
122     clock_can6 = MAKE_CLOCK_NAME(sysctl_resource_can6, CLK_SRC_GROUP_COMMON, clock_node_can6),
123     clock_can7 = MAKE_CLOCK_NAME(sysctl_resource_can7, CLK_SRC_GROUP_COMMON, clock_node_can7),
124 
125     clock_lin0 = MAKE_CLOCK_NAME(sysctl_resource_lin0, CLK_SRC_GROUP_COMMON, clock_node_lin0),
126     clock_lin1 = MAKE_CLOCK_NAME(sysctl_resource_lin1, CLK_SRC_GROUP_COMMON, clock_node_lin1),
127     clock_lin2 = MAKE_CLOCK_NAME(sysctl_resource_lin2, CLK_SRC_GROUP_COMMON, clock_node_lin2),
128     clock_lin3 = MAKE_CLOCK_NAME(sysctl_resource_lin3, CLK_SRC_GROUP_COMMON, clock_node_lin3),
129     clock_lin4 = MAKE_CLOCK_NAME(sysctl_resource_lin4, CLK_SRC_GROUP_COMMON, clock_node_lin4),
130     clock_lin5 = MAKE_CLOCK_NAME(sysctl_resource_lin5, CLK_SRC_GROUP_COMMON, clock_node_lin5),
131     clock_lin6 = MAKE_CLOCK_NAME(sysctl_resource_lin6, CLK_SRC_GROUP_COMMON, clock_node_lin6),
132     clock_lin7 = MAKE_CLOCK_NAME(sysctl_resource_lin7, CLK_SRC_GROUP_COMMON, clock_node_lin7),
133 
134     clock_i2c0 = MAKE_CLOCK_NAME(sysctl_resource_i2c0, CLK_SRC_GROUP_COMMON, clock_node_i2c0),
135     clock_i2c1 = MAKE_CLOCK_NAME(sysctl_resource_i2c1, CLK_SRC_GROUP_COMMON, clock_node_i2c1),
136     clock_i2c2 = MAKE_CLOCK_NAME(sysctl_resource_i2c2, CLK_SRC_GROUP_COMMON, clock_node_i2c2),
137     clock_i2c3 = MAKE_CLOCK_NAME(sysctl_resource_i2c3, CLK_SRC_GROUP_COMMON, clock_node_i2c3),
138 
139     clock_spi0 = MAKE_CLOCK_NAME(sysctl_resource_spi0, CLK_SRC_GROUP_COMMON, clock_node_spi0),
140     clock_spi1 = MAKE_CLOCK_NAME(sysctl_resource_spi1, CLK_SRC_GROUP_COMMON, clock_node_spi1),
141     clock_spi2 = MAKE_CLOCK_NAME(sysctl_resource_spi2, CLK_SRC_GROUP_COMMON, clock_node_spi2),
142     clock_spi3 = MAKE_CLOCK_NAME(sysctl_resource_spi3, CLK_SRC_GROUP_COMMON, clock_node_spi3),
143 
144     clock_uart0 = MAKE_CLOCK_NAME(sysctl_resource_uart0, CLK_SRC_GROUP_COMMON, clock_node_uart0),
145     clock_uart1 = MAKE_CLOCK_NAME(sysctl_resource_uart1, CLK_SRC_GROUP_COMMON, clock_node_uart1),
146     clock_uart2 = MAKE_CLOCK_NAME(sysctl_resource_uart2, CLK_SRC_GROUP_COMMON, clock_node_uart2),
147     clock_uart3 = MAKE_CLOCK_NAME(sysctl_resource_uart3, CLK_SRC_GROUP_COMMON, clock_node_uart3),
148     clock_uart4 = MAKE_CLOCK_NAME(sysctl_resource_uart4, CLK_SRC_GROUP_COMMON, clock_node_uart4),
149     clock_uart5 = MAKE_CLOCK_NAME(sysctl_resource_uart5, CLK_SRC_GROUP_COMMON, clock_node_uart5),
150     clock_uart6 = MAKE_CLOCK_NAME(sysctl_resource_uart6, CLK_SRC_GROUP_COMMON, clock_node_uart6),
151     clock_uart7 = MAKE_CLOCK_NAME(sysctl_resource_uart7, CLK_SRC_GROUP_COMMON, clock_node_uart7),
152 
153     clock_gptmr0 = MAKE_CLOCK_NAME(sysctl_resource_gptmr0, CLK_SRC_GROUP_COMMON, clock_node_gptmr0),
154     clock_gptmr1 = MAKE_CLOCK_NAME(sysctl_resource_gptmr1, CLK_SRC_GROUP_COMMON, clock_node_gptmr1),
155     clock_gptmr2 = MAKE_CLOCK_NAME(sysctl_resource_gptmr2, CLK_SRC_GROUP_COMMON, clock_node_gptmr2),
156     clock_gptmr3 = MAKE_CLOCK_NAME(sysctl_resource_gptmr3, CLK_SRC_GROUP_COMMON, clock_node_gptmr3),
157     clock_gptmr4 = MAKE_CLOCK_NAME(sysctl_resource_gptmr4, CLK_SRC_GROUP_COMMON, clock_node_gptmr4),
158     clock_gptmr5 = MAKE_CLOCK_NAME(sysctl_resource_gptmr5, CLK_SRC_GROUP_COMMON, clock_node_gptmr5),
159     clock_gptmr6 = MAKE_CLOCK_NAME(sysctl_resource_gptmr6, CLK_SRC_GROUP_COMMON, clock_node_gptmr6),
160     clock_gptmr7 = MAKE_CLOCK_NAME(sysctl_resource_gptmr7, CLK_SRC_GROUP_COMMON, clock_node_gptmr7),
161 
162     clock_xpi0 = MAKE_CLOCK_NAME(sysctl_resource_xpi0, CLK_SRC_GROUP_COMMON, clock_node_xpi0),
163 
164     clock_xram = MAKE_CLOCK_NAME(sysctl_resource_xram, CLK_SRC_GROUP_COMMON, clock_node_xram),
165     clock_ddr0 = MAKE_CLOCK_NAME(sysctl_resource_ddr0, CLK_SRC_GROUP_AXI_FAST, clock_node_axif),
166 
167     clock_eth0 = MAKE_CLOCK_NAME(sysctl_resource_eth0, CLK_SRC_GROUP_COMMON, clock_node_eth0),
168 
169     clock_ptp0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ptp0),
170 
171     clock_sdxc0 = MAKE_CLOCK_NAME(sysctl_resource_sdc0, CLK_SRC_GROUP_COMMON, clock_node_sdc0),
172     clock_sdxc1 = MAKE_CLOCK_NAME(sysctl_resource_sdc1, CLK_SRC_GROUP_COMMON, clock_node_sdc1),
173 
174     clock_ntm0 = MAKE_CLOCK_NAME(sysctl_resource_ntm0, CLK_SRC_GROUP_COMMON, clock_node_ntm0),
175 
176     clock_ref0 = MAKE_CLOCK_NAME(sysctl_resource_ref0, CLK_SRC_GROUP_COMMON, clock_node_ref0),
177     clock_ref1 = MAKE_CLOCK_NAME(sysctl_resource_ref1, CLK_SRC_GROUP_COMMON, clock_node_ref1),
178 
179     clock_cam0 = MAKE_CLOCK_NAME(sysctl_resource_cam0, CLK_SRC_GROUP_COMMON, clock_node_cam0),
180     clock_cam1 = MAKE_CLOCK_NAME(sysctl_resource_cam1, CLK_SRC_GROUP_COMMON, clock_node_cam1),
181 
182     clock_lcd0 = MAKE_CLOCK_NAME(sysctl_resource_lcd0, CLK_SRC_GROUP_COMMON, clock_node_lcd0),
183     clock_lcd1 = MAKE_CLOCK_NAME(sysctl_resource_lcd1, CLK_SRC_GROUP_COMMON, clock_node_lcd1),
184 
185     clock_csi0 = MAKE_CLOCK_NAME(sysctl_resource_csi0, CLK_SRC_GROUP_COMMON, clock_node_csi0),
186     clock_csi1 = MAKE_CLOCK_NAME(sysctl_resource_csi1, CLK_SRC_GROUP_COMMON, clock_node_csi1),
187     clock_dsi0 = MAKE_CLOCK_NAME(sysctl_resource_dsi0, CLK_SRC_GROUP_AXI_VIDEO, clock_node_invalid),
188     clock_dsi1 = MAKE_CLOCK_NAME(sysctl_resource_dsi1, CLK_SRC_GROUP_AXI_VIDEO, clock_node_invalid),
189 
190     clock_gwc0 = MAKE_CLOCK_NAME(sysctl_resource_gwc0, CLK_SRC_GROUP_AXI_VIDEO, clock_node_invalid),
191     clock_gwc1 = MAKE_CLOCK_NAME(sysctl_resource_gwc1, CLK_SRC_GROUP_AXI_VIDEO, clock_node_invalid),
192 
193     clock_lvb = MAKE_CLOCK_NAME(sysctl_resource_lvb0, CLK_SRC_GROUP_AXI_VIDEO, clock_node_invalid),
194     clock_lcb = MAKE_CLOCK_NAME(sysctl_resource_lcb0, CLK_SRC_GROUP_AXI_VIDEO, clock_node_invalid),
195 
196     clock_ffa = MAKE_CLOCK_NAME(sysctl_resource_ffa0, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
197     clock_tsns = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PMIC, clock_node_invalid),
198 
199     clock_ptpc = MAKE_CLOCK_NAME(sysctl_resource_ptpc, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
200     clock_watchdog0 = MAKE_CLOCK_NAME(sysctl_resource_wdg0, CLK_SRC_GROUP_WDG, 0),    /* 0 - instance */
201     clock_watchdog1 = MAKE_CLOCK_NAME(sysctl_resource_wdg1, CLK_SRC_GROUP_WDG, 1),    /* 1 - instance */
202     clock_puart = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PMIC, clock_node_invalid),
203     clock_pwdg = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PMIC, clock_node_invalid),
204     clock_sdp = MAKE_CLOCK_NAME(sysctl_resource_sdp0, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
205     clock_xdma = MAKE_CLOCK_NAME(sysctl_resource_dma1, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
206     clock_rom = MAKE_CLOCK_NAME(sysctl_resource_rom0, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
207     clock_usb0 = MAKE_CLOCK_NAME(sysctl_resource_usb0, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
208     clock_jpeg = MAKE_CLOCK_NAME(sysctl_resource_jpeg, CLK_SRC_GROUP_AXI_VIDEO, clock_node_invalid),
209     clock_pdma = MAKE_CLOCK_NAME(sysctl_resource_pdma, CLK_SRC_GROUP_AXI_VIDEO, clock_node_invalid),
210     clock_kman = MAKE_CLOCK_NAME(sysctl_resource_kman, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
211     clock_gpio = MAKE_CLOCK_NAME(sysctl_resource_gpio, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
212     clock_mbx0 = MAKE_CLOCK_NAME(sysctl_resource_mbx0, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
213     clock_mbx1 = MAKE_CLOCK_NAME(sysctl_resource_mbx1, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
214     clock_hdma = MAKE_CLOCK_NAME(sysctl_resource_dma0, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
215     clock_rng = MAKE_CLOCK_NAME(sysctl_resource_rng0, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
216     clock_pdm = MAKE_CLOCK_NAME(sysctl_resource_pdm0, CLK_SRC_GROUP_I2S, clock_node_invalid),
217     clock_dao = MAKE_CLOCK_NAME(sysctl_resource_dao0, CLK_SRC_GROUP_I2S, clock_node_invalid),
218     clock_smix = MAKE_CLOCK_NAME(sysctl_resource_smix, CLK_SRC_GROUP_I2S, clock_node_invalid),
219 
220     /* For ADC, there are 2-stage clock source and divider configuration */
221     clock_ana0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana0),
222     clock_ana1 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana1),
223     clock_adc0 = MAKE_CLOCK_NAME(sysctl_resource_adc0, CLK_SRC_GROUP_ADC, 0),    /* 0 - instance */
224     clock_adc1 = MAKE_CLOCK_NAME(sysctl_resource_adc1, CLK_SRC_GROUP_ADC, 1),    /* 1 - instance */
225 
226     clock_crc0 = MAKE_CLOCK_NAME(sysctl_resource_crc0, CLK_SRC_GROUP_AXI_SOC, clock_node_invalid),
227 
228     /* For I2S, there are 2-stage clock source and divider configuration */
229     clock_aud0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_aud0),
230     clock_aud1 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_aud1),
231     clock_aud2 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_aud2),
232     clock_aud3 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_aud3),
233     clock_i2s0 = MAKE_CLOCK_NAME(sysctl_resource_i2s0, CLK_SRC_GROUP_I2S, 0),    /* 0 - instance */
234     clock_i2s1 = MAKE_CLOCK_NAME(sysctl_resource_i2s1, CLK_SRC_GROUP_I2S, 1),    /* 1 - instance */
235     clock_i2s2 = MAKE_CLOCK_NAME(sysctl_resource_i2s2, CLK_SRC_GROUP_I2S, 2),    /* 2 - instance */
236     clock_i2s3 = MAKE_CLOCK_NAME(sysctl_resource_i2s3, CLK_SRC_GROUP_I2S, 3),    /* 3 - instance */
237 
238     /* Clock sources */
239     clk_osc0clk0 = MAKE_CLOCK_NAME(sysctl_resource_xtal, CLK_SRC_GROUP_SRC, 0),
240     clk_pll0clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll0, CLK_SRC_GROUP_SRC, 1),
241     clk_pll1clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll1, CLK_SRC_GROUP_SRC, 2),
242     clk_pll1clk1 = MAKE_CLOCK_NAME(sysctl_resource_clk1_pll1, CLK_SRC_GROUP_SRC, 3),
243     clk_pll2clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll2, CLK_SRC_GROUP_SRC, 4),
244     clk_pll2clk1 = MAKE_CLOCK_NAME(sysctl_resource_clk1_pll2, CLK_SRC_GROUP_SRC, 5),
245     clk_pll3clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll3, CLK_SRC_GROUP_SRC, 6),
246     clk_pll4clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll4, CLK_SRC_GROUP_SRC, 7),
247 
248 } clock_name_t;
249 
250 extern uint32_t hpm_core_clock;
251 
252 #ifdef __cplusplus
253 extern "C" {
254 #endif
255 
256 /**
257  * @brief Get specified IP frequency
258  * @param[in] clock_name IP clock name
259  *
260  * @return IP clock frequency in Hz
261  */
262 uint32_t clock_get_frequency(clock_name_t clock_name);
263 
264 
265 /**
266  * @brief Get Clock frequency for selected clock source
267  * @param [in] source clock source
268  * @return clock frequency for selected clock source
269  */
270 uint32_t get_frequency_for_source(clock_source_t source);
271 
272 /**
273  * @brief Get the IP clock source
274  *        Note: This API return the direct clock source
275  * @param [in] clock_name clock name
276  * @return IP clock source
277  */
278 clk_src_t clock_get_source(clock_name_t clock_name);
279 
280 /**
281  * @brief Set ADC clock source
282  * @param[in] clock_name ADC clock name
283  * @param[in] src ADC clock source
284  *
285  * @return #status_success Setting ADC clock source is successful
286  *         #status_clk_invalid Invalid ADC clock
287  *         #status_clk_src_invalid Invalid ADC clock source
288  */
289 hpm_stat_t clock_set_adc_source(clock_name_t clock_name, clk_src_t src);
290 
291 /**
292  * @brief Set I2S clock source
293  * @param[in] clock_name I2S clock name
294  * @param[in] src I2S clock source
295  *
296  * @return #status_success Setting DAC clock source is successful
297  *         #status_clk_invalid Invalid DAC clock
298  *         #status_clk_src_invalid Invalid DAC clock source
299  */
300 hpm_stat_t clock_set_i2s_source(clock_name_t clock_name, clk_src_t src);
301 
302 /**
303  * @brief Set the IP clock source and divider
304  * @param[in] clock_name clock name
305  * @param[in] src clock source
306  * @param[in] div clock divider, valid range (1 - 256)
307  *
308  * @return #status_success Setting Clock source and divider is successful.
309  *         #status_clk_src_invalid clock source is invalid.
310  *         #status_clk_fixed clock source and divider is a fixed value
311  *         #status_clk_shared_ahb Clock is shared with the AHB clock
312  *         #status_clk_shared_axis Clock is shared with the AXI_SOC clock
313  *         #status_clk_shared_axic CLock is shared with the AXI_CONNECTIVITY clock
314  *         #status_clk_shared_axiv Clock is shared with the AXI_VIDEO clock
315  *         #status_clk_shared_axif Clock is shared with the AXI_FAST clock
316  *         #status_clk_shared_axid Clock is shared with the AXI_DISPLAY clock
317  */
318 hpm_stat_t clock_set_source_divider(clock_name_t clock_name, clk_src_t src, uint32_t div);
319 
320 /**
321  * @brief Enable IP clock
322  * @param[in] clock_name IP clock name
323  */
324 void clock_enable(clock_name_t clock_name);
325 
326 /**
327  * @brief Disable IP clock
328  * @param[in] clock_name IP clock name
329  */
330 void clock_disable(clock_name_t clock_name);
331 
332 /**
333  * @brief Add IP to specified group
334  * @param[in] clock_name IP clock name
335  * @param[in] group resource group index, valid value: 0/1/2/3
336  */
337 void clock_add_to_group(clock_name_t clock_name, uint32_t group);
338 
339 /**
340  * @brief Remove IP from specified group
341  * @param[in] clock_name IP clock name
342  * @param[in] group resource group index, valid value: 0/1/2/3
343  */
344 void clock_remove_from_group(clock_name_t clock_name, uint32_t group);
345 
346 /**
347  * @brief Check IP in specified group
348  * @param[in] clock_name IP clock name
349  * @return true if in group, false if not in group
350  */
351 bool clock_check_in_group(clock_name_t clock_name, uint32_t group);
352 
353 /**
354  * @brief Disconnect the clock group from specified CPU
355  * @param[in] group clock group index, value value is 0/1/2/3
356  * @param[in] cpu CPU index, valid value is 0/1
357  */
358 void clock_connect_group_to_cpu(uint32_t group, uint32_t cpu);
359 
360 /**
361  * @brief Disconnect the clock group from specified CPU
362  * @param[in] group clock group index, value value is 0/1/2/3
363  * @param[in] cpu CPU index, valid value is 0/1
364  */
365 void clock_disconnect_group_from_cpu(uint32_t group, uint32_t cpu);
366 
367 /**
368  * @brief Delay specified microseconds
369  *
370  * @param [in] us expected delay interval in microseconds
371  */
372 void clock_cpu_delay_us(uint32_t us);
373 
374 /**
375  * @brief Delay specified milliseconds
376  *
377  * @param [in] ms expected delay interval in milliseconds
378  */
379 void clock_cpu_delay_ms(uint32_t ms);
380 
381 /**
382  * @brief Update the Core clock frequency
383  */
384 void clock_update_core_clock(void);
385 
386 
387 #ifdef __cplusplus
388 }
389 #endif
390 
391 #endif /* HPM_CLOCK_DRV_H */
392