1 /*
2 * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19 #include "cryp_symc.h"
20 #include "drv_osal_lib.h"
21 #include "drv_symc.h"
22 #include "ext_alg.h"
23 #include "securec.h"
24
25
26 /* ************************** Internal Structure Definition ****************** */
27 /* AES set IV for first package */
28 #define SYMC_IV_USAGE_ONE_PKG 1
29
30 /* AES set IV for first package */
31 #define SYMC_IV_USAGE_ALL_PKG 2
32
33 /* SYMC interrupt level (1UL) */
34 #define SYMC_INT_LEVEL (SYMC_MAX_LIST_NUM - 15)
35
36 /* Length of SYMC ccm q */
37 #define SYMC_CCM_Q_LEN_2B 2
38 #define SYMC_CCM_Q_LEN_3B 3
39 #define SYMC_CCM_Q_LEN_4B 4
40
41 /* Length of SYMC ccm P */
42 #define SYMC_CCM_P_LEN_2B 0xFFFF
43 #define SYMC_CCM_P_LEN_3B 0xFFFFFF
44
45 /* length range of aead */
46 #define AES_CCM_MIN_IV_LEN 7
47 #define AES_CCM_MAX_IV_LEN 13
48 #define AES_CCM_NQ_LEN 14
49 #define AES_CCM_MIN_TAG_LEN 4
50 #define AES_CCM_MAX_TAG_LEN 16
51 #define AES_GCM_MIN_IV_LEN 1
52 #define AES_GCM_MAX_IV_LEN 16
53 #define AES_GCM_MIN_TAG_LEN 1
54 #define AES_GCM_MAX_TAG_LEN 16
55 #define AAD_EXIST 1
56 #define AAD_NOT_EXIST 0
57 #define N_AND_Q_VAL 15
58
59 /* Multi nodes added status, finished or finished */
60 #define SYMC_NODES_ADD_FINISHED 0x0a0a0a0a
61 #define SYMC_NODES_ADD_NOTFINISHED 0x05050505
62
63 /* The max tab size of symc function */
64 #define SYMC_FUNC_TAB_SIZE (SYMC_ALG_COUNT * SYMC_MODE_COUNT)
65
66 /* symc function list */
67 static symc_func g_symc_descriptor[SYMC_FUNC_TAB_SIZE];
68
69 /* symc context */
70 static cryp_symc_context g_symc_context[CRYPTO_HARD_CHANNEL_MAX];
71
72 /* symc function register */
73 static hi_void cryp_register_all_symc(hi_void);
74
75 #ifdef CHIP_AES_CCM_GCM_SUPPORT
76 static hi_u32 cyp_aead_gcm_clen(hi_u8 *buf, hi_u32 buf_len, hi_u32 alen, hi_u32 enclen);
77 #endif
78
cryp_symc_init(hi_void)79 hi_s32 cryp_symc_init(hi_void)
80 {
81 hi_s32 ret;
82
83 hi_log_func_enter();
84
85 (hi_void)memset_s(g_symc_descriptor, sizeof(g_symc_descriptor), 0, sizeof(g_symc_descriptor));
86
87 ret = drv_symc_init();
88 if (ret != HI_SUCCESS) {
89 hi_log_print_func_err(drv_symc_init, ret);
90 return ret;
91 }
92
93 cryp_register_all_symc();
94
95 hi_log_func_exit();
96 return HI_SUCCESS;
97 }
98
cryp_symc_deinit(hi_void)99 hi_void cryp_symc_deinit(hi_void)
100 {
101 hi_log_func_enter();
102
103 drv_symc_deinit();
104
105 hi_log_func_exit();
106 return;
107 }
108
cryp_symc_alloc_chn(hi_u32 * hard_chn)109 hi_s32 cryp_symc_alloc_chn(hi_u32 *hard_chn)
110 {
111 hi_s32 ret;
112 hi_u32 key[SYMC_KEY_MAX_SIZE_IN_WORD] = {0, 1, 2, 3, 4, 5, 6, 7};
113 hi_u32 sm1_key[SYMC_SM1_SK_SIZE_IN_WORD] = {0, 1, 2, 3};
114
115 hi_log_func_enter();
116
117 /* allocate a aes hard key channel */
118 ret = drv_symc_alloc_chn(hard_chn);
119 if (ret != HI_SUCCESS) {
120 hi_log_print_func_err(drv_symc_alloc_chn, ret);
121 return ret;
122 }
123
124 /* Set a fake key to clear the true key. */
125 drv_symc_set_key(*hard_chn, key, sizeof(key), HI_FALSE);
126 drv_symc_set_sm1_sk(*hard_chn, sm1_key, sizeof(sm1_key));
127
128 hi_log_func_exit();
129 return HI_SUCCESS;
130 }
131
cryp_symc_free_chn(hi_u32 hard_chn)132 hi_void cryp_symc_free_chn(hi_u32 hard_chn)
133 {
134 hi_log_func_enter();
135
136 drv_symc_free_chn(hard_chn);
137
138 hi_log_func_exit();
139 }
140
cryp_symc_create(hi_u32 hard_chn)141 static hi_void *cryp_symc_create(hi_u32 hard_chn)
142 {
143 cryp_symc_context *hisi_ctx = HI_NULL;
144
145 hi_log_func_enter();
146
147 if (hard_chn >= CRYPTO_HARD_CHANNEL_MAX) {
148 hi_log_error("invalid hard channel %u\n", hard_chn);
149 return HI_NULL;
150 }
151
152 hisi_ctx = &g_symc_context[hard_chn];
153 (hi_void)memset_s(hisi_ctx, sizeof(cryp_symc_context), 0, sizeof(cryp_symc_context));
154 hisi_ctx->hard_key = HI_FALSE;
155 hisi_ctx->hard_chn = hard_chn;
156
157 hi_log_func_exit();
158 return hisi_ctx;
159 }
160
cryp_symc_setkey(hi_void * ctx,const hi_u8 * key,hi_u32 keylen,hi_u32 odd)161 static hi_void cryp_symc_setkey(hi_void *ctx, const hi_u8 *key, hi_u32 keylen, hi_u32 odd)
162 {
163 hi_s32 ret;
164 cryp_symc_context *hisi_ctx = ctx;
165
166 hi_log_func_enter();
167
168 if (hisi_ctx == HI_NULL) {
169 hi_log_error("Invalid point.\n");
170 return;
171 }
172
173 if (odd) {
174 ret = memcpy_s(hisi_ctx->odd_key, SYMC_KEY_SIZE, key, keylen);
175 } else {
176 ret = memcpy_s(hisi_ctx->even_key, SYMC_KEY_SIZE, key, keylen);
177 }
178 if (ret != EOK) {
179 hi_log_print_func_err(memcpy_s, HI_ERR_CIPHER_MEMCPY_S_FAILED);
180 return;
181 }
182
183 hisi_ctx->klen = keylen;
184
185 hi_log_func_exit();
186 return;
187 }
188
cryp_symc_setiv(hi_void * ctx,const hi_u8 * iv,hi_u32 ivlen,hi_u32 usage)189 static hi_void cryp_symc_setiv(hi_void *ctx, const hi_u8 *iv, hi_u32 ivlen, hi_u32 usage)
190 {
191 cryp_symc_context *hisi_ctx = ctx;
192
193 hi_log_func_enter();
194
195 if (hisi_ctx == HI_NULL) {
196 hi_log_error("Invalid point.\n");
197 return;
198 }
199
200 if (iv == HI_NULL) {
201 if (ivlen != 0) {
202 hi_log_error("Invalid iv len(%u), iv is null.\n", ivlen);
203 }
204 return;
205 }
206
207 if (memcpy_s(hisi_ctx->iv, AES_IV_SIZE, iv, ivlen) != EOK) {
208 hi_log_print_func_err(memcpy_s, HI_ERR_CIPHER_MEMCPY_S_FAILED);
209 return;
210 }
211 hisi_ctx->iv_usage = usage;
212 hisi_ctx->ivlen = ivlen;
213
214 hi_log_func_exit();
215 return;
216 }
217
cryp_symc_getiv(const hi_void * ctx,hi_u8 * iv,hi_u32 * ivlen)218 static hi_void cryp_symc_getiv(const hi_void *ctx, hi_u8 *iv, hi_u32 *ivlen)
219 {
220 const cryp_symc_context *hisi_ctx = ctx;
221
222 hi_log_func_enter();
223
224 if (hisi_ctx == HI_NULL) {
225 hi_log_error("Invalid point.\n");
226 return;
227 }
228 if (memcpy_s(iv, AES_IV_SIZE, hisi_ctx->iv, hisi_ctx->ivlen) != EOK) {
229 hi_log_print_func_err(memcpy_s, HI_ERR_CIPHER_MEMCPY_S_FAILED);
230 return;
231 }
232 *ivlen = hisi_ctx->ivlen;
233
234 hi_log_func_exit();
235 return;
236 }
237
cryp_symc_setmode(hi_void * ctx,symc_alg alg,symc_mode mode,symc_width width)238 static hi_void cryp_symc_setmode(hi_void *ctx, symc_alg alg, symc_mode mode, symc_width width)
239 {
240 cryp_symc_context *hisi_ctx = ctx;
241
242 hi_log_func_enter();
243
244 if (hisi_ctx == HI_NULL) {
245 hi_log_error("Invalid point.\n");
246 return;
247 }
248 hisi_ctx->mode = mode;
249 hisi_ctx->alg = alg;
250 hisi_ctx->width = width;
251
252 hi_log_func_exit();
253 return;
254 }
255
cryp_3des2dma_setmode(hi_void * ctx,symc_alg alg,symc_mode mode,symc_width width)256 static hi_void cryp_3des2dma_setmode(hi_void *ctx, symc_alg alg, symc_mode mode, symc_width width)
257 {
258 cryp_symc_context *hisi_ctx = ctx;
259
260 hi_log_func_enter();
261
262 if (hisi_ctx == HI_NULL) {
263 hi_log_error("Invalid point.\n");
264 return;
265 }
266
267 crypto_unused(alg);
268 crypto_unused(mode);
269 crypto_unused(width);
270
271 hisi_ctx->mode = SYMC_MODE_ECB;
272 hisi_ctx->alg = SYMC_ALG_TDES;
273 hisi_ctx->width = SYMC_DAT_WIDTH_64;
274
275 hi_log_func_exit();
276 return;
277 }
278
cryp_symc_sm1_setsk(hi_void * ctx,const hi_u8 * key)279 static hi_s32 cryp_symc_sm1_setsk(hi_void *ctx, const hi_u8 *key)
280 {
281 cryp_symc_context *hisi_ctx = ctx;
282
283 hi_log_func_enter();
284 hi_log_chk_param_return(hisi_ctx == HI_NULL);
285
286 if (memcpy_s(hisi_ctx->sk, sizeof(hisi_ctx->sk), key, SYMC_SM1_SK_SIZE) != EOK) {
287 hi_log_print_func_err(memcpy_s, HI_ERR_CIPHER_MEMCPY_S_FAILED);
288 return HI_ERR_CIPHER_MEMCPY_S_FAILED;
289 }
290
291 hi_log_func_exit();
292 return HI_SUCCESS;
293 }
294
cryp_symc_sm1_setround(hi_void * ctx,hi_u32 round)295 static hi_s32 cryp_symc_sm1_setround(hi_void *ctx, hi_u32 round)
296 {
297 cryp_symc_context *hisi_ctx = ctx;
298
299 hi_log_func_enter();
300 hi_log_chk_param_return(hisi_ctx == HI_NULL);
301
302 hisi_ctx->sm1_round = round;
303
304 hi_log_func_exit();
305 return HI_SUCCESS;
306 }
307
symc_add_buf(const cryp_symc_context * ctx,symc_node_usage out_usage)308 static hi_s32 symc_add_buf(const cryp_symc_context *ctx, symc_node_usage out_usage)
309 {
310 hi_s32 ret;
311 hi_u32 cur = ctx->cur_nodes;
312
313 hi_log_func_enter();
314
315 /* Add P in. */
316 ret = drv_symc_add_inbuf(ctx->hard_chn,
317 ctx->input_list[cur],
318 ctx->length_list[cur],
319 ctx->usage_list[cur]);
320 if (ret != HI_SUCCESS) {
321 hi_log_print_func_err(drv_symc_add_inbuf, ret);
322 return ret;
323 }
324
325 /* Add P out, only need the last flag. */
326 ret = drv_symc_add_outbuf(ctx->hard_chn,
327 ctx->output_list[cur],
328 ctx->length_list[cur],
329 out_usage);
330 if (ret != HI_SUCCESS) {
331 hi_log_print_func_err(drv_symc_add_outbuf, ret);
332 return ret;
333 }
334
335 hi_log_func_exit();
336
337 return ret;
338 }
339
symc_get_out_usage(symc_mode mode,hi_u32 cur_node,hi_u32 total_node)340 static symc_node_usage symc_get_out_usage(symc_mode mode, hi_u32 cur_node, hi_u32 total_node)
341 {
342 symc_node_usage usage = SYMC_NODE_USAGE_NORMAL;
343
344 if ((mode != SYMC_MODE_GCM) && ((cur_node + 1) == total_node)) {
345 usage = SYMC_NODE_USAGE_LAST;
346 }
347
348 return usage;
349 }
350
symc_add_next_node(cryp_symc_context * ctx,hi_u32 * total,symc_node_usage usage)351 static hi_s32 symc_add_next_node(cryp_symc_context *ctx, hi_u32 *total, symc_node_usage usage)
352 {
353 hi_s32 ret;
354 hi_u32 cur, total_len;
355
356 total_len = *total;
357 total_len %= ctx->block_size;
358 /* Compute the tail length. */
359 if (total_len > 0) {
360 total_len = ctx->block_size - total_len;
361 }
362
363 /* if the total length don't aligned with block size, split joint the follow nodes. */
364 while ((total_len > 0) && (ctx->cur_nodes < ctx->total_nodes)) {
365 cur = ctx->cur_nodes;
366
367 /* The next node large than tail size, just split it to 2 nodes. */
368 if (ctx->length_list[cur] > total_len) {
369 /* Add P in. */
370 ret = drv_symc_add_inbuf(ctx->hard_chn, ctx->input_list[cur], total_len, ctx->usage_list[cur]);
371 if (ret != HI_SUCCESS) {
372 hi_log_print_func_err(drv_symc_add_inbuf, ret);
373 return ret;
374 }
375
376 /* Add P out. */
377 usage = symc_get_out_usage(ctx->mode, cur, ctx->total_nodes);
378 ret = drv_symc_add_outbuf(ctx->hard_chn, ctx->output_list[cur], total_len, usage);
379 if (ret != HI_SUCCESS) {
380 hi_log_print_func_err(drv_symc_add_outbuf, ret);
381 return ret;
382 }
383
384 /* Let next node skip the tail size. */
385 addr_u64(ctx->input_list[cur]) += total_len;
386 addr_u64(ctx->output_list[cur]) += total_len;
387 ctx->length_list[cur] -= total_len;
388 total_len = 0;
389 } else {
390 /* The next node less than tail size, add it to nodes list. */
391 usage = symc_get_out_usage(ctx->mode, cur, ctx->total_nodes);
392 ret = symc_add_buf(ctx, usage); /* Add one node. */
393 if (ret != HI_SUCCESS) {
394 hi_log_print_func_err(symc_add_buf, ret);
395 return ret;
396 }
397
398 /* re-compute the tail size. */
399 total_len -= ctx->length_list[cur];
400
401 /* Process next node. */
402 ctx->cur_nodes++;
403 }
404 }
405
406 *total = total_len;
407 return HI_SUCCESS;
408 }
409
symc_add_buf_list(hi_void * ctx)410 static hi_s32 symc_add_buf_list(hi_void *ctx)
411 {
412 hi_s32 ret;
413 hi_u32 i, nodes, cur, total_len;
414 cryp_symc_context *hisi_ctx = ctx;
415 symc_node_usage usage;
416
417 hi_log_func_enter();
418
419 /* compute finished. */
420 if (hisi_ctx->cur_nodes == hisi_ctx->total_nodes) {
421 hi_log_func_exit();
422 return SYMC_NODES_ADD_FINISHED;
423 }
424
425 /* compute not finished.
426 * select the minimum numbers of nodes to calculate.
427 */
428 nodes = crypto_min(SYMC_INT_LEVEL, hisi_ctx->total_nodes - hisi_ctx->cur_nodes);
429 total_len = 0;
430
431 for (i = 0; i < nodes; i++) {
432 cur = hisi_ctx->cur_nodes;
433 usage = symc_get_out_usage(hisi_ctx->mode, cur, hisi_ctx->total_nodes);
434
435 /* Add one node. */
436 ret = symc_add_buf(hisi_ctx, usage);
437 if (ret != HI_SUCCESS) {
438 hi_log_print_func_err(symc_add_buf, ret);
439 return ret;
440 }
441
442 total_len += hisi_ctx->length_list[cur];
443 hisi_ctx->cur_nodes++;
444 }
445
446 /* For each compute, the total length of valid nodes list
447 * must aligned with block size, otherwise can't recv interrupt,
448 * which limit to hardware devising.
449 */
450 ret = symc_add_next_node(hisi_ctx, &total_len, usage);
451 if (ret != HI_SUCCESS) {
452 hi_log_print_func_err(symc_add_next_node, ret);
453 return ret;
454 }
455
456 #ifdef CHIP_AES_CCM_GCM_SUPPORT
457 /* gcm add nodes finished ? */
458 if ((hisi_ctx->mode == SYMC_MODE_GCM) && (hisi_ctx->cur_nodes == hisi_ctx->total_nodes)) {
459 hi_u8 clen[AES_BLOCK_SIZE];
460 compat_addr addr_null;
461
462 /* At the and of GCM, must add an empty node to nodes list,
463 * limit to hardware devising
464 */
465 (hi_void)memset_s(&addr_null, sizeof(addr_null), 0, sizeof(addr_null));
466 drv_symc_add_outbuf(hisi_ctx->hard_chn, addr_null, 0x00, SYMC_NODE_USAGE_LAST);
467 /* Format the length fields of C and add to nodes list. */
468 cyp_aead_gcm_clen(clen, sizeof(clen), hisi_ctx->alen, hisi_ctx->enclen);
469 drv_aead_gcm_add_clen(hisi_ctx->hard_chn, clen, sizeof(clen));
470 }
471 #endif
472
473 hi_log_func_exit();
474 return SYMC_NODES_ADD_NOTFINISHED;
475 }
476
cryp_symc_key_type(symc_alg alg,hi_u32 klen)477 static symc_klen cryp_symc_key_type(symc_alg alg, hi_u32 klen)
478 {
479 symc_klen type;
480
481 if ((alg == SYMC_ALG_AES) && (klen == AES_KEY_192BIT)) {
482 type = SYMC_KEY_AES_192BIT;
483 } else if ((alg == SYMC_ALG_AES) && (klen == AES_KEY_256BIT)) {
484 type = SYMC_KEY_AES_256BIT;
485 } else if ((alg == SYMC_ALG_TDES) && (klen == TDES_KEY_128BIT)) {
486 type = SYMC_KEY_TDES_2KEY;
487 } else {
488 type = SYMC_KEY_DEFAULT;
489 }
490
491 return type;
492 }
493
cryp_symc_config(hi_void * ctx,hi_u32 decrypt)494 static hi_s32 cryp_symc_config(hi_void *ctx, hi_u32 decrypt)
495 {
496 cryp_symc_context *hisi_ctx = ctx;
497 symc_klen type;
498 hi_s32 ret;
499
500 hi_log_func_enter();
501
502 hi_log_info("symc configure, chn %u, alg %d, mode %d, dec %u, klen %u, hard %u, iv len %u, iv usage %u\n",
503 hisi_ctx->hard_chn, hisi_ctx->alg, hisi_ctx->mode,
504 decrypt, hisi_ctx->klen, hisi_ctx->hard_key,
505 hisi_ctx->ivlen, hisi_ctx->iv_usage);
506
507 type = cryp_symc_key_type(hisi_ctx->alg, hisi_ctx->klen);
508
509 /* configure */
510 ret = drv_symc_cfg(hisi_ctx, decrypt, type);
511 if (ret != HI_SUCCESS) {
512 hi_log_print_func_err(drv_symc_cfg, ret);
513 return ret;
514 }
515
516 if (hisi_ctx->hard_key != HI_TRUE) {
517 /* set odd key */
518 drv_symc_set_key(hisi_ctx->hard_chn, hisi_ctx->odd_key, sizeof(hisi_ctx->odd_key), HI_TRUE);
519
520 /* set even key */
521 drv_symc_set_key(hisi_ctx->hard_chn, hisi_ctx->even_key, sizeof(hisi_ctx->even_key), HI_FALSE);
522 }
523
524 if (hisi_ctx->alg == SYMC_ALG_SM1) {
525 drv_symc_set_sm1_sk(hisi_ctx->hard_chn, hisi_ctx->sk, sizeof(hisi_ctx->sk));
526 }
527
528 /* set iv */
529 ret = drv_symc_set_iv(hisi_ctx->hard_chn, hisi_ctx->iv, hisi_ctx->ivlen, hisi_ctx->iv_usage);
530 if (ret != HI_SUCCESS) {
531 hi_log_print_func_err(drv_symc_set_iv, ret);
532 return ret;
533 }
534
535 /* first node must set iv except ecb mode. */
536 if (hisi_ctx->iv_usage == HI_CIPHER_IV_CHG_ONE_PACK) {
537 /* don't set iv any more. */
538 hisi_ctx->iv_usage = 0;
539 }
540
541 if (hisi_ctx->alg == SYMC_ALG_DES) {
542 hisi_ctx->block_size = DES_BLOCK_SIZE;
543 } else if (hisi_ctx->alg == SYMC_ALG_TDES) {
544 hisi_ctx->block_size = DES_BLOCK_SIZE;
545 } else {
546 hisi_ctx->block_size = AES_BLOCK_SIZE;
547 }
548
549 hi_log_func_exit();
550 return HI_SUCCESS;
551 }
552
cryp_symc_wait_done(hi_void * ctx,hi_u32 timeout)553 static hi_s32 cryp_symc_wait_done(hi_void *ctx, hi_u32 timeout)
554 {
555 hi_s32 ret;
556 cryp_symc_context *hisi_ctx = ctx;
557
558 hi_log_func_enter();
559
560 /* wait done */
561 ret = drv_symc_wait_done(hisi_ctx->hard_chn, timeout);
562 if (ret != HI_SUCCESS) {
563 hi_log_print_func_err(drv_symc_wait_done, ret);
564 return ret;
565 }
566
567 drv_symc_get_iv(hisi_ctx->hard_chn, hisi_ctx->iv);
568
569 #ifdef CHIP_AES_CCM_GCM_SUPPORT
570 if ((hisi_ctx->mode == SYMC_MODE_CCM) || (hisi_ctx->mode == SYMC_MODE_GCM)) {
571 ret = drv_aead_get_tag(hisi_ctx->hard_chn, hisi_ctx->tag, sizeof(hisi_ctx->tag));
572 if (ret != HI_SUCCESS) {
573 hi_log_print_func_err(drv_aead_get_tag, ret);
574 return ret;
575 }
576 }
577 #endif
578
579 hi_log_func_exit();
580 return HI_SUCCESS;
581 }
582
cryp_symc_crypto_init(cryp_symc_context * hisi_ctx,hi_u32 operation,symc_multi_pack * pack,symc_node_usage usage)583 static hi_s32 cryp_symc_crypto_init(cryp_symc_context *hisi_ctx, hi_u32 operation, symc_multi_pack *pack,
584 symc_node_usage usage)
585 {
586 hi_u32 i = 0;
587 hi_s32 ret;
588
589 hi_log_func_enter();
590 hi_log_chk_param_return(pack == HI_NULL);
591
592 /* length of pkage can't be zero */
593 hisi_ctx->enclen = 0;
594 if (pack->num == 0x01) {
595 hisi_ctx->enclen += pack->len[i];
596 pack->usage[i] = (hi_u32)pack->usage[i] | (hi_u32)usage;
597 } else {
598 for (i = 0; i < pack->num; i++) {
599 if (pack->len[i] == 0x00) {
600 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_LEN);
601 return HI_ERR_CIPHER_INVALID_LEN;
602 }
603
604 hi_log_chk_param_return(hisi_ctx->enclen + pack->len[i] < hisi_ctx->enclen);
605
606 hisi_ctx->enclen += pack->len[i];
607 pack->usage[i] = (hi_u32)pack->usage[i] | (hi_u32)usage;
608 }
609 }
610
611 /* configuration parameter */
612 ret = cryp_symc_config(hisi_ctx, operation);
613 if (ret != HI_SUCCESS) {
614 hi_log_print_func_err(cryp_symc_config, ret);
615 return ret;
616 }
617
618 hisi_ctx->input_list = pack->in;
619 hisi_ctx->output_list = pack->out;
620 hisi_ctx->length_list = pack->len;
621 hisi_ctx->usage_list = pack->usage;
622 hisi_ctx->total_nodes = pack->num;
623 hisi_ctx->cur_nodes = 0;
624
625 /* set isr callback function */
626 ret = drv_symc_set_isr_callback(hisi_ctx->hard_chn, HI_NULL, HI_NULL);
627 if (ret != HI_SUCCESS) {
628 hi_log_print_func_err(drv_symc_set_isr_callback, ret);
629 return ret;
630 }
631
632 hi_log_func_exit();
633 return HI_SUCCESS;
634 }
635
cryp_symc_crypto_process(cryp_symc_context * hisi_ctx,hi_u32 wait)636 static hi_s32 cryp_symc_crypto_process(cryp_symc_context *hisi_ctx, hi_u32 wait)
637 {
638 hi_s32 ret;
639
640 hi_log_func_enter();
641
642 if (wait == HI_TRUE) {
643 while (symc_add_buf_list(hisi_ctx) == SYMC_NODES_ADD_NOTFINISHED) {
644 /* start running */
645 drv_symc_start(hisi_ctx->hard_chn);
646
647 /* wait done */
648 ret = drv_symc_wait_done(hisi_ctx->hard_chn, CRYPTO_TIME_OUT);
649 if (ret != HI_SUCCESS) {
650 hi_log_print_func_err(drv_symc_wait_done, ret);
651 return ret;
652 }
653 }
654 } else {
655 /* add buf list once */
656 ret = symc_add_buf_list(hisi_ctx);
657 if (ret != HI_SUCCESS) {
658 hi_log_print_func_err(symc_add_buf_list, ret);
659 return ret;
660 }
661
662 /* set isr callback function */
663 ret = drv_symc_set_isr_callback(hisi_ctx->hard_chn, symc_add_buf_list, hisi_ctx);
664 if (ret != HI_SUCCESS) {
665 hi_log_print_func_err(drv_symc_set_isr_callback, ret);
666 return ret;
667 }
668
669 /* start running */
670 ret = drv_symc_start(hisi_ctx->hard_chn);
671 if (ret != HI_SUCCESS) {
672 hi_log_print_func_err(drv_symc_start, ret);
673 return ret;
674 }
675 }
676
677 hi_log_func_exit();
678 return HI_SUCCESS;
679 }
680
cryp_symc_crypto(hi_void * ctx,hi_u32 operation,symc_multi_pack * pack,hi_u32 wait)681 static hi_s32 cryp_symc_crypto(hi_void *ctx, hi_u32 operation, symc_multi_pack *pack, hi_u32 wait)
682 {
683 hi_s32 ret;
684 cryp_symc_context *hisi_ctx = ctx;
685
686 hi_log_func_enter();
687 hi_log_chk_param_return(hisi_ctx == HI_NULL);
688 hi_log_chk_param_return(pack == HI_NULL);
689 hi_log_chk_param_return(pack->in == HI_NULL);
690 hi_log_chk_param_return(pack->out == HI_NULL);
691 hi_log_chk_param_return(pack->len == HI_NULL);
692 hi_log_chk_param_return(pack->usage == HI_NULL);
693
694 if (hisi_ctx->alg == SYMC_ALG_NULL_CIPHER) {
695 /* set last flag for each node when DMA copy */
696 hisi_ctx->iv_usage = HI_CIPHER_IV_CHG_ALL_PACK;
697 }
698
699 ret = cryp_symc_crypto_init(hisi_ctx, operation, pack, SYMC_NODE_USAGE_NORMAL);
700 if (ret != HI_SUCCESS) {
701 hi_log_print_func_err(cryp_symc_crypto_init, ret);
702 return ret;
703 }
704 pack->usage[pack->num - 1] = (hi_u32)pack->usage[pack->num - 1] | SYMC_NODE_USAGE_LAST;
705
706 /* tdes used as dma */
707 if (hisi_ctx->tdes2dma == HI_TRUE) {
708 if ((pack->num != 0x01) && (pack->len[0] < DES_BLOCK_SIZE)) {
709 hi_log_error("Invalid 3des dma for pkg num (0x%x) or data length (0x%x).\n", pack->num, pack->len[0]);
710 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
711 return HI_ERR_CIPHER_INVALID_PARAM;
712 }
713 } else {
714 /* check the length of nodes list */
715 ret = drv_symc_node_check(hisi_ctx->alg, hisi_ctx->mode, hisi_ctx->klen, hisi_ctx->block_size, pack);
716 if (ret != HI_SUCCESS) {
717 hi_log_print_func_err(drv_symc_node_check, ret);
718 return ret;
719 }
720 }
721
722 ret = cryp_symc_crypto_process(hisi_ctx, wait);
723 if (ret != HI_SUCCESS) {
724 hi_log_print_func_err(cryp_symc_crypto_process, ret);
725 return ret;
726 }
727
728 drv_symc_get_iv(hisi_ctx->hard_chn, hisi_ctx->iv);
729
730 hi_log_func_exit();
731 return HI_SUCCESS;
732 }
733
734 #ifdef CHIP_AES_CCM_GCM_SUPPORT
cryp_aead_ccm_setiv(hi_void * ctx,const hi_u8 * iv,hi_u32 ivlen,hi_u32 usage)735 static hi_s32 cryp_aead_ccm_setiv(hi_void *ctx, const hi_u8 *iv, hi_u32 ivlen, hi_u32 usage)
736 {
737 hi_u8 ccm_iv[AES_IV_SIZE] = {0};
738
739 /* The octet lengths of N are denoted n,
740 * The octet length of the binary representation of the
741 * octet length of the payload denoted q,
742 * n is an element of {7, 8, 9, 10, 11, 12, 13}
743 * descript: n + q = 15
744 * here the string of N is pConfig->iv, and n is pConfig->ivLen.
745 */
746 if ((ivlen < AES_CCM_MIN_IV_LEN) || (ivlen > AES_CCM_MAX_IV_LEN)) {
747 hi_log_error("Invalid ccm iv len, ivlen = 0x%x.\n", ivlen);
748 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
749 return HI_ERR_CIPHER_INVALID_PARAM;
750 }
751
752 /* Formatting of the Counter Blocks(IV for CTR)
753 *
754 * According to the CCM spec, the counter is equivalent to
755 * a formatting of the counter index i into a complete data block.
756 * The counter blocks Ctri are formatted as shown below:
757 * | Octet number: 0 1 ... 15-q 16-q ... 15
758 * | Contents: Flags N [i]
759 * Within each block Ctri, the N is get from pConfig->iv, n + q = 15,
760 * so the q equal to 15 - pConfig->ivLen.
761 * the [i] is the block count start with 0,
762 * In the Flags field, Bits 0, 1, and 2 contain the encoding of q - 1,
763 * others bits shall be set to 0.
764 * so the first byte of IV shall be q -1, that is 15 - pConfig->ivLen - 1
765 */
766 ccm_iv[0] = AES_CCM_NQ_LEN - ivlen; /* descript: IV[0] = q - 1 = 15 - n -1. */
767 if (memcpy_s(&ccm_iv[1], sizeof(ccm_iv) - 1, iv, ivlen) != EOK) {
768 hi_log_print_func_err(memcpy_s, HI_ERR_CIPHER_MEMCPY_S_FAILED);
769 return HI_ERR_CIPHER_MEMCPY_S_FAILED;
770 }
771 ivlen += 1;
772
773 cryp_symc_setiv(ctx, ccm_iv, ivlen, usage);
774
775 return HI_SUCCESS;
776 }
777
cryp_aead_gcm_setiv(hi_void * ctx,const hi_u8 * iv,hi_u32 ivlen,hi_u32 usage)778 static hi_s32 cryp_aead_gcm_setiv(hi_void *ctx, const hi_u8 *iv, hi_u32 ivlen, hi_u32 usage)
779 {
780 if ((ivlen < AES_GCM_MIN_IV_LEN) || (ivlen > AES_GCM_MAX_IV_LEN)) {
781 hi_log_error("Invalid gcm iv len, ivlen = 0x%x.\n", ivlen);
782 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
783 return HI_ERR_CIPHER_INVALID_PARAM;
784 }
785
786 cryp_symc_setiv(ctx, iv, ivlen, usage);
787
788 return HI_SUCCESS;
789 }
790
cyp_aead_ccm_n(cryp_symc_context * ctx,hi_u8 * buf,hi_u32 buf_len)791 static hi_s32 cyp_aead_ccm_n(cryp_symc_context *ctx, hi_u8 *buf, hi_u32 buf_len)
792 {
793 hi_u32 idx = 0;
794 hi_u32 q;
795 hi_u8 *iv = (hi_u8 *)ctx->iv;
796
797 hi_log_func_enter();
798
799 /* Format B0
800 * The leading octet of the first block of the formatting, B0,
801 * contains four flags for control information: two single bits,
802 * called Reserved and Adata, and two strings of three bits,
803 * to encode the values t and q. The encoding of t is [(t -2)/2],
804 * and the encoding of q is [ q-1].
805 * The ordering of the flags with in the octet is given:
806 * _____________________________________________________
807 * |Bit number 7 | 6 | 5 4 3 | 2 1 0 |
808 * |Contents Reserved Adata [(t -2)/2] | [q-1] |
809 * -----------------------------------------------------
810 * The remaining 15 octets of the first block of the formatting are
811 * devoted to the nonce and the binary representation of
812 * the message length in q octets, as given:
813 * _____________________________________________
814 * |Octet number 0 | 1 ... 15-q | 16-q ... 15 |
815 * |Contents Flags | N | Q |
816 * ---------------------------------------------
817 */
818 (hi_void)memset_s(buf, buf_len, 0, buf_len);
819 buf[idx] = ((ctx->alen > 0) ? AAD_EXIST : AAD_NOT_EXIST) << SHIFT_6BITS; /* descript: Adata exists or not. */
820 buf[idx] |= ((ctx->tlen - CRYPTO_NUM_2) / MUL_VAL_2) << SHIFT_3BITS; /* descript: (t -2) / 2 */
821 buf[idx] |= (N_AND_Q_VAL - ctx->ivlen); /* descript: q-1, n+q=15 */
822 idx++;
823
824 /* copy N, skip Flags in byte0. */
825 if (memcpy_s(&buf[idx], AES_BLOCK_SIZE - idx, &iv[1], ctx->ivlen - 1) != EOK) {
826 hi_log_print_func_err(memcpy_s, HI_ERR_CIPHER_MEMCPY_S_FAILED);
827 return HI_ERR_CIPHER_MEMCPY_S_FAILED;
828 }
829 idx += ctx->ivlen - 1;
830
831 q = AES_BLOCK_SIZE - idx;
832
833 if (q >= SYMC_CCM_Q_LEN_4B) {
834 /* max payload len of 2^32, jump to the location of last word */
835 idx = AES_BLOCK_SIZE - SYMC_CCM_Q_LEN_4B;
836
837 buf[idx++] = (hi_u8)(ctx->enclen >> SHIFT_24BITS);
838 buf[idx++] = (hi_u8)(ctx->enclen >> SHIFT_16BITS);
839 buf[idx++] = (hi_u8)(ctx->enclen >> SHIFT_8BITS);
840 buf[idx++] = (hi_u8)(ctx->enclen);
841 } else if ((q == SYMC_CCM_Q_LEN_3B) && (ctx->enclen <= SYMC_CCM_P_LEN_3B)) {
842 /* max payload len of 2^24. */
843 buf[idx++] = (hi_u8)(ctx->enclen >> SHIFT_16BITS);
844 buf[idx++] = (hi_u8)(ctx->enclen >> SHIFT_8BITS);
845 buf[idx++] = (hi_u8)(ctx->enclen);
846 } else if ((q == SYMC_CCM_Q_LEN_2B) && (ctx->enclen <= SYMC_CCM_P_LEN_2B)) {
847 /* max payload len of 2^16. */
848 buf[idx++] = (hi_u8)(ctx->enclen >> SHIFT_8BITS);
849 buf[idx++] = (hi_u8)(ctx->enclen);
850 } else {
851 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
852 return HI_ERR_CIPHER_INVALID_PARAM;
853 }
854
855 hi_log_func_exit();
856 return HI_SUCCESS;
857 }
858
cyp_aead_gcm_clen(hi_u8 * buf,hi_u32 buf_len,hi_u32 alen,hi_u32 enclen)859 static hi_u32 cyp_aead_gcm_clen(hi_u8 *buf, hi_u32 buf_len, hi_u32 alen, hi_u32 enclen)
860 {
861 hi_u32 idx = 0;
862
863 hi_log_func_enter();
864 crypto_unused(buf_len);
865
866 /* Format len(C), 16 bytes, coding in bits.
867 * Byet0~7: bits number of Add
868 * Byet8~15: bits number of P
869 */
870 buf[idx++] = 0x00;
871 buf[idx++] = 0x00;
872 buf[idx++] = 0x00;
873 buf[idx++] = (hi_u8)((alen >> SHIFT_29BITS) & MAX_LOW_3BITS);
874 buf[idx++] = (hi_u8)((alen >> SHIFT_21BITS) & MAX_LOW_8BITS);
875 buf[idx++] = (hi_u8)((alen >> SHIFT_13BITS) & MAX_LOW_8BITS);
876 buf[idx++] = (hi_u8)((alen >> SHIFT_5BITS) & MAX_LOW_8BITS);
877 buf[idx++] = (hi_u8)((alen << SHIFT_3BITS) & MAX_LOW_8BITS);
878
879 buf[idx++] = 0x00;
880 buf[idx++] = 0x00;
881 buf[idx++] = 0x00;
882 buf[idx++] = (hi_u8)((enclen >> SHIFT_29BITS) & MAX_LOW_3BITS);
883 buf[idx++] = (hi_u8)((enclen >> SHIFT_21BITS) & MAX_LOW_8BITS);
884 buf[idx++] = (hi_u8)((enclen >> SHIFT_13BITS) & MAX_LOW_8BITS);
885 buf[idx++] = (hi_u8)((enclen >> SHIFT_5BITS) & MAX_LOW_8BITS);
886 buf[idx++] = (hi_u8)((enclen << SHIFT_3BITS) & MAX_LOW_8BITS);
887
888 return idx;
889 }
890
cryp_aead_ccm_set_aad(hi_void * ctx,compat_addr aad,hi_u32 alen,hi_u32 tlen)891 static hi_s32 cryp_aead_ccm_set_aad(hi_void *ctx, compat_addr aad, hi_u32 alen, hi_u32 tlen)
892 {
893 cryp_symc_context *hisi_ctx = ctx;
894
895 hi_log_func_enter();
896
897 /* the parameter t denotes the octet length of T(tag)
898 * t is an element of { 4, 6, 8, 10, 12, 14, 16}
899 * here t is pConfig->u32TagLen
900 */
901 if ((tlen & 0x01) || (tlen < AES_CCM_MIN_TAG_LEN) || (tlen > AES_CCM_MAX_TAG_LEN)) {
902 hi_log_error("Invalid tag len, tlen = 0x%x.\n", tlen);
903 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
904 return HI_ERR_CIPHER_INVALID_PARAM;
905 }
906
907 hisi_ctx->aad = aad;
908 hisi_ctx->alen = alen;
909 hisi_ctx->tlen = tlen;
910
911 hi_log_func_exit();
912 return HI_SUCCESS;
913 }
914
cryp_aead_gcm_set_aad(hi_void * ctx,compat_addr aad,hi_u32 alen,hi_u32 tlen)915 static hi_s32 cryp_aead_gcm_set_aad(hi_void *ctx, compat_addr aad, hi_u32 alen, hi_u32 tlen)
916 {
917 cryp_symc_context *hisi_ctx = ctx;
918
919 hi_log_func_enter();
920
921 if ((tlen < AES_GCM_MIN_TAG_LEN)
922 || (tlen > AES_GCM_MAX_TAG_LEN)) {
923 hi_log_error("Invalid tag len, tlen = 0x%x.\n", tlen);
924 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
925 return HI_ERR_CIPHER_INVALID_PARAM;
926 }
927
928 hisi_ctx->aad = aad;
929 hisi_ctx->alen = alen;
930 hisi_ctx->tlen = tlen;
931
932 hi_log_func_exit();
933 return HI_SUCCESS;
934 }
935
cryp_aead_crypto_zero(cryp_symc_context * hisi_ctx,hi_u32 wait)936 static hi_s32 cryp_aead_crypto_zero(cryp_symc_context *hisi_ctx, hi_u32 wait)
937 {
938 hi_s32 ret;
939
940 hi_log_func_enter();
941
942 /* start running */
943 ret = drv_symc_start(hisi_ctx->hard_chn);
944 if (ret != HI_SUCCESS) {
945 hi_log_print_func_err(drv_symc_start, ret);
946 return ret;
947 }
948
949 /* wait done */
950 if (wait == HI_TRUE) {
951 ret = drv_symc_wait_done(hisi_ctx->hard_chn, CRYPTO_TIME_OUT);
952 if (ret != HI_SUCCESS) {
953 hi_log_print_func_err(drv_symc_wait_done, ret);
954 return ret;
955 }
956
957 ret = drv_aead_get_tag(hisi_ctx->hard_chn, hisi_ctx->tag, sizeof(hisi_ctx->tag));
958 if (ret != HI_SUCCESS) {
959 hi_log_print_func_err(drv_aead_get_tag, ret);
960 return ret;
961 }
962 }
963
964 hi_log_func_exit();
965 return HI_SUCCESS;
966 }
967
cryp_ccm_add_p(cryp_symc_context * hisi_ctx,symc_multi_pack * pack,hi_u32 wait)968 static hi_s32 cryp_ccm_add_p(cryp_symc_context *hisi_ctx, symc_multi_pack *pack, hi_u32 wait)
969 {
970 hi_s32 ret;
971
972 if (hisi_ctx->enclen == 0) {
973 compat_addr addr_null;
974 (hi_void)memset_s(&addr_null, sizeof(addr_null), 0, sizeof(addr_null));
975
976 /* Set CCM last flag. */
977 drv_symc_add_buf_usage(hisi_ctx->hard_chn, HI_TRUE, SYMC_NODE_USAGE_CCM_LAST);
978
979 /* If P is HI_NULL, must add an empty node into node list, limit to hardware devising */
980 ret = drv_symc_add_outbuf(hisi_ctx->hard_chn, addr_null, 0x00, SYMC_NODE_USAGE_LAST);
981 if (ret != HI_SUCCESS) {
982 hi_log_print_func_err(drv_symc_add_outbuf, ret);
983 return ret;
984 }
985
986 ret = cryp_aead_crypto_zero(hisi_ctx, wait);
987 if (ret != HI_SUCCESS) {
988 hi_log_print_func_err(cryp_aead_crypto_zero, ret);
989 return ret;
990 }
991 } else {
992 /* for CCM, must set P last and ccm last flag */
993 pack->usage[pack->num - 1] = (hi_u32)pack->usage[pack->num - 1] |
994 (SYMC_NODE_USAGE_CCM_LAST | SYMC_NODE_USAGE_LAST);
995 ret = cryp_symc_crypto_process(hisi_ctx, wait);
996 if (ret != HI_SUCCESS) {
997 hi_log_print_func_err(cryp_symc_crypto_process, ret);
998 return ret;
999 }
1000
1001 ret = drv_aead_get_tag(hisi_ctx->hard_chn, hisi_ctx->tag, sizeof(hisi_ctx->tag));
1002 if (ret != HI_SUCCESS) {
1003 hi_log_print_func_err(drv_aead_get_tag, ret);
1004 return ret;
1005 }
1006 }
1007
1008 return HI_SUCCESS;
1009 }
1010
cryp_aead_ccm_crypto(hi_void * ctx,hi_u32 operation,symc_multi_pack * pack,hi_u32 wait)1011 static hi_s32 cryp_aead_ccm_crypto(hi_void *ctx, hi_u32 operation, symc_multi_pack *pack, hi_u32 wait)
1012 {
1013 hi_s32 ret;
1014 hi_u8 n[AES_BLOCK_SIZE] = {0};
1015 cryp_symc_context *hisi_ctx = ctx;
1016
1017 hi_log_func_enter();
1018
1019 ret = cryp_symc_crypto_init(hisi_ctx, operation, pack, SYMC_NODE_USAGE_IN_CCM_P);
1020 if (ret != HI_SUCCESS) {
1021 hi_log_print_func_err(cryp_symc_crypto_init, ret);
1022 return ret;
1023 }
1024
1025 /*
1026 * NIST Special Publication 800-38C
1027 * The data that CCM protects consists of a message, i.e., a bit string,
1028 * called the payload, denoted P, of bit length denoted Plen,
1029 * and a bit string, called the associated data, denoted A.
1030 * The associated data is optional, i.e., A may be the empty string.
1031 * CCM provides assurance of the confidentiality of P and assurance of
1032 * the authenticity of the origin of both A and P;
1033 * confidentiality is not provided for A.
1034 * Compute N.
1035 */
1036 ret = cyp_aead_ccm_n(hisi_ctx, n, sizeof(n));
1037 if (ret != HI_SUCCESS) {
1038 hi_log_print_func_err(cyp_aead_ccm_n, ret);
1039 return ret;
1040 }
1041
1042 ret = drv_aead_ccm_add_n(hisi_ctx->hard_chn, n, sizeof(n));
1043 if (ret != HI_SUCCESS) {
1044 hi_log_print_func_err(drv_aead_ccm_add_n, ret);
1045 return ret;
1046 }
1047
1048 /* Compute A */
1049 ret = drv_aead_ccm_add_a(hisi_ctx->hard_chn, hisi_ctx->aad, hisi_ctx->alen);
1050 if (ret != HI_SUCCESS) {
1051 hi_log_print_func_err(drv_aead_ccm_add_a, ret);
1052 return ret;
1053 }
1054
1055 /* Compute A */
1056 ret = cryp_ccm_add_p(hisi_ctx, pack, wait);
1057 if (ret != HI_SUCCESS) {
1058 hi_log_print_func_err(cryp_ccm_add_p, ret);
1059 return ret;
1060 }
1061
1062 hi_log_func_exit();
1063 return HI_SUCCESS;
1064 }
1065
cryp_aead_gcm_crypto(hi_void * ctx,hi_u32 operation,symc_multi_pack * pack,hi_u32 wait)1066 static hi_s32 cryp_aead_gcm_crypto(hi_void *ctx, hi_u32 operation, symc_multi_pack *pack, hi_u32 wait)
1067 {
1068 hi_s32 ret;
1069 cryp_symc_context *hisi_ctx = ctx;
1070 hi_u8 clen[AES_BLOCK_SIZE] = {0};
1071
1072 hi_log_func_enter();
1073
1074 ret = cryp_symc_crypto_init(hisi_ctx, operation, pack, SYMC_NODE_USAGE_IN_GCM_P);
1075 if (ret != HI_SUCCESS) {
1076 hi_log_print_func_err(cryp_symc_crypto_init, ret);
1077 return ret;
1078 }
1079
1080 /*
1081 * NIST Special Publication 800-38D
1082 * A || P || Clen.
1083 * Compute A.
1084 */
1085 ret = drv_aead_gcm_add_a(hisi_ctx->hard_chn, hisi_ctx->aad, hisi_ctx->alen);
1086 if (ret != HI_SUCCESS) {
1087 hi_log_print_func_err(drv_aead_gcm_add_a, ret);
1088 return ret;
1089 }
1090
1091 if (hisi_ctx->enclen == 0) {
1092 compat_addr addr_null;
1093 (hi_void)memset_s(&addr_null, sizeof(addr_null), 0, sizeof(addr_null));
1094 /*
1095 * At the and of GCM, must add an empty node to nodes list,
1096 * limit to hardware devising.
1097 */
1098 ret = drv_symc_add_outbuf(hisi_ctx->hard_chn, addr_null, 0x00, SYMC_NODE_USAGE_LAST);
1099 if (ret != HI_SUCCESS) {
1100 hi_log_print_func_err(drv_symc_add_outbuf, ret);
1101 return ret;
1102 }
1103
1104 /* Format the length fields of C and add to nodes list. */
1105 cyp_aead_gcm_clen(clen, sizeof(clen), hisi_ctx->alen, 0x00);
1106 ret = drv_aead_gcm_add_clen(hisi_ctx->hard_chn, clen, sizeof(clen));
1107 if (ret != HI_SUCCESS) {
1108 hi_log_print_func_err(drv_aead_gcm_add_clen, ret);
1109 return ret;
1110 }
1111
1112 ret = cryp_aead_crypto_zero(hisi_ctx, wait);
1113 if (ret != HI_SUCCESS) {
1114 hi_log_print_func_err(cryp_aead_crypto_zero, ret);
1115 return ret;
1116 }
1117 } else {
1118 /* for GCM, must set P last and gcm last flag. */
1119 pack->usage[pack->num - BOUND_VAL_1] = (hi_u32)pack->usage[pack->num - BOUND_VAL_1] | SYMC_NODE_USAGE_LAST;
1120 ret = cryp_symc_crypto_process(hisi_ctx, wait);
1121 if (ret != HI_SUCCESS) {
1122 hi_log_print_func_err(cryp_symc_crypto_process, ret);
1123 return ret;
1124 }
1125
1126 ret = drv_aead_get_tag(hisi_ctx->hard_chn, hisi_ctx->tag, sizeof(hisi_ctx->tag));
1127 if (ret != HI_SUCCESS) {
1128 hi_log_print_func_err(drv_aead_get_tag, ret);
1129 return ret;
1130 }
1131 }
1132
1133 hi_log_func_exit();
1134 return HI_SUCCESS;
1135 }
1136
cryp_aead_get_tag(hi_void * ctx,hi_u32 tag[AEAD_TAG_SIZE_IN_WORD],hi_u32 * taglen)1137 static hi_s32 cryp_aead_get_tag(hi_void *ctx, hi_u32 tag[AEAD_TAG_SIZE_IN_WORD], hi_u32 *taglen)
1138 {
1139 cryp_symc_context *hisi_ctx = ctx;
1140
1141 hi_log_func_enter();
1142
1143 hi_log_chk_param_return(*taglen < hisi_ctx->tlen);
1144
1145 hi_log_debug("tag buffer len %u, tag len %u\n", *taglen, hisi_ctx->tlen);
1146
1147 *taglen = hisi_ctx->tlen;
1148
1149 if (memcpy_s(tag, AEAD_TAG_SIZE, hisi_ctx->tag, hisi_ctx->tlen) != EOK) {
1150 hi_log_print_func_err(memcpy_s, HI_ERR_CIPHER_MEMCPY_S_FAILED);
1151 return HI_ERR_CIPHER_MEMCPY_S_FAILED;
1152 }
1153
1154 hi_log_func_exit();
1155 return HI_SUCCESS;
1156 }
1157 #endif
1158
cryp_register_symc(const symc_func * func)1159 static hi_s32 cryp_register_symc(const symc_func *func)
1160 {
1161 hi_u32 i;
1162
1163 hi_log_func_enter();
1164
1165 /* check availability */
1166 if ((func->create == HI_NULL) || (func->crypto == HI_NULL)) {
1167 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
1168 return HI_ERR_CIPHER_INVALID_PARAM;
1169 }
1170
1171 /* is it already registered? */
1172 for (i = 0; i < SYMC_FUNC_TAB_SIZE; i++) {
1173 if ((g_symc_descriptor[i].valid) && (g_symc_descriptor[i].alg == func->alg) &&
1174 (g_symc_descriptor[i].mode == func->mode)) {
1175 hi_log_func_exit();
1176 return HI_SUCCESS;
1177 }
1178 }
1179
1180 /* find a blank spot */
1181 for (i = 0; i < SYMC_FUNC_TAB_SIZE; i++) {
1182 if (g_symc_descriptor[i].valid == 0) {
1183 if (memcpy_s(&g_symc_descriptor[i], sizeof(symc_func), func, sizeof(symc_func)) != EOK) {
1184 hi_log_print_func_err(memcpy_s, HI_ERR_CIPHER_MEMCPY_S_FAILED);
1185 return HI_ERR_CIPHER_MEMCPY_S_FAILED;
1186 }
1187 g_symc_descriptor[i].valid = HI_TRUE;
1188 hi_log_debug("g_symc_descriptor[%u], alg %d, mode %d\n", i,
1189 g_symc_descriptor[i].alg, g_symc_descriptor[i].mode);
1190
1191 hi_log_func_exit();
1192 return HI_SUCCESS;
1193 }
1194 }
1195
1196 /* Can't find a blank spot */
1197 hi_log_print_err_code(HI_ERR_CIPHER_OVERFLOW);
1198 return HI_ERR_CIPHER_OVERFLOW;
1199 }
1200
cryp_get_symc(hi_u32 alg,hi_u32 mode)1201 static symc_func *cryp_get_symc(hi_u32 alg, hi_u32 mode)
1202 {
1203 hi_u32 i;
1204 symc_func *template = HI_NULL;
1205
1206 hi_log_func_enter();
1207
1208 /* find the valid function */
1209 for (i = 0; i < SYMC_FUNC_TAB_SIZE; i++) {
1210 hi_log_debug("g_symc_descriptor[%u] valid %u, alg %d, mode %d \n",
1211 i, g_symc_descriptor[i].valid, g_symc_descriptor[i].alg, g_symc_descriptor[i].mode);
1212
1213 if (g_symc_descriptor[i].valid && g_symc_descriptor[i].alg == alg && g_symc_descriptor[i].mode == mode) {
1214 template = &g_symc_descriptor[i];
1215 break;
1216 }
1217 }
1218
1219 hi_log_func_exit();
1220 return template;
1221 }
1222
1223 /*
1224 * Defined the default template of Symmetric cipher function,
1225 * the function can be replaced by other engine
1226 */
cryp_aes_setkey(hi_void * ctx,const hi_u8 * fkey,const hi_u8 * skey,hi_u32 * hisi_klen)1227 static hi_s32 cryp_aes_setkey(hi_void *ctx, const hi_u8 *fkey, const hi_u8 *skey, hi_u32 *hisi_klen)
1228 {
1229 hi_u32 klen;
1230 cryp_symc_context *hisi_ctx = ctx;
1231
1232 hi_log_func_enter();
1233
1234 /* set the key length depend on alg
1235 * des/3des support 2key and 3key
1236 * aes support 128, 192, and 256
1237 * sm1 support ak/ek/sk
1238 * sm4 support 128
1239 */
1240 hi_log_chk_param_return(hisi_ctx == HI_NULL);
1241
1242 hisi_ctx->tdes2dma = HI_FALSE;
1243
1244 switch (*hisi_klen) {
1245 case HI_CIPHER_KEY_AES_128BIT: {
1246 klen = AES_KEY_128BIT;
1247 break;
1248 }
1249 case HI_CIPHER_KEY_AES_192BIT: {
1250 klen = AES_KEY_192BIT;
1251 break;
1252 }
1253 case HI_CIPHER_KEY_AES_256BIT: {
1254 klen = AES_KEY_256BIT;
1255 break;
1256 }
1257 default: {
1258 hi_log_error("Invalid aes key len: %u\n", *hisi_klen);
1259 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
1260 return HI_ERR_CIPHER_INVALID_PARAM;
1261 }
1262 }
1263 hi_log_info("key len %u, type %u\n", klen, *hisi_klen);
1264
1265 *hisi_klen = klen;
1266
1267 if (fkey == HI_NULL) {
1268 hisi_ctx->hard_key = HI_TRUE;
1269 hisi_ctx->klen = klen;
1270 hi_log_func_exit();
1271 return HI_SUCCESS;
1272 }
1273
1274 cryp_symc_setkey(ctx, fkey, klen, HI_FALSE);
1275
1276 if (skey != HI_NULL) {
1277 cryp_symc_setkey(ctx, skey, klen, HI_TRUE);
1278 }
1279
1280 hi_log_func_exit();
1281 return HI_SUCCESS;
1282 }
1283
cryp_tdes_chk_cpu_key(const hi_u8 * fkey,const hi_u32 * hisi_klen,hi_u32 * invalid,hi_u32 * klen)1284 static hi_s32 cryp_tdes_chk_cpu_key(const hi_u8 *fkey, const hi_u32 *hisi_klen, hi_u32 *invalid, hi_u32 *klen)
1285 {
1286 /* check k1 != k2. */
1287 if (memcmp(&fkey[0], &fkey[DES_BLOCK_SIZE], DES_BLOCK_SIZE) == 0) {
1288 *invalid = HI_TRUE;
1289 }
1290
1291 switch (*hisi_klen) {
1292 case HI_CIPHER_KEY_DES_2KEY: {
1293 *klen = TDES_KEY_128BIT;
1294 break;
1295 }
1296 case HI_CIPHER_KEY_DES_3KEY: {
1297 *klen = TDES_KEY_192BIT;
1298
1299 /* check k2 != k3. */
1300 if (memcmp(&fkey[DES_BLOCK_SIZE], &fkey[DES_BLOCK_SIZE * MUL_VAL_2], DES_BLOCK_SIZE) == 0) {
1301 *invalid = HI_TRUE;
1302 }
1303 break;
1304 }
1305 default: {
1306 hi_log_error("3des with invalid keylen, keylen = 0x%x.\n", *hisi_klen);
1307 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARA);
1308 return HI_ERR_CIPHER_INVALID_PARA;
1309 }
1310 }
1311
1312 return HI_SUCCESS;
1313 }
1314
cryp_tdes_setkey(hi_void * ctx,const hi_u8 * fkey,const hi_u8 * skey,hi_u32 * hisi_klen)1315 static hi_s32 cryp_tdes_setkey(hi_void *ctx, const hi_u8 *fkey, const hi_u8 *skey, hi_u32 *hisi_klen)
1316 {
1317 hi_s32 ret;
1318 hi_u32 klen = 0;
1319 cryp_symc_context *hisi_ctx = ctx;
1320 symc_capacity capacity;
1321 hi_u32 invalid = HI_FALSE;
1322
1323 hi_log_func_enter();
1324
1325 /* set the key length depend on alg
1326 * des/3des support 2key and 3key
1327 * aes support 128, 192, and 256
1328 * sm1 support ak/ek/sk
1329 * sm4 support 128
1330 */
1331 hi_log_chk_param_return(hisi_ctx == HI_NULL);
1332
1333 crypto_unused(skey);
1334
1335 hisi_ctx->tdes2dma = HI_FALSE;
1336
1337 if (fkey == HI_NULL) {
1338 /* 3des use hard key. */
1339 if (*hisi_klen != HI_CIPHER_KEY_DES_2KEY) {
1340 hi_log_error("error, tdes hard key must be 2key.\n");
1341 hi_log_print_err_code(HI_ERR_CIPHER_ILLEGAL_KEY);
1342 return HI_ERR_CIPHER_ILLEGAL_KEY;
1343 }
1344
1345 hisi_ctx->hard_key = HI_TRUE;
1346 hisi_ctx->klen = TDES_KEY_128BIT;
1347 *hisi_klen = TDES_KEY_128BIT;
1348
1349 hi_log_func_exit();
1350 return HI_SUCCESS;
1351 }
1352
1353 /* get symc capacity */
1354 drv_symc_get_capacity(&capacity);
1355 ret = cryp_tdes_chk_cpu_key(fkey, (const hi_u32 *)hisi_klen, &invalid, &klen);
1356 if (ret != HI_SUCCESS) {
1357 hi_log_print_func_err(cryp_symc_sm1_setsk, ret);
1358 return ret;
1359 }
1360
1361 if (invalid == HI_TRUE) {
1362 if (capacity.dma == CRYPTO_CAPACITY_SUPPORT) {
1363 hi_log_error("3des with invalid key.\n");
1364 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARA);
1365 return HI_ERR_CIPHER_ILLEGAL_KEY;
1366 }
1367
1368 /* if don't support dma, the tdes with invalid key can be used as dma. */
1369 hisi_ctx->tdes2dma = HI_TRUE;
1370 }
1371
1372 cryp_symc_setkey(ctx, fkey, klen, HI_FALSE);
1373
1374 *hisi_klen = klen;
1375 hi_log_func_exit();
1376 return HI_SUCCESS;
1377 }
1378
cryp_des_setkey(hi_void * ctx,const hi_u8 * fkey,const hi_u8 * skey,hi_u32 * hisi_klen)1379 static hi_s32 cryp_des_setkey(hi_void *ctx, const hi_u8 *fkey, const hi_u8 *skey, hi_u32 *hisi_klen)
1380 {
1381 cryp_symc_context *hisi_ctx = ctx;
1382
1383 hi_log_func_enter();
1384
1385 hi_log_chk_param_return(hisi_ctx == HI_NULL);
1386
1387 crypto_unused(skey);
1388
1389 hisi_ctx->tdes2dma = HI_FALSE;
1390
1391 if (fkey == HI_NULL) {
1392 hi_log_error("error, des nonsupport hard key.\n");
1393 hi_log_print_err_code(HI_ERR_CIPHER_ILLEGAL_KEY);
1394 return HI_ERR_CIPHER_ILLEGAL_KEY;
1395 }
1396
1397 cryp_symc_setkey(ctx, fkey, DES_KEY_SIZE, HI_FALSE);
1398
1399 *hisi_klen = DES_KEY_SIZE;
1400
1401 hi_log_func_exit();
1402 return HI_SUCCESS;
1403 }
1404
cryp_3des2dma_setkey(hi_void * ctx,const hi_u8 * fkey,const hi_u8 * skey,hi_u32 * hisi_klen)1405 static hi_s32 cryp_3des2dma_setkey(hi_void *ctx, const hi_u8 *fkey, const hi_u8 *skey, hi_u32 *hisi_klen)
1406 {
1407 hi_u8 key[TDES_KEY_128BIT] = {0};
1408 cryp_symc_context *hisi_ctx = ctx;
1409
1410 hi_log_func_enter();
1411 hi_log_chk_param_return(hisi_ctx == HI_NULL);
1412
1413 crypto_unused(fkey);
1414 crypto_unused(skey);
1415
1416 cryp_symc_setkey(ctx, key, TDES_KEY_128BIT, HI_FALSE);
1417
1418 *hisi_klen = TDES_KEY_128BIT;
1419 hisi_ctx->tdes2dma = HI_TRUE;
1420
1421 hi_log_func_exit();
1422 return HI_SUCCESS;
1423 }
1424
cryp_sm1_setkey(hi_void * ctx,const hi_u8 * fkey,const hi_u8 * skey,hi_u32 * hisi_klen)1425 static hi_s32 cryp_sm1_setkey(hi_void *ctx, const hi_u8 *fkey, const hi_u8 *skey, hi_u32 *hisi_klen)
1426 {
1427 hi_s32 ret;
1428 cryp_symc_context *hisi_ctx = ctx;
1429
1430 hi_log_func_enter();
1431 hi_log_chk_param_return(hisi_klen == HI_NULL);
1432 hi_log_chk_param_return(*hisi_klen == HI_CIPHER_KEY_DEFAULT);
1433 hi_log_chk_param_return(hisi_ctx == HI_NULL);
1434 crypto_unused(skey);
1435
1436 hisi_ctx->tdes2dma = HI_FALSE;
1437
1438 if (fkey == HI_NULL) {
1439 hisi_ctx->hard_key = HI_TRUE;
1440 hi_log_func_exit();
1441 return HI_SUCCESS;
1442 }
1443
1444 cryp_symc_setkey(ctx, fkey, SM1_AK_EK_SIZE, HI_FALSE);
1445
1446 /* sm1 support ak/ek/sk */
1447 ret = cryp_symc_sm1_setsk(ctx, skey);
1448 if (ret != HI_SUCCESS) {
1449 hi_log_print_func_err(cryp_symc_sm1_setsk, ret);
1450 return ret;
1451 }
1452
1453 *hisi_klen = SM1_AK_EK_SIZE;
1454 hi_log_func_exit();
1455 return HI_SUCCESS;
1456 }
1457
1458 #ifdef CHIP_SYMC_SM4_SUPPORT
cryp_sm4_setkey(hi_void * ctx,const hi_u8 * fkey,const hi_u8 * skey,hi_u32 * hisi_klen)1459 static hi_s32 cryp_sm4_setkey(hi_void *ctx, const hi_u8 *fkey, const hi_u8 *skey, hi_u32 *hisi_klen)
1460 {
1461 cryp_symc_context *hisi_ctx = ctx;
1462
1463 hi_log_func_enter();
1464 hi_log_chk_param_return(hisi_klen == HI_NULL);
1465 hi_log_chk_param_return(*hisi_klen != HI_CIPHER_KEY_DEFAULT);
1466 hi_log_chk_param_return(hisi_ctx == HI_NULL);
1467 crypto_unused(skey);
1468
1469 hisi_ctx->tdes2dma = HI_FALSE;
1470
1471 if (fkey == HI_NULL) {
1472 hisi_ctx->hard_key = HI_TRUE;
1473
1474 hi_log_func_exit();
1475 return HI_SUCCESS;
1476 }
1477
1478 /* sm4 support 128 */
1479 cryp_symc_setkey(ctx, fkey, SM4_KEY_SIZE, HI_FALSE);
1480
1481 *hisi_klen = SM4_KEY_SIZE;
1482
1483 hi_log_func_exit();
1484 return HI_SUCCESS;
1485 }
1486 #endif
1487
cryp_symc_setiv_default(hi_void * ctx,const hi_u8 * iv,hi_u32 ivlen,hi_u32 usage)1488 static hi_s32 cryp_symc_setiv_default(hi_void *ctx, const hi_u8 *iv, hi_u32 ivlen, hi_u32 usage)
1489 {
1490 hi_log_func_enter();
1491
1492 if (iv == HI_NULL) {
1493 return HI_SUCCESS;
1494 }
1495
1496 if (ivlen > AES_IV_SIZE) {
1497 return HI_ERR_CIPHER_INVALID_PARAM;
1498 }
1499
1500 cryp_symc_setiv(ctx, iv, ivlen, usage);
1501
1502 hi_log_func_exit();
1503 return HI_SUCCESS;
1504 }
1505
1506 /* Default As AES */
cryp_register_symc_default(symc_func * func,symc_alg alg,symc_mode mode)1507 static hi_void cryp_register_symc_default(symc_func *func, symc_alg alg, symc_mode mode)
1508 {
1509 (hi_void)memset_s(func, sizeof(symc_func), 0, sizeof(symc_func));
1510
1511 func->mode = mode;
1512 func->alg = alg;
1513 func->create = cryp_symc_create;
1514 func->setiv = cryp_symc_setiv_default;
1515 func->getiv = cryp_symc_getiv;
1516 func->crypto = cryp_symc_crypto;
1517 func->setmode = cryp_symc_setmode;
1518 func->setkey = cryp_aes_setkey;
1519 func->waitdone = cryp_symc_wait_done;
1520 return;
1521 }
1522
cryp_register_symc_aes(hi_u32 capacity,symc_mode mode)1523 static hi_void cryp_register_symc_aes(hi_u32 capacity, symc_mode mode)
1524 {
1525 symc_func func;
1526 hi_s32 ret;
1527
1528 (hi_void)memset_s(&func, sizeof(symc_func), 0, sizeof(symc_func));
1529
1530 if (capacity == CRYPTO_CAPACITY_SUPPORT) {
1531 cryp_register_symc_default(&func, SYMC_ALG_AES, mode);
1532 ret = cryp_register_symc(&func);
1533 if (ret != HI_SUCCESS) {
1534 hi_log_print_func_err(cryp_register_symc, ret);
1535 return;
1536 }
1537 #ifdef SOFT_AES_SUPPORT
1538 } else {
1539 cryp_register_symc_default(&func, SYMC_ALG_AES, mode);
1540 func.create = ext_mbedtls_symc_create;
1541 func.destroy = ext_mbedtls_symc_destroy;
1542 func.setiv = ext_mbedtls_symc_setiv;
1543 func.getiv = ext_mbedtls_symc_getiv;
1544 func.setkey = ext_mbedtls_symc_setkey;
1545 func.setmode = ext_mbedtls_symc_setmode;
1546 func.crypto = ext_mbedtls_symc_crypto;
1547 func.waitdone = HI_NULL;
1548 ret = cryp_register_symc(&func);
1549 if (ret != HI_SUCCESS) {
1550 hi_log_print_func_err(cryp_register_symc, ret);
1551 return;
1552 }
1553 #endif
1554 }
1555 return;
1556 }
1557
cryp_register_symc_dma(hi_u32 dma_capacity,hi_u32 tdes_capacity)1558 static hi_void cryp_register_symc_dma(hi_u32 dma_capacity, hi_u32 tdes_capacity)
1559 {
1560 symc_func func;
1561 hi_s32 ret;
1562
1563 crypto_unused(tdes_capacity);
1564
1565 (hi_void)memset_s(&func, sizeof(func), 0, sizeof(func));
1566
1567 if (dma_capacity == CRYPTO_CAPACITY_SUPPORT) {
1568 func.mode = SYMC_MODE_ECB;
1569 func.alg = SYMC_ALG_NULL_CIPHER;
1570 func.create = cryp_symc_create;
1571 func.setmode = cryp_symc_setmode;
1572 func.crypto = cryp_symc_crypto;
1573 ret = cryp_register_symc(&func);
1574 if (ret != HI_SUCCESS) {
1575 hi_log_print_func_err(cryp_register_symc, ret);
1576 return;
1577 }
1578 } else if (tdes_capacity == CRYPTO_CAPACITY_SUPPORT) {
1579 func.mode = SYMC_MODE_ECB;
1580 func.alg = SYMC_ALG_NULL_CIPHER;
1581 func.create = cryp_symc_create;
1582 func.setmode = cryp_3des2dma_setmode;
1583 func.setkey = cryp_3des2dma_setkey;
1584 func.crypto = cryp_symc_crypto;
1585 ret = cryp_register_symc(&func);
1586 if (ret != HI_SUCCESS) {
1587 hi_log_print_func_err(cryp_register_symc, ret);
1588 return;
1589 }
1590 }
1591 return;
1592 }
1593
cryp_register_aead_ccm(hi_u32 capacity,symc_mode mode)1594 static hi_void cryp_register_aead_ccm(hi_u32 capacity, symc_mode mode)
1595 {
1596 symc_func func;
1597
1598 crypto_unused(mode);
1599
1600 (hi_void)memset_s(&func, sizeof(func), 0, sizeof(func));
1601
1602 if (capacity == CRYPTO_CAPACITY_SUPPORT) {
1603 #ifdef CHIP_AES_CCM_GCM_SUPPORT
1604 hi_s32 ret;
1605
1606 cryp_register_symc_default(&func, SYMC_ALG_AES, mode);
1607 func.setadd = cryp_aead_ccm_set_aad;
1608 func.gettag = cryp_aead_get_tag;
1609 func.crypto = cryp_aead_ccm_crypto;
1610 func.setiv = cryp_aead_ccm_setiv;
1611 ret = cryp_register_symc(&func);
1612 if (ret != HI_SUCCESS) {
1613 hi_log_print_func_err(cryp_register_symc, ret);
1614 return;
1615 }
1616 #endif
1617 } else {
1618 #ifdef SOFT_AES_CCM_GCM_SUPPORT
1619 hi_s32 ret;
1620
1621 func.mode = mode;
1622 func.alg = SYMC_ALG_AES;
1623 func.create = ext_mbedtls_aead_create;
1624 func.destroy = ext_mbedtls_aead_destroy;
1625 func.setiv = ext_mbedtls_aead_setiv;
1626 func.getiv = HI_NULL;
1627 func.crypto = ext_mbedtls_aead_ccm_crypto;
1628 func.setmode = HI_NULL;
1629 func.setkey = ext_mbedtls_aead_setkey;
1630 func.setadd = ext_mbedtls_aead_set_aad;
1631 func.gettag = ext_mbedtls_aead_get_tag;
1632 func.waitdone = HI_NULL;
1633 ret = cryp_register_symc(&func);
1634 if (ret != HI_SUCCESS) {
1635 hi_log_print_func_err(cryp_register_symc, ret);
1636 return;
1637 }
1638 #endif
1639 }
1640
1641 return;
1642 }
1643
cryp_register_aead_gcm(hi_u32 capacity,symc_mode mode)1644 static hi_void cryp_register_aead_gcm(hi_u32 capacity, symc_mode mode)
1645 {
1646 crypto_unused(mode);
1647
1648 if (capacity == CRYPTO_CAPACITY_SUPPORT) {
1649 #ifdef CHIP_AES_CCM_GCM_SUPPORT
1650 symc_func func;
1651 hi_s32 ret;
1652
1653 (hi_void)memset_s(&func, sizeof(symc_func), 0, sizeof(symc_func));
1654
1655 cryp_register_symc_default(&func, SYMC_ALG_AES, mode);
1656 func.setadd = cryp_aead_gcm_set_aad;
1657 func.gettag = cryp_aead_get_tag;
1658 func.crypto = cryp_aead_gcm_crypto;
1659 func.setiv = cryp_aead_gcm_setiv;
1660 ret = cryp_register_symc(&func);
1661 if (ret != HI_SUCCESS) {
1662 hi_log_print_func_err(cryp_register_symc, ret);
1663 return;
1664 }
1665 #endif
1666 } else {
1667 #ifdef SOFT_AES_CCM_GCM_SUPPORT
1668 symc_func func;
1669 hi_s32 ret;
1670
1671 (hi_void)memset_s(&func, sizeof(symc_func), 0, sizeof(symc_func));
1672
1673 func.mode = mode;
1674 func.alg = SYMC_ALG_AES;
1675 func.create = ext_mbedtls_aead_create;
1676 func.destroy = ext_mbedtls_aead_destroy;
1677 func.setiv = ext_mbedtls_aead_setiv;
1678 func.getiv = HI_NULL;
1679 func.crypto = ext_mbedtls_aead_gcm_crypto;
1680 func.setmode = HI_NULL;
1681 func.setkey = ext_mbedtls_aead_setkey;
1682 func.setadd = ext_mbedtls_aead_set_aad;
1683 func.gettag = ext_mbedtls_aead_get_tag;
1684 func.waitdone = HI_NULL;
1685 ret = cryp_register_symc(&func);
1686 if (ret != HI_SUCCESS) {
1687 hi_log_print_func_err(cryp_register_symc, ret);
1688 return;
1689 }
1690 #endif
1691 }
1692
1693 return;
1694 }
1695
cryp_register_symc_tdes(hi_u32 capacity,symc_mode mode)1696 static hi_void cryp_register_symc_tdes(hi_u32 capacity, symc_mode mode)
1697 {
1698 symc_func func;
1699 hi_s32 ret;
1700
1701 (hi_void)memset_s(&func, sizeof(symc_func), 0, sizeof(symc_func));
1702
1703 if (capacity == CRYPTO_CAPACITY_SUPPORT) {
1704 cryp_register_symc_default(&func, SYMC_ALG_TDES, mode);
1705 func.setkey = cryp_tdes_setkey;
1706 ret = cryp_register_symc(&func);
1707 if (ret != HI_SUCCESS) {
1708 hi_log_print_func_err(cryp_register_symc, ret);
1709 return;
1710 }
1711 #ifdef SOFT_TDES_SUPPORT
1712 } else {
1713 cryp_register_symc_default(&func, SYMC_ALG_TDES, mode);
1714 func.create = ext_mbedtls_symc_create;
1715 func.destroy = ext_mbedtls_symc_destroy;
1716 func.setiv = ext_mbedtls_symc_setiv;
1717 func.getiv = ext_mbedtls_symc_getiv;
1718 func.setkey = ext_mbedtls_symc_setkey;
1719 func.setmode = ext_mbedtls_symc_setmode;
1720 func.crypto = ext_mbedtls_symc_crypto;
1721 func.waitdone = HI_NULL;
1722 ret = cryp_register_symc(&func);
1723 if (ret != HI_SUCCESS) {
1724 hi_log_print_func_err(cryp_register_symc, ret);
1725 return;
1726 }
1727 #endif
1728 }
1729 return;
1730 }
1731
cryp_register_symc_des(hi_u32 capacity,symc_mode mode)1732 static hi_void cryp_register_symc_des(hi_u32 capacity, symc_mode mode)
1733 {
1734 symc_func func;
1735 hi_s32 ret;
1736
1737 (hi_void)memset_s(&func, sizeof(symc_func), 0, sizeof(symc_func));
1738
1739 if (capacity == CRYPTO_CAPACITY_SUPPORT) {
1740 cryp_register_symc_default(&func, SYMC_ALG_DES, mode);
1741 func.setkey = cryp_des_setkey;
1742 ret = cryp_register_symc(&func);
1743 if (ret != HI_SUCCESS) {
1744 hi_log_print_func_err(cryp_register_symc, ret);
1745 return;
1746 }
1747 #ifdef SOFT_TDES_SUPPORT
1748 } else {
1749 cryp_register_symc_default(&func, SYMC_ALG_DES, mode);
1750 func.create = ext_mbedtls_symc_create;
1751 func.destroy = ext_mbedtls_symc_destroy;
1752 func.setiv = ext_mbedtls_symc_setiv;
1753 func.getiv = ext_mbedtls_symc_getiv;
1754 func.setkey = ext_mbedtls_symc_setkey;
1755 func.setmode = ext_mbedtls_symc_setmode;
1756 func.crypto = ext_mbedtls_symc_crypto;
1757 func.waitdone = HI_NULL;
1758 ret = cryp_register_symc(&func);
1759 if (ret != HI_SUCCESS) {
1760 hi_log_print_func_err(cryp_register_symc, ret);
1761 return;
1762 }
1763 #endif
1764 }
1765 return;
1766 }
1767
cryp_register_symc_sm1(hi_u32 capacity,symc_mode mode)1768 static hi_void cryp_register_symc_sm1(hi_u32 capacity, symc_mode mode)
1769 {
1770 symc_func func;
1771 hi_s32 ret;
1772
1773 (hi_void)memset_s(&func, sizeof(symc_func), 0, sizeof(symc_func));
1774
1775 if (capacity == CRYPTO_CAPACITY_SUPPORT) {
1776 cryp_register_symc_default(&func, SYMC_ALG_SM1, mode);
1777 func.setround = cryp_symc_sm1_setround;
1778 func.setkey = cryp_sm1_setkey;
1779 ret = cryp_register_symc(&func);
1780 if (ret != HI_SUCCESS) {
1781 hi_log_print_func_err(cryp_register_symc, ret);
1782 return;
1783 }
1784 }
1785 return;
1786 }
1787
cryp_register_symc_sm4(hi_u32 capacity,symc_mode mode)1788 static hi_void cryp_register_symc_sm4(hi_u32 capacity, symc_mode mode)
1789 {
1790 symc_func func;
1791
1792 crypto_unused(mode);
1793
1794 (hi_void)memset_s(&func, sizeof(symc_func), 0, sizeof(symc_func));
1795
1796 if (capacity == CRYPTO_CAPACITY_SUPPORT) {
1797 #ifdef CHIP_SYMC_SM4_SUPPORT
1798 hi_s32 ret;
1799
1800 cryp_register_symc_default(&func, SYMC_ALG_SM4, mode);
1801 func.setkey = cryp_sm4_setkey;
1802 ret = cryp_register_symc(&func);
1803 if (ret != HI_SUCCESS) {
1804 hi_log_print_func_err(cryp_register_symc, ret);
1805 return;
1806 }
1807 #endif
1808 } else {
1809 #ifdef SOFT_SM4_SUPPORT
1810 hi_s32 ret;
1811
1812 cryp_register_symc_default(&func, SYMC_ALG_SM4, mode);
1813 func.create = ext_sm4_create;
1814 func.destroy = ext_sm4_destroy;
1815 func.setiv = ext_sm4_setiv;
1816 func.getiv = ext_sm4_getiv;
1817 func.setkey = ext_sm4_setkey;
1818 func.setmode = ext_sm4_setmode;
1819 func.crypto = ext_sm4_crypto;
1820 ret = cryp_register_symc(&func);
1821 if (ret != HI_SUCCESS) {
1822 hi_log_print_func_err(cryp_register_symc, ret);
1823 return;
1824 }
1825 #endif
1826 }
1827 return;
1828 }
1829
1830 /* symc function register */
cryp_register_all_symc(hi_void)1831 static hi_void cryp_register_all_symc(hi_void)
1832 {
1833 symc_capacity capacity;
1834
1835 hi_log_func_enter();
1836
1837 (hi_void)memset_s(&capacity, sizeof(capacity), 0, sizeof(capacity));
1838
1839 /* get symc capacity */
1840 drv_symc_get_capacity(&capacity);
1841
1842 /*
1843 * register the symc function if supported.
1844 * AES.
1845 */
1846 cryp_register_symc_aes(capacity.aes_ecb, SYMC_MODE_ECB);
1847 cryp_register_symc_aes(capacity.aes_cbc, SYMC_MODE_CBC);
1848 cryp_register_symc_aes(capacity.aes_cfb, SYMC_MODE_CFB);
1849 cryp_register_symc_aes(capacity.aes_ofb, SYMC_MODE_OFB);
1850 cryp_register_symc_aes(capacity.aes_ctr, SYMC_MODE_CTR);
1851 cryp_register_symc_dma(capacity.dma, capacity.tdes_ecb);
1852
1853 /* AEAD */
1854 cryp_register_aead_ccm(capacity.aes_ccm, SYMC_MODE_CCM);
1855 cryp_register_aead_gcm(capacity.aes_gcm, SYMC_MODE_GCM);
1856
1857 /* TDES */
1858 cryp_register_symc_tdes(capacity.tdes_ecb, SYMC_MODE_ECB);
1859 cryp_register_symc_tdes(capacity.tdes_cbc, SYMC_MODE_CBC);
1860 cryp_register_symc_tdes(capacity.tdes_cfb, SYMC_MODE_CFB);
1861 cryp_register_symc_tdes(capacity.tdes_ofb, SYMC_MODE_OFB);
1862 cryp_register_symc_tdes(capacity.tdes_ctr, SYMC_MODE_CTR);
1863
1864 /* DES */
1865 cryp_register_symc_des(capacity.des_ecb, SYMC_MODE_ECB);
1866 cryp_register_symc_des(capacity.des_cbc, SYMC_MODE_CBC);
1867 cryp_register_symc_des(capacity.des_cfb, SYMC_MODE_CFB);
1868 cryp_register_symc_des(capacity.des_ofb, SYMC_MODE_OFB);
1869 cryp_register_symc_des(capacity.des_ctr, SYMC_MODE_CTR);
1870
1871 /* SM1 */
1872 cryp_register_symc_sm1(capacity.sm1_ecb, SYMC_MODE_ECB);
1873 cryp_register_symc_sm1(capacity.sm1_cbc, SYMC_MODE_CBC);
1874 cryp_register_symc_sm1(capacity.sm1_cfb, SYMC_MODE_CFB);
1875 cryp_register_symc_sm1(capacity.sm1_ofb, SYMC_MODE_OFB);
1876 cryp_register_symc_sm1(capacity.sm1_ctr, SYMC_MODE_CTR);
1877
1878 /* SM4 */
1879 cryp_register_symc_sm4(capacity.sm4_ecb, SYMC_MODE_ECB);
1880 cryp_register_symc_sm4(capacity.sm4_cbc, SYMC_MODE_CBC);
1881 cryp_register_symc_sm4(capacity.sm4_cfb, SYMC_MODE_CFB);
1882 cryp_register_symc_sm4(capacity.sm4_ofb, SYMC_MODE_OFB);
1883 cryp_register_symc_sm4(capacity.sm4_ctr, SYMC_MODE_CTR);
1884
1885 hi_log_func_exit();
1886
1887 return;
1888 }
1889
cryp_get_symc_alg(hi_cipher_alg alg,symc_alg * cryp_alg)1890 static hi_s32 cryp_get_symc_alg(hi_cipher_alg alg, symc_alg *cryp_alg)
1891 {
1892 symc_alg local_alg;
1893
1894 switch (alg) {
1895 case HI_CIPHER_ALG_DES:
1896 local_alg = SYMC_ALG_DES;
1897 break;
1898 case HI_CIPHER_ALG_3DES:
1899 local_alg = SYMC_ALG_TDES;
1900 break;
1901 case HI_CIPHER_ALG_AES:
1902 local_alg = SYMC_ALG_AES;
1903 break;
1904 case HI_CIPHER_ALG_SM1:
1905 local_alg = SYMC_ALG_SM1;
1906 break;
1907 case HI_CIPHER_ALG_SM4:
1908 local_alg = SYMC_ALG_SM4;
1909 break;
1910 case HI_CIPHER_ALG_DMA:
1911 local_alg = SYMC_ALG_NULL_CIPHER;
1912 break;
1913 default:
1914 hi_log_error("Invalid alg, alg = 0x%x.\n", alg);
1915 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
1916 return HI_ERR_CIPHER_INVALID_PARAM;
1917 }
1918
1919 *cryp_alg = local_alg;
1920 return HI_SUCCESS;
1921 }
1922
cryp_get_symc_mode(hi_cipher_work_mode mode,symc_mode * cryp_mode)1923 static hi_s32 cryp_get_symc_mode(hi_cipher_work_mode mode, symc_mode *cryp_mode)
1924 {
1925 symc_mode local_mode;
1926 switch (mode) {
1927 case HI_CIPHER_WORK_MODE_ECB:
1928 local_mode = SYMC_MODE_ECB;
1929 break;
1930 case HI_CIPHER_WORK_MODE_CBC:
1931 local_mode = SYMC_MODE_CBC;
1932 break;
1933 case HI_CIPHER_WORK_MODE_CFB:
1934 local_mode = SYMC_MODE_CFB;
1935 break;
1936 case HI_CIPHER_WORK_MODE_OFB:
1937 local_mode = SYMC_MODE_OFB;
1938 break;
1939 case HI_CIPHER_WORK_MODE_CTR:
1940 local_mode = SYMC_MODE_CTR;
1941 break;
1942 case HI_CIPHER_WORK_MODE_CCM:
1943 local_mode = SYMC_MODE_CCM;
1944 break;
1945 case HI_CIPHER_WORK_MODE_GCM:
1946 local_mode = SYMC_MODE_GCM;
1947 break;
1948 default:
1949 hi_log_error("Invalid mode, mode = 0x%x.\n", mode);
1950 hi_log_print_err_code(HI_ERR_CIPHER_INVALID_PARAM);
1951 return HI_ERR_CIPHER_INVALID_PARAM;
1952 }
1953
1954 *cryp_mode = local_mode;
1955 return HI_SUCCESS;
1956 }
1957
cryp_get_symc_op(hi_cipher_alg alg,hi_cipher_work_mode mode)1958 symc_func *cryp_get_symc_op(hi_cipher_alg alg, hi_cipher_work_mode mode)
1959 {
1960 hi_s32 ret;
1961 symc_mode cryp_mode = 0;
1962 symc_func *func = HI_NULL;
1963 symc_alg cryp_alg = 0;
1964 hi_cipher_work_mode local_mode;
1965
1966 hi_log_func_enter();
1967
1968 ret = cryp_get_symc_alg(alg, &cryp_alg);
1969 if (ret != HI_SUCCESS) {
1970 hi_log_print_func_err(cryp_get_symc_alg, ret);
1971 return HI_NULL;
1972 }
1973
1974 if (alg == HI_CIPHER_ALG_DMA) {
1975 local_mode = HI_CIPHER_WORK_MODE_ECB;
1976 } else {
1977 local_mode = mode;
1978 }
1979
1980 ret = cryp_get_symc_mode(local_mode, &cryp_mode);
1981 if (ret != HI_SUCCESS) {
1982 hi_log_print_func_err(cryp_get_symc_mode, ret);
1983 return HI_NULL;
1984 }
1985
1986 func = cryp_get_symc(cryp_alg, cryp_mode);
1987 if (func == HI_NULL) {
1988 hi_log_print_func_err(cryp_get_symc, HI_ERR_CIPHER_INVALID_POINT);
1989 return HI_NULL;
1990 }
1991
1992 hi_log_func_exit();
1993 return func;
1994 }
1995