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1 /*
2  * g2d_mixer_type/g2d_mixer_type.h
3  *
4  * Copyright (c) 2007-2019 Allwinnertech Co., Ltd.
5  * Author: zhengxiaobin <zhengxiaobin@allwinnertech.com>
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17 #ifndef _G2D_MIXER_TYPE_H
18 #define _G2D_MIXER_TYPE_H
19 
20 #define G2D_TOP        (0x00000)
21 #define G2D_MIXER      (0x00100)
22 #define G2D_BLD        (0x00400)
23 #define G2D_V0         (0x00800)
24 #define G2D_UI0        (0x01000)
25 #define G2D_UI1        (0x01800)
26 #define G2D_UI2        (0x02000)
27 #define G2D_WB         (0x03000)
28 #define G2D_VSU        (0x08000)
29 #define G2D_ROT        (0x28000)
30 #define G2D_GSU        (0x30000)
31 
32 
33 /*mixer overlay for video data define start*/
34 union g2d_mixer_ovl_attr {
35 	unsigned int dwval;
36 	struct {
37 		unsigned int lay_en:1;
38 		unsigned int alpha_mode:2;
39 		unsigned int res0:1;
40 		unsigned int lay_fillcolor_en:1;
41 		unsigned int res1:3;
42 		unsigned int lay_fbfmt:6;
43 		unsigned int res2:2;
44 		unsigned int lay_premul_ctl:2;
45 		unsigned int res3:6;
46 		unsigned int lay_glbalpha:8;
47 	} bits;
48 };
49 
50 union g2d_mixer_ovl_mem {
51 	unsigned int dwval;
52 	struct {
53 		unsigned int lay_width:13;
54 		unsigned int res0:3;
55 		unsigned int lay_height:13;
56 		unsigned int res1:3;
57 	} bits;
58 };
59 
60 union g2d_mixer_ovl_mem_coor {
61 	unsigned int dwval;
62 	struct {
63 		unsigned int lay_ycoor:16;
64 		unsigned int lay_xcoor:16;
65 	} bits;
66 };
67 
68 union g2d_mixer_ovl_mem_high_addr {
69 	unsigned int dwval;
70 	struct {
71 		unsigned int lay_y_hadd:8;
72 		unsigned int lay_u_hadd:8;
73 		unsigned int lay_v_hadd:8;
74 		unsigned int res0:8;
75 	} bits;
76 };
77 
78 union g2d_mixer_ovl_winsize {
79 	unsigned int dwval;
80 	struct {
81 		unsigned int width:13;
82 		unsigned int res0:3;
83 		unsigned int height:13;
84 		unsigned int res1:3;
85 	} bits;
86 };
87 
88 union g2d_mixer_ovl_down_sample {
89 	unsigned int dwval;
90 	struct {
91 		unsigned int M:14;
92 		unsigned int res0:2;
93 		unsigned int N:14;
94 		unsigned int res1:2;
95 	} bits;
96 };
97 
98 struct g2d_mixer_ovl_v_reg {
99 	/*0x00*/
100 	union g2d_mixer_ovl_attr ovl_attr;
101 	union g2d_mixer_ovl_mem ovl_mem;
102 	union g2d_mixer_ovl_mem_coor ovl_mem_coor;
103 	unsigned int ovl_mem_pitch0;
104 	/*0x10*/
105 	unsigned int ovl_mem_pitch1;
106 	unsigned int ovl_mem_pitch2;
107 	unsigned int ovl_mem_low_addr0;
108 	unsigned int ovl_mem_low_addr1;
109 	/*0x20*/
110 	unsigned int ovl_mem_low_addr2;
111 	unsigned int ovl_fill_color;
112 	union g2d_mixer_ovl_mem_high_addr ovl_mem_high_addr;
113 	union g2d_mixer_ovl_winsize ovl_winsize;
114 	/*0x30*/
115 	union g2d_mixer_ovl_down_sample hor_down_sample0;
116 	union g2d_mixer_ovl_down_sample hor_down_sample1;
117 	union g2d_mixer_ovl_down_sample ver_down_sample0;
118 	union g2d_mixer_ovl_down_sample ver_down_sample1;
119 };
120 /*mixer overlay for video data define end*/
121 
122 /*mixer overlay for UI data define start*/
123 
124 union g2d_mixer_ovl_u_attr {
125 	unsigned int dwval;
126 	struct {
127 		unsigned int lay_en:1;
128 		unsigned int alpha_mode:2;
129 		unsigned int res0:1;
130 		unsigned int lay_fillcolor_en:1;
131 		unsigned int res1:3;
132 		unsigned int lay_fbfmt:5;
133 		unsigned int res2:3;
134 		unsigned int lay_premul_ctl:2;
135 		unsigned int res3:6;
136 		unsigned int lay_glbalpha:8;
137 	} bits;
138 };
139 struct g2d_mixer_ovl_u_reg {
140 	/*0x00*/
141 	union g2d_mixer_ovl_u_attr ovl_attr;
142 	union g2d_mixer_ovl_mem ovl_mem;
143 	union g2d_mixer_ovl_mem_coor ovl_mem_coor;
144 	unsigned int ovl_mem_pitch0;
145 	/*0x10*/
146 	unsigned int ovl_mem_low_addr0;
147 	unsigned int ovl_fill_color;
148 	unsigned int ovl_mem_high_addr;
149 	union g2d_mixer_ovl_winsize ovl_winsize;
150 };
151 /*mixer overlay for UI data define end*/
152 
153 
154 /*mixer video scaler define start*/
155 union g2d_mixer_vs_ctrl {
156 	unsigned int dwval;
157 	struct {
158 		unsigned int en:1;
159 		unsigned int res0:7;
160 		unsigned int coef_access_sel:1;
161 		unsigned int res1:7;
162 		unsigned int filter_type:1;
163 		unsigned int res2:13;
164 		unsigned int core_rst:1;
165 		unsigned int bist_en:1;
166 	} bits;
167 };
168 
169 union g2d_mixer_vs_out_size {
170 	unsigned int dwval;
171 	struct {
172 		unsigned int out_width:13;
173 		unsigned int res0:3;
174 		unsigned int out_height:13;
175 		unsigned int res1:3;
176 	} bits;
177 };
178 
179 union g2d_mixer_vs_glb_alpha {
180 	unsigned int dwval;
181 	struct {
182 		unsigned int glb_alpha:8;
183 		unsigned int res0:24;
184 	} bits;
185 };
186 
187 union g2d_mixer_vs_ch_size {
188 	unsigned int dwval;
189 	struct {
190 		unsigned int y_width:13;
191 		unsigned int res0:3;
192 		unsigned int y_height:13;
193 		unsigned int res1:3;
194 	} bits;
195 };
196 
197 union g2d_mixer_vs_step {
198 	unsigned int dwval;
199 	struct {
200 		unsigned int res0:1;
201 		unsigned int frac:19;
202 		unsigned int integer:4;
203 		unsigned int res1:8;
204 	} bits;
205 };
206 
207 union g2d_mixer_vs_filter_coeff {
208 	unsigned int dwval;
209 	struct {
210 		unsigned int coff0:8;
211 		unsigned int coff1:8;
212 		unsigned int coff2:8;
213 		unsigned int coff3:8;
214 	} bits;
215 };
216 
217 struct g2d_mixer_video_scaler_reg {
218 	/*0x00*/
219 	union g2d_mixer_vs_ctrl vs_ctrl;
220 	unsigned int res0[15];
221 	/*0x40*/
222 	union g2d_mixer_vs_out_size out_size;
223 	union g2d_mixer_vs_glb_alpha glb_alpha;
224 	unsigned int res1[14];
225 	/*0x80*/
226 	union g2d_mixer_vs_ch_size y_ch_size;
227 	unsigned int res2;
228 	union g2d_mixer_vs_step y_hor_step;
229 	union g2d_mixer_vs_step y_ver_step;
230 	/*0x90*/
231 	union g2d_mixer_vs_step y_hor_phase;
232 	unsigned int res3;
233 	union g2d_mixer_vs_step y_ver_phase;
234 	unsigned int res4[9];
235 	/*0xc0*/
236 	union g2d_mixer_vs_ch_size c_ch_size;
237 	unsigned int res5;
238 	union g2d_mixer_vs_step c_hor_step;
239 	union g2d_mixer_vs_step c_ver_step;
240 	/*0xd0*/
241 	union g2d_mixer_vs_step c_hor_phase;
242 	unsigned int res6;
243 	union g2d_mixer_vs_step c_ver_phase;
244 	unsigned int res7[73];
245 	union g2d_mixer_vs_filter_coeff vs_y_ch_hor_filter_coef[32];
246 	unsigned int res8[32];
247 	union g2d_mixer_vs_filter_coeff vs_y_ch_ver_filter_coef[32];
248 	unsigned int res9[32];
249 	union g2d_mixer_vs_filter_coeff vs_c_ch_hor_filter_coef[32];
250 };
251 /*mixer video scaler define end*/
252 
253 /*mixer video blender define start*/
254 union g2d_mixer_bld_en_ctrl {
255 	unsigned int dwval;
256 	struct {
257 		unsigned int p0_fcen:1;
258 		unsigned int p1_fcen:1;
259 		unsigned int res0:6;
260 		unsigned int p0_en:1;
261 		unsigned int p1_en:1;
262 		unsigned int res1:22;
263 	} bits;
264 };
265 
266 union g2d_mixer_bld_mem_size {
267 	unsigned int dwval;
268 	struct {
269 		unsigned int width:13;
270 		unsigned int res0:3;
271 		unsigned int height:13;
272 		unsigned int res1:3;
273 	} bits;
274 };
275 
276 union g2d_mixer_bld_mem_coor {
277 	unsigned int dwval;
278 	struct {
279 		unsigned int xcoor:16;
280 		unsigned int ycoor:16;
281 	} bits;
282 };
283 
284 union g2d_mixer_bld_premulti_ctrl {
285 	unsigned int dwval;
286 	struct {
287 		unsigned int p0_alpha_mode:1;
288 		unsigned int p1_alpha_mode:1;
289 		unsigned int res0:30;
290 	} bits;
291 };
292 
293 union g2d_mixer_bld_ctrl {
294 	unsigned int dwval;
295 	struct {
296 		unsigned int blend_pfs:4;
297 		unsigned int res0:4;
298 		unsigned int blend_pfd:4;
299 		unsigned int res1:4;
300 		unsigned int blend_afs:4;
301 		unsigned int res2:4;
302 		unsigned int blend_afd:4;
303 		unsigned int res3:4;
304 	} bits;
305 };
306 
307 union g2d_mixer_bld_color_key {
308 	unsigned int dwval;
309 	struct {
310 		unsigned int key0_en:1;
311 		unsigned int key0_match_dir:2;
312 		unsigned int res0:29;
313 	} bits;
314 };
315 
316 union g2d_mixer_bld_color_key_cfg {
317 	unsigned int dwval;
318 	struct {
319 		unsigned int key0b_match:1;
320 		unsigned int key0g_match:1;
321 		unsigned int key0y_match:1;
322 		unsigned int res0:29;
323 	} bits;
324 };
325 
326 
327 union g2d_mixer_bld_color_key_max {
328 	unsigned int dwval;
329 	struct {
330 		unsigned int max_b:8;
331 		unsigned int max_g:8;
332 		unsigned int max_r:8;
333 		unsigned int res0:8;
334 	} bits;
335 };
336 
337 union g2d_mixer_bld_color_key_min {
338 	unsigned int dwval;
339 	struct {
340 		unsigned int min_b:8;
341 		unsigned int min_g:8;
342 		unsigned int min_r:8;
343 		unsigned int res0:8;
344 	} bits;
345 };
346 
347 union g2d_mixer_bld_output_color {
348 	unsigned int dwval;
349 	struct {
350 		unsigned int premul_en:1;
351 		unsigned int alpha_mode:1;
352 		unsigned int res0:30;
353 	} bits;
354 };
355 
356 
357 
358 union g2d_mixer_rop_ctrl {
359 	unsigned int dwval;
360 	struct {
361 		unsigned int type:1;
362 		unsigned int res0:3;
363 		unsigned int blue_bypass_en:1;
364 		unsigned int green_bypass_en:1;
365 		unsigned int red_bypass_en:1;
366 		unsigned int alpha_bypass_en:1;
367 		unsigned int blue_ch_sel:2;
368 		unsigned int green_ch_sel:2;
369 		unsigned int red_ch_sel:2;
370 		unsigned int alpha_ch_sel:2;
371 		unsigned int res1:16;
372 	} bits;
373 };
374 
375 union g2d_mixer_rop_ch3_index0 {
376 	unsigned int dwval;
377 	struct {
378 		unsigned int index0node0:3;
379 		unsigned int index0node1:1;
380 		unsigned int index0node2:1;
381 		unsigned int index0node3:1;
382 		unsigned int index0node4:4;
383 		unsigned int index0node5:1;
384 		unsigned int index0node6:4;
385 		unsigned int index0node7:1;
386 		unsigned int ch0ign_en:1;
387 		unsigned int ch1ign_en:1;
388 		unsigned int ch2ign_en:1;
389 		unsigned int res0:13;
390 	} bits;
391 };
392 
393 union g2d_mixer_bld_cs_ctrl {
394 	unsigned int dwval;
395 	struct {
396 		unsigned int cs0_en:1;
397 		unsigned int cs1_en:1;
398 		unsigned int cs2_en:1;
399 		unsigned int res0:29;
400 	} bits;
401 };
402 
403 union g2d_mixer_bld_cs_coeff {
404 	unsigned int dwval;
405 	struct {
406 		unsigned int coeff:13;
407 		unsigned int res0:19;
408 	} bits;
409 };
410 
411 union g2d_mixer_bld_cs_const {
412 	unsigned int dwval;
413 	struct {
414 		unsigned int const:20;
415 		unsigned int res0:12;
416 	} bits;
417 };
418 
419 
420 struct g2d_mixer_bld_reg {
421 	/*0x00*/
422 	union g2d_mixer_bld_en_ctrl bld_en_ctrl;
423 	unsigned int res0[3];
424 	/*0x10*/
425 	unsigned int bld_fill_color[2];
426 	unsigned int res1[2];
427 	/*0x20*/
428 	union g2d_mixer_bld_mem_size mem_size[2];
429 	unsigned int res2[2];
430 	/*0x30*/
431 	union g2d_mixer_bld_mem_coor mem_coor[2];
432 	unsigned int res3[2];
433 	/*0x40*/
434 	union g2d_mixer_bld_premulti_ctrl premulti_ctrl;
435 	unsigned int bld_backgroud_color;
436 	union g2d_mixer_bld_mem_size out_size;
437 	union g2d_mixer_bld_ctrl bld_ctrl;
438 	/*0x50*/
439 	union g2d_mixer_bld_color_key color_key;
440 	union g2d_mixer_bld_color_key_cfg color_key_cfg;
441 	union g2d_mixer_bld_color_key_max color_key_max;
442 	union g2d_mixer_bld_color_key_min color_key_min;
443 	/*0x60*/
444 	union g2d_mixer_bld_output_color out_color;
445 	unsigned int res4[7];
446 	/*0x80*/
447 	union g2d_mixer_rop_ctrl rop_ctrl;
448 	union g2d_mixer_rop_ch3_index0 ch3_index0;
449 	union g2d_mixer_rop_ch3_index0 ch3_index1;
450 	unsigned int res5[29];
451 	/*0x100*/
452 	union g2d_mixer_bld_cs_ctrl cs_ctrl;
453 	unsigned int res6[3];
454 	/*0x110*/
455 	union g2d_mixer_bld_cs_coeff csc0_coeff0_reg0;
456 	union g2d_mixer_bld_cs_coeff csc0_coeff0_reg1;
457 	union g2d_mixer_bld_cs_coeff csc0_coeff0_reg2;
458 	union g2d_mixer_bld_cs_const csc0_const0;
459 	/*0x120*/
460 	union g2d_mixer_bld_cs_coeff csc0_coeff1_reg0;
461 	union g2d_mixer_bld_cs_coeff csc0_coeff1_reg1;
462 	union g2d_mixer_bld_cs_coeff csc0_coeff1_reg2;
463 	union g2d_mixer_bld_cs_const csc0_const1;
464 	/*0x130*/
465 	union g2d_mixer_bld_cs_coeff csc0_coeff2_reg0;
466 	union g2d_mixer_bld_cs_coeff csc0_coeff2_reg1;
467 	union g2d_mixer_bld_cs_coeff csc0_coeff2_reg2;
468 	union g2d_mixer_bld_cs_const csc0_const2;
469 	/*0x140*/
470 	union g2d_mixer_bld_cs_coeff csc1_coeff0_reg0;
471 	union g2d_mixer_bld_cs_coeff csc1_coeff0_reg1;
472 	union g2d_mixer_bld_cs_coeff csc1_coeff0_reg2;
473 	union g2d_mixer_bld_cs_const csc1_const0;
474 	/*0x150*/
475 	union g2d_mixer_bld_cs_coeff csc1_coeff1_reg0;
476 	union g2d_mixer_bld_cs_coeff csc1_coeff1_reg1;
477 	union g2d_mixer_bld_cs_coeff csc1_coeff1_reg2;
478 	union g2d_mixer_bld_cs_const csc1_const1;
479 	/*0x160*/
480 	union g2d_mixer_bld_cs_coeff csc1_coeff2_reg0;
481 	union g2d_mixer_bld_cs_coeff csc1_coeff2_reg1;
482 	union g2d_mixer_bld_cs_coeff csc1_coeff2_reg2;
483 	union g2d_mixer_bld_cs_const csc1_const2;
484 	/*0x170*/
485 	union g2d_mixer_bld_cs_coeff csc2_coeff0_reg0;
486 	union g2d_mixer_bld_cs_coeff csc2_coeff0_reg1;
487 	union g2d_mixer_bld_cs_coeff csc2_coeff0_reg2;
488 	union g2d_mixer_bld_cs_const csc2_const0;
489 	/*0x180*/
490 	union g2d_mixer_bld_cs_coeff csc2_coeff1_reg0;
491 	union g2d_mixer_bld_cs_coeff csc2_coeff1_reg1;
492 	union g2d_mixer_bld_cs_coeff csc2_coeff1_reg2;
493 	union g2d_mixer_bld_cs_const csc2_const1;
494 	/*0x190*/
495 	union g2d_mixer_bld_cs_coeff csc2_coeff2_reg0;
496 	union g2d_mixer_bld_cs_coeff csc2_coeff2_reg1;
497 	union g2d_mixer_bld_cs_coeff csc2_coeff2_reg2;
498 	union g2d_mixer_bld_cs_const csc2_const2;
499 };
500 /*mixer video blender define end*/
501 
502 /*mixer write back start*/
503 union g2d_mxier_wb_attr {
504 	unsigned int dwval;
505 	struct {
506 		unsigned int fmt:6;
507 		unsigned int res0:2;
508 		unsigned int round_en:1;
509 		unsigned int res1:23;
510 	} bits;
511 };
512 
513 union g2d_mxier_wb_data_size {
514 	unsigned int dwval;
515 	struct {
516 		unsigned int width:13;
517 		unsigned int res0:3;
518 		unsigned int height:13;
519 		unsigned int res1:3;
520 	} bits;
521 };
522 
523 struct g2d_mixer_write_back_reg {
524 	/*0x00*/
525 	union g2d_mxier_wb_attr wb_attr;
526 	union g2d_mxier_wb_data_size data_size;
527 	unsigned int pitch0;
528 	unsigned int pitch1;
529 	/*0x10*/
530 	unsigned int pitch2;
531 	unsigned int laddr0;
532 	unsigned int haddr0;
533 	unsigned int laddr1;
534 	/*0x20*/
535 	unsigned int haddr1;
536 	unsigned int laddr2;
537 	unsigned int haddr2;
538 };
539 /*mixer write back end*/
540 
541 #endif /*End of file*/
542