1 /* 2 * A V4L2 driver for nvp6158c yuv cameras. 3 * 4 * Copyright (c) 2019 by Allwinnertech Co., Ltd. http://www.allwinnertech.com 5 * 6 * Authors: Zheng Zequn<zequnzheng@allwinnertech.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 #ifndef _RAPTOR3_VIDEO_AUTO_DETECT_H_ 13 #define _RAPTOR3_VIDEO_AUTO_DETECT_H_ 14 15 #include "common.h" 16 17 typedef enum CH_NUM { 18 CH1 = 0, 19 CH2, 20 CH3, 21 CH4 22 } CH_NUM; 23 24 typedef struct _video_input_vafe { 25 unsigned char powerdown; /* B0 0x00/1/2/3 [0] */ 26 unsigned char gain; /* B0 0x00/1/2/3 [4] */ 27 unsigned char spd; /* B5/6/7/8 0x00 [5:4] */ 28 29 unsigned char ctrlreg; /* B5/6/7/8 0x01 [6] */ 30 unsigned char ctrlibs; /* B5/6/7/8 0x01 [5:4] */ 31 unsigned char adcspd; /* B5/6/7/8 0x01 [2] */ 32 unsigned char clplevel; /* B5/6/7/8 0x01 [1:0] */ 33 34 35 unsigned char eq_band; /* B5/6/7/8 0x58 [6:4] */ 36 unsigned char lpf_front_band; /* B5/6/7/8 0x58 [1:0] */ 37 38 unsigned char clpmode; /* B5/6/7/8 0x59 [7] */ 39 unsigned char f_lpf_bypass; /* B5/6/7/8 0x59 [4] */ 40 unsigned char clproff; /* B5/6/7/8 0x59 [3] */ 41 unsigned char b_lpf_bypass; /* B5/6/7/8 0x59 [0] */ 42 43 unsigned char duty; /* B5/6/7/8 0x5B [6:4] */ 44 unsigned char ref_vol; /* B5/6/7/8 0x5B [1:0] */ 45 46 unsigned char lpf_back_band; /* B5/6/7/8 0x5C [6:4] */ 47 unsigned char clk_sel; /* B5/6/7/8 0x5C [3] */ 48 unsigned char eq_gainsel; /* B5/6/7/8 0x5C [2:0] */ 49 50 } video_input_vafe; 51 52 typedef struct _video_input_auto_detect { 53 unsigned char ch; 54 unsigned char devnum; 55 56 unsigned char d_cmp; /* B5/6/7/8 0x03 */ 57 unsigned char slice_level; /* B5/6/7/8 0x08 */ 58 unsigned char control_mode; /* B5/6/7/8 0x47 */ 59 unsigned char gdf_fix_coeff; /* B5/6/7/8 0x50 */ 60 unsigned char dfe_ref_sel; /* B5/6/7/8 0x76 */ 61 unsigned char wpd_77; /* B5/6/7/8 0x77 */ 62 unsigned char wpd_78; /* B5/6/7/8 0x78 */ 63 unsigned char wpd_79; /* B5/6/7/8 0x79 */ 64 unsigned char auto_gnos_mode; /* B5/6/7/8 0x82 */ 65 unsigned char auto_sync_mode; /* B5/6/7/8 0x83 */ 66 unsigned char hafc_bypass; /* B5/6/7/8 0xB8 */ 67 68 unsigned char novid_vfc_init; /* B13 0x31 */ 69 unsigned char stable_mode_1; /* B13 0x0 */ 70 unsigned char stable_mode_2; /* B13 0x1 */ 71 72 unsigned char novid_det; /* B0 0x23/0x27/0x2B/0x2F */ 73 video_input_vafe vafe; 74 } video_input_auto_detect; 75 76 typedef struct _video_input_novid { 77 unsigned char ch; 78 unsigned char novid; /* B0 0xa8 [3:0] MSB 1Ch ~ LSB 4Ch */ 79 unsigned char devnum; 80 } video_input_novid; 81 82 typedef struct _video_input_vfc { 83 unsigned char ch; 84 unsigned char vfc; /* B5/6/7/8 0xf0 */ 85 unsigned char devnum; 86 } video_input_vfc; 87 88 typedef struct _video_input_onvid_set { 89 unsigned char ch; 90 unsigned char auto_gnos_mode; /* B5/6/7/8 0x82 */ 91 unsigned char auto_sync_mode; /* B5/6/7/8 0x83 */ 92 unsigned char op_md; /* B5/6/7/8 0xB8 */ 93 } video_input_onvid_set; 94 95 typedef struct _video_input_onvid_set_2 { 96 unsigned char ch; 97 unsigned char dfe_ref_sel; /* B5/6/7/8 0x76 */ 98 unsigned char wpd_77; /* B5/6/7/8 0x77 */ 99 unsigned char wpd_78; /* B5/6/7/8 0x78 */ 100 unsigned char wpd_79; /* B5/6/7/8 0x79 */ 101 unsigned char slice_mode; /* B5/6/7/8 0x0E */ 102 } video_input_onvid_set_2; 103 104 typedef struct _video_input_novid_set { 105 unsigned char ch; 106 unsigned char devnum; 107 unsigned char control_mode; 108 unsigned char gdf_fix_coeff; 109 unsigned char auto_gnos_mode; 110 unsigned char auto_sync_mode; 111 unsigned char hafc_bypass; 112 unsigned char dfe_ref_sel; /* B5/6/7/8 0x76 */ 113 unsigned char wpd_77; /* B5/6/7/8 0x77 */ 114 unsigned char wpd_78; /* B5/6/7/8 0x78 */ 115 unsigned char wpd_79; /* B5/6/7/8 0x79 */ 116 unsigned char slice_mode; /* B5/6/7/8 0x0E */ 117 } video_input_novid_set; 118 119 typedef struct _video_input_cable_dist { 120 unsigned char ch; 121 unsigned char devnum; 122 unsigned char dist; /* B13 0xA0 */ 123 unsigned char FmtDef; 124 unsigned char cabletype; /* 0:coax, 1:utp, 2:reserved1, 3:reserved2 */ 125 } video_input_cable_dist; 126 127 typedef struct _video_input_sam_val { 128 unsigned char ch; 129 unsigned char devnum; 130 /* 131 unsigned char sam_val_1; // B13 0xCD [7:0] 132 unsigned char sam_val_2; // B13 0xCC [9:8] 133 */ 134 unsigned int sam_val; 135 } video_input_sam_val; 136 137 typedef struct _video_input_hsync_accum { 138 unsigned char ch; 139 unsigned char devnum; 140 unsigned char h_lock; /* Bank 0 0xE2 [3:0] [Ch3:Ch0] */ 141 unsigned int hsync_accum_val1; /* Value 1 // 170210 Add */ 142 unsigned int hsync_accum_val2; /* Value 2 // 170210 Add */ 143 unsigned int hsync_accum_result; /* Value 1 - Value 2 // 170210 Fix */ 144 } video_input_hsync_accum; 145 146 typedef struct _video_input_agc_val { 147 unsigned char ch; 148 unsigned char devnum; 149 unsigned char agc_lock; 150 unsigned char agc_val; /* B13 0xB8 */ 151 } video_input_agc_val; 152 153 typedef struct _video_input_format_set_done { /* [add] 170209 format set done */ 154 unsigned char ch; 155 unsigned char set_val; /* B13 0x70 [3:0] each channel */ 156 } video_input_format_set_done; 157 158 typedef struct _video_input_fsc_val { 159 unsigned char ch; 160 unsigned char devnum; 161 unsigned int fsc_val1; 162 unsigned int fsc_val2; 163 unsigned int fsc_final; 164 } video_input_fsc_val; 165 166 typedef struct _video_input_aeq_set { /* 170214 AEQ Set */ 167 unsigned char ch; 168 unsigned char aeq_val; /*B5/6/7/8 0x58 [7:4] */ 169 } video_input_aeq_set; 170 171 typedef struct _video_input_deq_set { /* 170214 DEQ Set */ 172 unsigned char ch; 173 unsigned char deq_val; /* B9 0x80/0xA0/0xC0/0xE0 [3:0] */ 174 } video_input_deq_set; 175 176 typedef struct _video_input_vfc_set { /* 170215 VFC Setting Enable (temp) */ 177 unsigned char ch; 178 unsigned char set_val; 179 } video_input_vfc_set; 180 181 182 typedef struct _video_input_acc_gain_val { /* 170215 acc gain value read */ 183 unsigned char ch; 184 unsigned char devnum; 185 unsigned int acc_gain_val; 186 unsigned char func_sel; 187 } video_input_acc_gain_val; 188 189 typedef struct _video_input_sleep_time_val {/* 170215 acc gain value read */ 190 unsigned char sleep_val; 191 } video_input_sleep_time_val; 192 193 typedef struct _video_input_agc_reset_val { /* 170221 agc init */ 194 unsigned char ch; 195 unsigned char reset_val; 196 } video_input_agc_reset_val; 197 198 typedef struct _video_output_data_out_mode { 199 unsigned char ch; 200 unsigned char devnum; 201 unsigned char set_val; 202 } video_output_data_out_mode; 203 204 typedef struct _video_input_manual_mode { 205 unsigned char ch; 206 unsigned char dev_num; 207 } video_input_manual_mode; 208 209 typedef struct _video_input_onvideo_check_s { 210 unsigned char vfc; 211 unsigned char sw_rst_ret; 212 decoder_dev_ch_info_s info; 213 } video_input_onvideo_check_s; 214 215 216 void video_input_auto_detect_set(video_input_auto_detect *vin_auto_det); 217 void video_input_vfc_read(video_input_vfc *vin_vfc); 218 void video_input_novid_read(video_input_novid *vin_novid); /* 170204 novid */ 219 void video_input_no_video_set(video_input_novid *auto_novid); /* 170206 novideo set */ 220 void video_input_cable_dist_read(video_input_cable_dist *vin_cable_dist); /* 170207 Cable Distance */ 221 void video_input_sam_val_read(video_input_sam_val *vin_sam_val); /* 170207 SAM Value */ 222 void video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum); /* 170207 Hsync Accumulation */ 223 void video_input_agc_val_read(video_input_agc_val *vin_agc_val); /* 170207 AGC Value */ 224 void video_input_fsc_val_read(video_input_fsc_val *vin_fsc_val); /* 170214 fsc value read */ 225 void video_input_aeq_val_set(video_input_aeq_set *vin_aeq_val); /* 170214 aeq value set */ 226 void video_input_deq_val_set(video_input_deq_set *vin_deq_val); /* 170214 deq value set */ 227 void video_input_acc_gain_val_read(video_input_acc_gain_val *vin_acc_gain); /* 170215 acc gain value read */ 228 void video_output_data_out_mode_set(video_output_data_out_mode *vo_data_out_mode); /* 170329 Data Out Mode Setting Func */ 229 void video_input_manual_mode_set(video_input_manual_mode *vin_manual_det); /* 170330 Manual Mode Set */ 230 void video_input_onvideo_set(decoder_dev_ch_info_s *decoder_info); 231 232 void video_input_onvideo_check_data(video_input_vfc *vin_vfc); 233 void video_input_auto_ch_sw_rst(decoder_dev_ch_info_s *decoder_info); 234 235 int video_input_cable_measure_way(unsigned char ch, unsigned char devnum); 236 void video_input_vafe_reset(decoder_dev_ch_info_s *decoder_info); 237 void video_input_vafe_control(decoder_dev_ch_info_s *decoder_info, int cmd); 238 void video_input_manual_agc_stable_endi(decoder_dev_ch_info_s *decoder_info, int endi); 239 void video_input_ahd_tvi_distinguish(decoder_dev_ch_info_s *decoder_info); 240 void video_input_cvi_tvi_distinguish(decoder_dev_ch_info_s *decoder_info); 241 void video_input_cvi_ahd_1080p_distinguish(decoder_dev_ch_info_s *decoder_info); 242 void video_input_ahd_nrt_distinguish(decoder_dev_ch_info_s *decoder_info); 243 unsigned char __IsOver3MRTVideoFormat(decoder_dev_ch_info_s *decoder_info); 244 NC_VIVO_CH_FORMATDEF NC_VD_AUTO_VFCtoFMTDEF(unsigned char ch, unsigned char VFC); 245 void nvp6168_video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum); 246 void nvp6168_video_input_onvideo_set(decoder_dev_ch_info_s *decoder_info); 247 void nvp6168_video_input_vfc_read(video_input_vfc *vin_vfc); 248 void nvp6168_video_input_auto_detect_set(video_input_auto_detect *vin_auto_det); 249 void nvp6168_video_input_no_video_set(video_input_novid *auto_novid); 250 void nvp6168_video_input_cvi_tvi_5M20p_distinguish(decoder_dev_ch_info_s *decoder_info); 251 252 #endif /* _RAPTOR3_VIDEO_AUTO_DETECT_H_ */ 253