1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 22 typedef void (*dma2d_isr_t)(void); 23 24 25 /** 26 * @brief dma2d macos define 27 * @{ 28 */ 29 30 #define USE_HAL_DMA2D_REGISTER_CALLBACKS 0 /**< if use int type isr register, set this value 1. 31 always use with API @refs bk_dma2d_register_int_callback_isr*/ 32 33 #define DMA2D_OCOLR_BLUE_1 (0x000000FFUL) /**< define Mode_ARGB8888/RGB888 Blue Value */ 34 #define DMA2D_OCOLR_GREEN_1 (0x0000FF00UL) /**< define Mode_ARGB8888/RGB888 Green Value */ 35 #define DMA2D_OCOLR_RED_1 (0x00FF0000UL) /**< define Mode_ARGB8888/RGB888 Red Value */ 36 #define DMA2D_OCOLR_YELLOW_1 (0x00FFFF00UL) /**< define Mode_ARGB8888/RGB888 yellow Value */ 37 #define DMA2D_OCOLR_ALPHA_1 (0xFF000000UL) /**< define Mode_ARGB8888/RGB888Alpha Channel Value */ 38 39 #define DMA2D_OCOLR_BLUE_2 (0x0000001FUL) /**<define Mode_RGB565 Blue Value */ 40 #define DMA2D_OCOLR_GREEN_2 (0x000007E0UL) /**<define Mode_RGB565 Green Value */ 41 #define DMA2D_OCOLR_RED_2 (0x0000F800UL) /**<define Mode_RGB565Red Value */ 42 43 #define DMA2D_OCOLR_BLUE_3 (0x0000001FUL) /**< define Mode_ARGB1555 Blue Value */ 44 #define DMA2D_OCOLR_GREEN_3 (0x000003E0UL) /**< define Mode_ARGB1555Green Value */ 45 #define DMA2D_OCOLR_RED_3 (0x00007C00UL) /**< define Mode_ARGB1555 Red Value */ 46 #define DMA2D_OCOLR_ALPHA_3 (0x00008000UL) /**<define Mode_ARGB1555 Alpha Channel Value */ 47 48 #define DMA2D_OCOLR_BLUE_4 (0x0000000FUL) /**< define Mode_ARGB4444 Blue Value */ 49 #define DMA2D_OCOLR_GREEN_4 (0x000000F0UL) /**< define Mode_ARGB4444 Green Value */ 50 #define DMA2D_OCOLR_RED_4 (0x00000F00UL) /**< define Mode_ARGB4444 Red Value */ 51 #define DMA2D_OCOLR_ALPHA_4 (0x0000F000UL) /**< define Mode_ARGB4444 Alpha Channel Value */ 52 53 54 #define DMA2D_BACKGROUND_LAYER 0x00000000U /**< DMA2D Background Layer (layer 0) */ 55 #define DMA2D_FOREGROUND_LAYER 0x00000001U /**< DMA2D Foreground Layer (layer 1) */ 56 #define MAX_DMA2D_LAYER 2U /**< DMA2D maximum number of layers */ 57 58 #define DMA2D_NO_MODIF_ALPHA 0x00000000U /**< define DMA2D Alpha Mode: No modification of the alpha channel value */ 59 #define DMA2D_REPLACE_ALPHA 0x00000001U /**< Replace original alpha channel value by programmed alpha value */ 60 #define DMA2D_COMBINE_ALPHA 0x00000002U /**< Replace original foreground image alpha channel value by ALPHA[7:0] multiplied with original alpha channel value */ 61 62 #define DMA2D_REGULAR_ALPHA 0x00000000U /**< No modification of the alpha channel value */ 63 #define DMA2D_INVERTED_ALPHA 0x00000001U /**< Invert the alpha channel value */ 64 65 #define DMA2D_RB_REGULAR 0x00000000U /**< Select regular mode (RGB or ARGB) */ 66 #define DMA2D_RB_SWAP 0x00000001U /**< Select swap mode (BGR or ABGR) */ 67 68 /** 69 * @} 70 */ 71 72 73 #if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1) 74 /** 75 * @brief if USE_HAL_DMA2D_REGISTER_CALLBACKS = 1, define int isr register id 76 * @{ 77 */ 78 typedef enum 79 { 80 DMA2D_CFG_ERROR_ISR = 0, 81 DMA2D_CLUT_TRANS_COMPLETE_ISR, 82 DMA2D_CLUT_TRANS_ERROR_ISR, 83 DMA2D_WARTERMARK_INT_ISR, 84 DMA2D_TRANS_COMPLETE_ISR, 85 DMA2D_TRANS_ERROR_ISR, 86 87 }dm2d_isr_id_t; 88 89 90 /** @defgroup DMA2D_ISR_NUM 91 * @{ 92 */ 93 #define DMA2D_ISR_NUM 6 94 95 /** 96 * @} 97 */ 98 /** 99 * @} 100 */ 101 102 #endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */ 103 104 105 106 /** 107 * @brief DMA2D enum defines 108 * @{ 109 */ 110 111 /** DMA2D_Mode */ 112 typedef enum { 113 DMA2D_M2M = 0x00000000U, /**< DMA2D memory to memory transfer mode */ 114 DMA2D_M2M_PFC, /**< DMA2D memory to memory with pixel format conversion transfer mode */ 115 DMA2D_M2M_BLEND, /**< DMA2D memory to memory with blending transfer mode */ 116 DMA2D_R2M, /**< DMA2D register to memory transfer mode */ 117 DMA2D_M2M_BLEND_FG, /**< DMA2D memory to memory with blending transfer mode and fixed color FG */ 118 DMA2D_M2M_BLEND_BG /**< DMA2D memory to memory with blending transfer mode and fixed color BG */ 119 } dma2d_mode_t; 120 121 typedef enum { 122 NO_REVERSE = 0, /**<in output rgb888 formart, not reverse data byte by byte*/ 123 REVERSE, /**< in output rgb888 formart, reverse data byte by byte */ 124 } rgb888_dataout_reverse_t; 125 126 127 /** DMA2D_Output_Color_Mode */ 128 typedef enum { 129 DMA2D_OUTPUT_ARGB8888 = 0, /**< ARGB8888 DMA2D color mode */ 130 DMA2D_OUTPUT_RGB888, /**< RGB888 DMA2D color mode */ 131 DMA2D_OUTPUT_RGB565, /**< RGB565 DMA2D color mode */ 132 DMA2D_OUTPUT_ARGB1555, /**< ARGB1555 DMA2D color mode */ 133 DMA2D_OUTPUT_ARGB4444, /**< ARGB4444 DMA2D color mode */ 134 } out_color_mode_t; 135 136 137 /** DMA2D_Input_Color_Mode*/ 138 typedef enum { 139 DMA2D_INPUT_ARGB8888 = 0, /**< ARGB8888 DMA2D color mode */ 140 DMA2D_INPUT_RGB888, /**< RGB888 DMA2D color mode */ 141 DMA2D_INPUT_RGB565, /**< RGB565 DMA2D color mode */ 142 DMA2D_INPUT_ARGB1555, /**< ARGB1555 DMA2D color mode */ 143 DMA2D_INPUT_ARGB4444, /**< ARGB4444 DMA2D color mode */ 144 DMA2D_INPUT_L8 = 5, 145 DMA2D_INPUT_AL44, 146 DMA2D_INPUT_AL88, 147 DMA2D_INPUT_L4, 148 DMA2D_INPUT_A8, 149 DMA2D_INPUT_A4, 150 } input_color_mode_t; 151 152 /** dma2d int type*/ 153 typedef enum 154 { 155 DMA2D_CFG_ERROR = (0x1UL << 13U), 156 DMA2D_CLUT_TRANS_COMPLETE = (0x1UL << 12U), 157 DMA2D_CLUT_TRANS_ERROR = (0x1UL << 11U), 158 DMA2D_WARTERMARK_INT = (0x1UL << 10U), 159 DMA2D_TRANS_COMPLETE = (0x1UL << 9U), 160 DMA2D_TRANS_ERROR = (0x1UL << 8U), 161 DMA2D_ALL_INI = (0X3F << 8) 162 163 }dma2d_int_type_t; 164 165 /** dma2d int status*/ 166 typedef enum 167 { 168 DMA2D_TRANS_ERROR_STATUS = 0x1, 169 DMA2D_TRANS_COMPLETE_STATUS, 170 DMA2D_WARTERMARK_INT_STATUS, 171 DMA2D_CLUT_TRANS_ERROR_STATUS, 172 DMA2D_CLUT_TRANS_COMPLETE_STATUS, 173 DMA2D_CFG_ERROR_STATUS 174 }dma2d_int_status_t; 175 176 typedef enum { 177 MAX_TRANS_256BYTES = 0, 178 TRANS_192BYTES, 179 TRANS_128BYTES, 180 TRANS_64BYTES 181 } dma2d_trans_ability_t; 182 183 /** 184 * @} 185 */ 186 187 188 /** 189 * @brief DMA2D Init structure definition 190 */ 191 typedef struct 192 { 193 dma2d_mode_t mode; /**< Configures the DMA2D transfer mode.his parameter can be one value of @ref DMA2D_Mode. */ 194 uint32_t color_mode; /**< Configures the color format of the output image. 195 This parameter can be one value of @ref DMA2D_Output_Color_Mode. */ 196 uint32_t output_offset; /**< Specifies the Offset value. 197 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */ 198 uint32_t alpha_inverted; /**< Select regular or inverted alpha value for the output pixel format converter. 199 This parameter can be one value of @ref DMA2D_Alpha_Inverted. */ 200 uint32_t line_offset_mode; /**< Configures how is expressed the line offset for the foreground, background and output. 201 This parameter can be one value of @ref DMA2D_Line_Offset_Mode. */ 202 uint32_t red_blue_swap; /**< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR) 203 for the output pixel format converter. 204 This parameter can be one value of @ref DMA2D_RB_Swap. */ 205 rgb888_dataout_reverse_t data_reverse; /**< in output rgb888 formart, reverse data byte by byte.. */ 206 dma2d_trans_ability_t trans_ability; /**< set defult MAX_TRANS_256BYTES*/ 207 208 } dma2d_init_t; 209 210 /** DMA2D Layer structure definition*/ 211 typedef struct 212 { 213 uint32_t input_offset; /**< Configures the DMA2D foreground or background offset. This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */ 214 uint32_t input_color_mode; /**< Configures the DMA2D foreground or background color mode. This parameter can be one value of @ref DMA2D_Input_Color_Mode. */ 215 uint32_t alpha_mode; /**< Configures the DMA2D foreground or background alpha mode.This parameter can be one value of @ref DMA2D_Alpha_Mode. */ 216 uint32_t input_alpha; /*the DMA2D foreground or background alpha value,This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF 217 - InputAlpha[24:31] is the alpha value ALPHA[0:7] */ 218 219 uint32_t input_color; /**< Specifies color value in case of A8 or A4 color mode. 220 @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between 221 Min_Data = 0x00000000 and Max_Data = 0xFFFFFF where 222 - Inputcolor[16:23] is the red value RED[0:7] 223 - Inputcolor[8:15] is the green value GREEN[0:7] 224 - Inputcolor[0:7] is the blue value BLUE[0:7]. */ 225 uint32_t alpha_inverted; /**< Select regular or inverted alpha value.This parameter can be one value of @ref DMA2D_Alpha_Inverted. */ 226 uint32_t red_blue_swap; /**< Select regular mode (RGB or ARGB) or swap mode (BGR or ABGR). 227 This parameter can be one value of @ref DMA2D_RB_Swap. */ 228 } dma2d_layer_cfg_t; //DMA2D_LAYER_CFG; 229 230 231 232 typedef struct 233 { 234 dma2d_init_t init; /**< dma2d init config, is the value of struct @ref dma2d_init_t*/ 235 dma2d_layer_cfg_t layer_cfg[MAX_DMA2D_LAYER]; /**< dma2d layer config, is the value of struct @ref dma2d_layer_cfg_t the param 236 MAX_DMA2D_LAYER is select from DMA2D_BACKGROUND_LAYER and DMA2D_FOREGROUND_LAYER*/ 237 }dma2d_config_t; 238 239 /** 240 * @} 241 */ 242 243 #ifdef __cplusplus 244 } 245 #endif 246 247 248