1 /* 2 * Definitions for ioctls to access DHD iovars. 3 * Based on wlioctl.h (for Broadcom 802.11abg driver). 4 * (Moves towards generic ioctls for BCM drivers/iovars.) 5 * 6 * Definitions subject to change without notice. 7 * 8 * Copyright (C) 2020, Broadcom. 9 * 10 * Unless you and Broadcom execute a separate written software license 11 * agreement governing use of this software, this software is licensed to you 12 * under the terms of the GNU General Public License version 2 (the "GPL"), 13 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 14 * following added to such license: 15 * 16 * As a special exception, the copyright holders of this software give you 17 * permission to link this software with independent modules, and to copy and 18 * distribute the resulting executable under terms of your choice, provided that 19 * you also meet, for each linked independent module, the terms and conditions of 20 * the license of that module. An independent module is a module which is not 21 * derived from this software. The special exception does not apply to any 22 * modifications of the software. 23 * 24 * 25 * <<Broadcom-WL-IPTag/Dual:>> 26 */ 27 28 #ifndef _dhdioctl_h_ 29 #define _dhdioctl_h_ 30 31 #include <typedefs.h> 32 33 /* Linux network driver ioctl encoding */ 34 typedef struct dhd_ioctl { 35 uint32 cmd; /* common ioctl definition */ 36 void *buf; /* pointer to user buffer */ 37 uint32 len; /* length of user buffer */ 38 uint32 set; /* get or set request boolean (optional) */ 39 uint32 used; /* bytes read or written (optional) */ 40 uint32 needed; /* bytes needed (optional) */ 41 uint32 driver; /* to identify target driver */ 42 } dhd_ioctl_t; 43 44 /* Underlying BUS definition */ 45 enum { 46 BUS_TYPE_USB = 0, /* for USB dongles */ 47 BUS_TYPE_SDIO, /* for SDIO dongles */ 48 BUS_TYPE_PCIE /* for PCIE dongles */ 49 }; 50 51 typedef enum { 52 DMA_XFER_SUCCESS = 0, 53 DMA_XFER_IN_PROGRESS, 54 DMA_XFER_FAILED 55 } dma_xfer_status_t; 56 57 typedef enum d11_lpbk_type { 58 M2M_DMA_LPBK = 0, 59 D11_LPBK = 1, 60 BMC_LPBK = 2, 61 M2M_NON_DMA_LPBK = 3, 62 D11_HOST_MEM_LPBK = 4, 63 BMC_HOST_MEM_LPBK = 5, 64 M2M_WRITE_TO_RAM = 6, 65 M2M_READ_FROM_RAM = 7, 66 D11_WRITE_TO_RAM = 8, 67 D11_READ_FROM_RAM = 9, 68 MAX_LPBK = 10 69 } dma_xfer_type_t; 70 71 typedef struct dmaxfer_info { 72 uint16 version; 73 uint16 length; 74 dma_xfer_status_t status; 75 dma_xfer_type_t type; 76 uint src_delay; 77 uint dest_delay; 78 uint should_wait; 79 uint core_num; 80 int error_code; 81 uint32 num_bytes; 82 uint64 time_taken; 83 uint64 tput; 84 } dma_xfer_info_t; 85 86 #define DHD_DMAXFER_VERSION 0x1 87 88 #define DHD_FILENAME_MAX 64 89 #define DHD_PATHNAME_MAX 128 90 91 #ifdef EFI 92 struct control_signal_ops { 93 uint32 signal; 94 uint32 val; 95 }; 96 enum { 97 WL_REG_ON = 0, 98 DEVICE_WAKE = 1, 99 TIME_SYNC = 2 100 }; 101 102 typedef struct wifi_properties { 103 uint8 version; 104 uint32 vendor; 105 uint32 model; 106 uint8 mac_addr[6]; 107 uint32 chip_revision; 108 uint8 silicon_revision; 109 uint8 is_powered; 110 uint8 is_sleeping; 111 char module_revision[16]; /* null terminated string */ 112 uint8 is_fw_loaded; 113 char fw_filename[DHD_FILENAME_MAX]; /* null terminated string */ 114 char nvram_filename[DHD_FILENAME_MAX]; /* null terminated string */ 115 uint8 channel; 116 uint8 module_sn[6]; 117 } wifi_properties_t; 118 119 #define DHD_WIFI_PROPERTIES_VERSION 0x1 120 121 #define DHD_OTP_SIZE_WORDS 912 122 123 typedef struct intr_poll_data { 124 uint16 version; 125 uint16 length; 126 uint32 type; 127 uint32 value; 128 } intr_poll_t; 129 130 typedef enum intr_poll_data_type { 131 INTR_POLL_DATA_PERIOD = 0, 132 INTR_POLL_DATA_NUM_PKTS_THRESH, 133 INTR_POLL_DATA_PKT_INTVL_THRESH 134 } intr_poll_type_t; 135 136 #define DHD_INTR_POLL_VERSION 0x1u 137 #endif /* EFI */ 138 139 typedef struct tput_test { 140 uint16 version; 141 uint16 length; 142 uint8 direction; 143 uint8 tput_test_running; 144 uint8 mac_sta[6]; 145 uint8 mac_ap[6]; 146 uint8 PAD[2]; 147 uint32 payload_size; 148 uint32 num_pkts; 149 uint32 timeout_ms; 150 uint32 flags; 151 152 uint32 pkts_good; 153 uint32 pkts_bad; 154 uint32 pkts_cmpl; 155 uint64 time_ms; 156 uint64 tput_bps; 157 } tput_test_t; 158 159 typedef enum { 160 TPUT_DIR_TX = 0, 161 TPUT_DIR_RX 162 } tput_dir_t; 163 164 /* 165 * Current supported roles considered for policy management are AP, P2P and NAN. 166 * Hence max value is limited to 3. 167 */ 168 #define DHD_MAX_IFACE_PRIORITY 3u 169 typedef enum dhd_iftype { 170 DHD_IF_TYPE_STA = 0, 171 DHD_IF_TYPE_AP = 1, 172 173 #ifdef DHD_AWDL 174 DHD_IF_TYPE_AWDL = 2, 175 #endif /* DHD_AWDL */ 176 177 DHD_IF_TYPE_NAN_NMI = 3, 178 DHD_IF_TYPE_NAN = 4, 179 DHD_IF_TYPE_P2P_GO = 5, 180 DHD_IF_TYPE_P2P_GC = 6, 181 DHD_IF_TYPE_P2P_DISC = 7, 182 DHD_IF_TYPE_IBSS = 8, 183 DHD_IF_TYPE_MONITOR = 9, 184 DHD_IF_TYPE_AIBSS = 10, 185 DHD_IF_TYPE_MAX 186 } dhd_iftype_t; 187 188 typedef struct dhd_iface_mgmt_data { 189 uint8 policy; 190 uint8 priority[DHD_IF_TYPE_MAX]; 191 } dhd_iface_mgmt_data_t; 192 193 typedef enum dhd_iface_mgmt_policy { 194 DHD_IF_POLICY_DEFAULT = 0, 195 DHD_IF_POLICY_FCFS = 1, 196 DHD_IF_POLICY_LP = 2, 197 DHD_IF_POLICY_ROLE_PRIORITY = 3, 198 DHD_IF_POLICY_CUSTOM = 4, 199 DHD_IF_POLICY_INVALID = 5 200 } dhd_iface_mgmt_policy_t; 201 202 #define TPUT_TEST_T_VER 1 203 #define TPUT_TEST_T_LEN 68 204 #define TPUT_TEST_MIN_PAYLOAD_SIZE 16 205 #define TPUT_TEST_USE_ETHERNET_HDR 0x1 206 #define TPUT_TEST_USE_802_11_HDR 0x2 207 208 /* per-driver magic numbers */ 209 #define DHD_IOCTL_MAGIC 0x00444944 210 211 /* bump this number if you change the ioctl interface */ 212 #define DHD_IOCTL_VERSION 1 213 214 /* 215 * Increase the DHD_IOCTL_MAXLEN to 16K for supporting download of NVRAM files of size 216 * > 8K. In the existing implementation when NVRAM is to be downloaded via the "vars" 217 * DHD IOVAR, the NVRAM is copied to the DHD Driver memory. Later on when "dwnldstate" is 218 * invoked with FALSE option, the NVRAM gets copied from the DHD driver to the Dongle 219 * memory. The simple way to support this feature without modifying the DHD application, 220 * driver logic is to increase the DHD_IOCTL_MAXLEN size. This macro defines the "size" 221 * of the buffer in which data is exchanged between the DHD App and DHD driver. 222 */ 223 #define DHD_IOCTL_MAXLEN (16384) /* max length ioctl buffer required */ 224 #define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ 225 226 /* 227 * For cases where 16K buf is not sufficient. 228 * Ex:- DHD dump output beffer is more than 16K. 229 */ 230 #define DHD_IOCTL_MAXLEN_32K (32768u) 231 232 /* common ioctl definitions */ 233 #define DHD_GET_MAGIC 0 234 #define DHD_GET_VERSION 1 235 #define DHD_GET_VAR 2 236 #define DHD_SET_VAR 3 237 238 /* message levels */ 239 #define DHD_ERROR_VAL 0x0001 240 #define DHD_TRACE_VAL 0x0002 241 #define DHD_INFO_VAL 0x0004 242 #define DHD_DATA_VAL 0x0008 243 #define DHD_CTL_VAL 0x0010 244 #define DHD_TIMER_VAL 0x0020 245 #define DHD_HDRS_VAL 0x0040 246 #define DHD_BYTES_VAL 0x0080 247 #define DHD_INTR_VAL 0x0100 248 #define DHD_LOG_VAL 0x0200 249 #define DHD_GLOM_VAL 0x0400 250 #define DHD_EVENT_VAL 0x0800 251 #define DHD_BTA_VAL 0x1000 252 #if defined(NDIS) && (NDISVER >= 0x0630) && defined(BCMDONGLEHOST) 253 #define DHD_SCAN_VAL 0x2000 254 #else 255 #define DHD_ISCAN_VAL 0x2000 256 #endif 257 #define DHD_ARPOE_VAL 0x4000 258 #define DHD_REORDER_VAL 0x8000 259 #define DHD_NOCHECKDIED_VAL 0x20000 /* UTF WAR */ 260 #define DHD_PNO_VAL 0x80000 261 #define DHD_RTT_VAL 0x100000 262 #define DHD_MSGTRACE_VAL 0x200000 263 #define DHD_FWLOG_VAL 0x400000 264 #define DHD_DBGIF_VAL 0x800000 265 #ifdef DHD_PCIE_NATIVE_RUNTIMEPM 266 #define DHD_RPM_VAL 0x1000000 267 #endif /* DHD_PCIE_NATIVE_RUNTIMEPM */ 268 #define DHD_PKT_MON_VAL 0x2000000 269 #define DHD_PKT_MON_DUMP_VAL 0x4000000 270 #define DHD_ERROR_MEM_VAL 0x8000000 271 #define DHD_DNGL_IOVAR_SET_VAL 0x10000000 /**< logs the setting of dongle iovars */ 272 #define DHD_LPBKDTDUMP_VAL 0x20000000 273 #define DHD_PRSRV_MEM_VAL 0x40000000 274 #define DHD_IOVAR_MEM_VAL 0x80000000 275 #define DHD_ANDROID_VAL 0x10000 276 #define DHD_IW_VAL 0x20000 277 #define DHD_CFG_VAL 0x40000 278 #define DHD_CONFIG_VAL 0x80000 279 #define DHD_DUMP_VAL 0x100000 280 #define DUMP_EAPOL_VAL 0x0001 281 #define DUMP_ARP_VAL 0x0002 282 #define DUMP_DHCP_VAL 0x0004 283 #define DUMP_ICMP_VAL 0x0008 284 #define DUMP_DNS_VAL 0x0010 285 #define DUMP_TRX_VAL 0x0080 286 287 #ifdef SDTEST 288 /* For pktgen iovar */ 289 typedef struct dhd_pktgen { 290 uint32 version; /* To allow structure change tracking */ 291 uint32 freq; /* Max ticks between tx/rx attempts */ 292 uint32 count; /* Test packets to send/rcv each attempt */ 293 uint32 print; /* Print counts every <print> attempts */ 294 uint32 total; /* Total packets (or bursts) */ 295 uint32 minlen; /* Minimum length of packets to send */ 296 uint32 maxlen; /* Maximum length of packets to send */ 297 uint32 numsent; /* Count of test packets sent */ 298 uint32 numrcvd; /* Count of test packets received */ 299 uint32 numfail; /* Count of test send failures */ 300 uint32 mode; /* Test mode (type of test packets) */ 301 uint32 stop; /* Stop after this many tx failures */ 302 } dhd_pktgen_t; 303 304 /* Version in case structure changes */ 305 #define DHD_PKTGEN_VERSION 2 306 307 /* Type of test packets to use */ 308 #define DHD_PKTGEN_ECHO 1 /* Send echo requests */ 309 #define DHD_PKTGEN_SEND 2 /* Send discard packets */ 310 #define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */ 311 #define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous tx dongle */ 312 #endif /* SDTEST */ 313 314 /* Enter idle immediately (no timeout) */ 315 #define DHD_IDLE_IMMEDIATE (-1) 316 317 /* Values for idleclock iovar: other values are the sd_divisor to use when idle */ 318 #define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change when idle */ 319 #define DHD_IDLE_STOP (-1) /* Request SD clock be stopped (and use SD1 mode) */ 320 321 enum dhd_maclist_xtlv_type { 322 DHD_MACLIST_XTLV_R = 0x1, 323 DHD_MACLIST_XTLV_X = 0x2, 324 DHD_SVMPLIST_XTLV = 0x3 325 }; 326 327 typedef struct _dhd_maclist_t { 328 uint16 version; /* Version */ 329 uint16 bytes_len; /* Total bytes length of lists, XTLV headers and paddings */ 330 uint8 plist[1]; /* Pointer to the first list */ 331 } dhd_maclist_t; 332 333 typedef struct _dhd_pd11regs_param { 334 uint16 start_idx; 335 uint8 verbose; 336 uint8 pad; 337 uint8 plist[1]; 338 } dhd_pd11regs_param; 339 340 typedef struct _dhd_pd11regs_buf { 341 uint16 idx; 342 uint8 pad[2]; 343 uint8 pbuf[1]; 344 } dhd_pd11regs_buf; 345 346 /* BT logging and memory dump */ 347 348 #define BT_LOG_BUF_MAX_SIZE (DHD_IOCTL_MAXLEN - (2 * sizeof(int))) 349 #define BT_LOG_BUF_NOT_AVAILABLE 0 350 #define BT_LOG_NEXT_BUF_NOT_AVAIL 1 351 #define BT_LOG_NEXT_BUF_AVAIL 2 352 #define BT_LOG_NOT_READY 3 353 354 typedef struct bt_log_buf_info { 355 int availability; 356 int size; 357 char buf[BT_LOG_BUF_MAX_SIZE]; 358 } bt_log_buf_info_t; 359 360 /* request BT memory in chunks */ 361 typedef struct bt_mem_req { 362 int offset; /* offset from BT memory start */ 363 int buf_size; /* buffer size per chunk */ 364 } bt_mem_req_t; 365 366 typedef struct fw_download_info { 367 uint32 fw_start_addr; 368 uint32 fw_size; 369 uint32 fw_entry_pt; 370 char fw_signature_fname[DHD_FILENAME_MAX]; 371 char bootloader_fname[DHD_FILENAME_MAX]; 372 uint32 bootloader_start_addr; 373 char fw_path[DHD_PATHNAME_MAX]; 374 } fw_download_info_t; 375 376 /* max dest supported */ 377 #define DEBUG_BUF_DEST_MAX 4 378 379 /* debug buf dest stat */ 380 typedef struct debug_buf_dest_stat { 381 uint32 stat[DEBUG_BUF_DEST_MAX]; 382 } debug_buf_dest_stat_t; 383 384 #ifdef DHD_PKTTS 385 /* max pktts flow config supported */ 386 #define PKTTS_CONFIG_MAX 8 387 388 #define PKTTS_OFFSET_INVALID ((uint32)(~0)) 389 390 /* pktts flow configuration */ 391 typedef struct pktts_flow { 392 uint16 ver; /**< version of this struct */ 393 uint16 len; /**< length in bytes of this structure */ 394 uint32 src_ip; /**< source ip address */ 395 uint32 dst_ip; /**< destination ip address */ 396 uint32 src_port; /**< source port */ 397 uint32 dst_port; /**< destination port */ 398 uint32 proto; /**< protocol */ 399 uint32 ip_prec; /**< ip precedence */ 400 uint32 pkt_offset; /**< offset from data[0] (TCP/UDP payload) */ 401 uint32 chksum; /**< 5 tuple checksum */ 402 } pktts_flow_t; 403 404 #define BCM_TS_MAGIC 0xB055B055 405 #define BCM_TS_MAGIC_V2 0xB055B056 406 #define BCM_TS_TX 1u 407 #define BCM_TS_RX 2u 408 #define BCM_TS_UTX 3u /* ucode tx timestamps */ 409 410 #define PKTTS_MAX_FWTX 4u 411 #define PKTTS_MAX_UCTX 5u 412 #define PKTTS_MAX_UCCNT 8u 413 #define PKTTS_MAX_FWRX 2u 414 415 /* Firmware timestamp header */ 416 typedef struct bcm_to_info_hdr { 417 uint magic; /**< magic word */ 418 uint type; /**< tx/rx type */ 419 uint flowid; /**< 5 tuple checksum */ 420 uint prec; /**< ip precedence (IP_PREC) */ 421 uint8 xbytes[16]; /**< 16bytes info from pkt offset */ 422 } bcm_to_info_hdr_t; 423 424 /* Firmware tx timestamp payload structure */ 425 typedef struct bcm_to_info_tx_ts { 426 bcm_to_info_hdr_t hdr; 427 uint64 dhdt0; /**< system time - DHDT0 */ 428 uint64 dhdt5; /**< system time - DHDT5 */ 429 uint fwts[PKTTS_MAX_FWTX]; /**< fw timestamp - FWT0..FWT4 */ 430 uint ucts[PKTTS_MAX_UCTX]; /**< uc timestamp - UCT0..UCT4 */ 431 uint uccnt[PKTTS_MAX_UCCNT]; /**< uc counters */ 432 } bcm_to_info_tx_ts_t; 433 434 /* Firmware rx timestamp payload structure */ 435 typedef struct bcm_to_info_rx_ts { 436 bcm_to_info_hdr_t hdr; 437 uint64 dhdr3; /**< system time - DHDR3 */ 438 uint fwts[PKTTS_MAX_FWRX]; /**< fw timestamp - FWT0, FWT1 */ 439 } bcm_to_info_rx_ts_t; 440 #endif /* DHD_PKTTS */ 441 442 /* devreset */ 443 #define DHD_DEVRESET_VERSION 1 444 445 typedef struct devreset_info { 446 uint16 version; 447 uint16 length; 448 uint16 mode; 449 int16 status; 450 } devreset_info_t; 451 452 #ifdef DHD_TX_PROFILE 453 454 #define DHD_TX_PROFILE_VERSION 1 455 456 /* tx_profile structure for tagging */ 457 typedef struct dhd_tx_profile_protocol { 458 uint16 version; 459 uint8 profile_index; 460 uint8 layer; 461 uint32 protocol_number; 462 uint16 src_port; 463 uint16 dest_port; 464 } dhd_tx_profile_protocol_t; 465 466 #define DHD_TX_PROFILE_DATA_LINK_LAYER (2u) /* data link layer protocols */ 467 #define DHD_TX_PROFILE_NETWORK_LAYER (3u) /* network layer protocols */ 468 469 #define DHD_MAX_PROFILE_INDEX (7u) /* three bits are available to encode 470 the tx profile index in the rate 471 field in host_txbuf_post_t 472 */ 473 #define DHD_MAX_PROFILES (1u) /* ucode only supports 1 profile atm */ 474 475 #endif /* defined(DHD_TX_PROFILE) */ 476 #endif /* _dhdioctl_h_ */ 477