1 /*
2 * Copyright (c) 2023 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #ifndef HPM_SEI_DRV_H
9 #define HPM_SEI_DRV_H
10
11 #include "hpm_common.h"
12 #include "hpm_sei_regs.h"
13 #include "hpm_soc_feature.h"
14
15 /**
16 * @brief sei arming action
17 */
18 typedef enum {
19 sei_arming_direct_exec = 0,
20 sei_arming_wait_trigger
21 } sei_arming_mode_t;
22
23 /**
24 * @brief sei watchdog action
25 */
26 typedef enum {
27 sei_wdg_exec_next_instr = 0,
28 sei_wdg_exec_exception_instr
29 } sei_wdg_action_t;
30
31 /**
32 * @brief sei transfer mode
33 */
34 typedef enum {
35 sei_synchronous_master_mode = 0,
36 sei_synchronous_slave_mode,
37 sei_asynchronous_mode
38 } sei_tranceiver_mode_t;
39
40 /**
41 * @brief sei asynchronous mode parity
42 */
43 typedef enum {
44 sei_asynchronous_parity_even = 0,
45 sei_asynchronous_parity_odd
46 } sei_asynchronous_parity_t;
47
48 /**
49 * @brief sei ilde state
50 */
51 typedef enum {
52 sei_idle_low_state = 0,
53 sei_idle_high_state,
54 } sei_idle_state_t;
55
56 /**
57 * @brief sei data mode
58 */
59 typedef enum {
60 sei_data_mode = 0,
61 sei_check_mode,
62 sei_crc_mode
63 } sei_data_mode_t;
64
65 /**
66 * @brief sei data bit order
67 */
68 typedef enum {
69 sei_bit_lsb_first = 0,
70 sei_bit_msb_first
71 } sei_data_bit_order_t;
72
73 /**
74 * @brief sei data word order
75 */
76 typedef enum {
77 sei_word_nonreverse = 0,
78 sei_word_reverse
79 } sei_data_word_order_t;
80
81 /**
82 * @brief sei state transition condition
83 */
84 typedef enum {
85 sei_state_tran_condition_high_match = 0,
86 sei_state_tran_condition_low_dismatch,
87 sei_state_tran_condition_rise_entry,
88 sei_state_tran_condition_fall_leave
89 } sei_state_tran_condition_t;
90
91 /**
92 * @brief sei trig in type
93 */
94 typedef enum {
95 sei_trig_in0 = 0,
96 sei_trig_in1,
97 sei_trig_in_period,
98 sei_trig_in_soft
99 } sei_trig_in_type_t; /**< trig input type */
100
101 /**
102 * @brief sei irq event
103 */
104 typedef enum {
105 sei_irq_stall_event = SEI_CTRL_IRQ_INT_FLAG_STALL_MASK,
106 sei_irq_execpt_event = SEI_CTRL_IRQ_INT_FLAG_EXECPT_MASK,
107 sei_irq_wdog_event = SEI_CTRL_IRQ_INT_FLAG_WDOG_MASK,
108 sei_irq_instr_ptr0_start_event = SEI_CTRL_IRQ_INT_FLAG_PTR0_ST_MASK,
109 sei_irq_instr_ptr1_start_event = SEI_CTRL_IRQ_INT_FLAG_PTR1_ST_MASK,
110 sei_irq_instr_value0_start_event = SEI_CTRL_IRQ_INT_FLAG_INSTR0_ST_MASK,
111 sei_irq_instr_value1_start_event = SEI_CTRL_IRQ_INT_FLAG_INSTR1_ST_MASK,
112 sei_irq_instr_ptr0_end_event = SEI_CTRL_IRQ_INT_FLAG_PTR0_END_MASK,
113 sei_irq_instr_ptr1_end_event = SEI_CTRL_IRQ_INT_FLAG_PTR1_END_MASK,
114 sei_irq_instr_value0_end_event = SEI_CTRL_IRQ_INT_FLAG_INSTR0_END_MASK,
115 sei_irq_instr_value1_end_event = SEI_CTRL_IRQ_INT_FLAG_INSTR1_END_MASK,
116 sei_irq_trx_err_event = SEI_CTRL_IRQ_INT_FLAG_TRX_ERR_MASK,
117 sei_irq_timeout_event = SEI_CTRL_IRQ_INT_FLAG_TIMEOUT_MASK,
118 sei_irq_latch0_event = SEI_CTRL_IRQ_INT_FLAG_LATCH0_MASK,
119 sei_irq_latch1_event = SEI_CTRL_IRQ_INT_FLAG_LATCH1_MASK,
120 sei_irq_latch2_event = SEI_CTRL_IRQ_INT_FLAG_LATCH2_MASK,
121 sei_irq_latch3_event = SEI_CTRL_IRQ_INT_FLAG_LATCH3_MASK,
122 sei_irq_sample_err_event = SEI_CTRL_IRQ_INT_FLAG_SMP_ERR_MASK,
123 sei_irq_trig0_event = SEI_CTRL_IRQ_INT_FLAG_TRIGER0_MASK,
124 sei_irq_trig1_event = SEI_CTRL_IRQ_INT_FLAG_TRIGER1_MASK,
125 sei_irq_trig2_event = SEI_CTRL_IRQ_INT_FLAG_TRIGER2_MASK,
126 sei_irq_trig3_event = SEI_CTRL_IRQ_INT_FLAG_TRIGER3_MASK,
127 sei_irq_trig0_err_event = SEI_CTRL_IRQ_INT_FLAG_TRG_ERR0_MASK,
128 sei_irq_trig1_err_event = SEI_CTRL_IRQ_INT_FLAG_TRG_ERR1_MASK,
129 sei_irq_trig2_err_event = SEI_CTRL_IRQ_INT_FLAG_TRG_ERR2_MASK,
130 sei_irq_trig3_err_event = SEI_CTRL_IRQ_INT_FLAG_TRG_ERR3_MASK,
131 } sei_irq_event_t; /**< irq event type */
132
133 /**
134 * @brief sei select command or data
135 */
136 #define SEI_SELECT_CMD true /**< select cmd */
137 #define SEI_SELECT_DATA false /**< select data */
138
139 /**
140 * @brief sei instruction operation command
141 */
142 #define SEI_INSTR_OP_HALT 0u /**< op halt */
143 #define SEI_INSTR_OP_JUMP 1u /**< op jump */
144 #define SEI_INSTR_OP_SEND_WDG 2u /**< op send with watchdog */
145 #define SEI_INSTR_OP_SEND 3u /**< op send */
146 #define SEI_INSTR_OP_WAIT_WDG 4u /**< op wait with watchdog */
147 #define SEI_INSTR_OP_WAIT 5u /**< op wait */
148 #define SEI_INSTR_OP_RECV_WDG 6u /**< op recv with watchdog */
149 #define SEI_INSTR_OP_RECV 7u /**< op recv */
150
151 /**
152 * @brief sei instruction synchronous master clock type
153 */
154 #define SEI_INSTR_M_CK_LOW 0u /**< clock low */
155 #define SEI_INSTR_M_CK_RISE_FALL 1u /**< clock rise fall */
156 #define SEI_INSTR_M_CK_FALL_RISE 2u /**< clock fall rise */
157 #define SEI_INSTR_M_CK_HIGH 3u /**< clock high */
158
159 /**
160 * @brief sei instruction synchronous slave clock type
161 */
162 #define SEI_INSTR_S_CK_DEFAULT 0u /**< default */
163 #define SEI_INSTR_S_CK_TRX_EXCH 1u /**< rx tx exchange */
164 #define SEI_INSTR_S_CK_TIMEOUT_EN 2u /**< enable timeout */
165 #define SEI_INSTR_S_CK_TRX_EXCH_TIMEOUT_EN 3u /**< rx tx exchange and enable timeout */
166
167 /**
168 * @brief sei instruction jump intructions index
169 */
170 #define SEI_JUMP_INIT_INSTR_IDX 0x00u /**< jump init instr index */
171 #define SEI_JUMP_WDG_INSTR_IDX 0x01u /**< jump watchdog instr index */
172 #define SEI_JUMP_CMD_TABLE_INSTR_IDX0 0x10u /**< jump command table instr ptr0 */
173 #define SEI_JUMP_CMD_TABLE_INSTR_IDX1 0x11u /**< jump command table instr ptr1 */
174 #define SEI_JUMP_CMD_TABLE_INSTR_IDX2 0x12u /**< jump command table instr ptr2 */
175 #define SEI_JUMP_CMD_TABLE_INSTR_IDX3 0x13u /**< jump command table instr ptr3 */
176 #define SEI_JUMP_CMD_TABLE_INSTR_IDX4 0x14u /**< jump command table instr ptr4 */
177 #define SEI_JUMP_CMD_TABLE_INSTR_IDX5 0x15u /**< jump command table instr ptr5 */
178 #define SEI_JUMP_CMD_TABLE_INSTR_IDX6 0x16u /**< jump command table instr ptr6 */
179 #define SEI_JUMP_CMD_TABLE_INSTR_IDX7 0x17u /**< jump command table instr ptr7 */
180 #define SEI_JUMP_CMD_TABLE_INSTR_IDX8 0x18u /**< jump command table instr ptr8 */
181 #define SEI_JUMP_CMD_TABLE_INSTR_IDX9 0x19u /**< jump command table instr ptr9 */
182 #define SEI_JUMP_CMD_TABLE_INSTR_IDX10 0x1Au /**< jump command table instr ptr10 */
183 #define SEI_JUMP_CMD_TABLE_INSTR_IDX11 0x1Bu /**< jump command table instr ptr11 */
184 #define SEI_JUMP_CMD_TABLE_INSTR_IDX12 0x1Cu /**< jump command table instr ptr12 */
185 #define SEI_JUMP_CMD_TABLE_INSTR_IDX13 0x1Du /**< jump command table instr ptr13 */
186 #define SEI_JUMP_CMD_TABLE_INSTR_IDX14 0x1Eu /**< jump command table instr ptr14 */
187 #define SEI_JUMP_CMD_TABLE_INSTR_IDX15 0x1Fu /**< jump command table instr ptr15 */
188
189 /**
190 * @brief sei engine config structure
191 */
192 typedef struct {
193 sei_arming_mode_t arming_mode;
194 uint8_t data_cdm_idx;
195 uint8_t data_base_idx;
196 uint8_t init_instr_idx;
197 bool wdg_enable;
198 sei_wdg_action_t wdg_action;
199 uint8_t wdg_instr_idx;
200 uint16_t wdg_time;
201 } sei_engine_config_t; /**< engine config struct */
202
203 /**
204 * @brief sei tranceiver synchronous master mode config structure
205 */
206 typedef struct {
207 bool data_idle_high_z;
208 sei_idle_state_t data_idle_state;
209 bool clock_idle_high_z;
210 sei_idle_state_t clock_idle_state;
211 uint32_t baudrate;
212 } sei_tranceiver_synchronous_master_config_t; /**< tranceiver synchronous master config struct */
213
214 /**
215 * @brief sei tranceiver synchronous master mode config structure
216 */
217 typedef struct {
218 bool data_idle_high_z;
219 sei_idle_state_t data_idle_state;
220 bool clock_idle_high_z;
221 sei_idle_state_t clock_idle_state;
222 uint32_t max_baudrate;
223 uint16_t ck0_timeout_us;
224 uint16_t ck1_timeout_us;
225 } sei_tranceiver_synchronous_slave_config_t; /**< tranceiver synchronous slave config struct */
226
227 /**
228 * @brief sei tranceiver asynchronous mode config structure
229 */
230 typedef struct {
231 uint8_t wait_len;
232 uint8_t data_len;
233 bool parity_enable;
234 sei_asynchronous_parity_t parity;
235 bool data_idle_high_z;
236 sei_idle_state_t data_idle_state;
237 uint32_t baudrate;
238 } sei_tranceiver_asynchronous_config_t; /**< tranceiver asynchronous config struct */
239
240 /**
241 * @brief sei tranceiver config structure
242 */
243 typedef struct {
244 sei_tranceiver_mode_t mode;
245 bool tri_sample;
246 uint32_t src_clk_freq;
247 sei_tranceiver_synchronous_master_config_t synchronous_master_config;
248 sei_tranceiver_synchronous_slave_config_t synchronous_slave_config;
249 sei_tranceiver_asynchronous_config_t asynchronous_config;
250 } sei_tranceiver_config_t; /**< tranceiver config struct */
251
252 /**
253 * @brief sei trigger input config structure
254 */
255 typedef struct {
256 bool trig_in0_enable;
257 uint8_t trig_in0_select;
258 bool trig_in1_enable;
259 uint8_t trig_in1_select;
260 bool trig_period_enable;
261 sei_arming_mode_t trig_period_arming_mode;
262 bool trig_period_sync_enable;
263 uint8_t trig_period_sync_select;
264 uint32_t trig_period_time;
265 } sei_trigger_input_config_t; /**< trigger input config struct */
266
267 /**
268 * @brief sei trigger output config structure
269 */
270 typedef struct {
271 uint8_t src_latch_select;
272 bool trig_out_enable;
273 uint8_t trig_out_select;
274 } sei_trigger_output_config_t; /**< trigger output config struct */
275
276 /**
277 * @brief sei data format config structure
278 */
279 typedef struct {
280 sei_data_mode_t mode;
281 bool signed_flag;
282 sei_data_bit_order_t bit_order;
283 sei_data_word_order_t word_order;
284 uint8_t word_len;
285 bool crc_invert;
286 bool crc_shift_mode;
287 uint8_t crc_len;
288 uint8_t last_bit;
289 uint8_t first_bit;
290 uint8_t max_bit;
291 uint8_t min_bit;
292 uint32_t gold_value;
293 uint32_t crc_init_value;
294 uint32_t crc_poly;
295 } sei_data_format_config_t; /**< cmd or data format config struct */
296
297 /**
298 * @brief sei command table config structure
299 */
300 typedef struct {
301 uint32_t cmd_min_value;
302 uint32_t cmd_max_value;
303 uint32_t cmd_mask_value;
304 uint8_t instr_idx[16];
305 } sei_command_table_config_t; /**< cmd table config struct */
306
307 /**
308 * @brief sei state transition config structure
309 */
310 typedef struct {
311 bool disable_instr_ptr_check;
312 sei_state_tran_condition_t instr_ptr_cfg;
313 uint8_t instr_ptr_value;
314 bool disable_clk_check;
315 sei_state_tran_condition_t clk_cfg;
316 bool disable_txd_check;
317 sei_state_tran_condition_t txd_cfg;
318 bool disable_rxd_check;
319 sei_state_tran_condition_t rxd_cfg;
320 bool disable_timeout_check;
321 sei_state_tran_condition_t timeout_cfg;
322 } sei_state_transition_config_t; /**< state transition config struct */
323
324 /**
325 * @brief sei state transition latch config structure
326 */
327 typedef struct {
328 bool enable;
329 uint8_t output_select;
330 uint16_t delay;
331 } sei_state_transition_latch_config_t; /**< state transition latch config struct */
332
333 /**
334 * @brief sei sample config structure
335 */
336 typedef struct {
337 uint8_t acc_data_idx;
338 uint8_t spd_data_idx;
339 uint8_t rev_data_idx;
340 uint8_t pos_data_idx;
341 bool acc_data_use_rx; /**< true - use rx data, false - use override data */
342 bool spd_data_use_rx; /**< true - use rx data, false - use override data */
343 bool rev_data_use_rx; /**< true - use rx data, false - use override data */
344 bool pos_data_use_rx; /**< true - use rx data, false - use override data */
345 uint8_t latch_select;
346 bool sample_once;
347 uint16_t sample_window;
348 uint32_t data_register_select;
349 } sei_sample_config_t; /**< sample config struct */
350
351 /**
352 * @brief sei update config structure
353 */
354 typedef struct {
355 uint8_t acc_data_idx;
356 uint8_t spd_data_idx;
357 uint8_t rev_data_idx;
358 uint8_t pos_data_idx;
359 bool acc_data_use_rx; /**< true - use rx data, false - use override data */
360 bool spd_data_use_rx; /**< true - use rx data, false - use override data */
361 bool rev_data_use_rx; /**< true - use rx data, false - use override data */
362 bool pos_data_use_rx; /**< true - use rx data, false - use override data */
363 bool time_use_override; /**< true - use override data, false - use timestamp data */
364 bool update_on_err;
365 uint8_t latch_select;
366 uint32_t data_register_select;
367 } sei_update_config_t; /**< update config struct */
368
369
370 #if defined(__cplusplus)
371 extern "C" {
372 #endif /* __cplusplus */
373
374 /**
375 * @brief Set the SEI engine enable or disable
376 * @param [in] ptr SEI base address
377 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
378 * @param [in] enable enable or disable
379 * @arg true enable
380 * @arg false disable
381 */
sei_set_engine_enable(SEI_Type * ptr,uint8_t idx,bool enable)382 static inline void sei_set_engine_enable(SEI_Type *ptr, uint8_t idx, bool enable)
383 {
384 if (enable) {
385 ptr->CTRL[idx].ENGINE.CTRL |= SEI_CTRL_ENGINE_CTRL_ENABLE_MASK;
386 } else {
387 ptr->CTRL[idx].ENGINE.CTRL &= ~SEI_CTRL_ENGINE_CTRL_ENABLE_MASK;
388 }
389 }
390
391 /**
392 * @brief Rewind the SEI engine
393 * @param [in] ptr SEI base address
394 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
395 */
sei_set_engine_rewind(SEI_Type * ptr,uint8_t idx)396 static inline void sei_set_engine_rewind(SEI_Type *ptr, uint8_t idx)
397 {
398 ptr->CTRL[idx].ENGINE.CTRL |= SEI_CTRL_ENGINE_CTRL_REWIND_MASK;
399 }
400
401 /**
402 * @brief Set the SEI trigger input trig in0 enable or disable
403 * @param [in] ptr SEI base address
404 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
405 * @param [in] enable enable or disable
406 * @arg true enable
407 * @arg false disable
408 */
sei_set_trig_input_in0_enable(SEI_Type * ptr,uint8_t idx,bool enable)409 static inline void sei_set_trig_input_in0_enable(SEI_Type *ptr, uint8_t idx, bool enable)
410 {
411 if (enable) {
412 ptr->CTRL[idx].TRG.IN_CFG |= SEI_CTRL_TRG_IN_CFG_IN0_EN_MASK;
413 } else {
414 ptr->CTRL[idx].TRG.IN_CFG &= ~SEI_CTRL_TRG_IN_CFG_IN0_EN_MASK;
415 }
416 }
417
418 /**
419 * @brief Set the SEI trigger input trig in1 enable or disable
420 * @param [in] ptr SEI base address
421 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
422 * @param [in] enable enable or disable
423 * @arg true enable
424 * @arg false disable
425 */
sei_set_trig_input_in1_enable(SEI_Type * ptr,uint8_t idx,bool enable)426 static inline void sei_set_trig_input_in1_enable(SEI_Type *ptr, uint8_t idx, bool enable)
427 {
428 if (enable) {
429 ptr->CTRL[idx].TRG.IN_CFG |= SEI_CTRL_TRG_IN_CFG_IN1_EN_MASK;
430 } else {
431 ptr->CTRL[idx].TRG.IN_CFG &= ~SEI_CTRL_TRG_IN_CFG_IN1_EN_MASK;
432 }
433 }
434
435 /**
436 * @brief Set the SEI trigger input period enable or disable
437 * @param [in] ptr SEI base address
438 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
439 * @param [in] enable enable or disable
440 * @arg true enable
441 * @arg false disable
442 */
sei_set_trig_input_period_enable(SEI_Type * ptr,uint8_t idx,bool enable)443 static inline void sei_set_trig_input_period_enable(SEI_Type *ptr, uint8_t idx, bool enable)
444 {
445 if (enable) {
446 ptr->CTRL[idx].TRG.IN_CFG |= SEI_CTRL_TRG_IN_CFG_PRD_EN_MASK;
447 } else {
448 ptr->CTRL[idx].TRG.IN_CFG &= ~SEI_CTRL_TRG_IN_CFG_PRD_EN_MASK;
449 }
450 }
451
452 /**
453 * @brief Set the SEI trigger input soft enable or disable
454 * @param [in] ptr SEI base address
455 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
456 * @param [in] enable enable or disable
457 * @arg true enable
458 * @arg false disable
459 */
sei_set_trig_input_soft_enable(SEI_Type * ptr,uint8_t idx)460 static inline void sei_set_trig_input_soft_enable(SEI_Type *ptr, uint8_t idx)
461 {
462 ptr->CTRL[idx].TRG.SW |= SEI_CTRL_TRG_SW_SOFT_MASK;
463 }
464
465 /**
466 * @brief Set the SEI trigger input command value
467 * @param [in] ptr SEI base address
468 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
469 * @param [in] type trigger input type @ref sei_trig_in_type_t
470 * @param [in] data command data
471 */
sei_set_trig_input_command_value(SEI_Type * ptr,uint8_t idx,sei_trig_in_type_t type,uint32_t data)472 static inline void sei_set_trig_input_command_value(SEI_Type *ptr, uint8_t idx, sei_trig_in_type_t type, uint32_t data)
473 {
474 ptr->CTRL[idx].TRG_TABLE.CMD[type] = data;
475 }
476
477 /**
478 * @brief Get the SEI trigger input time
479 * @param [in] ptr SEI base address
480 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
481 * @param [in] type trigger input type @ref sei_trig_in_type_t
482 * @retval trigger input time
483 */
sei_get_trig_input_time(SEI_Type * ptr,uint8_t idx,sei_trig_in_type_t type)484 static inline uint32_t sei_get_trig_input_time(SEI_Type *ptr, uint8_t idx, sei_trig_in_type_t type)
485 {
486 return ptr->CTRL[idx].TRG_TABLE.TIME[type];
487 }
488
489 /**
490 * @brief Get the SEI latch time
491 * @param [in] ptr SEI base address
492 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
493 * @param [in] latch_idx
494 * @arg SEI_LATCH_0
495 * @arg SEI_LATCH_1
496 * @arg SEI_LATCH_2
497 * @arg SEI_LATCH_3
498 * @retval latch time
499 */
sei_get_latch_time(SEI_Type * ptr,uint8_t idx,uint8_t latch_idx)500 static inline uint32_t sei_get_latch_time(SEI_Type *ptr, uint8_t idx, uint8_t latch_idx)
501 {
502 return ptr->CTRL[idx].LATCH[latch_idx].TIME;
503 }
504
505 /**
506 * @brief Set the SEI tranceiver rx point
507 * @param [in] ptr SEI base address
508 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
509 * @param [in] point rx point value
510 */
sei_set_xcvr_rx_point(SEI_Type * ptr,uint8_t idx,uint16_t point)511 static inline void sei_set_xcvr_rx_point(SEI_Type *ptr, uint8_t idx, uint16_t point)
512 {
513 uint32_t tmp;
514
515 assert(point > 0);
516 tmp = ptr->CTRL[idx].XCVR.DATA_CFG;
517 tmp &= ~SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_MASK;
518 tmp |= SEI_CTRL_XCVR_DATA_CFG_RXD_POINT_SET(point);
519 ptr->CTRL[idx].XCVR.DATA_CFG = tmp;
520 }
521
522 /**
523 * @brief Set the SEI tranceiver tx point
524 * @param [in] ptr SEI base address
525 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
526 * @param [in] point tx point value
527 */
sei_set_xcvr_tx_point(SEI_Type * ptr,uint8_t idx,uint16_t point)528 static inline void sei_set_xcvr_tx_point(SEI_Type *ptr, uint8_t idx, uint16_t point)
529 {
530 uint32_t tmp;
531
532 assert(point > 0);
533 tmp = ptr->CTRL[idx].XCVR.DATA_CFG;
534 tmp &= ~SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_MASK;
535 tmp |= SEI_CTRL_XCVR_DATA_CFG_TXD_POINT_SET(point);
536 ptr->CTRL[idx].XCVR.DATA_CFG = tmp;
537 }
538
539 /**
540 * @brief Set the SEI tranceiver ck0 point
541 * @param [in] ptr SEI base address
542 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
543 * @param [in] point ck0 point value
544 */
sei_set_xcvr_ck0_point(SEI_Type * ptr,uint8_t idx,uint16_t point)545 static inline void sei_set_xcvr_ck0_point(SEI_Type *ptr, uint8_t idx, uint16_t point)
546 {
547 uint32_t tmp;
548
549 assert(point > 0);
550 tmp = ptr->CTRL[idx].XCVR.CLK_CFG;
551 tmp &= ~SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_MASK;
552 tmp |= SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_SET(point);
553 ptr->CTRL[idx].XCVR.CLK_CFG = tmp;
554 }
555
556 /**
557 * @brief Set the SEI tranceiver ck1 point
558 * @param [in] ptr SEI base address
559 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
560 * @param [in] point ck1 point value
561 */
sei_set_xcvr_ck1_point(SEI_Type * ptr,uint8_t idx,uint16_t point)562 static inline void sei_set_xcvr_ck1_point(SEI_Type *ptr, uint8_t idx, uint16_t point)
563 {
564 uint32_t tmp;
565
566 assert(point > 0);
567 tmp = ptr->CTRL[idx].XCVR.CLK_CFG;
568 tmp &= ~SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_MASK;
569 tmp |= SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_SET(point);
570 ptr->CTRL[idx].XCVR.CLK_CFG = tmp;
571 }
572
573 /**
574 * @brief Get the SEI tranceiver ck0 point
575 * @param [in] ptr SEI base address
576 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
577 * @retval ck0 point value
578 */
sei_get_xcvr_ck0_point(SEI_Type * ptr,uint8_t idx)579 static inline uint16_t sei_get_xcvr_ck0_point(SEI_Type *ptr, uint8_t idx)
580 {
581 return SEI_CTRL_XCVR_CLK_CFG_CK0_POINT_GET(ptr->CTRL[idx].XCVR.CLK_CFG);
582 }
583
584 /**
585 * @brief Get the SEI tranceiver ck1 point
586 * @param [in] ptr SEI base address
587 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
588 * @retval ck1 point value
589 */
sei_get_xcvr_ck1_point(SEI_Type * ptr,uint8_t idx)590 static inline uint16_t sei_get_xcvr_ck1_point(SEI_Type *ptr, uint8_t idx)
591 {
592 return SEI_CTRL_XCVR_CLK_CFG_CK1_POINT_GET(ptr->CTRL[idx].XCVR.CLK_CFG);
593 }
594
595 /**
596 * @brief Set the SEI command value
597 * @param [in] ptr SEI base address
598 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
599 * @param [in] cmd command value
600 */
sei_set_command_value(SEI_Type * ptr,uint8_t idx,uint32_t cmd)601 static inline void sei_set_command_value(SEI_Type *ptr, uint8_t idx, uint32_t cmd)
602 {
603 ptr->CTRL[idx].CMD.CMD = cmd;
604 }
605
606 /**
607 * @brief Get the SEI command value
608 * @param [in] ptr SEI base address
609 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
610 * @retval command value
611 */
sei_get_command_value(SEI_Type * ptr,uint8_t idx)612 static inline uint32_t sei_get_command_value(SEI_Type *ptr, uint8_t idx)
613 {
614 return ptr->CTRL[idx].CMD.CMD;
615 }
616
617 /**
618 * @brief Rewind the SEI command
619 * @param [in] ptr SEI base address
620 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
621 */
sei_set_command_rewind(SEI_Type * ptr,uint8_t idx)622 static inline void sei_set_command_rewind(SEI_Type *ptr, uint8_t idx)
623 {
624 ptr->CTRL[idx].CMD.MODE |= SEI_CTRL_CMD_MODE_REWIND_MASK;
625 }
626
627 /**
628 * @brief Set the SEI data value
629 * @param [in] ptr SEI base address
630 * @param [in] idx SEI data index, such as SEI_DAT_2, SEI_DAT_3, etc.
631 * @param [in] data data value
632 */
sei_set_data_value(SEI_Type * ptr,uint8_t idx,uint32_t data)633 static inline void sei_set_data_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
634 {
635 ptr->DAT[idx].DATA = data;
636 }
637
638 /**
639 * @brief Get the SEI data value
640 * @param [in] ptr SEI base address
641 * @param [in] idx SEI data index, such as SEI_DAT_2, SEI_DAT_3, etc.
642 * @retval data value
643 */
sei_get_data_value(SEI_Type * ptr,uint8_t idx)644 static inline uint32_t sei_get_data_value(SEI_Type *ptr, uint8_t idx)
645 {
646 return ptr->DAT[idx].DATA;
647 }
648
649 /**
650 * @brief Rewind the SEI data
651 * @param [in] ptr SEI base address
652 * @param [in] idx SEI data index, such as SEI_DAT_2, SEI_DAT_3, etc.
653 */
sei_set_data_rewind(SEI_Type * ptr,uint8_t idx)654 static inline void sei_set_data_rewind(SEI_Type *ptr, uint8_t idx)
655 {
656 ptr->DAT[idx].MODE |= SEI_DAT_MODE_REWIND_MASK;
657 }
658
659 /**
660 * @brief Set the SEI sample position (singleturn) override value
661 * @param [in] ptr SEI base address
662 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
663 * @param [in] data position (singleturn) override value
664 */
sei_set_sample_pos_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)665 static inline void sei_set_sample_pos_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
666 {
667 ptr->CTRL[idx].POS.SMP_POS = data;
668 }
669
670 /**
671 * @brief Set the SEI sample revolution (multiturn) override value
672 * @param [in] ptr SEI base address
673 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
674 * @param [in] data revolution (multiturn) override value
675 */
sei_set_sample_rev_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)676 static inline void sei_set_sample_rev_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
677 {
678 ptr->CTRL[idx].POS.SMP_REV = data;
679 }
680
681 /**
682 * @brief Set the SEI sample speed override value
683 * @param [in] ptr SEI base address
684 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
685 * @param [in] data speed override value
686 */
sei_set_sample_spd_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)687 static inline void sei_set_sample_spd_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
688 {
689 ptr->CTRL[idx].POS.SMP_SPD = data;
690 }
691
692 /**
693 * @brief Set the SEI sample acceleration override value
694 * @param [in] ptr SEI base address
695 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
696 * @param [in] data acceleration override value
697 */
sei_set_sample_acc_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)698 static inline void sei_set_sample_acc_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
699 {
700 ptr->CTRL[idx].POS.SMP_ACC = data;
701 }
702
703 /**
704 * @brief Set the SEI update position (singleturn) override value
705 * @param [in] ptr SEI base address
706 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
707 * @param [in] data position (singleturn) override value
708 */
sei_set_update_pos_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)709 static inline void sei_set_update_pos_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
710 {
711 ptr->CTRL[idx].POS.UPD_POS = data;
712 }
713
714 /**
715 * @brief Set the SEI update revolution (multiturn) override value
716 * @param [in] ptr SEI base address
717 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
718 * @param [in] data revolution (multiturn) override value
719 */
sei_set_update_rev_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)720 static inline void sei_set_update_rev_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
721 {
722 ptr->CTRL[idx].POS.UPD_REV = data;
723 }
724
725 /**
726 * @brief Set the SEI update speed override value
727 * @param [in] ptr SEI base address
728 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
729 * @param [in] data speed override value
730 */
sei_set_update_spd_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)731 static inline void sei_set_update_spd_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
732 {
733 ptr->CTRL[idx].POS.UPD_SPD = data;
734 }
735
736 /**
737 * @brief Set the SEI update acceleration override value
738 * @param [in] ptr SEI base address
739 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
740 * @param [in] data acceleration override value
741 */
sei_set_update_acc_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)742 static inline void sei_set_update_acc_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
743 {
744 ptr->CTRL[idx].POS.UPD_ACC = data;
745 }
746
747 /**
748 * @brief Set the SEI update time override value
749 * @param [in] ptr SEI base address
750 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
751 * @param [in] data time override value
752 */
sei_set_update_time_override_value(SEI_Type * ptr,uint8_t idx,uint32_t data)753 static inline void sei_set_update_time_override_value(SEI_Type *ptr, uint8_t idx, uint32_t data)
754 {
755 ptr->CTRL[idx].POS.UPD_TIME = data;
756 }
757
758 /**
759 * @brief Set the SEI irq match pointer0
760 * @param [in] ptr SEI base address
761 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
762 * @param [in] instr_idx match instr0 index
763 */
sei_set_irq_match_instr0_ptr(SEI_Type * ptr,uint8_t idx,uint8_t instr_idx)764 static inline void sei_set_irq_match_instr0_ptr(SEI_Type *ptr, uint8_t idx, uint8_t instr_idx)
765 {
766 ptr->CTRL[idx].IRQ.POINTER0 = SEI_CTRL_IRQ_POINTER0_POINTER_SET(instr_idx);
767 }
768
769 /**
770 * @brief Set the SEI irq match pointer1
771 * @param [in] ptr SEI base address
772 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
773 * @param [in] instr_idx match instr1 index
774 */
sei_set_irq_match_instr1_ptr(SEI_Type * ptr,uint8_t idx,uint8_t instr_idx)775 static inline void sei_set_irq_match_instr1_ptr(SEI_Type *ptr, uint8_t idx, uint8_t instr_idx)
776 {
777 ptr->CTRL[idx].IRQ.POINTER1 = SEI_CTRL_IRQ_POINTER1_POINTER_SET(instr_idx);
778 }
779
780 /**
781 * @brief Set the SEI irq match instr0
782 * @param [in] ptr SEI base address
783 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
784 * @param [in] instr_value match instr0 value
785 */
sei_set_irq_match_instr0_value(SEI_Type * ptr,uint8_t idx,uint32_t instr_value)786 static inline void sei_set_irq_match_instr0_value(SEI_Type *ptr, uint8_t idx, uint32_t instr_value)
787 {
788 ptr->CTRL[idx].IRQ.INSTR0 = SEI_CTRL_IRQ_INSTR0_INSTR_SET(instr_value);
789 }
790
791 /**
792 * @brief Set the SEI irq match instr1
793 * @param [in] ptr SEI base address
794 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
795 * @param [in] instr_value match instr1 value
796 */
sei_set_irq_match_instr1_value(SEI_Type * ptr,uint8_t idx,uint32_t instr_value)797 static inline void sei_set_irq_match_instr1_value(SEI_Type *ptr, uint8_t idx, uint32_t instr_value)
798 {
799 ptr->CTRL[idx].IRQ.INSTR1 = SEI_CTRL_IRQ_INSTR1_INSTR_SET(instr_value);
800 }
801
802 /**
803 * @brief Set the SEI irq enable or disable
804 * @param [in] ptr SEI base address
805 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
806 * @param [in] irq_mask irq mask, @ref sei_irq_event_t
807 * @param [in] enable enable or disable
808 * @arg true enable
809 * @arg false disable
810 */
sei_set_irq_enable(SEI_Type * ptr,uint8_t idx,uint32_t irq_mask,bool enable)811 static inline void sei_set_irq_enable(SEI_Type *ptr, uint8_t idx, uint32_t irq_mask, bool enable)
812 {
813 if (enable) {
814 ptr->CTRL[idx].IRQ.INT_EN |= irq_mask;
815 } else {
816 ptr->CTRL[idx].IRQ.INT_EN &= ~irq_mask;
817 }
818 }
819
820 /**
821 * @brief Get the SEI irq status
822 * @param [in] ptr SEI base address
823 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
824 * @param [in] irq_mask irq mask, @ref sei_irq_event_t
825 *
826 * @retval true-has irq req, false-no irq req.
827 */
sei_get_irq_status(SEI_Type * ptr,uint8_t idx,uint32_t irq_mask)828 static inline bool sei_get_irq_status(SEI_Type *ptr, uint8_t idx, uint32_t irq_mask)
829 {
830 return ((ptr->CTRL[idx].IRQ.INT_FLAG & irq_mask) == irq_mask) ? true : false;
831 }
832
833 /**
834 * @brief Clear the SEI irq flag
835 * @param [in] ptr SEI base address
836 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
837 * @param [in] irq_mask irq mask, @ref sei_irq_event_t
838 */
sei_clear_irq_flag(SEI_Type * ptr,uint8_t idx,uint32_t irq_mask)839 static inline void sei_clear_irq_flag(SEI_Type *ptr, uint8_t idx, uint32_t irq_mask)
840 {
841 ptr->CTRL[idx].IRQ.INT_FLAG = irq_mask;
842 }
843
844 /**
845 * @brief Init SEI tranceiver configuration
846 * @param [in] ptr SEI base address
847 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
848 * @param [in] config tranceiver configuration @ref sei_tranceiver_config_t
849 * @retval API execution status
850 */
851 hpm_stat_t sei_tranceiver_config_init(SEI_Type *ptr, uint8_t idx, sei_tranceiver_config_t *config);
852
853 /**
854 * @brief Init SEI command or data format configuration
855 * @param [in] ptr SEI base address
856 * @param [in] cmd_data_select
857 * @arg @ref SEI_SELECT_CMD select command
858 * @arg @ref SEI_SELECT_DATA select data
859 * @param [in] idx SEI ctrl index or data index, decided by cmd_data_select, such as SEI_CTRL_0, SEI_CTRL_1, SEI_DAT_2, SEI_DAT_3, etc.
860 * @param [in] config command or data format configuration @ref sei_data_format_config_t
861 * @retval API execution status
862 */
863 hpm_stat_t sei_cmd_data_format_config_init(SEI_Type *ptr, bool cmd_data_select, uint8_t idx, sei_data_format_config_t *config);
864
865 /**
866 * @brief Init SEI command table configuration
867 * @param [in] ptr SEI base address
868 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
869 * @param [in] table_idx command table index, 0 - 7
870 * @param [in] config command table configuration @ref sei_command_table_config_t
871 * @retval API execution status
872 */
873 hpm_stat_t sei_cmd_table_config_init(SEI_Type *ptr, uint8_t idx, uint8_t table_idx, sei_command_table_config_t *config);
874
875 /**
876 * @brief Init SEI state transition configuration
877 * @param [in] ptr SEI base address
878 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
879 * @param [in] latch_idx latch index
880 * @arg SEI_LATCH_0
881 * @arg SEI_LATCH_1
882 * @arg SEI_LATCH_2
883 * @arg SEI_LATCH_3
884 * @param [in] state transition state
885 * @arg SEI_CTRL_LATCH_TRAN_0_1
886 * @arg SEI_CTRL_LATCH_TRAN_1_2
887 * @arg SEI_CTRL_LATCH_TRAN_2_3
888 * @arg SEI_CTRL_LATCH_TRAN_3_0
889 * @param [in] config state transition configuration @ref sei_state_transition_config_t
890 * @retval API execution status
891 */
892 hpm_stat_t sei_state_transition_config_init(SEI_Type *ptr, uint8_t idx, uint8_t latch_idx, uint8_t state, sei_state_transition_config_t *config);
893
894 /**
895 * @brief Init SEI state transition latch configuration
896 * @param [in] ptr SEI base address
897 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
898 * @param [in] latch_idx latch index
899 * @arg SEI_LATCH_0
900 * @arg SEI_LATCH_1
901 * @arg SEI_LATCH_2
902 * @arg SEI_LATCH_3
903 * @param [in] config state transition latch configuration @ref sei_state_transition_latch_config_t
904 * @retval API execution status
905 */
906 hpm_stat_t sei_state_transition_latch_config_init(SEI_Type *ptr, uint8_t idx, uint8_t latch_idx, sei_state_transition_latch_config_t *config);
907
908 /**
909 * @brief Init SEI sample configuration
910 * @param [in] ptr SEI base address
911 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
912 * @param [in] config sample configuration @ref sei_sample_config_t
913 * @retval API execution status
914 */
915 hpm_stat_t sei_sample_config_init(SEI_Type *ptr, uint8_t idx, sei_sample_config_t *config);
916
917 /**
918 * @brief Init SEI update configuration
919 * @param [in] ptr SEI base address
920 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
921 * @param [in] config update configuration @ref sei_update_config_t
922 * @retval API execution status
923 */
924 hpm_stat_t sei_update_config_init(SEI_Type *ptr, uint8_t idx, sei_update_config_t *config);
925
926 /**
927 * @brief Init SEI trigger input configuration
928 * @param [in] ptr SEI base address
929 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
930 * @param [in] config trigger input configuration @ref sei_trigger_input_config_t
931 * @retval API execution status
932 */
933 hpm_stat_t sei_trigger_input_config_init(SEI_Type *ptr, uint8_t idx, sei_trigger_input_config_t *config);
934
935 /**
936 * @brief Init SEI trigger output configuration
937 * @param [in] ptr SEI base address
938 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
939 * @param [in] config trigger output configuration @ref sei_trigger_output_config_t
940 * @retval API execution status
941 */
942 hpm_stat_t sei_trigger_output_config_init(SEI_Type *ptr, uint8_t idx, sei_trigger_output_config_t *config);
943
944 /**
945 * @brief Init SEI engine configuration
946 * @param [in] ptr SEI base address
947 * @param [in] idx SEI ctrl index, such as SEI_CTRL_0, SEI_CTRL_1, etc.
948 * @param [in] config engine configuration @ref sei_engine_config_t
949 * @retval API execution status
950 */
951 hpm_stat_t sei_engine_config_init(SEI_Type *ptr, uint8_t idx, sei_engine_config_t *config);
952
953 /**
954 * @brief Set SEI Intsructions
955 * @param [in] ptr SEI base address
956 * @param [in] idx SEI instruction index.
957 * @param [in] op SEI instruction operation
958 * @arg @ref SEI_INSTR_OP_HALT
959 * @arg @ref SEI_INSTR_OP_JUMP
960 * @arg @ref SEI_INSTR_OP_SEND_WDG
961 * @arg @ref SEI_INSTR_OP_SEND
962 * @arg @ref SEI_INSTR_OP_WAIT_WDG
963 * @arg @ref SEI_INSTR_OP_WAIT
964 * @arg @ref SEI_INSTR_OP_RECV_WDG
965 * @arg @ref SEI_INSTR_OP_RECV
966 * @param [in] ck SEI instruction clock
967 * [1] synchronous master clock type
968 * @arg @ref SEI_INSTR_M_CK_LOW
969 * @arg @ref SEI_INSTR_M_CK_RISE_FALL
970 * @arg @ref SEI_INSTR_M_CK_FALL_RISE
971 * @arg @ref SEI_INSTR_M_CK_HIGH
972 * [2] synchronous slave clock type
973 * @arg @ref SEI_INSTR_S_CK_DEFAULT
974 * @arg @ref SEI_INSTR_S_CK_TRX_EXCH
975 * @arg @ref SEI_INSTR_S_CK_TIMEOUT_EN
976 * @arg @ref SEI_INSTR_S_CK_TRX_EXCH_TIMEOUT_EN
977 * @param [in] crc SEI instruction crc register, such as SEI_DAT_0, SEI_DAT_1, etc.
978 * @param [in] data SEI instruction data register, such as SEI_DAT_0, SEI_DAT_1, etc.
979 * @param [in] opr SEI instruction operand.
980 * [1] When OP is SEI_INSTR_OP_HALT, opr is the halt time in baudrate, 0 represents infinite time.
981 * [2] When OP is SEI_INSTR_OP_JUMP, opr is command table pointer, init pointer or wdg pointer.
982 * @arg @ref SEI_JUMP_INIT_INSTR_IDX
983 * @arg @ref SEI_JUMP_WDG_INSTR_IDX
984 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX0
985 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX1
986 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX2
987 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX3
988 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX4
989 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX5
990 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX6
991 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX7
992 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX8
993 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX9
994 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX10
995 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX11
996 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX12
997 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX13
998 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX14
999 * @arg @ref SEI_JUMP_CMD_TABLE_INSTR_IDX15
1000 * [3] Other OP, this area is the data length.
1001 */
1002 void sei_set_instr(SEI_Type *ptr, uint8_t idx, uint8_t op, uint8_t ck, uint8_t crc, uint8_t data, uint8_t opr);
1003
1004
1005 #if defined(__cplusplus)
1006 }
1007 #endif /* __cplusplus */
1008
1009 #endif
1010