1 /*
2 * Copyright (C) 2015 Allwinnertech, z.q <zengqi@allwinnertech.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 */
9 #include "disp_eink.h"
10
11 #ifdef SUPPORT_EINK
12 #include <linux/sched.h>
13
14 /* #define __EINK_DEBUG__ */
15 /* #define __EINK_TEST__ */
16 #define MAX_EINK_ENGINE 1
17
18 #ifdef __EINK_DEBUG__
19 #define USED 1
20 #define LBL 4
21 #define LEL 44
22 #define LSL 10
23 #define FBL 4
24 #define FEL 12
25 #define FSL 4
26 #define WIDTH 800
27 #define HEIGHT 600
28 #endif
29
30 #ifdef EINK_FLUSH_TIME_TEST
31 struct timeval wb_end_timer, flush_start_timer, open_tcon_timer;
32 struct timeval flush_end_timer, test_start, test_end, en_lcd, dis_lcd;
33 struct timeval index_hard_timer, start_decode_timer;
34 struct timeval en_decode[3];
35 struct timeval fi_decode[3];
36 unsigned int t3_f3[3] = { 0, 0, 0 };
37 static int decode_task_t;
38 static int decode_t;
39
40 unsigned int lcd_t1, lcd_t2, lcd_t3, lcd_t4, lcd_t5, lcd_pin, lcd_po, lcd_tcon;
41 struct timeval ioctrl_start_timer;
42 unsigned int t1 = 0, t2 = 0, t3 = 0, t4 = 0;
43 unsigned int t3_1 = 0, t3_2 = 0, t3_3 = 0, t2_1 = 0, t2_2 = 0;
44 #endif
45
46 #ifdef __EINK_TEST__
47 static int decount;
48 static int wacount;
49 static int emcount;
50 static int qcount;
51 #endif
52
53 static struct disp_eink_manager *eink_manager;
54 static struct eink_private *eink_private_data;
55 static int suspend;
56 static unsigned char index_finish_flag;
57 static int display_pre_finish_flag;
58 int display_finish_flag = 1;
59
60 static int __write_edma_first(struct disp_eink_manager *manager);
61 static int __write_edma_second(struct disp_eink_manager *manager);
62 static int __write_edma(struct disp_eink_manager *manager);
63
disp_get_eink_manager(unsigned int disp)64 struct disp_eink_manager *disp_get_eink_manager(unsigned int disp)
65 {
66 return &eink_manager[disp];
67 }
68
get_temperature(struct disp_eink_manager * manager)69 unsigned int get_temperature(struct disp_eink_manager *manager)
70 {
71 unsigned int temp = 28;
72
73 if (manager)
74 temp = manager->get_temperature(manager);
75 else
76 __debug("eink manager is null\n");
77
78 return temp;
79 }
80
eink_get_priv(struct disp_eink_manager * manager)81 struct eink_private *eink_get_priv(struct disp_eink_manager *manager)
82 {
83 return (manager != NULL) ? (&eink_private_data[manager->disp]) : NULL;
84 }
85
__eink_clk_init(struct disp_eink_manager * manager)86 int __eink_clk_init(struct disp_eink_manager *manager)
87 {
88 return 0;
89 }
90
__eink_clk_disable(struct disp_eink_manager * manager)91 int __eink_clk_disable(struct disp_eink_manager *manager)
92 {
93 int ret = 0;
94
95 if (manager->private_data->eink_clk)
96 clk_disable(manager->private_data->eink_clk);
97
98 if (manager->private_data->edma_clk)
99 clk_disable(manager->private_data->edma_clk);
100
101 return ret;
102 }
103
__eink_clk_enable(struct disp_eink_manager * manager)104 int __eink_clk_enable(struct disp_eink_manager *manager)
105 {
106 int ret = 0;
107
108 if (manager->private_data->eink_clk)
109 ret = clk_prepare_enable(manager->private_data->eink_clk);
110
111 if (manager->private_data->edma_clk)
112 ret = clk_prepare_enable(manager->private_data->edma_clk);
113
114 return ret;
115 }
116
__clear_wavedata_buffer(struct wavedata_queue * queue)117 void __clear_wavedata_buffer(struct wavedata_queue *queue)
118 {
119 int i = 0;
120 unsigned long flags = 0;
121
122 spin_lock_irqsave(&queue->slock, flags);
123
124 queue->head = 0;
125 queue->tail = 0;
126 for (i = 0; i < WAVE_DATA_BUF_NUM; i++)
127 queue->wavedata_used[i] = false;
128
129 spin_unlock_irqrestore(&queue->slock, flags);
130 }
131
132 #ifdef __EINK_TEST__
__eink_clear_wave_data(struct disp_eink_manager * manager,int overlap)133 void __eink_clear_wave_data(struct disp_eink_manager *manager, int overlap)
134 {
135 __clear_wavedata_buffer(&(manager->private_data->wavedata_ring_buffer));
136 }
137
__eink_debug_decode(struct disp_eink_manager * manager,int enable)138 int __eink_debug_decode(struct disp_eink_manager *manager, int enable)
139 {
140 int ret = 0;
141
142 #ifdef EINK_FLUSH_TIME_TEST
143 do_gettimeofday(&test_start);
144 msleep(300);
145 do_gettimeofday(&test_end);
146 #endif
147
148 return ret;
149 }
150
__is_wavedata_buffer_full(struct wavedata_queue * queue)151 static bool __is_wavedata_buffer_full(struct wavedata_queue *queue)
152 {
153 bool ret;
154 unsigned long flags = 0;
155
156 spin_lock_irqsave(&queue->slock, flags);
157
158 ret =
159 ((queue->head + 1) % WAVE_DATA_BUF_NUM == queue->tail) ?
160 true : false;
161
162 spin_unlock_irqrestore(&queue->slock, flags);
163
164 return ret;
165
166 }
167
__is_wavedata_buffer_empty(struct wavedata_queue * queue)168 static bool __is_wavedata_buffer_empty(struct wavedata_queue *queue)
169 {
170 bool ret;
171 unsigned long flags = 0;
172
173 spin_lock_irqsave(&queue->slock, flags);
174
175 ret = (queue->head == queue->tail) ? true : false;
176
177 spin_unlock_irqrestore(&queue->slock, flags);
178
179 return ret;
180
181 }
182 #endif/*__EINK_TEST__*/
183
__eink_get_sys_config(u32 disp,struct eink_init_param * eink_param)184 static void __eink_get_sys_config(u32 disp, struct eink_init_param *eink_param)
185 {
186 int value = 1;
187 char primary_key[20];
188 int ret;
189
190 sprintf(primary_key, "lcd%d", disp);
191
192 ret = disp_sys_script_get_item(primary_key, "lcd_used", &value, 1);
193 if (ret == 1)
194 eink_param->used = value;
195
196 if (eink_param->used == 0)
197 return;
198
199 ret = disp_sys_script_get_item(primary_key, "eink_bits", &value, 1);
200 if (ret == 1)
201 eink_param->eink_bits = value;
202
203 ret = disp_sys_script_get_item(primary_key, "eink_mode", &value, 1);
204 if (ret == 1)
205 eink_param->eink_mode = value;
206
207 ret = disp_sys_script_get_item(primary_key, "eink_lbl", &value, 1);
208 if (ret == 1)
209 eink_param->timing.lbl = value;
210
211 ret = disp_sys_script_get_item(primary_key, "eink_lel", &value, 1);
212 if (ret == 1)
213 eink_param->timing.lel = value;
214
215 ret = disp_sys_script_get_item(primary_key, "eink_lsl", &value, 1);
216 if (ret == 1)
217 eink_param->timing.lsl = value;
218
219 ret = disp_sys_script_get_item(primary_key, "eink_fbl", &value, 1);
220 if (ret == 1)
221 eink_param->timing.fbl = value;
222
223 ret = disp_sys_script_get_item(primary_key, "eink_fel", &value, 1);
224 if (ret == 1)
225 eink_param->timing.fel = value;
226
227 ret = disp_sys_script_get_item(primary_key, "eink_fsl", &value, 1);
228 if (ret == 1)
229 eink_param->timing.fsl = value;
230
231 ret = disp_sys_script_get_item(primary_key, "eink_width", &value, 1);
232 if (ret == 1)
233 eink_param->timing.width = value;
234
235 ret = disp_sys_script_get_item(primary_key, "eink_height", &value, 1);
236 if (ret == 1)
237 eink_param->timing.height = value;
238
239 ret =
240 disp_sys_script_get_item(primary_key, "eink_path",
241 (int *)&eink_param->wavefile_path, 2);
242 if (ret != 2)
243 __wrn("get eink path fail!\n");
244 }
245
__eink_interrupt_proc(int irq,void * parg)246 static int __eink_interrupt_proc(int irq, void *parg)
247 {
248 struct disp_eink_manager *manager;
249 unsigned int disp;
250 int ret = -1;
251
252 manager = (struct disp_eink_manager *)parg;
253 if (!manager)
254 return DISP_IRQ_RETURN;
255
256 disp = manager->disp;
257 ret = disp_al_eink_irq_query(manager->disp);
258
259 /* query irq, 0 is decode, 1 is calculate index. */
260 if (ret == 1) {
261 index_finish_flag = 1;
262 goto out;
263 } else if (ret == 0) {
264 schedule_work(&manager->decode_work);
265 goto out;
266 }
267
268 out:
269
270 return DISP_IRQ_RETURN;
271 }
272
273 /* return a physic address for tcon
274 * used to display wavedata,then
275 * dequeue wavedata buffer.
276 */
__request_buffer_for_display(struct wavedata_queue * queue)277 static void *__request_buffer_for_display(struct wavedata_queue *queue)
278 {
279 void *ret;
280 unsigned long flags = 0;
281 bool is_wavedata_buf_empty;
282
283 spin_lock_irqsave(&queue->slock, flags);
284
285 is_wavedata_buf_empty = (queue->head == queue->tail) ? true : false;
286 if (is_wavedata_buf_empty) {
287 ret = NULL;
288 goto out;
289 }
290
291 ret = (void *)queue->wavedata_paddr[queue->tail];
292
293 out:
294
295 spin_unlock_irqrestore(&queue->slock, flags);
296
297 return ret;
298 }
299
300 /* return a physic address for eink
301 * engine used to decode one frame,
302 * then queue wavedata buffer.
303 */
__request_buffer_for_decode(struct wavedata_queue * queue)304 static void *__request_buffer_for_decode(struct wavedata_queue *queue)
305 {
306 void *ret;
307 unsigned long flags = 0;
308 bool is_wavedata_buf_full, is_used;
309
310 spin_lock_irqsave(&queue->slock, flags);
311
312 is_wavedata_buf_full =
313 ((queue->head + 1) % WAVE_DATA_BUF_NUM == queue->tail) ?
314 true : false;
315 is_used = queue->wavedata_used[queue->head];
316 if (is_wavedata_buf_full || is_used) {
317 ret = NULL;
318 goto out;
319 }
320
321 ret = (void *)queue->wavedata_paddr[queue->head];
322
323 out:
324 spin_unlock_irqrestore(&queue->slock, flags);
325 return ret;
326 }
327
__queue_wavedata_buffer(struct wavedata_queue * queue)328 static s32 __queue_wavedata_buffer(struct wavedata_queue *queue)
329 {
330 int ret = 0;
331 unsigned long flags = 0;
332 bool is_wavedata_buf_full;
333
334 spin_lock_irqsave(&queue->slock, flags);
335
336 is_wavedata_buf_full =
337 ((queue->head + 1) % WAVE_DATA_BUF_NUM == queue->tail) ?
338 true : false;
339
340 if (is_wavedata_buf_full) {
341 ret = -EBUSY;
342 goto out;
343 }
344 /* set used status true */
345 queue->wavedata_used[queue->head] = true;
346
347 queue->head = (queue->head + 1) % WAVE_DATA_BUF_NUM;
348
349 out:
350
351 #ifdef __EINK_TEST__
352 qcount++;
353 #endif
354 spin_unlock_irqrestore(&queue->slock, flags);
355
356 return ret;
357 }
358
__dequeue_wavedata_buffer(struct wavedata_queue * queue)359 static s32 __dequeue_wavedata_buffer(struct wavedata_queue *queue)
360 {
361 int ret = 0;
362 unsigned long flags = 0;
363 bool is_wavedata_buf_empty;
364
365 spin_lock_irqsave(&queue->slock, flags);
366
367 is_wavedata_buf_empty = (queue->head == queue->tail) ? true : false;
368
369 if (is_wavedata_buf_empty) {
370 ret = -EBUSY;
371 goto out;
372 }
373 queue->tail = (queue->tail + 1) % WAVE_DATA_BUF_NUM;
374
375 out:
376
377 #ifdef __EINK_TEST__
378 decount++;
379 #endif
380 spin_unlock_irqrestore(&queue->slock, flags);
381
382 return ret;
383 }
384
__clean_used_wavedata_buffer(struct wavedata_queue * queue)385 static s32 __clean_used_wavedata_buffer(struct wavedata_queue *queue)
386 {
387 int ret = 0;
388 unsigned long flags = 0;
389
390 spin_lock_irqsave(&queue->slock, flags);
391
392 if (queue->tail >= 2) {
393 queue->wavedata_used[queue->tail - 2] = false;
394 } else {
395 queue->wavedata_used[queue->tail + WAVE_DATA_BUF_NUM - 2] =
396 false;
397 }
398
399 spin_unlock_irqrestore(&queue->slock, flags);
400
401 return ret;
402 }
403
404 static int index_err;
eink_calculate_index_data(struct disp_eink_manager * manager)405 static s32 eink_calculate_index_data(struct disp_eink_manager *manager)
406 {
407 unsigned long flags = 0;
408 struct eink_8bpp_image *last_image;
409 struct eink_8bpp_image *current_image;
410 unsigned long old_index_data_paddr = 0;
411 unsigned long new_index_data_paddr = 0;
412 unsigned int new_index = 0, old_index = 0;
413 unsigned int t_new_index = 0, t_old_index = 0;
414 int count = 0;
415
416 /* last img */
417 last_image = manager->buffer_mgr->get_last_image(manager->buffer_mgr);
418 /* cur img */
419 current_image =
420 manager->buffer_mgr->get_current_image(manager->buffer_mgr);
421
422 if (!last_image || !current_image) {
423 __wrn("image paddr is NULL!\n");
424 return -EINVAL;
425 }
426
427 spin_lock_irqsave(&manager->private_data->slock, flags);
428
429 t_new_index = new_index = manager->private_data->new_index;
430 t_old_index = old_index = manager->private_data->old_index;
431
432 if (new_index > 1 || old_index > 1 || new_index != old_index) {
433 __wrn("index larger then 1,new_index=%d,old_index=%d\n",
434 new_index, old_index);
435 spin_unlock_irqrestore(&manager->private_data->slock, flags);
436 return -EINVAL;
437 }
438
439 if (old_index == new_index)
440 manager->private_data->new_index =
441 1 - manager->private_data->old_index;
442
443 old_index = manager->private_data->old_index;
444 new_index = manager->private_data->new_index;
445
446 old_index_data_paddr =
447 (unsigned long)manager->private_data->index_paddr[old_index];
448 new_index_data_paddr =
449 (unsigned long)manager->private_data->index_paddr[new_index];
450
451 __debug
452 ("new index=%d,old_index=%d, old_index_data_paddr=%p, new_index_data_paddr=%p\n",
453 manager->private_data->new_index, manager->private_data->old_index,
454 (void *)old_index_data_paddr, (void *)new_index_data_paddr);
455
456 spin_unlock_irqrestore(&manager->private_data->slock, flags);
457
458 #ifdef EINK_FLUSH_TIME_TEST
459 do_gettimeofday(&index_hard_timer);
460 #endif
461
462 disp_al_eink_start_calculate_index(manager->disp,
463 old_index_data_paddr,
464 new_index_data_paddr,
465 last_image, current_image);
466 /* calculate index */
467
468 /* check hardware status,if calculate over, then continue,
469 * otherwise wait for status,if timeout, throw warning and quit.
470 */
471
472 while ((index_finish_flag != 1) && (count < 200)) {
473 count++;
474
475 /* it may fix by different param by hardware.
476 * if too less,the first frame index calc err.
477 * at this time, no use msleep.
478 */
479 udelay(300);
480 }
481
482 if ((count >= 200) && (index_finish_flag != 1)) {
483 __wrn("calculate index data is wrong!\n");
484
485 spin_lock_irqsave(&manager->private_data->slock, flags);
486 manager->private_data->new_index = t_new_index;
487 manager->private_data->old_index = t_old_index;
488 spin_unlock_irqrestore(&manager->private_data->slock, flags);
489 eink_irq_query_index();
490 index_finish_flag = 0;
491 index_err = 1;
492 return -EBUSY;
493 }
494 index_err = 0;
495 index_finish_flag = 0;
496 if (current_image->window_calc_enable)
497 disp_al_get_update_area(manager->disp,
498 ¤t_image->update_area);
499
500 #ifdef __EINK_TEST__
501 __debug("calc en=%d, flash mode = %d\n",
502 current_image->window_calc_enable, current_image->flash_mode);
503 __debug("xtop=%d,ytop=%d,xbot=%d,ybot=%d\n",
504 current_image->update_area.x_top,
505 current_image->update_area.y_top,
506 current_image->update_area.x_bottom,
507 current_image->update_area.y_bottom);
508 #endif
509
510 /* if calculate index success, then switch the
511 * index double buffer,set index fresh flag.
512 */
513 spin_lock_irqsave(&manager->private_data->slock, flags);
514
515 manager->private_data->index_fresh = true;
516
517 spin_unlock_irqrestore(&manager->private_data->slock, flags);
518
519 #ifdef EINK_FLUSH_TIME_TEST
520 do_gettimeofday(&flush_start_timer);
521 t2 = (flush_start_timer.tv_sec - wb_end_timer.tv_sec) * 1000000 +
522 (flush_start_timer.tv_usec - wb_end_timer.tv_usec);
523 t2_1 =
524 (index_hard_timer.tv_sec - wb_end_timer.tv_sec) * 1000000 +
525 (index_hard_timer.tv_usec - wb_end_timer.tv_usec);
526 t2_2 =
527 (flush_start_timer.tv_sec - index_hard_timer.tv_sec) * 1000000 +
528 (flush_start_timer.tv_usec - index_hard_timer.tv_usec);
529 #endif
530
531 return 0;
532
533 }
534
start_decode(struct disp_eink_manager * manager,unsigned long wavedata_paddr,unsigned long index_paddr)535 static int start_decode(struct disp_eink_manager *manager,
536 unsigned long wavedata_paddr, unsigned long index_paddr)
537 {
538 struct eink_private *data;
539 struct eink_init_param param;
540 int ret = 0;
541
542 data = eink_get_priv(manager);
543 memcpy((void *)¶m, (void *)&data->param,
544 sizeof(struct eink_init_param));
545 #ifdef EINK_FLUSH_TIME_TEST
546 if (decode_t == 0) {
547 do_gettimeofday(&start_decode_timer);
548 t3_1 =
549 (start_decode_timer.tv_sec -
550 flush_start_timer.tv_sec) * 1000000 +
551 (start_decode_timer.tv_usec - flush_start_timer.tv_usec);
552 }
553 #endif
554 ret =
555 disp_al_eink_start_decode(manager->disp, index_paddr,
556 wavedata_paddr, ¶m);
557
558 #ifdef EINK_FLUSH_TIME_TEST
559 if (decode_t <= 2) {
560 do_gettimeofday(&en_decode[decode_t]);
561 decode_t++;
562 }
563 #endif
564
565 return ret;
566 }
567
568 static int current_frame;
569 extern s32 disp_lcd_tcon_disable(struct disp_device *lcd);
570
eink_display_one_frame(struct disp_eink_manager * manager)571 int eink_display_one_frame(struct disp_eink_manager *manager)
572 {
573 unsigned long flags = 0;
574 int ret = 0;
575 int index = 0;
576 struct disp_device *plcd = NULL;
577
578 spin_lock_irqsave(&manager->private_data->slock, flags);
579
580 manager->private_data->fresh_frame_index++;
581
582 index = manager->private_data->fresh_frame_index;
583
584 if (manager->private_data->fresh_frame_index ==
585 (manager->private_data->total_frame)) {
586
587 manager->private_data->fresh_frame_index = 0;
588 /* manager->private_data->total_frame = 0; */
589 __clear_wavedata_buffer(&(manager->private_data->wavedata_ring_buffer));
590 #ifdef __EINK_TEST__
591
592 unsigned int head = 0, tail = 0;
593 unsigned long flags1 = 0;
594
595 spin_lock_irqsave(&manager->private_data->wavedata_ring_buffer.
596 slock, flags1);
597 tail = manager->private_data->wavedata_ring_buffer.tail;
598 head = manager->private_data->wavedata_ring_buffer.head;
599 spin_unlock_irqrestore(&manager->private_data->
600 wavedata_ring_buffer.slock, flags1);
601 __debug("fin:tai=%d,hed=%d,idx=%d,dc=%d,qc=%d,ec=%d,tf=%d\n",
602 tail, head, index, decount, qcount, emcount,
603 manager->private_data->total_frame);
604 decount = wacount = emcount = qcount = 0;
605 #endif
606 current_frame = 0;
607
608 /* __eink_clk_disable(manager); */
609 display_pre_finish_flag = 1;
610 plcd = disp_device_find(manager->disp, DISP_OUTPUT_TYPE_LCD);
611 disp_lcd_tcon_disable(plcd);
612 /* colse eink panel */
613 schedule_work(&plcd->close_eink_panel_work);
614
615 #ifdef EINK_FLUSH_TIME_TEST
616 do_gettimeofday(&flush_end_timer);
617 t4 = (flush_end_timer.tv_sec -
618 open_tcon_timer.tv_sec) * 1000000 +
619 (flush_end_timer.tv_usec - open_tcon_timer.tv_usec);
620 __debug
621 ("us:t1 = %u,t2 = %u,t2_1 = %u,t2_2 = %u,t3 = %u,t4 = %u\n",
622 t1, t2, t2_1, t2_2, t3, t4);
623 __debug("us:t3_1 = %u, t3_2 = %u, t3_3 = %u\n", t3_1, t3_2,
624 t3_3);
625 __debug("us:t3_f1 = %u, t3_f2 = %u, t3_f3 = %u\n", t3_f3[0],
626 t3_f3[1], t3_f3[2]);
627 __debug
628 ("us:lcd1=%u,lcd2=%u,lcd3=%u,lcd4=%u,lcd_t5=%u,lcd_po=%u,lcd_pin=%u,lcd_tcon=%u\n",
629 lcd_t1, lcd_t2, lcd_t3, lcd_t4, lcd_t5, lcd_po, lcd_pin,
630 lcd_tcon);
631
632 t1 = t2 = t3 = t4 = t3_1 = t3_2 = t3_3 = t3_f3[0] = t3_f3[1] =
633 t3_f3[2] = 0;
634 decode_task_t = 0;
635 decode_t = 0;
636 #endif
637 } else if (manager->private_data->fresh_frame_index <
638 (manager->private_data->total_frame - 1)) {
639 tasklet_schedule(&manager->sync_tasklet);
640 }
641
642 spin_unlock_irqrestore(&manager->private_data->slock, flags);
643
644 return ret;
645 }
646
eink_decode_finish(struct disp_eink_manager * manager)647 static int eink_decode_finish(struct disp_eink_manager *manager)
648 {
649 unsigned long flags = 0;
650 int ret = 0;
651
652 spin_lock_irqsave(&manager->private_data->slock, flags);
653
654 if (manager->private_data->total_frame ==
655 manager->private_data->decode_frame_index) {
656 __debug("decode finish!,tot=%d, frame=%d, fresh_frame=%d.\n",
657 manager->private_data->total_frame,
658 manager->private_data->decode_frame_index,
659 manager->private_data->fresh_frame_index);
660
661 manager->private_data->decode_frame_index = 0;
662 ret = 1;
663 goto out;
664 }
665
666 out:
667 spin_unlock_irqrestore(&manager->private_data->slock, flags);
668 __debug("frame_index=%d, total_index=%d\n",
669 manager->private_data->decode_frame_index,
670 manager->private_data->total_frame);
671
672 return ret;
673 }
674
__sync_task(unsigned long disp)675 void __sync_task(unsigned long disp)
676 {
677 struct disp_eink_manager *manager;
678 struct eink_private *private_data;
679 int cur_line = 0;
680 static int start_delay;
681
682 start_delay = disp_al_lcd_get_start_delay(disp, NULL);
683 manager = disp_get_eink_manager((unsigned int)disp);
684 private_data = manager->private_data;
685
686 manager->tcon_flag = 0;
687 cur_line = disp_al_lcd_get_cur_line(disp, NULL);
688 __clean_used_wavedata_buffer(&private_data->wavedata_ring_buffer);
689
690 while (cur_line < start_delay && !display_pre_finish_flag)
691 cur_line = disp_al_lcd_get_cur_line(disp, NULL);
692 __write_edma(manager);
693 }
694
695 /* #define DEBUG_CHANGE_DATA */
696 #ifdef DEBUG_CHANGE_DATA
697 static u32 decode_phy_addr;
698 static u32 *decode_virt_addr;
699
700 #define START_OFFSET 2336 /* (9*258+14) */
701 #define END_OFFSET 157074 /* (609*258-44 - 4) */
702 #endif
703
eink_decode_task(struct work_struct * work)704 void eink_decode_task(struct work_struct *work)
705 {
706 struct disp_eink_manager *manager;
707 bool image_buffer_empty;
708 unsigned int temperature;
709 int insert = 0;
710 unsigned long flags = 0;
711 unsigned long index_buf_paddr = 0, wavedata_paddr = 0;
712 unsigned int tframes = 0;
713 unsigned int new_index;
714 int frame = 0;
715 int count = 0;
716 static int first = 1;
717
718 #ifdef EINK_FLUSH_TIME_TEST
719 if (decode_task_t <= 2) {
720 do_gettimeofday(&fi_decode[decode_task_t]);
721 t3_f3[decode_task_t] =
722 (fi_decode[decode_task_t].tv_sec -
723 en_decode[decode_task_t].tv_sec) * 1000000 +
724 (fi_decode[decode_task_t].tv_usec -
725 en_decode[decode_task_t].tv_usec);
726 decode_task_t++;
727 }
728 #endif
729
730 manager = disp_get_eink_manager((unsigned int)0);
731 temperature = get_temperature(manager);
732 __queue_wavedata_buffer(&manager->private_data->wavedata_ring_buffer);
733 /*update pipeline*/
734 insert =
735 manager->pipeline_mgr->update_pipeline_list(manager->pipeline_mgr,
736 temperature, &tframes);
737 spin_lock_irqsave(&manager->private_data->slock, flags);
738
739 frame = manager->private_data->decode_frame_index++;
740 if (insert == 1) {
741 unsigned int need_frames = 0;
742
743 need_frames = manager->private_data->total_frame -
744 manager->private_data->decode_frame_index;
745
746 if (need_frames <= tframes) {
747 manager->private_data->total_frame =
748 tframes + manager->private_data->decode_frame_index;
749 __debug("need = %d, totoal=%d\n", need_frames,
750 manager->private_data->total_frame);
751 }
752 }
753
754 spin_unlock_irqrestore(&manager->private_data->slock, flags);
755
756 if (frame == 2) {
757 struct disp_device *plcd = NULL;
758
759 __write_edma_first(manager);
760 #ifdef EINK_FLUSH_TIME_TEST
761 do_gettimeofday(&en_lcd);
762 t3_2 =
763 (en_lcd.tv_sec - start_decode_timer.tv_sec) * 1000000 +
764 (en_lcd.tv_usec - start_decode_timer.tv_usec);
765 #endif
766 /* use lcd_enable now, reserve lcd simple open method. */
767
768 plcd = disp_device_find(manager->disp, DISP_OUTPUT_TYPE_LCD);
769
770 if (first) {
771 display_pre_finish_flag = 0;
772 plcd->enable(plcd);/* lcd enable */
773 /* first = 0; */
774 } else {
775 tcon0_simple_open(0);
776 }
777
778 #ifdef EINK_FLUSH_TIME_TEST
779 do_gettimeofday(&dis_lcd);
780 t3_3 =
781 (dis_lcd.tv_sec - en_lcd.tv_sec) * 1000000 +
782 (dis_lcd.tv_usec - en_lcd.tv_usec);
783 t3 = (dis_lcd.tv_sec - flush_start_timer.tv_sec) * 1000000 +
784 (dis_lcd.tv_usec - flush_start_timer.tv_usec);
785 #endif
786
787 __write_edma_second(manager);
788 }
789
790 /* debug by changing data. */
791 #ifdef DEBUG_CHANGE_DATA
792 u16 *point = decode_virt_addr;
793 u8 data_id = 0;
794 u16 *start_point = NULL, *end_point = NULL;
795 u16 start_data = 0, end_data = 0;
796
797 start_point = (point + START_OFFSET);
798 end_point = (point + END_OFFSET);
799 for (data_id = 0; data_id < 4; data_id++) {
800 start_data = *(start_point + data_id) & 0xff;
801 start_data = start_data | (frame << 8);
802 *(start_point + data_id) = start_data;
803 }
804
805 for (data_id = 0; data_id < 4; data_id++) {
806 end_data = *(end_point + data_id) & 0xff;
807 end_data = end_data | (frame << 8);
808 *(end_point + data_id) = end_data;
809 }
810 #endif
811 /*decode finish*/
812 if (eink_decode_finish(manager)) {
813 spin_lock_irqsave(&manager->private_data->slock, flags);
814 manager->private_data->index_fresh = false;
815 spin_unlock_irqrestore(&manager->private_data->slock, flags);
816
817 image_buffer_empty =
818 manager->buffer_mgr->is_empty(manager->buffer_mgr);
819 if (image_buffer_empty) {
820 /* disable eink engine. */
821 manager->disable(manager);
822 }
823 } else {
824 spin_lock_irqsave(&manager->private_data->slock, flags);
825
826 if (insert == 1) {
827 /*
828 * insert a new pipeline to list,
829 * it need switch index buffer.
830 */
831 new_index = manager->private_data->new_index;
832 index_buf_paddr =
833 (unsigned long)manager->private_data->
834 index_paddr[new_index];
835 manager->private_data->old_index = new_index;
836 } else {
837 new_index = manager->private_data->new_index;
838 index_buf_paddr =
839 (unsigned long)manager->private_data->
840 index_paddr[new_index];
841 }
842
843 spin_unlock_irqrestore(&manager->private_data->slock, flags);
844
845 wavedata_paddr =
846 (unsigned long)__request_buffer_for_decode(&manager->
847 private_data->
848 wavedata_ring_buffer);
849
850 while ((!wavedata_paddr) && count < 100) {
851 /* msleep(1); */
852 usleep_range(500, 2000);
853 wavedata_paddr =
854 (unsigned long)
855 __request_buffer_for_decode(&manager->private_data->
856 wavedata_ring_buffer);
857 count++;
858 }
859 if (count > 100) {
860 __debug
861 ("wavedata_ring_buffer was full, stop decoding.\n");
862 return;
863 }
864 #ifdef DEBUG_CHANGE_DATA
865 decode_virt_addr = phys_to_virt((unsigned long)wavedata_paddr);
866 #endif
867
868 /* start decode */
869 start_decode(manager, wavedata_paddr, index_buf_paddr);
870 spin_lock_irqsave(&manager->private_data->slock, flags);
871
872 if (insert == 1)
873 manager->private_data->index_fresh = false;
874
875 spin_unlock_irqrestore(&manager->private_data->slock, flags);
876 }
877 }
878
eink_detect_fresh_thread(void * parg)879 static int eink_detect_fresh_thread(void *parg)
880 {
881 unsigned long flags = 0;
882 struct disp_eink_manager *manager;
883 struct eink_8bpp_image *current_image;
884 int overlap_num;
885 unsigned long wavedata_paddr, index_paddr;
886 unsigned int decode_frame_index;
887 unsigned int tframes = 0;
888 unsigned int temperature = 0;
889 int ret = 0;
890
891 volatile int display_finish;
892
893 manager = (struct disp_eink_manager *)parg;
894 for (;;) {
895 struct eink_buffer_manager *buffer_mgr = manager->buffer_mgr;
896 struct pipeline_manager *pl_mgr = manager->pipeline_mgr;
897 struct eink_private *priv = manager->private_data;
898 struct wavedata_queue *wavedata_ring_buffer =
899 &priv->wavedata_ring_buffer;
900
901 if (kthread_should_stop()) {
902 while (!buffer_mgr->is_empty(buffer_mgr))
903 buffer_mgr->dequeue_image(buffer_mgr);
904 break;
905 }
906
907 temperature = get_temperature(manager);
908
909 if (buffer_mgr->is_empty(buffer_mgr))
910 continue;
911
912 if (pl_mgr->used_list_status(pl_mgr) == 1)
913 continue;
914
915 /* if last index do not fresh, waiting for decode interrupt.*/
916 if (manager->private_data->index_fresh)
917 continue;
918
919 ret = eink_calculate_index_data(manager);
920 if (ret) {
921 buffer_mgr->dequeue_image(buffer_mgr);
922 __wrn("index calc err, something is wrong.\n");
923 if (buffer_mgr->is_empty(buffer_mgr)) {
924 index_err = 0;
925 manager->disable(manager);
926 pl_mgr->clear_pipeline_list(pl_mgr);
927 buffer_mgr->clear_image(buffer_mgr);
928 __clear_wavedata_buffer(wavedata_ring_buffer);
929 /* __eink_clk_disable(manager); */
930 display_finish_flag = 1;
931 }
932 continue;
933 }
934 #ifdef __EINK_TEST__
935 while (!manager->flush_continue_flag) {
936 /* msleep(5); */
937 usleep_range(500, 5000);
938 }
939 #endif
940 current_image =
941 manager->buffer_mgr->get_current_image(manager->buffer_mgr);
942 manager->pipeline_mgr->check_overlap(manager->pipeline_mgr,
943 current_image->update_area);/* check overlap */
944
945 overlap_num =
946 pl_mgr->check_overlap_num(pl_mgr);/* overlap num */
947
948 #ifdef __EINK_TEST__
949 if (overlap_num)
950 __debug("OVERLAP!, overlap_num=%d\n", overlap_num);
951 else
952 __debug("NO OVERLAP.\n");
953 #endif
954
955 while (overlap_num) {
956 display_finish = display_finish_flag;
957 while (!display_finish) {
958 /* msleep(1); */
959 usleep_range(500, 1500);
960 display_finish = display_finish_flag;
961 }
962 /* msleep(1); */
963 usleep_range(500, 1500);
964 overlap_num =
965 pl_mgr->check_overlap_num(pl_mgr);
966 }
967
968 /* fix ,add timeout process,600ms later, then quit it. */
969
970 /*
971 * get one free pipeline
972 * and set the current image update area to pipeline
973 */
974 spin_lock_irqsave(&manager->private_data->slock, flags);
975
976 decode_frame_index = manager->private_data->decode_frame_index;
977 index_paddr =
978 (unsigned long)priv->index_paddr[priv->new_index];
979
980 spin_unlock_irqrestore(&manager->private_data->slock, flags);
981
982 /*
983 * if it's the first decode frame, config pipeline
984 * with the current update area, then enable it,
985 * else just config it, enabel it in next decode interrupt.
986 */
987 current_image =
988 buffer_mgr->get_current_image(buffer_mgr);
989
990 if (decode_frame_index == 0) {
991 /*
992 * insert a new pipeline to list,
993 * it need switch index buffer. once start decode,
994 * it need decode until last frame display finish.
995 */
996 display_finish = display_finish_flag;
997 while (!display_finish) {
998 /* msleep(1); */
999 usleep_range(500, 1500);
1000 display_finish = display_finish_flag;
1001 }
1002 display_finish_flag = 0;
1003
1004 pl_mgr->config_and_enable_one_pipeline(pl_mgr,
1005 current_image->update_area,
1006 current_image->update_mode,
1007 temperature,
1008 &tframes);
1009
1010 spin_lock_irqsave(&manager->private_data->slock, flags);
1011
1012 manager->private_data->total_frame = tframes;
1013 __debug("first total index = %d\n", tframes);
1014 manager->private_data->old_index =
1015 manager->private_data->new_index;
1016
1017 spin_unlock_irqrestore(&manager->private_data->slock,
1018 flags);
1019
1020 wavedata_paddr =
1021 (unsigned long)
1022 __request_buffer_for_decode(&priv->wavedata_ring_buffer);
1023 while (!wavedata_paddr) {
1024 wavedata_paddr =
1025 (unsigned long)
1026 __request_buffer_for_decode(&priv->wavedata_ring_buffer);
1027 }
1028
1029 __debug("decode:[wd_paddr]=0x%p, [idx_paddr]=0x%p\n",
1030 (void *)wavedata_paddr, (void *)index_paddr);
1031
1032 #ifdef DEBUG_CHANGE_DATA
1033 decode_virt_addr = phys_to_virt(wavedata_paddr);
1034 #endif
1035
1036 start_decode(manager, wavedata_paddr, index_paddr);/*decode*/
1037
1038 spin_lock_irqsave(&manager->private_data->slock, flags);
1039
1040 manager->private_data->index_fresh = false;
1041
1042 spin_unlock_irqrestore(&priv->slock, flags);
1043 } else {
1044 pl_mgr->config_one_pipeline(pl_mgr,
1045 current_image->update_area,
1046 current_image->update_mode);
1047 }
1048 /* image ring buffer dequeue one buf */
1049 /*dequeue_image*/
1050 manager->buffer_mgr->dequeue_image(manager->buffer_mgr);
1051 }
1052
1053 return ret;
1054 }
1055
eink_update_image(struct disp_eink_manager * manager,struct disp_layer_config_inner * config,unsigned int layer_num,enum eink_update_mode mode,struct area_info update_area)1056 s32 eink_update_image(struct disp_eink_manager *manager,
1057 struct disp_layer_config_inner *config,
1058 unsigned int layer_num,
1059 enum eink_update_mode mode, struct area_info update_area)
1060 {
1061 int ret = 0;
1062
1063 if (suspend)
1064 return -EBUSY;
1065
1066 if (index_err)
1067 return -EAGAIN;
1068
1069 manager->enable(manager);
1070 ret = manager->buffer_mgr->queue_image(manager->buffer_mgr, config,
1071 layer_num, mode, update_area);
1072
1073 #ifdef EINK_FLUSH_TIME_TEST
1074 do_gettimeofday(&wb_end_timer);
1075 t1 = (wb_end_timer.tv_sec - ioctrl_start_timer.tv_sec) * 1000000 +
1076 (wb_end_timer.tv_usec - ioctrl_start_timer.tv_usec);
1077 #endif
1078
1079 return ret;
1080 }
1081
eink_op_skip(struct disp_eink_manager * manager,u32 skip)1082 static int eink_op_skip(struct disp_eink_manager *manager, u32 skip)
1083 {
1084 return manager->pipeline_mgr->op_skip(manager->pipeline_mgr, skip);
1085 }
1086
1087 static int first_enable = 1;
1088
eink_enable(struct disp_eink_manager * manager)1089 s32 eink_enable(struct disp_eink_manager *manager)
1090 {
1091 unsigned long flags = 0;
1092 int ret = 0;
1093 struct eink_init_param param;
1094 struct eink_init_param *eink_param;
1095
1096 suspend = 0;
1097 spin_lock_irqsave(&manager->private_data->slock, flags);
1098
1099 if (manager->private_data->enable_flag) {
1100 spin_unlock_irqrestore(&manager->private_data->slock, flags);
1101 return ret;
1102 }
1103
1104 spin_unlock_irqrestore(&manager->private_data->slock, flags);
1105
1106 #ifdef SUPPORT_WB
1107 manager->convert_mgr =
1108 disp_get_format_manager(manager->convert_mgr->disp);
1109 /*WB enable*/
1110 if (manager->convert_mgr)
1111 manager->convert_mgr->enable(manager->convert_mgr->disp);
1112 else
1113 __wrn("convert mgr is null.\n");
1114 #endif
1115 eink_param = &manager->private_data->param;/* bits,data... */
1116
1117 /* enable eink clk */
1118 if (first_enable)
1119 ret = __eink_clk_enable(manager);
1120
1121 /* init eink and edma */
1122 memcpy((void *)¶m, (void *)&manager->private_data->param,
1123 sizeof(struct eink_init_param));
1124 ret = disp_al_eink_config(manager->disp, ¶m);
1125 ret = disp_al_edma_init(manager->disp, ¶m);
1126
1127 /*load waveform data,do only once. */
1128 if (first_enable) {
1129 /* register eink irq */
1130 int i;
1131
1132 ret = disp_al_init_waveform(param.wavefile_path);
1133 if (ret) {
1134 __wrn("malloc and save waveform memory fail!\n");
1135 disp_al_free_waveform();
1136 }
1137 for (i = 0; i < WAVE_DATA_BUF_NUM; i++) {
1138 ret = disp_al_init_eink_ctrl_data_8(manager->disp,
1139 ((unsigned long)(manager->private_data->
1140 wavedata_ring_buffer.wavedata_vaddr[i])),
1141 ¶m.timing, 0);
1142 }
1143 disp_sys_register_irq(manager->private_data->irq_no, 0,
1144 __eink_interrupt_proc, (void *)manager, 0, 0);
1145 disp_sys_enable_irq(manager->private_data->irq_no);
1146 manager->detect_fresh_task =
1147 kthread_create(eink_detect_fresh_thread, (void *)manager,
1148 "eink fresh proc");
1149
1150 if (IS_ERR_OR_NULL(manager->detect_fresh_task)) {
1151 __wrn("create eink detect fresh thread fail!\n");
1152 ret = PTR_ERR(manager->detect_fresh_task);
1153 return ret;
1154 }
1155
1156 ret = wake_up_process(manager->detect_fresh_task);
1157 first_enable = 0;
1158 }
1159
1160 disp_al_eink_irq_enable(manager->disp);
1161
1162 spin_lock_irqsave(&manager->private_data->slock, flags);
1163
1164 manager->private_data->enable_flag = true;
1165
1166 spin_unlock_irqrestore(&manager->private_data->slock, flags);
1167
1168 return ret;
1169 }
1170
eink_disable(struct disp_eink_manager * manager)1171 s32 eink_disable(struct disp_eink_manager *manager)
1172 {
1173 unsigned long flags = 0;
1174 int ret = 0;
1175
1176 spin_lock_irqsave(&manager->private_data->slock, flags);
1177
1178 manager->private_data->enable_flag = false;
1179
1180 spin_unlock_irqrestore(&manager->private_data->slock, flags);
1181
1182 ret = disp_al_eink_irq_disable(manager->disp);
1183
1184 /* disable de. */
1185 if (manager->convert_mgr)
1186 ret = manager->convert_mgr->disable(manager->convert_mgr->disp);
1187 else
1188 __wrn("convert mgr is null.\n");
1189
1190 /* disable eink engine. */
1191 ret = disp_al_eink_disable(manager->disp);
1192
1193 /* disable clk move to when display finish. */
1194 /* ret = __eink_clk_disable(manager); */
1195
1196 return ret;
1197 }
1198
eink_set_temperature(struct disp_eink_manager * manager,unsigned int temp)1199 int eink_set_temperature(struct disp_eink_manager *manager, unsigned int temp)
1200 {
1201 s32 ret = -1;
1202
1203 if (manager) {
1204 manager->eink_panel_temperature = temp;
1205 ret = 0;
1206 } else {
1207 __wrn("eink manager is null\n");
1208 }
1209
1210 return ret;
1211 }
1212
eink_get_temperature(struct disp_eink_manager * manager)1213 unsigned int eink_get_temperature(struct disp_eink_manager *manager)
1214 {
1215 s32 temp = 28;
1216
1217 if (manager)
1218 temp = manager->eink_panel_temperature;
1219 else
1220 __wrn("eink manager is null\n");
1221
1222 return temp;
1223 }
1224
eink_resume(struct disp_eink_manager * manager)1225 s32 eink_resume(struct disp_eink_manager *manager)
1226 {
1227 int ret = 0;
1228
1229 if (!suspend)
1230 return -EBUSY;
1231
1232 mutex_lock(&eink_manager->standby_lock);
1233 suspend = 0;
1234 mutex_unlock(&eink_manager->standby_lock);
1235 /* register eink irq */
1236 if (!first_enable) {
1237 __eink_clk_enable(manager);
1238 disp_sys_register_irq(manager->private_data->irq_no, 0,
1239 __eink_interrupt_proc, (void *)manager, 0, 0);
1240 disp_sys_enable_irq(manager->private_data->irq_no);
1241 if (!manager->detect_fresh_task)
1242 manager->detect_fresh_task =
1243 kthread_create(eink_detect_fresh_thread,
1244 (void *)manager, "eink fresh proc");
1245
1246 if (IS_ERR_OR_NULL(manager->detect_fresh_task)) {
1247 __wrn("create eink detect fresh thread fail!\n");
1248 ret = PTR_ERR(manager->detect_fresh_task);
1249 return ret;
1250 }
1251
1252 ret = wake_up_process(manager->detect_fresh_task);
1253 }
1254
1255 return ret;
1256 }
1257
eink_suspend(struct disp_eink_manager * manager)1258 s32 eink_suspend(struct disp_eink_manager *manager)
1259 {
1260 int ret = 0;
1261
1262 if (suspend) {
1263 __wrn("err, already suspend.\n");
1264 return -EBUSY;
1265 }
1266
1267 mutex_lock(&eink_manager->standby_lock);
1268 suspend = 1;
1269 mutex_unlock(&eink_manager->standby_lock);
1270
1271 if (!first_enable) {
1272 if (manager->detect_fresh_task) {
1273 kthread_stop(manager->detect_fresh_task);
1274 manager->detect_fresh_task = NULL;
1275 }
1276 }
1277
1278 while (!display_finish_flag
1279 || !manager->buffer_mgr->is_empty(manager->buffer_mgr)) {
1280 /* msleep(2); */
1281 usleep_range(500, 3000);
1282 }
1283
1284 if (!first_enable) {
1285 __eink_clk_disable(manager);
1286 disp_sys_unregister_irq(manager->private_data->irq_no,
1287 __eink_interrupt_proc, (void *)manager);
1288 disp_sys_disable_irq(manager->private_data->irq_no);
1289 }
1290
1291 return ret;
1292 }
1293
__write_edma(struct disp_eink_manager * manager)1294 static int __write_edma(struct disp_eink_manager *manager)
1295 {
1296 int ret = 0, cur_line = 0, start_delay = 0;
1297 unsigned long wavedata_paddr = 0;
1298
1299 current_frame++;
1300 wavedata_paddr =
1301 (unsigned long)__request_buffer_for_display(&manager->private_data->
1302 wavedata_ring_buffer);
1303 if (!wavedata_paddr) {
1304 __wrn("%d frame no wavedata!\n", current_frame);
1305 return -EBUSY;
1306 }
1307
1308 start_delay = disp_al_lcd_get_start_delay(manager->disp, NULL);
1309 ret = disp_al_eink_edma_cfg_addr(manager->disp, wavedata_paddr);
1310
1311 cur_line = disp_al_lcd_get_cur_line(manager->disp, NULL);
1312 if (cur_line < start_delay)
1313 __wrn("cfg edma too quicker.\n");
1314 ret = disp_al_dbuf_rdy();
1315
1316 ret =
1317 __dequeue_wavedata_buffer(&manager->private_data->
1318 wavedata_ring_buffer);
1319
1320 return ret;
1321 }
1322
__write_edma_first(struct disp_eink_manager * manager)1323 static int __write_edma_first(struct disp_eink_manager *manager)
1324 {
1325 int ret = 0;
1326 unsigned long wavedata_paddr = 0;
1327 struct eink_private *priv = manager->private_data;
1328
1329 current_frame++;
1330 wavedata_paddr =
1331 (unsigned long)__request_buffer_for_display(&priv->wavedata_ring_buffer);
1332 if (!wavedata_paddr) {
1333 __wrn("first frame no wavedata!\n");
1334 return -EBUSY;
1335 }
1336
1337 ret =
1338 disp_al_edma_config(manager->disp, wavedata_paddr,
1339 &priv->param);
1340 ret = disp_al_edma_write(manager->disp, 1);
1341 ret = disp_al_dbuf_rdy();
1342
1343 ret =
1344 __dequeue_wavedata_buffer(&priv->wavedata_ring_buffer);
1345
1346 return ret;
1347 }
1348
__write_edma_second(struct disp_eink_manager * manager)1349 int __write_edma_second(struct disp_eink_manager *manager)
1350 {
1351 int ret = 0, cur_line = 0, start_delay = 0;
1352 unsigned long wavedata_paddr = 0;
1353 struct eink_private *priv = manager->private_data;
1354
1355 cur_line = disp_al_lcd_get_cur_line(manager->disp, 0);
1356 start_delay = disp_al_lcd_get_start_delay(manager->disp, 0);
1357
1358 while (cur_line < start_delay)
1359 cur_line = disp_al_lcd_get_cur_line(manager->disp, 0);
1360
1361 current_frame++;
1362 wavedata_paddr =
1363 (unsigned long)__request_buffer_for_display(&priv->wavedata_ring_buffer);
1364 if (!wavedata_paddr) {
1365 __debug("%d frame no wavedata!\n", current_frame);
1366 return -EBUSY;
1367 }
1368 ret = disp_al_eink_edma_cfg_addr(manager->disp, wavedata_paddr);
1369 ret = disp_al_dbuf_rdy();
1370 ret =
1371 __dequeue_wavedata_buffer(&priv->wavedata_ring_buffer);
1372
1373 return ret;
1374 }
1375
1376 /* #define LARGE_MEM_TEST */
1377 #ifdef LARGE_MEM_TEST
malloc_wavedata_buffer(u32 mem_len,void * phy_address)1378 static void *malloc_wavedata_buffer(u32 mem_len, void *phy_address)
1379 {
1380 u32 temp_size = PAGE_ALIGN(mem_len);
1381 struct page *page = NULL;
1382 void *tmp_virt_address = NULL;
1383 unsigned long tmp_phy_address = 0;
1384
1385 page = alloc_pages(GFP_KERNEL, get_order(temp_size));
1386 if (page != NULL) {
1387 tmp_virt_address = page_address(page);
1388 if (tmp_virt_address == NULL) {
1389 free_pages((unsigned long)(page), get_order(temp_size));
1390 __wrn("page_address fail!\n");
1391 return NULL;
1392 }
1393
1394 tmp_phy_address = virt_to_phys(tmp_virt_address);
1395 *((unsigned long *)phy_address) = tmp_phy_address;
1396
1397 __inf("pa=0x%p, va=0x%p, size=0x%x, len=0x%x\n",
1398 (void *)tmp_phy_address, tmp_virt_address,
1399 mem_len, temp_size);
1400 }
1401
1402 return tmp_virt_address;
1403 }
1404
free_wavedata_buffer(void * virt_addr,void * phys_addr,u32 num_bytes)1405 static void free_wavedata_buffer(void *virt_addr, void *phys_addr,
1406 u32 num_bytes)
1407 {
1408 unsigned map_size = PAGE_ALIGN(num_bytes);
1409
1410 free_pages((unsigned long)virt_addr, get_order(map_size));
1411 virt_addr = NULL;
1412 phys_addr = NULL;
1413 }
1414 #endif /*LARGE_MEM_TEST */
1415
disp_init_eink(struct disp_bsp_init_para * para)1416 int disp_init_eink(struct disp_bsp_init_para *para)
1417 {
1418 int ret = 0;
1419 int i = 0;
1420 unsigned int disp;
1421 unsigned long image_buf_size;
1422 unsigned int wavedata_buf_size, hsync, vsync;
1423 unsigned long indexdata_buf_size = 0;
1424 struct eink_init_param eink_param;
1425 struct disp_eink_manager *manager = NULL;
1426 struct eink_private *data = NULL;
1427 int wd_buf_id = 0;
1428
1429 /*
1430 * request eink manager and its private data,
1431 * then initial this two structure
1432 */
1433
1434 eink_manager =
1435 (struct disp_eink_manager *)disp_sys_malloc(sizeof(
1436 struct disp_eink_manager) *
1437 MAX_EINK_ENGINE);
1438 if (eink_manager == NULL) {
1439 __wrn("malloc eink manager memory fail!\n");
1440 ret = -ENOMEM;
1441 goto manager_malloc_err;
1442 }
1443 memset(eink_manager, 0,
1444 sizeof(struct disp_eink_manager) * MAX_EINK_ENGINE);
1445
1446 eink_private_data =
1447 (struct eink_private *)disp_sys_malloc(sizeof
1448 (struct eink_private)*MAX_EINK_ENGINE);
1449 if (eink_private_data == NULL) {
1450 __wrn("malloc private memory fail!\n");
1451 ret = -ENOMEM;
1452 goto private_data_malloc_err;
1453 }
1454 memset((void *)eink_private_data, 0,
1455 sizeof(struct eink_private) * MAX_EINK_ENGINE);
1456
1457 for (disp = 0; disp < MAX_EINK_ENGINE; disp++) {
1458 /* get sysconfig and config eink_param */
1459 __eink_get_sys_config(disp, &eink_param);
1460
1461 /* load wavefile,and init it. load in enable function now. */
1462 /*
1463 * ret = disp_al_init_waveform(eink_param->wavefile_path);
1464 * if (ret) {
1465 * __wrn("malloc and save waveform memory fail!\n");
1466 * goto waveform_err;
1467 * }
1468 */
1469 hsync = eink_param.timing.lbl + eink_param.timing.lel +
1470 eink_param.timing.lsl;
1471 vsync =
1472 eink_param.timing.fbl + eink_param.timing.fel +
1473 eink_param.timing.fsl;
1474 image_buf_size =
1475 eink_param.timing.width * eink_param.timing.height;
1476 if (eink_param.eink_mode)
1477 /* mode 1, 16 data */
1478 wavedata_buf_size = 4 * (eink_param.timing.width / 8 +
1479 hsync) * (eink_param.timing.height + vsync);
1480 else
1481 /* mode 0, 8 data */
1482 wavedata_buf_size = 2 * (eink_param.timing.width / 4 +
1483 hsync) * (eink_param.timing.height + vsync);
1484
1485 /*fix it when 5bits */
1486 if (eink_param.eink_bits < 2)
1487 /* 3bits or 4bits */
1488 indexdata_buf_size = image_buf_size;
1489 else if (eink_param.eink_bits == 2)
1490 /* 5bits */
1491 indexdata_buf_size = image_buf_size << 1;
1492
1493 manager = &eink_manager[disp];
1494 data = &eink_private_data[disp];
1495
1496 manager->disp = disp;
1497 manager->private_data = data;
1498 manager->mgr = disp_get_layer_manager(disp);
1499 manager->eink_update = eink_update_image;
1500 manager->enable = eink_enable;
1501 manager->disable = eink_disable;
1502 manager->resume = eink_resume;
1503 manager->suspend = eink_suspend;
1504 manager->set_temperature = eink_set_temperature;
1505 manager->get_temperature = eink_get_temperature;
1506 manager->eink_panel_temperature = 28;
1507 manager->op_skip = eink_op_skip;
1508 /* functions for debug */
1509 #ifdef __EINK_TEST__
1510 manager->clearwd = __eink_clear_wave_data;
1511 manager->decode = __eink_debug_decode;
1512 manager->flush_continue_flag = 1;
1513 #endif
1514 data->enable_flag = false;
1515 data->eink_clk = para->mclk[DISP_MOD_EINK];
1516 data->edma_clk = para->mclk[DISP_MOD_EDMA];
1517 data->eink_base_addr =
1518 (unsigned long)para->reg_base[DISP_MOD_EINK];
1519 data->irq_no = para->irq_no[DISP_MOD_EINK];
1520 memcpy((void *)&data->param, (void *)&eink_param,
1521 sizeof(struct eink_init_param));
1522
1523 __debug
1524 ("eink_clk: 0x%p; edma_clk: 0x%p; base_addr: 0x%p; irq_no: 0x%x\n",
1525 data->eink_clk, data->edma_clk,
1526 (void *)data->eink_base_addr, data->irq_no);
1527
1528 disp_al_set_eink_base(disp, data->eink_base_addr);
1529
1530 #ifdef SUPPORT_WB
1531 manager->convert_mgr = disp_get_format_manager(disp);
1532 #endif
1533 spin_lock_init(&data->slock);
1534
1535 /* init index buffer, it includes old and new index buffer */
1536 data->index_fresh = false;
1537 data->new_index = 0;
1538 data->old_index = 0;
1539 data->index_vaddr[0] =
1540 disp_malloc(indexdata_buf_size * INDEX_BUFFER_NUM,
1541 (void *)&data->index_paddr[0]);
1542 if (data->index_vaddr[i] == NULL) {
1543 __wrn("malloc old index data memory fail!\n");
1544 ret = -ENOMEM;
1545 goto private_init_malloc_err;
1546 }
1547
1548 memset(data->index_vaddr[0], 0,
1549 image_buf_size * INDEX_BUFFER_NUM);
1550 for (i = 0; i < INDEX_BUFFER_NUM; i++) {
1551 data->index_paddr[i] =
1552 data->index_paddr[0] + indexdata_buf_size * i;
1553 data->index_vaddr[i] =
1554 data->index_vaddr[0] + indexdata_buf_size * i;
1555 __debug("index_paddr%d:0x%p\n", i,
1556 data->index_paddr[i]);
1557 }
1558
1559 /*
1560 * init wavedata ring queue,it includes several wavedata buffer
1561 * and queue information.
1562 */
1563 memset(&data->wavedata_ring_buffer, 0,
1564 sizeof(struct wavedata_queue));
1565
1566 spin_lock_init(&data->wavedata_ring_buffer.slock);
1567 data->wavedata_ring_buffer.head = 0;
1568 data->wavedata_ring_buffer.tail = 0;
1569 data->wavedata_ring_buffer.size.width = eink_param.timing.width;
1570 data->wavedata_ring_buffer.size.height =
1571 eink_param.timing.height;
1572 /* align param need match with drawer's pitch */
1573 data->wavedata_ring_buffer.size.align = 4;
1574
1575 /*init wave data,if need lager memory,open the LARGE_MEM_TEST.*/
1576 #ifdef LARGE_MEM_TEST
1577 for (wd_buf_id = 0; wd_buf_id < WAVE_DATA_BUF_NUM; wd_buf_id++) {
1578 data->wavedata_ring_buffer.wavedata_vaddr[wd_buf_id] =
1579 malloc_wavedata_buffer(wavedata_buf_size,
1580 &data->wavedata_ring_buffer.wavedata_paddr[wd_buf_id]);
1581 if (data->wavedata_ring_buffer.
1582 wavedata_vaddr[wd_buf_id] == NULL) {
1583 __wrn
1584 ("malloc memory fail, size=%d, id=%d\n",
1585 wavedata_buf_size, wd_buf_id);
1586 ret = -ENOMEM;
1587 goto private_init_malloc_err;
1588 }
1589 memset((void *)data->wavedata_ring_buffer.
1590 wavedata_vaddr[wd_buf_id], 0, wavedata_buf_size);
1591
1592 __debug
1593 ("wavedata id=%d, virt-addr=0x%p, phy-addr=0x%p\n",
1594 wd_buf_id,
1595 (data->wavedata_ring_buffer.wavedata_vaddr[wd_buf_id]),
1596 data->wavedata_ring_buffer.wavedata_paddr[wd_buf_id]);
1597 }
1598 #else
1599 for (wd_buf_id = 0; wd_buf_id < WAVE_DATA_BUF_NUM; wd_buf_id++) {
1600 data->wavedata_ring_buffer.wavedata_vaddr[wd_buf_id] =
1601 (void *)disp_malloc(wavedata_buf_size,
1602 &data->wavedata_ring_buffer.
1603 wavedata_paddr[wd_buf_id]);
1604 if (data->wavedata_ring_buffer.
1605 wavedata_vaddr[wd_buf_id] == NULL) {
1606 __wrn
1607 ("malloc memory fail, size=%d, id=%d\n",
1608 wavedata_buf_size, wd_buf_id);
1609 ret = -ENOMEM;
1610 goto private_init_malloc_err;
1611 }
1612 memset((void *)data->wavedata_ring_buffer.
1613 wavedata_vaddr[wd_buf_id], 0, wavedata_buf_size);
1614
1615 __debug("wavedata id=%d, virt-addr=%p, phy-addr=%p\n",
1616 wd_buf_id,
1617 data->wavedata_ring_buffer.wavedata_vaddr[wd_buf_id],
1618 data->wavedata_ring_buffer.wavedata_paddr[wd_buf_id]);
1619 }
1620 #endif
1621 /* init data shell, move it to enable now. */
1622 #if 0
1623 for (i = 0; i < WAVE_DATA_BUF_NUM; i++) {
1624 if (eink_param->eink_mode == 0) {
1625 /*8 data */
1626 ret =
1627 disp_al_init_eink_ctrl_data_8(manager->disp,
1628 (u32)(data->wavedata_ring_buffer.wavedata_vaddr[i])),
1629 &eink_param->timing, 0);
1630 } else {
1631 /*16 data */
1632 ret =
1633 disp_al_init_eink_ctrl_data_16(manager->disp,
1634 ((u32)(data->wavedata_ring_buffer.wavedata_vaddr[i])),
1635 &eink_param->timing);
1636 }
1637 }
1638 #endif
1639 /*register image ring buffer, then fill it to eink manager */
1640 ring_buffer_manager_init(manager);
1641 pipeline_manager_init(manager);
1642 __debug("fresh_idx=%p,total=%p,dec_frame=%p,disp_finish=%d\n",
1643 &manager->private_data->fresh_frame_index,
1644 &manager->private_data->total_frame,
1645 &manager->private_data->decode_frame_index,
1646 &display_finish_flag);
1647
1648 #ifdef __EINK_TEST__
1649 u32 total = 0, wave_addr = 0;
1650
1651 disp_al_get_waveform_data(0, 4, 28, &total, &wave_addr);
1652 __debug("[disp_al_get_waveform_data]:total=%u wave_addr=0x%x\n",
1653 total, wave_addr);
1654 #endif
1655 tasklet_init(&eink_manager->sync_tasklet, __sync_task,
1656 (unsigned long)disp);
1657 INIT_WORK(&eink_manager->decode_work, eink_decode_task);
1658 mutex_init(&eink_manager->standby_lock);
1659 }
1660
1661 return ret;
1662
1663 private_init_malloc_err:
1664 #ifdef LARGE_MEM_TEST
1665 for (i = 0; i < MAX_EINK_ENGINE; i++) {
1666 struct wavedata_queue *wd_rbuffer;
1667
1668 data = &eink_private_data[i];
1669 wd_rbuffer = &data->wavedata_ring_buffer;
1670 if (data->index_vaddr[0]) {
1671 disp_free(data->index_vaddr, data->index_paddr[0],
1672 indexdata_buf_size * 2);
1673 data->index_vaddr[0] = NULL;
1674 }
1675
1676 for (wd_buf_id = 0; wd_buf_id < WAVE_DATA_BUF_NUM; wd_buf_id++) {
1677 if (wd_rbuffer->wavedata_vaddr[wd_buf_id]) {
1678 free_wavedata_buffer(data->wavedata_ring_buffer.
1679 wavedata_vaddr[wd_buf_id],
1680 data->wavedata_ring_buffer.
1681 wavedata_paddr[wd_buf_id],
1682 wavedata_buf_size);
1683 wd_rbuffer->wavedata_vaddr[wd_buf_id] = NULL;
1684 }
1685 }
1686 }
1687 #else
1688 for (i = 0; i < MAX_EINK_ENGINE; i++) {
1689 struct wavedata_queue *wd_rbuffer;
1690
1691 data = &eink_private_data[i];
1692 wd_rbuffer = &data->wavedata_ring_buffer;
1693 if (data->index_vaddr[0]) {
1694 disp_free(data->index_vaddr, data->index_paddr[0],
1695 indexdata_buf_size * 2);
1696 data->index_vaddr[0] = NULL;
1697 }
1698
1699 for (wd_buf_id = 0; wd_buf_id < WAVE_DATA_BUF_NUM; wd_buf_id++) {
1700 if (wd_rbuffer->wavedata_vaddr[wd_buf_id]) {
1701 disp_free(wd_rbuffer->wavedata_vaddr[wd_buf_id],
1702 wd_rbuffer->wavedata_paddr[wd_buf_id],
1703 wavedata_buf_size);
1704 wd_rbuffer->wavedata_vaddr[wd_buf_id] = NULL;
1705 }
1706 }
1707 }
1708 #endif
1709
1710 /* waveform_err:
1711 * disp_al_free_waveform();
1712 */
1713 private_data_malloc_err:
1714 kfree(eink_private_data);
1715 eink_private_data = NULL;
1716
1717 manager_malloc_err:
1718 kfree(eink_manager);
1719 eink_manager = NULL;
1720
1721 return ret;
1722 }
1723
disp_exit_eink(void)1724 int disp_exit_eink(void)
1725 {
1726 int i = 0;
1727 unsigned long image_buf_size;
1728 unsigned int wavedata_buf_size, hsync, vsync;
1729 unsigned long indexdata_buf_size = 0;
1730 struct eink_init_param *eink_param;
1731 struct disp_eink_manager *manager = NULL;
1732 struct eink_private *data = NULL;
1733 int wd_buf_id = 0;
1734
1735 if (!eink_manager)
1736 return 0;
1737
1738 for (i = 0; i < MAX_EINK_ENGINE; i++) {
1739 struct wavedata_queue *wd_rbuffer;
1740
1741 manager = &eink_manager[i];
1742 ring_buffer_manager_exit(manager);
1743 pipeline_manager_exit(manager);
1744
1745 data = &eink_private_data[i];
1746 wd_rbuffer = &data->wavedata_ring_buffer;
1747
1748 eink_param = &data->param;
1749 hsync =
1750 eink_param->timing.lbl + eink_param->timing.lel +
1751 eink_param->timing.lsl;
1752 vsync =
1753 eink_param->timing.fbl + eink_param->timing.fel +
1754 eink_param->timing.fsl;
1755 image_buf_size =
1756 eink_param->timing.width * eink_param->timing.height;
1757 if (eink_param->eink_mode)
1758 /* mode 1, 16 data */
1759 wavedata_buf_size = 4 * (eink_param->timing.width / 8 +
1760 hsync) * (eink_param->timing.height + vsync);
1761 else
1762 /* mode 0, 8 data */
1763 wavedata_buf_size = 2 * (eink_param->timing.width / 4 +
1764 hsync) * (eink_param->timing.height + vsync);
1765 /*fix it when 5bits */
1766 if (eink_param->eink_bits < 2)
1767 /* 3bits or 4bits */
1768 indexdata_buf_size = image_buf_size;
1769 else if (eink_param->eink_bits == 2)
1770 /* 5bits */
1771 indexdata_buf_size = image_buf_size << 1;
1772
1773 if (data->index_vaddr[0]) {
1774 disp_free(data->index_vaddr, data->index_paddr[0],
1775 indexdata_buf_size * 2);
1776 data->index_vaddr[0] = NULL;
1777 }
1778
1779 for (wd_buf_id = 0; wd_buf_id < WAVE_DATA_BUF_NUM; wd_buf_id++) {
1780 if (wd_rbuffer->wavedata_vaddr[wd_buf_id]) {
1781 #ifdef LARGE_MEM_TEST
1782 free_wavedata_buffer(data->wavedata_ring_buffer.
1783 wavedata_vaddr[wd_buf_id],
1784 data->wavedata_ring_buffer.
1785 wavedata_paddr[wd_buf_id],
1786 wavedata_buf_size);
1787 #else
1788 disp_free(wd_rbuffer->wavedata_vaddr[wd_buf_id],
1789 wd_rbuffer->wavedata_paddr[wd_buf_id],
1790 wavedata_buf_size);
1791 #endif
1792 wd_rbuffer->wavedata_vaddr[wd_buf_id] = NULL;
1793 }
1794 }
1795 }
1796
1797 kfree(eink_private_data);
1798 kfree(eink_manager);
1799 eink_private_data = NULL;
1800 eink_manager = NULL;
1801
1802 return 0;
1803 }
1804 #endif
1805
1806