1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include <strings.h>
16 #include "sdkconfig.h"
17 #include "esp_log.h"
18 #include "esp_efuse.h"
19 #include "esp_efuse_table.h"
20 #include "esp_flash_encrypt.h"
21 #include "esp_secure_boot.h"
22
23 #if CONFIG_IDF_TARGET_ESP32
24 #define CRYPT_CNT ESP_EFUSE_FLASH_CRYPT_CNT
25 #define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT
26 #elif CONFIG_IDF_TARGET_ESP32S2
27 #define CRYPT_CNT ESP_EFUSE_SPI_BOOT_CRYPT_CNT
28 #define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT
29 #elif CONFIG_IDF_TARGET_ESP32S3
30 #define CRYPT_CNT ESP_EFUSE_SPI_BOOT_CRYPT_CNT
31 #define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT
32 #elif CONFIG_IDF_TARGET_ESP32C3
33 #define CRYPT_CNT ESP_EFUSE_SPI_BOOT_CRYPT_CNT
34 #define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT
35 #endif
36
37 #ifndef BOOTLOADER_BUILD
38 static const char *TAG = "flash_encrypt";
39
esp_flash_encryption_init_checks()40 void esp_flash_encryption_init_checks()
41 {
42 esp_flash_enc_mode_t mode;
43
44 // First check is: if Release mode flash encryption & secure boot are enabled then
45 // FLASH_CRYPT_CNT *must* be write protected. This will have happened automatically
46 // if bootloader is IDF V4.0 or newer but may not have happened for previous ESP-IDF bootloaders.
47 #ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
48 #ifdef CONFIG_SECURE_BOOT
49 if (esp_secure_boot_enabled() && esp_flash_encryption_enabled()) {
50 bool flash_crypt_cnt_wr_dis = esp_efuse_read_field_bit(WR_DIS_CRYPT_CNT);
51 if (!flash_crypt_cnt_wr_dis) {
52 uint8_t flash_crypt_cnt = 0;
53 esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt, CRYPT_CNT[0]->bit_count);
54 if (flash_crypt_cnt == (1<<(CRYPT_CNT[0]->bit_count))-1) {
55 // If encryption counter is already max, no need to write protect it
56 // (this distinction is important on ESP32 ECO3 where write-procted FLASH_CRYPT_CNT also write-protects UART_DL_DIS)
57 return;
58 }
59 ESP_LOGE(TAG, "Flash encryption & Secure Boot together requires FLASH_CRYPT_CNT efuse to be write protected. Fixing now...");
60 esp_flash_write_protect_crypt_cnt();
61 }
62 }
63 #endif // CONFIG_SECURE_BOOT
64 #endif // CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
65
66 // Second check is to print a warning or error if the current running flash encryption mode
67 // doesn't match the expectation from project config (due to mismatched bootloader and app, probably)
68 mode = esp_get_flash_encryption_mode();
69 if (mode == ESP_FLASH_ENC_MODE_DEVELOPMENT) {
70 #ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
71 ESP_LOGE(TAG, "Flash encryption settings error: app is configured for RELEASE but efuses are set for DEVELOPMENT");
72 ESP_LOGE(TAG, "Mismatch found in security options in bootloader menuconfig and efuse settings. Device is not secure.");
73 #else
74 ESP_LOGW(TAG, "Flash encryption mode is DEVELOPMENT (not secure)");
75 #endif
76 } else if (mode == ESP_FLASH_ENC_MODE_RELEASE) {
77 ESP_LOGI(TAG, "Flash encryption mode is RELEASE");
78 }
79 }
80 #endif
81
esp_flash_write_protect_crypt_cnt(void)82 void esp_flash_write_protect_crypt_cnt(void)
83 {
84 esp_efuse_write_field_bit(WR_DIS_CRYPT_CNT);
85 }
86
esp_get_flash_encryption_mode(void)87 esp_flash_enc_mode_t esp_get_flash_encryption_mode(void)
88 {
89 bool flash_crypt_cnt_wr_dis = false;
90 #if CONFIG_IDF_TARGET_ESP32
91 uint8_t dis_dl_enc = 0, dis_dl_dec = 0, dis_dl_cache = 0;
92 #elif CONFIG_IDF_TARGET_ESP32S2
93 uint8_t dis_dl_enc = 0;
94 uint8_t dis_dl_icache = 0;
95 uint8_t dis_dl_dcache = 0;
96 #elif CONFIG_IDF_TARGET_ESP32C3
97 uint8_t dis_dl_enc = 0;
98 uint8_t dis_dl_icache = 0;
99 #endif
100
101 esp_flash_enc_mode_t mode = ESP_FLASH_ENC_MODE_DEVELOPMENT;
102
103 if (esp_flash_encryption_enabled()) {
104 /* Check if FLASH CRYPT CNT is write protected */
105
106 flash_crypt_cnt_wr_dis = esp_efuse_read_field_bit(WR_DIS_CRYPT_CNT);
107 if (!flash_crypt_cnt_wr_dis) {
108 uint8_t flash_crypt_cnt = 0;
109 esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt, CRYPT_CNT[0]->bit_count);
110 if (flash_crypt_cnt == (1 << (CRYPT_CNT[0]->bit_count)) - 1) {
111 flash_crypt_cnt_wr_dis = true;
112 }
113 }
114
115 if (flash_crypt_cnt_wr_dis) {
116
117 #if CONFIG_IDF_TARGET_ESP32
118 dis_dl_cache = esp_efuse_read_field_bit(ESP_EFUSE_DISABLE_DL_CACHE);
119 dis_dl_enc = esp_efuse_read_field_bit(ESP_EFUSE_DISABLE_DL_ENCRYPT);
120 dis_dl_dec = esp_efuse_read_field_bit(ESP_EFUSE_DISABLE_DL_DECRYPT);
121 /* Check if DISABLE_DL_DECRYPT, DISABLE_DL_ENCRYPT & DISABLE_DL_CACHE are set */
122 if ( dis_dl_cache && dis_dl_enc && dis_dl_dec ) {
123 mode = ESP_FLASH_ENC_MODE_RELEASE;
124 }
125 #elif CONFIG_IDF_TARGET_ESP32S2
126 dis_dl_enc = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
127 dis_dl_icache = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
128 dis_dl_dcache = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_DCACHE);
129
130 if (dis_dl_enc && dis_dl_icache && dis_dl_dcache) {
131 mode = ESP_FLASH_ENC_MODE_RELEASE;
132 }
133 #elif CONFIG_IDF_TARGET_ESP32C3
134 dis_dl_enc = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT);
135 dis_dl_icache = esp_efuse_read_field_bit(ESP_EFUSE_DIS_DOWNLOAD_ICACHE);
136
137 if (dis_dl_enc && dis_dl_icache) {
138 mode = ESP_FLASH_ENC_MODE_RELEASE;
139 }
140 #endif
141 }
142 } else {
143 mode = ESP_FLASH_ENC_MODE_DISABLED;
144 }
145
146 return mode;
147 }
148