| /device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/common/hal/include/ |
| D | icu_hal.h | 34 #define icu_hal_enable_fiq(hal) icu_ll_enable_fiq((hal)->hw) argument
35 #define icu_hal_disable_fiq(hal) icu_ll_disable_fiq((hal)->hw) argument
37 #define icu_hal_enable_irq(hal) icu_ll_enable_irq((hal)->hw) argument
38 #define icu_hal_disable_irq(hal) icu_ll_disable_irq((hal)->hw) argument
40 #define icu_hal_get_global_int_status(hal) icu_ll_get_int_status((hal)->hw) argument
41 #define icu_hal_clear_global_int_status(hal, status) icu_ll_clear_int_status((hal)->hw,status) argument
42 #define icu_hal_get_irq_int_status(hal) icu_ll_get_irq_int_status((hal)->hw) argument
43 #define icu_hal_clear_irq_int_status(hal, status) icu_ll_clear_irq_int_status((hal)->hw,status) argument
44 #define icu_hal_get_fiq_int_status(hal) icu_ll_get_fiq_int_status((hal)->hw) argument
45 #define icu_hal_clear_fiq_int_status(hal, status) icu_ll_clear_fiq_int_status((hal)->hw,status) argument
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| D | clock_hal.h | 26 #define clock_hal_set_dco_1_div(hal) clock_ll_set_dco_clk_1_div((hal)->hw) argument
27 #define clock_hal_set_dco_2_div(hal) clock_ll_set_dco_clk_2_div((hal)->hw) argument
28 #define clock_hal_set_dco_4_div(hal) clock_ll_set_dco_clk_4_div((hal)->hw) argument
29 #define clock_hal_set_dco_8_div(hal) clock_ll_set_dco_clk_8_div((hal)->hw) argument
31 #define clock_hal_set_26m_1_div(hal) clock_ll_set_26m_clk_1_div((hal)->hw) argument
32 #define clock_hal_set_26m_2_div(hal) clock_ll_set_26m_clk_2_div((hal)->hw) argument
33 #define clock_hal_set_26m_4_div(hal) clock_ll_set_26m_clk_4_div((hal)->hw) argument
34 #define clock_hal_set_26m_8_div(hal) clock_ll_set_26m_clk_8_div((hal)->hw) argument
39 #define clock_hal_uart_set_clk_26m(hal, id) clock_ll_set_uart_clk_26m((hal)->hw, id) argument
40 #define clock_hal_uart_set_clk_dco(hal, id) clock_ll_set_uart_clk_dco((hal)->hw, id) argument
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| D | power_hal.h | 26 #define power_hal_uart_pwr_up(hal, id) power_ll_pwr_up_uart((hal)->hw, (id)) argument
27 #define power_hal_uart_pwr_down(hal, id) power_ll_pwr_down_uart((hal)->hw, (id)) argument
29 #define power_hal_i2c_pwr_up(hal, id) power_ll_pwr_up_i2c((hal)->hw, id) argument
30 #define power_hal_i2c_pwr_down(hal, id) power_ll_pwr_down_i2c((hal)->hw, id) argument
32 #define power_hal_irda_pwr_up(hal) power_ll_pwr_up_irda((hal)->hw) argument
33 #define power_hal_irda_pwr_down(hal) power_ll_pwr_down_irda((hal)->hw) argument
35 #define power_hal_i2s_pcm_pwr_up(hal) power_ll_pwr_up_i2s_pcm((hal)->hw) argument
36 #define power_hal_i2s_pcm_pwr_down(hal) power_ll_pwr_down_i2s_pcm((hal)->hw) argument
38 #define power_hal_pwr_up_spi(hal, id) power_ll_pwr_up_spi((hal)->hw, id) argument
39 #define power_hal_pwr_down_spi(hal, id) power_ll_pwr_down_spi((hal)->hw, id) argument
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| D | spi_hal.h | 32 #define spi_hal_set_role(hal, role) spi_ll_set_role((hal)->hw, role) argument
33 #define spi_hal_set_bit_width(hal, bit_width) spi_ll_set_bit_width((hal)->hw, bit_width) argument
34 #define spi_hal_set_wire_mode(hal, wire_mode) spi_ll_set_wire_mode((hal)->hw, wire_mode) argument
35 #define spi_hal_set_first_bit(hal, first_bit) spi_ll_set_first_bit((hal)->hw, first_bit) argument
36 #define spi_hal_set_cpol(hal, cpol) spi_ll_set_cpol((hal)->hw, cpol) argument
37 #define spi_hal_set_cpha(hal, cpha) spi_ll_set_cpha((hal)->hw, cpha) argument
38 #define spi_hal_is_master(hal) spi_ll_is_role_master((hal)->hw) argument
39 #define spi_hal_is_slave(hal) spi_ll_is_role_slave((hal)->hw) argument
40 #define spi_hal_get_tx_fifo_int_level(hal) spi_ll_get_tx_fifo_int_level((hal)->hw) argument
41 #define spi_hal_get_rx_fifo_int_level(hal) spi_ll_get_rx_fifo_int_level((hal)->hw) argument
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| D | sdio_host_hal.h | 37 #define sdio_host_hal_reset_config_to_default(hal) sdio_host_ll_reset_config_to_default((hal)->hw) argument
38 #define sdio_host_hal_set_clk_freq(hal, clk_freq) sdio_host_ll_set_clk_freq((hal)->hw, clk_freq) argument
39 #define sdio_host_hal_set_bus_width(hal, bus_width) sdio_host_ll_set_bus_width((hal)->hw, bus_width) argument
40 #define sdio_host_hal_set_cmd_index(hal, cmd_index) sdio_host_ll_set_cmd_index((hal)->hw, cmd_index) argument
41 #define sdio_host_hal_set_send_cmd_argument(hal, cmd_argument) sdio_host_ll_set_send_cmd_argument((… argument
42 #define sdio_host_hal_set_cmd_rsp_timeout(hal, rsp_timeout) sdio_host_ll_set_cmd_rsp_timeout((hal)-… argument
43 #define sdio_host_hal_set_cmd_rsp(hal, is_need_rsp) sdio_host_ll_set_cmd_rsp((hal)->hw, is_need_rsp) argument
44 #define sdio_host_hal_set_cmd_long_rsp(hal, is_long_rsp) sdio_host_ll_set_cmd_long_rsp((hal)->hw, i… argument
45 #define sdio_host_hal_set_cmd_crc_check(hal, is_need_crc_check) sdio_host_ll_set_cmd_crc_check((hal… argument
46 #define sdio_host_hal_start_send_command(hal) sdio_host_ll_start_send_cmd((hal)->hw) argument
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| D | adc_hal.h | 33 #define adc_hal_set_sleep_mode(hal) adc_ll_set_sleep_mode((hal)->hw) argument
34 #define adc_hal_set_single_step_mode(hal) adc_ll_set_single_step_mode((hal)->hw) argument
35 #define adc_hal_set_software_control_mode(hal) adc_ll_set_software_control_mode((hal)->hw) argument
36 #define adc_hal_get_mode(hal) adc_ll_get_adc_mode((hal)->hw) argument
37 #define adc_hal_set_continuous_mode(hal) adc_ll_set_continuous_mode((hal)->hw) argument
38 #define adc_hal_enbale(hal) adc_ll_enable((hal)->hw) argument
39 #define adc_hal_disbale(hal) adc_ll_disable((hal)->hw) argument
40 #define adc_hal_sel_channel(hal, id) adc_ll_sel_channel((hal)->hw, id) argument
41 #define adc_hal_wait_4_cycle(hal) adc_ll_wait_4_cycle((hal)->hw) argument
42 #define adc_hal_wait_8_cycle(hal) adc_ll_wait_8_cycle((hal)->hw) argument
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| D | i2c_hal.h | 30 #define i2c_hal_set_pin(hal) i2c_ll_set_pin(&(hal)->hw, (hal)->id) argument
31 #define i2c_hal_enable(hal) i2c_ll_enable(&(hal)->hw, (hal)->id) argument
32 #define i2c_hal_disable(hal) i2c_ll_disable(&(hal)->hw, (hal)->id) argument
33 #define i2c_hal_enable_start(hal) i2c_ll_enable_start(&(hal)->hw, (hal)->id) argument
34 #define i2c_hal_disable_start(hal) i2c_ll_disable_start(&(hal)->hw, (hal)->id) argument
35 #define i2c_hal_is_start(hal) i2c_ll_is_start(&(hal)->hw, (hal)->id) argument
36 #define i2c_hal_is_start_triggered(hal, int_status) i2c_ll_is_start_triggered(&(hal)->hw, (hal)->id… argument
37 #define i2c_hal_enable_stop(hal) i2c_ll_enable_stop(&(hal)->hw, (hal)->id) argument
38 #define i2c_hal_disable_stop(hal) i2c_ll_disable_stop(&(hal)->hw, (hal)->id) argument
39 #define i2c_hal_is_stop_triggered(hal, int_status) i2c_ll_is_stop_triggered(&(hal)->hw, (hal)->id, … argument
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| D | dma_hal.h | 31 #define dma_hal_clear_half_finish_interrupt_status(hal, id) dma_ll_clear_half_finish_interrupt_stat… argument
32 #define dma_hal_clear_finish_interrupt_status(hal, id) dma_ll_clear_finish_interrupt_status((hal)->… argument
33 #define dma_hal_is_half_finish_interrupt_triggered(hal, id) dma_ll_is_half_finish_interrupt_trigger… argument
34 #define dma_hal_is_finish_interrupt_triggered(hal, id) dma_ll_is_finish_interrupt_triggered((hal)->… argument
35 #define dma_hal_enable_finish_interrupt(hal, id) dma_ll_enable_finish_interrupt((hal)->hw, id) argument
36 #define dma_hal_disable_finish_interrupt(hal, id) dma_ll_disable_finish_interrupt((hal)->hw, id) argument
37 #define dma_hal_enable_half_finish_interrupt(hal, id) dma_ll_enable_half_finish_interrupt((hal)->hw… argument
38 #define dma_hal_disable_half_finish_interrupt(hal, id) dma_ll_disable_half_finish_interrupt((hal)->… argument
40 #define dma_hal_reset_config_to_default(hal, id) dma_ll_reset_config_to_default((hal)->hw, (id)) argument
41 #define dma_hal_is_id_started(hal, id) dma_ll_is_id_started((hal)->hw, (id)) argument
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| D | uart_hal.h | 35 #define uart_hal_enable_tx_interrupt(hal, id) uart_ll_enable_tx_interrupt((hal)->hw, id) argument
36 #define uart_hal_disable_tx_interrupt(hal, id) uart_ll_disable_tx_interrupt((hal)->hw, id) argument
37 #define uart_hal_enable_rx_interrupt(hal, id) uart_ll_enable_rx_interrupt((hal)->hw, id) argument
38 #define uart_hal_disable_rx_interrupt(hal, id) uart_ll_disable_rx_interrupt((hal)->hw, id) argument
39 #define uart_hal_get_interrupt_status(hal, id) uart_ll_get_interrupt_status((hal)->hw, id) argument
40 #define uart_hal_clear_interrupt_status(hal, id, status) uart_ll_clear_interrupt_status((hal)->hw, … argument
41 #define uart_hal_clear_id_interrupt_status(hal, id) uart_ll_clear_id_interrupt_status((hal)->hw, id) argument
42 #define uart_hal_clear_id_tx_interrupt_status(hal, id) uart_ll_clear_id_tx_interrupt_status((hal)->… argument
43 #define uart_hal_clear_id_rx_interrupt_status(hal, id) uart_ll_clear_id_rx_interrupt_status((hal)->… argument
45 #define uart_hal_get_int_enable_status(hal, id) uart_ll_get_int_enable_status((hal)->hw, id) argument
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| D | jpeg_hal.h | 39 #define jpeg_hal_enable_end_yuv_int(hal) jpeg_ll_enable_end_yuv_int((hal)->hw) argument
40 #define jpeg_hal_disable_end_yuv_int(hal) jpeg_ll_disable_end_yuv_int((hal)->hw) argument
41 #define jpeg_hal_enable_head_output_int(hal) jpeg_ll_enable_head_output_int((hal)->hw) argument
42 #define jpeg_hal_disable_head_output_int(hal) jpeg_ll_disable_head_output_int((hal)->hw) argument
43 #define jpeg_hal_enable_start_frame_int(hal) jpeg_ll_enable_start_frame_int((hal)->hw) argument
44 #define jpeg_hal_disable_start_frame_int(hal) jpeg_ll_disable_start_frame_int((hal)->hw) argument
45 #define jpeg_hal_enable_end_frame_int(hal) jpeg_ll_enable_end_frame_int((hal)->hw) argument
46 #define jpeg_hal_disable_end_frame_int(hal) jpeg_ll_disable_end_frame_int((hal)->hw) argument
47 #define jpeg_hal_enable_vsync_negedge_int(hal) jpeg_ll_enable_vsync_negedge_int((hal)->hw) argument
48 #define jpeg_hal_disable_vsync_negedge_int(hal) jpeg_ll_disable_vsync_negedge_int((hal)->hw) argument
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| D | flash_hal.h | 31 #define flash_hal_is_busy(hal) flash_ll_is_busy((hal)->hw) argument
32 #define flash_hal_get_id(hal) flash_ll_get_id((hal)->hw) argument
33 #define flash_hal_get_mid(hal) flash_ll_get_mid((hal)->hw) argument
34 #define flash_hal_read_status_reg(hal, sr_width) flash_ll_read_status_reg((hal)->hw, sr_width) argument
35 #define flash_hal_write_status_reg(hal, sr_width, sr_data) flash_ll_write_status_reg((hal)->hw, sr_… argument
36 #define flash_hal_disable_cpu_data_wr(hal) flash_ll_disable_cpu_data_wr((hal)->hw) argument
37 #define flash_hal_clear_qwfr(hal) flash_ll_clear_qwfr((hal)->hw) argument
38 #define flash_hal_set_mode(hal, mode_sel) flash_ll_set_mode((hal)->hw, mode_sel) argument
39 #define flash_hal_set_dual_mode(hal) flash_ll_set_dual_mode((hal)->hw) argument
40 #define flash_hal_set_quad_m_value(hal, m_value) flash_ll_set_quad_m_value((hal)->hw, m_value) argument
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| D | qspi_hal.h | 31 #define qspi_hal_enable_ge1_rx(hal) qspi_ll_enable_ge1_rx((hal)->hw) argument
32 #define qspi_hal_disable_ge1_rx(hal) qspi_ll_disable_ge1_rx((hal)->hw) argument
33 #define qspi_hal_enable_ge1_tx(hal) qspi_ll_enable_ge1_tx((hal)->hw) argument
34 #define qspi_hal_disable_ge1_tx(hal) qspi_ll_disable_ge1_tx((hal)->hw) argument
35 #define qspi_hal_enable_ge0_rx(hal) qspi_ll_enable_ge0_rx((hal)->hw) argument
36 #define qspi_hal_disable_ge0_rx(hal) qspi_ll_disable_ge0_rx((hal)->hw) argument
37 #define qspi_hal_enable_ge0_tx(hal) qspi_ll_enable_ge0_tx((hal)->hw) argument
38 #define qspi_hal_disable_ge0_tx(hal) qspi_ll_disable_ge0_tx((hal)->hw) argument
40 #define qspi_hal_start_sw_op(hal) qspi_ll_start_sw_op((hal)->hw) argument
41 #define qspi_hal_stop_sw_op(hal) qspi_ll_stop_sw_op((hal)->hw) argument
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| D | mailbox_hal.h | 32 #define mailbox_hal_box_init(hal) mailbox_ll_box_init((hal)->hw) argument
34 #define mailbox_hal_write_param0(hal, param0, box) mailbox_ll_write_param0((hal)->hw, param0, box) argument
35 #define mailbox_hal_write_param1(hal, param1, box) mailbox_ll_write_param1((hal)->hw, param1, box) argument
36 #define mailbox_hal_write_param2(hal, param2, box) mailbox_ll_write_param2((hal)->hw, param2, box) argument
37 #define mailbox_hal_write_param3(hal, param3, box) mailbox_ll_write_param3((hal)->hw, param3, box) argument
39 #define mailbox_hal_read_param0(hal, box) mailbox_ll_read_param0((hal)->hw, box) argument
40 #define mailbox_hal_read_param1(hal, box) mailbox_ll_read_param1((hal)->hw, box) argument
41 #define mailbox_hal_read_param2(hal, box) mailbox_ll_read_param2((hal)->hw, box) argument
42 #define mailbox_hal_read_param3(hal, box) mailbox_ll_read_param3((hal)->hw, box) argument
44 #define mailbox_hal_box_trigger(hal, box) mailbox_ll_box_trigger((hal)->hw, box) argument
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| D | pwm_hal.h | 56 #define pwm_hal_get_capture_value(hal, chan) pwm_ll_get_capture_value((hal)->hw, chan) argument
62 #define pwm_hal_set_mode_timer(hal, chan) pwm_ll_set_mode_timer((hal)->hw, chan) argument
63 #define pwm_hal_enable_interrupt(hal, chan) pwm_ll_enable_interrupt((hal)->hw, chan) argument
64 #define pwm_hal_disable_interrupt(hal, chan) pwm_ll_disable_interrupt((hal)->hw, chan) argument
65 #define pwm_hal_get_interrupt_status(hal) pwm_ll_get_interrupt_status((hal)->hw) argument
66 #define pwm_hal_clear_interrupt_status(hal, status) pwm_ll_clear_interrupt_status((hal)->hw, (statu… argument
67 #define pwm_hal_clear_chan_interrupt_status(hal, chan) pwm_ll_clear_chan_interrupt_status((hal)->hw… argument
68 #define pwm_hal_is_interrupt_triggered(hal, chan, status) pwm_ll_is_interrupt_triggered((hal)->hw, … argument
70 #define pwm_hal_is_chan_started(hal, chan) pwm_ll_is_chan_started((hal)->hw, (chan)) argument
72 #define pwm_hal_set_t1(hal, chan, t1) pwm_ll_set_t1((hal)->hw, (chan), (t1)) argument
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| /device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/soc/common/hal/ |
| D | aon_rtc_hal.c | 19 void aon_rtc_hal_enable(aon_rtc_hal_t *hal) in aon_rtc_hal_enable()
25 void aon_rtc_hal_disable(aon_rtc_hal_t *hal) in aon_rtc_hal_disable()
31 bool aon_rtc_hal_is_enable(aon_rtc_hal_t *hal) in aon_rtc_hal_is_enable()
37 void aon_rtc_hal_stop_counter(aon_rtc_hal_t *hal) in aon_rtc_hal_stop_counter()
43 void aon_rtc_hal_start_counter(aon_rtc_hal_t *hal) in aon_rtc_hal_start_counter()
49 bool aon_rtc_hal_is_counter_stop(aon_rtc_hal_t *hal) in aon_rtc_hal_is_counter_stop()
55 void aon_rtc_hal_reset_counter(aon_rtc_hal_t *hal) in aon_rtc_hal_reset_counter()
61 void aon_rtc_hal_clear_reset_counter(aon_rtc_hal_t *hal) in aon_rtc_hal_clear_reset_counter()
67 bool aon_rtc_hal_is_counter_reset(aon_rtc_hal_t *hal) in aon_rtc_hal_is_counter_reset()
73 void aon_rtc_hal_set_tick_val(aon_rtc_hal_t *hal, uint32_t val) in aon_rtc_hal_set_tick_val()
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| /device/soc/esp/esp32/components/hal/ |
| D | i2c_hal.c | 17 void i2c_hal_txfifo_rst(i2c_hal_context_t *hal) in i2c_hal_txfifo_rst()
22 void i2c_hal_rxfifo_rst(i2c_hal_context_t *hal) in i2c_hal_rxfifo_rst()
27 void i2c_hal_set_data_mode(i2c_hal_context_t *hal, i2c_trans_mode_t tx_mode, i2c_trans_mode_t rx_mo… in i2c_hal_set_data_mode()
32 void i2c_hal_get_data_mode(i2c_hal_context_t *hal, i2c_trans_mode_t *tx_mode, i2c_trans_mode_t *rx_… in i2c_hal_get_data_mode()
37 void i2c_hal_set_filter(i2c_hal_context_t *hal, uint8_t filter_num) in i2c_hal_set_filter()
42 void i2c_hal_get_filter(i2c_hal_context_t *hal, uint8_t *filter_num) in i2c_hal_get_filter()
47 void i2c_hal_set_scl_timing(i2c_hal_context_t *hal, int hight_period, int low_period) in i2c_hal_set_scl_timing()
52 void i2c_hal_clr_intsts_mask(i2c_hal_context_t *hal, uint32_t mask) in i2c_hal_clr_intsts_mask()
57 void i2c_hal_enable_intr_mask(i2c_hal_context_t *hal, uint32_t mask) in i2c_hal_enable_intr_mask()
62 void i2c_hal_disable_intr_mask(i2c_hal_context_t *hal, uint32_t mask) in i2c_hal_disable_intr_mask()
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| D | uart_hal.c | 18 void uart_hal_set_sclk(uart_hal_context_t *hal, uart_sclk_t sclk) in uart_hal_set_sclk()
23 void uart_hal_get_sclk(uart_hal_context_t *hal, uart_sclk_t *sclk) in uart_hal_get_sclk()
28 void uart_hal_set_baudrate(uart_hal_context_t *hal, uint32_t baud_rate) in uart_hal_set_baudrate()
33 void uart_hal_get_baudrate(uart_hal_context_t *hal, uint32_t *baud_rate) in uart_hal_get_baudrate()
38 void uart_hal_set_stop_bits(uart_hal_context_t *hal, uart_stop_bits_t stop_bit) in uart_hal_set_stop_bits()
43 void uart_hal_get_stop_bits(uart_hal_context_t *hal, uart_stop_bits_t *stop_bit) in uart_hal_get_stop_bits()
48 void uart_hal_set_data_bit_num(uart_hal_context_t *hal, uart_word_length_t data_bit) in uart_hal_set_data_bit_num()
53 void uart_hal_get_data_bit_num(uart_hal_context_t *hal, uart_word_length_t *data_bit) in uart_hal_get_data_bit_num()
58 void uart_hal_set_parity(uart_hal_context_t *hal, uart_parity_t parity_mode) in uart_hal_set_parity()
63 void uart_hal_get_parity(uart_hal_context_t *hal, uart_parity_t *parity_mode) in uart_hal_get_parity()
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| D | i2s_hal.c | 24 void i2s_hal_set_tx_mode(i2s_hal_context_t *hal, i2s_channel_t ch, i2s_bits_per_sample_t bits) in i2s_hal_set_tx_mode()
37 void i2s_hal_set_rx_mode(i2s_hal_context_t *hal, i2s_channel_t ch, i2s_bits_per_sample_t bits) in i2s_hal_set_rx_mode()
50 void i2s_hal_set_in_link(i2s_hal_context_t *hal, uint32_t bytes_num, uint32_t addr) in i2s_hal_set_in_link()
57 void i2s_hal_tx_pdm_cfg(i2s_hal_context_t *hal, uint32_t fp, uint32_t fs) in i2s_hal_tx_pdm_cfg()
62 void i2s_hal_get_tx_pdm(i2s_hal_context_t *hal, uint32_t *fp, uint32_t *fs) in i2s_hal_get_tx_pdm()
67 void i2s_hal_rx_pdm_cfg(i2s_hal_context_t *hal, uint32_t dsr) in i2s_hal_rx_pdm_cfg()
72 void i2s_hal_get_rx_pdm(i2s_hal_context_t *hal, uint32_t *dsr) in i2s_hal_get_rx_pdm()
78 void i2s_hal_set_clk_div(i2s_hal_context_t *hal, int div_num, int div_a, int div_b, int tx_bck_div,… in i2s_hal_set_clk_div()
87 void i2s_hal_set_tx_bits_mod(i2s_hal_context_t *hal, i2s_bits_per_sample_t bits) in i2s_hal_set_tx_bits_mod()
92 void i2s_hal_set_rx_bits_mod(i2s_hal_context_t *hal, i2s_bits_per_sample_t bits) in i2s_hal_set_rx_bits_mod()
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| D | sdio_slave_hal.c | 158 void sdio_slave_hal_init(sdio_slave_context_t *hal) in sdio_slave_hal_init()
169 void sdio_slave_hal_hw_init(sdio_slave_context_t *hal) in sdio_slave_hal_hw_init()
178 static esp_err_t init_send_queue(sdio_slave_context_t *hal) in init_send_queue()
216 void sdio_slave_hal_set_ioready(sdio_slave_context_t *hal, bool ready) in sdio_slave_hal_set_ioready()
253 static inline void send_set_state(sdio_slave_context_t *hal, send_state_t state) in send_set_state()
258 static inline send_state_t send_get_state(sdio_slave_context_t* hal) in send_get_state()
272 static void send_isr_invoker_enable(const sdio_slave_context_t *hal) in send_isr_invoker_enable()
282 static void send_isr_invoker_disable(sdio_slave_context_t *hal) in send_isr_invoker_disable()
287 void sdio_slave_hal_send_handle_isr_invoke(sdio_slave_context_t *hal) in sdio_slave_hal_send_handle_isr_invoke()
293 esp_err_t sdio_slave_hal_send_start(sdio_slave_context_t *hal) in sdio_slave_hal_send_start()
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| /device/soc/esp/esp32/components/hal/include/hal/ |
| D | gpio_hal.h | 56 #define gpio_hal_pullup_en(hal, gpio_num) gpio_ll_pullup_en((hal)->dev, gpio_num) argument
64 #define gpio_hal_pullup_dis(hal, gpio_num) gpio_ll_pullup_dis((hal)->dev, gpio_num) argument
72 #define gpio_hal_pulldown_en(hal, gpio_num) gpio_ll_pulldown_en((hal)->dev, gpio_num) argument
80 #define gpio_hal_pulldown_dis(hal, gpio_num) gpio_ll_pulldown_dis((hal)->dev, gpio_num) argument
89 #define gpio_hal_set_intr_type(hal, gpio_num, intr_type) gpio_ll_set_intr_type((hal)->dev, gpio_num… argument
98 #define gpio_hal_get_intr_status(hal, core_id, status) gpio_ll_get_intr_status((hal)->dev, core_id,… argument
107 #define gpio_hal_get_intr_status_high(hal, core_id, status) gpio_ll_get_intr_status_high((hal)->dev… argument
115 #define gpio_hal_clear_intr_status(hal, mask) gpio_ll_clear_intr_status((hal)->dev, mask) argument
123 #define gpio_hal_clear_intr_status_high(hal, mask) gpio_ll_clear_intr_status_high((hal)->dev, mask) argument
148 #define gpio_hal_input_disable(hal, gpio_num) gpio_ll_input_disable((hal)->dev, gpio_num) argument
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| D | timer_hal.h | 70 #define timer_hal_set_divider(hal, divider) timer_ll_set_divider((hal)->dev, (hal)->idx, divider) argument
80 #define timer_hal_get_divider(hal, divider) timer_ll_get_divider((hal)->dev, (hal)->idx, divider) argument
90 #define timer_hal_set_counter_value(hal, load_val) timer_ll_set_counter_value((hal)->dev, (hal)->i… argument
100 #define timer_hal_get_counter_value(hal, timer_val) timer_ll_get_counter_value((hal)->dev, (hal)->… argument
110 #define timer_hal_set_counter_increase(hal, increase_en) timer_ll_set_counter_increase((hal)->dev,… argument
122 #define timer_hal_get_counter_increase(hal) timer_ll_get_counter_increase((hal)->dev, (hal)->idx) argument
132 #define timer_hal_set_counter_enable(hal, counter_en) timer_ll_set_counter_enable((hal)->dev, (hal… argument
143 #define timer_hal_get_counter_enable(hal) timer_ll_get_counter_enable((hal)->dev, (hal)->idx) argument
153 #define timer_hal_set_auto_reload(hal, auto_reload_en) timer_ll_set_auto_reload((hal)->dev, (hal)-… argument
164 #define timer_hal_get_auto_reload(hal) timer_ll_get_auto_reload((hal)->dev, (hal)->idx) argument
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| D | ledc_hal.h | 45 #define ledc_hal_set_slow_clk_sel(hal, slow_clk_sel) ledc_ll_set_slow_clk_sel((hal)->dev, slow_clk… argument
55 #define ledc_hal_get_slow_clk_sel(hal, slow_clk_sel) ledc_ll_get_slow_clk_sel((hal)->dev, slow_clk… argument
65 #define ledc_hal_ls_timer_update(hal, timer_sel) ledc_ll_ls_timer_update((hal)->dev, (hal)->speed_… argument
75 #define ledc_hal_timer_rst(hal, timer_sel) ledc_ll_timer_rst((hal)->dev, (hal)->speed_mode, timer_… argument
85 #define ledc_hal_timer_pause(hal, timer_sel) ledc_ll_timer_pause((hal)->dev, (hal)->speed_mode, ti… argument
95 #define ledc_hal_timer_resume(hal, timer_sel) ledc_ll_timer_resume((hal)->dev, (hal)->speed_mode, … argument
106 #define ledc_hal_set_clock_divider(hal, timer_sel, clock_divider) ledc_ll_set_clock_divider((hal)-… argument
117 #define ledc_hal_get_clock_divider(hal, timer_sel, clock_divider) ledc_ll_get_clock_divider((hal)-… argument
128 #define ledc_hal_set_clock_source(hal, timer_sel, clk_src) ledc_ll_set_clock_source((hal)->dev, (h… argument
139 #define ledc_hal_get_clock_source(hal, timer_sel, clk_src) ledc_ll_get_clock_source((hal)->dev, (h… argument
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| D | pcnt_hal.h | 54 #define pcnt_hal_set_mode(hal, unit, channel, pos_mode, neg_mode, hctrl_mode, lctrl_mode) pcnt_ll_s… argument
63 #define pcnt_hal_get_counter_value(hal, unit, count) pcnt_ll_get_counter_value((hal)->dev, unit, co… argument
71 #define pcnt_hal_counter_pause(hal, unit) pcnt_ll_counter_pause((hal)->dev, unit) argument
79 #define pcnt_hal_counter_resume(hal, unit) pcnt_ll_counter_resume((hal)->dev, unit) argument
87 #define pcnt_hal_counter_clear(hal, unit) pcnt_ll_counter_clear((hal)->dev, unit) argument
98 #define pcnt_hal_intr_enable(hal, unit) pcnt_ll_intr_enable((hal)->dev, unit) argument
106 #define pcnt_hal_intr_disable(hal, unit) pcnt_ll_intr_disable((hal)->dev, unit) argument
114 #define pcnt_hal_get_intr_status(hal, mask) pcnt_ll_get_intr_status((hal)->dev, mask) argument
122 #define pcnt_hal_clear_intr_status(hal, mask) pcnt_ll_clear_intr_status((hal)->dev, mask) argument
132 #define pcnt_hal_event_enable(hal, unit, evt_type) pcnt_ll_event_enable((hal)->dev, unit, evt_type) argument
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/hal/ctrl/hisiv100/ |
| D | hdmi_hal_intf.c | 118 static hi_void hal_hdmi_hardware_init(const struct hdmi_hal_ *hal) in hal_hdmi_hardware_init()
125 static hi_void hal_hdmi_tmds_mode_set(const struct hdmi_hal_ *hal, hdmi_tmds_mode tmds_mode) in hal_hdmi_tmds_mode_set()
132 static hi_void hal_hdmi_avmute_set(const struct hdmi_hal_ *hal, hi_bool avmute) in hal_hdmi_avmute_set()
144 static hi_void hal_hdmi_emi_status_get(const struct hdmi_hal_ *hal, hdmi_emi_status *emi_status) in hal_hdmi_emi_status_get()
160 static hi_void hal_hdmi_csc_param_set(struct hdmi_hal_ *hal, hdmi_video_config *video_cfg) in hal_hdmi_csc_param_set()
175 static hi_void hal_hdmi_infoframe_set(const struct hdmi_hal_ *hal, in hal_hdmi_infoframe_set()
184 static hi_void hal_hdmi_infoframe_enable_set(const struct hdmi_hal_ *hal, in hal_hdmi_infoframe_enable_set()
192 static hi_s32 hal_hdmi_video_path_set(const struct hdmi_hal_ *hal, hdmi_video_config *video_cfg) in hal_hdmi_video_path_set()
240 static hi_void hal_hdmi_ctrl_reset(const struct hdmi_hal_ *hal) in hal_hdmi_ctrl_reset()
266 static hi_s32 hal_hdmi_phy_hw_spec_set(const struct hdmi_hal_ *hal, hi_u32 tmds_clk, const hdmi_hw_… in hal_hdmi_phy_hw_spec_set()
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| /device/soc/esp/esp32/components/hal/esp32/ |
| D | emac_hal.c | 52 void emac_hal_init(emac_hal_context_t *hal, void *descriptors, in emac_hal_init()
63 void emac_hal_lowlevel_init(emac_hal_context_t *hal) in emac_hal_lowlevel_init()
134 void emac_hal_reset(emac_hal_context_t *hal) in emac_hal_reset()
139 bool emac_hal_is_reset_done(emac_hal_context_t *hal) in emac_hal_is_reset_done()
144 void emac_hal_set_csr_clock_range(emac_hal_context_t *hal) in emac_hal_set_csr_clock_range()
162 void emac_hal_reset_desc_chain(emac_hal_context_t *hal) in emac_hal_reset_desc_chain()
207 void emac_hal_init_mac_default(emac_hal_context_t *hal) in emac_hal_init_mac_default()
262 void emac_hal_enable_flow_ctrl(emac_hal_context_t *hal, bool enable) in emac_hal_enable_flow_ctrl()
285 void emac_hal_init_dma_default(emac_hal_context_t *hal) in emac_hal_init_dma_default()
333 void emac_hal_set_speed(emac_hal_context_t *hal, uint32_t speed) in emac_hal_set_speed()
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