1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #define SARADC_FAILURE (1) 22 #define SARADC_SUCCESS (0) 23 24 #define SARADC_DEV_NAME "saradc" 25 26 #define SARADC_CMD_MAGIC (0xe290000) 27 enum 28 { 29 SARADC_CMD_SET_MODE = SARADC_CMD_MAGIC + 1, 30 SARADC_CMD_SET_CHANNEL, 31 SARADC_CMD_SET_SAMPLE_RATE, 32 SARADC_CMD_SET_WAITING_TIME, 33 SARADC_CMD_SET_VALID_MODE, 34 SARADC_CMD_CLEAR_INT, 35 SARADC_CMD_SET_CLK_RATE, 36 SARADC_CMD_RUN_OR_STOP_ADC, 37 SARADC_CMD_SET_CAL_VAL, 38 SARADC_CMD_SET_BYPASS_CALIB, 39 SARADC_CMD_SET_SAT_CTRL, 40 SARADC_CMD_PAUSE, 41 SARADC_CMD_RESUME, 42 }; 43 44 typedef enum 45 { 46 SARADC_CALIBRATE_LOW, 47 SARADC_CALIBRATE_HIGH 48 } SARADC_MODE; 49 50 #define ADC_CONFIG_MODE_SLEEP (0x00UL) 51 #define ADC_CONFIG_MODE_STEP (0x01UL) 52 #define ADC_CONFIG_MODE_SOFT_CTRL (0x02UL) 53 #define ADC_CONFIG_MODE_CONTINUE (0x03UL) 54 55 #define ADC_CONFIG_MODE_4CLK_DELAY (0x0UL) 56 #define ADC_CONFIG_MODE_8CLK_DELAY (0x1UL) 57 #define ADC_CONFIG_MODE_SHOULD_OFF (1 << 3) 58 59 typedef struct 60 { 61 UINT16 *pData; 62 volatile UINT8 current_sample_data_cnt; 63 volatile UINT8 current_read_data_cnt; 64 UINT8 data_buff_size; 65 volatile UINT8 has_data; /* 1: has data 0: no data*/ 66 volatile UINT8 all_done; /* 1: all done 0: still sampling*/ 67 UINT8 channel; 68 /* mode: ADC mode 69 * bit[0:1]: ADC operation mode 70 * 00: ADC power down mode 71 * 01: ADC one-step mode 72 * 10: ADC software control mode 73 * 11: ADC continuous mode 74 * bit[2:2]: delay clk(adc setting) 75 * 0: delay 4 clk 76 * 1: delay 8 clk 77 * bit[7:3]: reserved 78 */ 79 UINT8 mode; 80 void (*p_Int_Handler)(void); 81 unsigned char pre_div; // ADC pre-divide clk 82 unsigned char samp_rate; // ADC sample rate 83 unsigned char filter; //ADC filter 84 } saradc_desc_t; 85 86 typedef struct 87 { 88 UINT8 enable; 89 UINT8 channel; 90 } saradc_chan_t; 91 92 typedef struct 93 { 94 unsigned short val; 95 SARADC_MODE mode; 96 } saradc_cal_val_t; 97 98 typedef struct _saradc_calibrate_val_ 99 { 100 unsigned short low; 101 unsigned short high; 102 } saradc_calibrate_val; 103 104 105 /******************************************************************************* 106 * Function Declarations 107 *******************************************************************************/ 108 void saradc_disable(void); 109 void saradc_init(void); 110 void saradc_exit(void); 111 void saradc_isr(void); 112 float saradc_calculate(UINT16 adc_val); 113 void saradc_config_param_init_for_temp(saradc_desc_t * adc_config); 114 void saradc_config_param_init(saradc_desc_t * adc_config); 115 void saradc_ensure_close(void); 116 UINT32 saradc_check_busy(void); 117 UINT32 saradc_check_accuracy(void); 118 119 float saradc_calculate(UINT16 adc_val); 120 extern saradc_calibrate_val saradc_val; 121 UINT32 saradc_set_calibrate_val(uint16_t *value, SARADC_MODE mode); 122 #ifdef __cplusplus 123 } 124 #endif 125