1 /* 2 * include/linux/amlogic/media/vout/hdmi_tx/hdmi_common.h 3 * 4 * Copyright (C) 2017 Amlogic, Inc. All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 14 * more details. 15 * 16 */ 17 18 #ifndef __HDMI_COMMON_H__ 19 #define __HDMI_COMMON_H__ 20 21 #include <linux/amlogic/media/vout/vinfo.h> 22 23 /* HDMI VIC definitions */ 24 25 /* HDMITX_VIC420_OFFSET and HDMITX_VIC_MASK are associated with 26 * VIC_MAX_VALID_MODE and VIC_MAX_NUM in hdmi_tx_module.h 27 */ 28 #define HDMITX_VIC420_OFFSET 0x100 29 #define HDMITX_VIC420_FAKE_OFFSET 0x200 30 #define HDMITX_VESA_OFFSET 0x300 31 32 33 #define HDMITX_VIC_MASK 0xff 34 35 /* Refer to http://standards-oui.ieee.org/oui/oui.txt */ 36 #define HDMI_IEEEOUI 0x000C03 37 #define HF_IEEEOUI 0xC45DD8 38 #define DOVI_IEEEOUI 0x00D046 39 #define HDR10PLUS_IEEEOUI 0x90848B 40 41 #define GET_OUI_BYTE0(oui) (oui & 0xff) /* Little Endian */ 42 #define GET_OUI_BYTE1(oui) ((oui >> 8) & 0xff) 43 #define GET_OUI_BYTE2(oui) ((oui >> 16) & 0xff) 44 45 enum hdmi_vic { 46 /* Refer to CEA 861-D */ 47 HDMI_Unknown = 0, 48 HDMI_640x480p60_4x3 = 1, 49 HDMI_720x480p60_4x3 = 2, 50 HDMI_720x480p60_16x9 = 3, 51 HDMI_1280x720p60_16x9 = 4, 52 HDMI_1920x1080i60_16x9 = 5, 53 HDMI_720x480i60_4x3 = 6, 54 HDMI_720x480i60_16x9 = 7, 55 HDMI_720x240p60_4x3 = 8, 56 HDMI_720x240p60_16x9 = 9, 57 HDMI_2880x480i60_4x3 = 10, 58 HDMI_2880x480i60_16x9 = 11, 59 HDMI_2880x240p60_4x3 = 12, 60 HDMI_2880x240p60_16x9 = 13, 61 HDMI_1440x480p60_4x3 = 14, 62 HDMI_1440x480p60_16x9 = 15, 63 HDMI_1920x1080p60_16x9 = 16, 64 HDMI_720x576p50_4x3 = 17, 65 HDMI_720x576p50_16x9 = 18, 66 HDMI_1280x720p50_16x9 = 19, 67 HDMI_1920x1080i50_16x9 = 20, 68 HDMI_720x576i50_4x3 = 21, 69 HDMI_720x576i50_16x9 = 22, 70 HDMI_720x288p_4x3 = 23, 71 HDMI_720x288p_16x9 = 24, 72 HDMI_2880x576i50_4x3 = 25, 73 HDMI_2880x576i50_16x9 = 26, 74 HDMI_2880x288p50_4x3 = 27, 75 HDMI_2880x288p50_16x9 = 28, 76 HDMI_1440x576p_4x3 = 29, 77 HDMI_1440x576p_16x9 = 30, 78 HDMI_1920x1080p50_16x9 = 31, 79 HDMI_1920x1080p24_16x9 = 32, 80 HDMI_1920x1080p25_16x9 = 33, 81 HDMI_1920x1080p30_16x9 = 34, 82 HDMI_2880x480p60_4x3 = 35, 83 HDMI_2880x480p60_16x9 = 36, 84 HDMI_2880x576p50_4x3 = 37, 85 HDMI_2880x576p50_16x9 = 38, 86 HDMI_1920x1080i_t1250_50_16x9 = 39, 87 HDMI_1920x1080i100_16x9 = 40, 88 HDMI_1280x720p100_16x9 = 41, 89 HDMI_720x576p100_4x3 = 42, 90 HDMI_720x576p100_16x9 = 43, 91 HDMI_720x576i100_4x3 = 44, 92 HDMI_720x576i100_16x9 = 45, 93 HDMI_1920x1080i120_16x9 = 46, 94 HDMI_1280x720p120_16x9 = 47, 95 HDMI_720x480p120_4x3 = 48, 96 HDMI_720x480p120_16x9 = 49, 97 HDMI_720x480i120_4x3 = 50, 98 HDMI_720x480i120_16x9 = 51, 99 HDMI_720x576p200_4x3 = 52, 100 HDMI_720x576p200_16x9 = 53, 101 HDMI_720x576i200_4x3 = 54, 102 HDMI_720x576i200_16x9 = 55, 103 HDMI_720x480p240_4x3 = 56, 104 HDMI_720x480p240_16x9 = 57, 105 HDMI_720x480i240_4x3 = 58, 106 HDMI_720x480i240_16x9 = 59, 107 /* Refet to CEA 861-F */ 108 HDMI_1280x720p24_16x9 = 60, 109 HDMI_1280x720p25_16x9 = 61, 110 HDMI_1280x720p30_16x9 = 62, 111 HDMI_1920x1080p120_16x9 = 63, 112 HDMI_1920x1080p100_16x9 = 64, 113 HDMI_1280x720p24_64x27 = 65, 114 HDMI_1280x720p25_64x27 = 66, 115 HDMI_1280x720p30_64x27 = 67, 116 HDMI_1280x720p50_64x27 = 68, 117 HDMI_1280x720p60_64x27 = 69, 118 HDMI_1280x720p100_64x27 = 70, 119 HDMI_1280x720p120_64x27 = 71, 120 HDMI_1920x1080p24_64x27 = 72, 121 HDMI_1920x1080p25_64x27 = 73, 122 HDMI_1920x1080p30_64x27 = 74, 123 HDMI_1920x1080p50_64x27 = 75, 124 HDMI_1920x1080p60_64x27 = 76, 125 HDMI_1920x1080p100_64x27 = 77, 126 HDMI_1920x1080p120_64x27 = 78, 127 HDMI_1680x720p24_64x27 = 79, 128 HDMI_1680x720p25_64x27 = 80, 129 HDMI_1680x720p30_64x27 = 81, 130 HDMI_1680x720p50_64x27 = 82, 131 HDMI_1680x720p60_64x27 = 83, 132 HDMI_1680x720p100_64x27 = 84, 133 HDMI_1680x720p120_64x27 = 85, 134 HDMI_2560x1080p24_64x27 = 86, 135 HDMI_2560x1080p25_64x27 = 87, 136 HDMI_2560x1080p30_64x27 = 88, 137 HDMI_2560x1080p50_64x27 = 89, 138 HDMI_2560x1080p60_64x27 = 90, 139 HDMI_2560x1080p100_64x27 = 91, 140 HDMI_2560x1080p120_64x27 = 92, 141 HDMI_3840x2160p24_16x9 = 93, 142 HDMI_3840x2160p25_16x9 = 94, 143 HDMI_3840x2160p30_16x9 = 95, 144 HDMI_3840x2160p50_16x9 = 96, 145 HDMI_3840x2160p60_16x9 = 97, 146 HDMI_4096x2160p24_256x135 = 98, 147 HDMI_4096x2160p25_256x135 = 99, 148 HDMI_4096x2160p30_256x135 = 100, 149 HDMI_4096x2160p50_256x135 = 101, 150 HDMI_4096x2160p60_256x135 = 102, 151 HDMI_3840x2160p24_64x27 = 103, 152 HDMI_3840x2160p25_64x27 = 104, 153 HDMI_3840x2160p30_64x27 = 105, 154 HDMI_3840x2160p50_64x27 = 106, 155 HDMI_3840x2160p60_64x27 = 107, 156 HDMI_RESERVED = 108, 157 HDMI_3840x1080p120hz = 109, 158 HDMI_3840x1080p100hz, 159 HDMI_3840x540p240hz, 160 HDMI_3840x540p200hz, 161 162 /* 163 * the following vic is for those y420 mode 164 * they are all beyond OFFSET_HDMITX_VIC420(0x1000) 165 * and they has same vic with normal vic in the lower bytes. 166 */ 167 HDMI_VIC_Y420 = 168 HDMITX_VIC420_OFFSET, 169 HDMI_3840x2160p50_16x9_Y420 = 170 HDMITX_VIC420_OFFSET + HDMI_3840x2160p50_16x9, 171 HDMI_3840x2160p60_16x9_Y420 = 172 HDMITX_VIC420_OFFSET + HDMI_3840x2160p60_16x9, 173 HDMI_4096x2160p50_256x135_Y420 = 174 HDMITX_VIC420_OFFSET + HDMI_4096x2160p50_256x135, 175 HDMI_4096x2160p60_256x135_Y420 = 176 HDMITX_VIC420_OFFSET + HDMI_4096x2160p60_256x135, 177 HDMI_3840x2160p50_64x27_Y420 = 178 HDMITX_VIC420_OFFSET + HDMI_3840x2160p50_64x27, 179 HDMI_3840x2160p60_64x27_Y420 = 180 HDMITX_VIC420_OFFSET + HDMI_3840x2160p60_64x27, 181 HDMI_VIC_Y420_MAX, 182 183 HDMI_VIC_FAKE = HDMITX_VIC420_FAKE_OFFSET, 184 HDMIV_640x480p60hz = HDMITX_VESA_OFFSET, 185 HDMIV_800x480p60hz, 186 HDMIV_800x600p60hz, 187 HDMIV_852x480p60hz, 188 HDMIV_854x480p60hz, 189 HDMIV_1024x600p60hz, 190 HDMIV_1024x768p60hz, 191 HDMIV_1152x864p75hz, 192 HDMIV_1280x600p60hz, 193 HDMIV_1280x768p60hz, 194 HDMIV_1280x800p60hz, 195 HDMIV_1280x960p60hz, 196 HDMIV_1280x1024p60hz, 197 HDMIV_1360x768p60hz, 198 HDMIV_1366x768p60hz, 199 HDMIV_1400x1050p60hz, 200 HDMIV_1440x900p60hz, 201 HDMIV_1440x2560p60hz, 202 HDMIV_1600x900p60hz, 203 HDMIV_1600x1200p60hz, 204 HDMIV_1680x1050p60hz, 205 HDMIV_1920x1200p60hz, 206 HDMIV_2160x1200p90hz, 207 HDMIV_2560x1080p60hz, 208 HDMIV_2560x1440p60hz, 209 HDMIV_2560x1600p60hz, 210 HDMIV_3440x1440p60hz, 211 HDMIV_2400x1200p90hz, 212 HDMI_VIC_END, 213 }; 214 215 /* Compliance with old definitions */ 216 #define HDMI_640x480p60 HDMI_640x480p60_4x3 217 #define HDMI_480p60 HDMI_720x480p60_4x3 218 #define HDMI_480p60_16x9 HDMI_720x480p60_16x9 219 #define HDMI_720p60 HDMI_1280x720p60_16x9 220 #define HDMI_1080i60 HDMI_1920x1080i60_16x9 221 #define HDMI_480i60 HDMI_720x480i60_4x3 222 #define HDMI_480i60_16x9 HDMI_720x480i60_16x9 223 #define HDMI_480i60_16x9_rpt HDMI_2880x480i60_16x9 224 #define HDMI_1440x480p60 HDMI_1440x480p60_4x3 225 #define HDMI_1440x480p60_16x9 HDMI_1440x480p60_16x9 226 #define HDMI_1080p60 HDMI_1920x1080p60_16x9 227 #define HDMI_576p50 HDMI_720x576p50_4x3 228 #define HDMI_576p50_16x9 HDMI_720x576p50_16x9 229 #define HDMI_720p50 HDMI_1280x720p50_16x9 230 #define HDMI_1080i50 HDMI_1920x1080i50_16x9 231 #define HDMI_576i50 HDMI_720x576i50_4x3 232 #define HDMI_576i50_16x9 HDMI_720x576i50_16x9 233 #define HDMI_576i50_16x9_rpt HDMI_2880x576i50_16x9 234 #define HDMI_1080p50 HDMI_1920x1080p50_16x9 235 #define HDMI_1080p24 HDMI_1920x1080p24_16x9 236 #define HDMI_1080p25 HDMI_1920x1080p25_16x9 237 #define HDMI_1080p30 HDMI_1920x1080p30_16x9 238 #define HDMI_480p60_16x9_rpt HDMI_2880x480p60_16x9 239 #define HDMI_576p50_16x9_rpt HDMI_2880x576p50_16x9 240 #define HDMI_4k2k_24 HDMI_3840x2160p24_16x9 241 #define HDMI_4k2k_25 HDMI_3840x2160p25_16x9 242 #define HDMI_4k2k_30 HDMI_3840x2160p30_16x9 243 #define HDMI_4k2k_50 HDMI_3840x2160p50_16x9 244 #define HDMI_4k2k_60 HDMI_3840x2160p60_16x9 245 #define HDMI_4k2k_smpte_24 HDMI_4096x2160p24_256x135 246 #define HDMI_4k2k_smpte_50 HDMI_4096x2160p50_256x135 247 #define HDMI_4k2k_smpte_60 HDMI_4096x2160p60_256x135 248 249 /* for Y420 modes*/ 250 #define HDMI_4k2k_50_y420 HDMI_3840x2160p50_16x9_Y420 251 #define HDMI_4k2k_60_y420 HDMI_3840x2160p60_16x9_Y420 252 #define HDMI_4k2k_smpte_50_y420 HDMI_4096x2160p50_256x135_Y420 253 #define HDMI_4k2k_smpte_60_y420 HDMI_4096x2160p60_256x135_Y420 254 255 enum hdmi_phy_para { 256 HDMI_PHYPARA_6G = 1, /* 2160p60hz 444 8bit */ 257 HDMI_PHYPARA_4p5G, /* 2160p50hz 420 12bit */ 258 HDMI_PHYPARA_3p7G, /* 2160p30hz 444 10bit */ 259 HDMI_PHYPARA_3G, /* 2160p24hz 444 8bit */ 260 HDMI_PHYPARA_LT3G, /* 1080p60hz 444 12bit */ 261 HDMI_PHYPARA_DEF = HDMI_PHYPARA_LT3G, 262 HDMI_PHYPARA_270M, /* 480p60hz 444 8bit */ 263 }; 264 265 enum hdmi_audio_fs; 266 struct dtd; 267 268 /* CEA TIMING STRUCT DEFINITION */ 269 struct hdmi_cea_timing { 270 unsigned int pixel_freq; /* Unit: 1000 */ 271 unsigned int frac_freq; /* 1.001 shift */ 272 unsigned int h_freq; /* Unit: Hz */ 273 unsigned int v_freq; /* Unit: 0.001 Hz */ 274 unsigned int vsync; /* Unit: Hz, rough data */ 275 unsigned int vsync_polarity:1; 276 unsigned int hsync_polarity:1; 277 unsigned short h_active; 278 unsigned short h_total; 279 unsigned short h_blank; 280 unsigned short h_front; 281 unsigned short h_sync; 282 unsigned short h_back; 283 unsigned short v_active; 284 unsigned short v_total; 285 unsigned short v_blank; 286 unsigned short v_front; 287 unsigned short v_sync; 288 unsigned short v_back; 289 unsigned short v_sync_ln; 290 }; 291 292 enum hdmi_color_depth { 293 COLORDEPTH_24B = 4, 294 COLORDEPTH_30B = 5, 295 COLORDEPTH_36B = 6, 296 COLORDEPTH_48B = 7, 297 COLORDEPTH_RESERVED, 298 }; 299 300 enum hdmi_color_space { 301 COLORSPACE_RGB444 = 0, 302 COLORSPACE_YUV422 = 1, 303 COLORSPACE_YUV444 = 2, 304 COLORSPACE_YUV420 = 3, 305 COLORSPACE_RESERVED, 306 }; 307 308 enum hdmi_color_range { 309 COLORRANGE_LIM, 310 COLORRANGE_FUL, 311 }; 312 313 enum hdmi_3d_type { 314 T3D_FRAME_PACKING = 0, 315 T3D_FIELD_ALTER = 1, 316 T3D_LINE_ALTER = 2, 317 T3D_SBS_FULL = 3, 318 T3D_L_DEPTH = 4, 319 T3D_L_DEPTH_GRAPHICS = 5, 320 T3D_TAB = 6, /* Top and Buttom */ 321 T3D_RSVD = 7, 322 T3D_SBS_HALF = 8, 323 T3D_DISABLE, 324 }; 325 326 /* get hdmi cea timing */ 327 /* t: struct hdmi_cea_timing * */ 328 #define GET_TIMING(name) (t->name) 329 330 struct hdmi_format_para { 331 enum hdmi_vic vic; 332 unsigned char *name; 333 unsigned char *sname; 334 char ext_name[32]; 335 enum hdmi_color_depth cd; /* cd8, cd10 or cd12 */ 336 enum hdmi_color_space cs; /* rgb, y444, y422, y420 */ 337 enum hdmi_color_range cr; /* limit, full */ 338 unsigned int pixel_repetition_factor; 339 unsigned int progress_mode:1; 340 unsigned int scrambler_en:1; 341 unsigned int tmds_clk_div40:1; 342 unsigned int tmds_clk; /* Unit: 1000 */ 343 struct hdmi_cea_timing timing; 344 struct vinfo_s hdmitx_vinfo; 345 }; 346 347 /* HDMI Packet Type Definitions */ 348 #define PT_NULL_PKT 0x00 349 #define PT_AUD_CLK_REGENERATION 0x01 350 #define PT_AUD_SAMPLE 0x02 351 #define PT_GENERAL_CONTROL 0x03 352 #define PT_ACP 0x04 353 #define PT_ISRC1 0x05 354 #define PT_ISRC2 0x06 355 #define PT_ONE_BIT_AUD_SAMPLE 0x07 356 #define PT_DST_AUD 0x08 357 #define PT_HBR_AUD_STREAM 0x09 358 #define PT_GAMUT_METADATA 0x0A 359 #define PT_3D_AUD_SAMPLE 0x0B 360 #define PT_ONE_BIT_3D_AUD_SAMPLE 0x0C 361 #define PT_AUD_METADATA 0x0D 362 #define PT_MULTI_SREAM_AUD_SAMPLE 0x0E 363 #define PT_ONE_BIT_MULTI_SREAM_AUD_SAMPLE 0x0F 364 /* Infoframe Packet */ 365 #define PT_IF_VENDOR_SEPCIFIC 0x81 366 #define PT_IF_AVI 0x82 367 #define PT_IF_SPD 0x83 368 #define PT_IF_AUD 0x84 369 #define PT_IF_MPEG_SOURCE 0x85 370 371 /* Old definitions */ 372 #define TYPE_AVI_INFOFRAMES 0x82 373 #define AVI_INFOFRAMES_VERSION 0x02 374 #define AVI_INFOFRAMES_LENGTH 0x0D 375 376 struct hdmi_csc_coef_table { 377 unsigned char input_format; 378 unsigned char output_format; 379 unsigned char color_depth; 380 unsigned char color_format; /* 0 for ITU601, 1 for ITU709 */ 381 unsigned char coef_length; 382 unsigned char *coef; 383 }; 384 385 enum hdmi_audio_packet { 386 hdmi_audio_packet_SMP = 0x02, 387 hdmi_audio_packet_1BT = 0x07, 388 hdmi_audio_packet_DST = 0x08, 389 hdmi_audio_packet_HBR = 0x09, 390 }; 391 392 enum hdmi_aspect_ratio { 393 ASPECT_RATIO_SAME_AS_SOURCE = 0x8, 394 TV_ASPECT_RATIO_4_3 = 0x9, 395 TV_ASPECT_RATIO_16_9 = 0xA, 396 TV_ASPECT_RATIO_14_9 = 0xB, 397 TV_ASPECT_RATIO_MAX 398 }; 399 struct vesa_standard_timing; 400 401 struct hdmi_format_para *hdmi_get_fmt_paras(enum hdmi_vic vic); 402 struct hdmi_format_para *hdmi_match_dtd_paras(struct dtd *t); 403 void check_detail_fmt(void); 404 unsigned int hdmi_get_csc_coef( 405 unsigned int input_format, unsigned int output_format, 406 unsigned int color_depth, unsigned int color_format, 407 unsigned char **coef_array, unsigned int *coef_length); 408 struct hdmi_format_para *hdmi_get_fmt_name(char const *name, char const *attr); 409 struct hdmi_format_para *hdmi_tst_fmt_name(char const *name, char const *attr); 410 struct vinfo_s *hdmi_get_valid_vinfo(char *mode); 411 const char *hdmi_get_str_cd(struct hdmi_format_para *para); 412 const char *hdmi_get_str_cs(struct hdmi_format_para *para); 413 const char *hdmi_get_str_cr(struct hdmi_format_para *para); 414 unsigned int hdmi_get_aud_n_paras(enum hdmi_audio_fs fs, 415 enum hdmi_color_depth cd, unsigned int tmds_clk); 416 struct hdmi_format_para *hdmi_get_vesa_paras(struct vesa_standard_timing *t); 417 418 419 /* HDMI Audio Parmeters */ 420 /* Refer to CEA-861-D Page 88 */ 421 #define DTS_HD_TYPE_MASK 0xff00 422 #define DTS_HD_MA (0X1 << 8) 423 enum hdmi_audio_type { 424 CT_REFER_TO_STREAM = 0, 425 CT_PCM, 426 CT_AC_3, /* DD */ 427 CT_MPEG1, 428 CT_MP3, 429 CT_MPEG2, 430 CT_AAC, 431 CT_DTS, 432 CT_ATRAC, 433 CT_ONE_BIT_AUDIO, 434 CT_DOLBY_D, /* DDP or DD+ */ 435 CT_DTS_HD, 436 CT_MAT, /* TrueHD */ 437 CT_DST, 438 CT_WMA, 439 CT_DTS_HD_MA = CT_DTS_HD + (DTS_HD_MA), 440 CT_MAX, 441 }; 442 443 enum hdmi_audio_chnnum { 444 CC_REFER_TO_STREAM = 0, 445 CC_2CH, 446 CC_3CH, 447 CC_4CH, 448 CC_5CH, 449 CC_6CH, 450 CC_7CH, 451 CC_8CH, 452 CC_MAX_CH 453 }; 454 455 enum hdmi_audio_format { 456 AF_SPDIF = 0, AF_I2S, AF_DSD, AF_HBR, AT_MAX 457 }; 458 459 enum hdmi_audio_sampsize { 460 SS_REFER_TO_STREAM = 0, SS_16BITS, SS_20BITS, SS_24BITS, SS_MAX 461 }; 462 463 struct size_map { 464 unsigned int sample_bits; 465 enum hdmi_audio_sampsize ss; 466 }; 467 468 /* FL-- Front Left */ 469 /* FC --Front Center */ 470 /* FR --Front Right */ 471 /* FLC-- Front Left Center */ 472 /* FRC-- Front RiQhtCenter */ 473 /* RL-- Rear Left */ 474 /* RC --Rear Center */ 475 /* RR-- Rear Right */ 476 /* RLC-- Rear Left Center */ 477 /* RRC --Rear RiQhtCenter */ 478 /* LFE-- Low Frequency Effect */ 479 enum hdmi_speak_location { 480 CA_FR_FL = 0, 481 CA_LFE_FR_FL, 482 CA_FC_FR_FL, 483 CA_FC_LFE_FR_FL, 484 485 CA_RC_FR_FL, 486 CA_RC_LFE_FR_FL, 487 CA_RC_FC_FR_FL, 488 CA_RC_FC_LFE_FR_FL, 489 490 CA_RR_RL_FR_FL, 491 CA_RR_RL_LFE_FR_FL, 492 CA_RR_RL_FC_FR_FL, 493 CA_RR_RL_FC_LFE_FR_FL, 494 495 CA_RC_RR_RL_FR_FL, 496 CA_RC_RR_RL_LFE_FR_FL, 497 CA_RC_RR_RL_FC_FR_FL, 498 CA_RC_RR_RL_FC_LFE_FR_FL, 499 500 CA_RRC_RC_RR_RL_FR_FL, 501 CA_RRC_RC_RR_RL_LFE_FR_FL, 502 CA_RRC_RC_RR_RL_FC_FR_FL, 503 CA_RRC_RC_RR_RL_FC_LFE_FR_FL, 504 505 CA_FRC_RLC_FR_FL, 506 CA_FRC_RLC_LFE_FR_FL, 507 CA_FRC_RLC_FC_FR_FL, 508 CA_FRC_RLC_FC_LFE_FR_FL, 509 510 CA_FRC_RLC_RC_FR_FL, 511 CA_FRC_RLC_RC_LFE_FR_FL, 512 CA_FRC_RLC_RC_FC_FR_FL, 513 CA_FRC_RLC_RC_FC_LFE_FR_FL, 514 515 CA_FRC_RLC_RR_RL_FR_FL, 516 CA_FRC_RLC_RR_RL_LFE_FR_FL, 517 CA_FRC_RLC_RR_RL_FC_FR_FL, 518 CA_FRC_RLC_RR_RL_FC_LFE_FR_FL, 519 }; 520 521 enum hdmi_audio_downmix { 522 LSV_0DB = 0, 523 LSV_1DB, 524 LSV_2DB, 525 LSV_3DB, 526 LSV_4DB, 527 LSV_5DB, 528 LSV_6DB, 529 LSV_7DB, 530 LSV_8DB, 531 LSV_9DB, 532 LSV_10DB, 533 LSV_11DB, 534 LSV_12DB, 535 LSV_13DB, 536 LSV_14DB, 537 LSV_15DB, 538 }; 539 540 enum hdmi_rx_audio_state { 541 STATE_AUDIO__MUTED = 0, 542 STATE_AUDIO__REQUEST_AUDIO = 1, 543 STATE_AUDIO__AUDIO_READY = 2, 544 STATE_AUDIO__ON = 3, 545 }; 546 547 /* Sampling Freq Fs: 548 * 0 - Refer to Stream Header; 549 * 1 - 32KHz; 550 * 2 - 44.1KHz; 551 * 3 - 48KHz; 552 * 4 - 88.2KHz... 553 */ 554 enum hdmi_audio_fs { 555 FS_REFER_TO_STREAM = 0, 556 FS_32K = 1, 557 FS_44K1 = 2, 558 FS_48K = 3, 559 FS_88K2 = 4, 560 FS_96K = 5, 561 FS_176K4 = 6, 562 FS_192K = 7, 563 FS_768K = 8, 564 FS_MAX, 565 }; 566 567 struct rate_map_fs { 568 unsigned int rate; 569 enum hdmi_audio_fs fs; 570 }; 571 572 struct hdmi_rx_audioinfo { 573 /* !< Signal decoding type -- TvAudioType */ 574 enum hdmi_audio_type type; 575 enum hdmi_audio_format format; 576 /* !< active audio channels bit mask. */ 577 enum hdmi_audio_chnnum channels; 578 enum hdmi_audio_fs fs; /* !< Signal sample rate in Hz */ 579 enum hdmi_audio_sampsize ss; 580 enum hdmi_speak_location speak_loc; 581 enum hdmi_audio_downmix lsv; 582 unsigned int N_value; 583 unsigned int CTS; 584 }; 585 586 #define AUDIO_PARA_MAX_NUM 14 587 struct hdmi_audio_fs_ncts { 588 struct { 589 unsigned int tmds_clk; 590 unsigned int n; /* 24 or 30 bit */ 591 unsigned int cts; /* 24 or 30 bit */ 592 unsigned int n_36bit; 593 unsigned int cts_36bit; 594 unsigned int n_48bit; 595 unsigned int cts_48bit; 596 } array[AUDIO_PARA_MAX_NUM]; 597 unsigned int def_n; 598 }; 599 600 struct parse_cd { 601 enum hdmi_color_depth cd; 602 const char *name; 603 }; 604 605 struct parse_cs { 606 enum hdmi_color_space cs; 607 const char *name; 608 }; 609 610 struct parse_cr { 611 enum hdmi_color_range cr; 612 const char *name; 613 }; 614 615 /* Refer CEA861-D Page 116 Table 55 */ 616 struct dtd { 617 unsigned short pixel_clock; 618 unsigned short h_active; 619 unsigned short h_blank; 620 unsigned short v_active; 621 unsigned short v_blank; 622 unsigned short h_sync_offset; 623 unsigned short h_sync; 624 unsigned short v_sync_offset; 625 unsigned short v_sync; 626 unsigned char h_image_size; 627 unsigned char v_image_size; 628 unsigned char h_border; 629 unsigned char v_border; 630 unsigned char flags; 631 enum hdmi_vic vic; 632 }; 633 634 struct vesa_standard_timing { 635 unsigned short hactive; 636 unsigned short vactive; 637 unsigned short hblank; 638 unsigned short vblank; 639 unsigned short hsync; 640 unsigned short tmds_clk; /* Value = Pixel clock ?? 10,000 */ 641 enum hdmi_vic vesa_timing; 642 }; 643 644 #endif 645