1 // Copyright (C) 2022 Beken Corporation
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "i2c_hal.h"
16 #include "i2c_ll.h"
17 #include <driver/hal/hal_i2c_types.h>
18
19 #define I2C_DEFAULT_CLK_SRC CONFIG_XTAL_FREQ
20 #define NUM_ROUND_UP(a,b) ((a) / (b) + (((a) % (b)) ? 1 : 0))
21 #define I2C_CLK_DIVID(rate) (NUM_ROUND_UP(NUM_ROUND_UP(I2C_DEFAULT_CLK_SRC, rate) - 6, 3) - 1)
22
i2c_hal_init(i2c_hal_t * hal)23 bk_err_t i2c_hal_init(i2c_hal_t *hal)
24 {
25 i2c_ll_init(&hal->hw);
26 return BK_OK;
27 }
28
i2c_hal_set_baud_rate(i2c_hal_t * hal,uint32_t baud_rate)29 bk_err_t i2c_hal_set_baud_rate(i2c_hal_t *hal, uint32_t baud_rate)
30 {
31 uint32_t freq_div = I2C_CLK_DIVID(baud_rate);
32 i2c_ll_set_freq_div(&hal->hw, hal->id, freq_div);
33 return BK_OK;
34 }
35
i2c_hal_configure(i2c_hal_t * hal,const i2c_config_t * cfg)36 bk_err_t i2c_hal_configure(i2c_hal_t *hal, const i2c_config_t *cfg)
37 {
38 uint32_t baud_rate = cfg->baud_rate;
39 if (!baud_rate) {
40 baud_rate = I2C_DEFAULT_BAUD_RATE;
41 }
42 uint32_t freq_div = I2C_CLK_DIVID(baud_rate);
43 i2c_ll_set_freq_div(&hal->hw, hal->id, freq_div);
44 i2c_ll_set_slave_addr(&hal->hw, hal->id, cfg->slave_addr);
45 i2c_ll_set_idle_detect_threshold(&hal->hw, hal->id, 0x3);
46 i2c_ll_set_scl_timeout_threshold(&hal->hw, hal->id, 0x4);
47 i2c_ll_set_clk_src(&hal->hw, hal->id, 0x3);
48 i2c_ll_enable_scl_timeout(&hal->hw, hal->id);
49 i2c_ll_enable_idle_det(&hal->hw, hal->id);
50 i2c_ll_enable_slave(&hal->hw, hal->id);
51 //i2c_ll_enable_stop(&hal->hw, hal->id);
52 i2c_ll_disable_start(&hal->hw, hal->id);
53 return BK_OK;
54 }
55
i2c_hal_start_common(i2c_hal_t * hal)56 bk_err_t i2c_hal_start_common(i2c_hal_t *hal)
57 {
58 i2c_ll_enable(&(hal)->hw, (hal)->id);
59 return BK_OK;
60 }
61
i2c_hal_stop_common(i2c_hal_t * hal)62 bk_err_t i2c_hal_stop_common(i2c_hal_t *hal)
63 {
64 i2c_ll_disable(&(hal)->hw, (hal)->id);
65 return BK_OK;
66 }
67
i2c_hal_set_write_int_mode(i2c_hal_t * hal,uint32_t data_size)68 bk_err_t i2c_hal_set_write_int_mode(i2c_hal_t *hal, uint32_t data_size)
69 {
70 if (data_size < 4) {
71 i2c_ll_set_write_int_mode(&hal->hw, hal->id, I2C_FIFO_INT_LEVEL_1);
72 } else {
73 i2c_ll_set_write_int_mode(&hal->hw, hal->id, I2C_FIFO_INT_LEVEL_4);
74 }
75
76 return BK_OK;
77 }
78
i2c_hal_set_read_int_mode(i2c_hal_t * hal,uint32_t data_size)79 bk_err_t i2c_hal_set_read_int_mode(i2c_hal_t *hal, uint32_t data_size)
80 {
81 uint32_t int_mode;
82 if (data_size > 12) {
83 int_mode = I2C_FIFO_INT_LEVEL_12;
84 } else if (data_size > 8) {
85 int_mode = I2C_FIFO_INT_LEVEL_8;
86 } else if (data_size > 4) {
87 int_mode = I2C_FIFO_INT_LEVEL_4;
88 } else {
89 int_mode = I2C_FIFO_INT_LEVEL_1;
90 }
91 i2c_ll_set_read_int_mode(&hal->hw, hal->id, int_mode);
92
93 return BK_OK;
94 }
95
96