1 /* drivers/input/touchscreen/gt9xx_update.c
2 *
3 * 2010 - 2012 Goodix Technology.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be a reference
11 * to you, when you are integrating the GOODiX's CTP IC into your system,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * Latest Version: 2.2
17 * Author: andrew@goodix.com
18 * Revision Record:
19 * V1.0:
20 * first release. By Andrew, 2012/08/31
21 * V1.2:
22 * add force update,GT9110P pid map. By Andrew, 2012/10/15
23 * V1.4:
24 * 1. add config auto update function;
25 * 2. modify enter_update_mode;
26 * 3. add update file cal checksum.
27 * By Andrew, 2012/12/12
28 * V1.6:
29 * 1. replace guitar_client with i2c_connect_client;
30 * 2. support firmware header array update.
31 * By Meta, 2013/03/11
32 * V2.2:
33 * 1. multi-system supported
34 * 2. flashless update no pid vid compare
35 * By Meta, 2014/01/14
36 */
37 #include <linux/kthread.h>
38 #include "gt9xx.h"
39
40 #include <linux/namei.h>
41 #include <linux/mount.h>
42 #if ((GTP_AUTO_UPDATE && GTP_HEADER_FW_UPDATE) || GTP_COMPATIBLE_MODE)
43 #include "gt9xx_firmware.h"
44 #endif
45
46 #define GUP_REG_HW_INFO 0x4220
47 #define GUP_REG_FW_MSG 0x41E4
48 #define GUP_REG_PID_VID 0x8140
49
50 #define GUP_SEARCH_FILE_TIMES 50
51
52 #define UPDATE_FILE_PATH_1 "/data/_goodix_update_.bin"
53 #define UPDATE_FILE_PATH_2 "/sdcard/_goodix_update_.bin"
54
55 #define CONFIG_FILE_PATH_1 "/data/_goodix_config_.cfg"
56 #define CONFIG_FILE_PATH_2 "/sdcard/_goodix_config_.cfg"
57
58 #define FW_HEAD_LENGTH 14
59 #define FW_SECTION_LENGTH 0x2000 // 8K
60 #define FW_DSP_ISP_LENGTH 0x1000 // 4K
61 #define FW_DSP_LENGTH 0x1000 // 4K
62 #define FW_BOOT_LENGTH 0x800 // 2K
63 #define FW_SS51_LENGTH (4 * FW_SECTION_LENGTH) // 32K
64 #define FW_BOOT_ISP_LENGTH 0x800 // 2k
65 #define FW_GLINK_LENGTH 0x3000 // 12k
66 #define FW_GWAKE_LENGTH (4 * FW_SECTION_LENGTH) // 32k
67
68 #define PACK_SIZE 256
69 #define MAX_FRAME_CHECK_TIME 5
70
71
72 #define _bRW_MISCTL__SRAM_BANK 0x4048
73 #define _bRW_MISCTL__MEM_CD_EN 0x4049
74 #define _bRW_MISCTL__CACHE_EN 0x404B
75 #define _bRW_MISCTL__TMR0_EN 0x40B0
76 #define _rRW_MISCTL__SWRST_B0_ 0x4180
77 #define _bWO_MISCTL__CPU_SWRST_PULSE 0x4184
78 #define _rRW_MISCTL__BOOTCTL_B0_ 0x4190
79 #define _rRW_MISCTL__BOOT_OPT_B0_ 0x4218
80 #define _rRW_MISCTL__BOOT_CTL_ 0x5094
81
82 #define AUTO_SEARCH_BIN 0x01
83 #define AUTO_SEARCH_CFG 0x02
84 #define BIN_FILE_READY 0x80
85 #define CFG_FILE_READY 0x08
86 #define HEADER_FW_READY 0x00
87
88 #pragma pack(1)
89 typedef struct
90 {
91 u8 hw_info[4]; //hardware info//
92 u8 pid[8]; //product id //
93 u16 vid; //version id //
94 }st_fw_head;
95 #pragma pack()
96
97 typedef struct
98 {
99 u8 force_update;
100 u8 fw_flag;
101 struct file *file;
102 struct file *cfg_file;
103 st_fw_head ic_fw_msg;
104 mm_segment_t old_fs;
105 u32 fw_total_len;
106 u32 fw_burned_len;
107 }st_update_msg;
108
109 st_update_msg update_msg;
110 u16 show_len;
111 u16 total_len;
112 u8 got_file_flag = 0;
113 u8 searching_file = 0;
114
115 extern u8 config[GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH];
116 extern void gtp_reset_guitar(struct i2c_client *client, s32 ms);
117 extern s32 gtp_send_cfg(struct i2c_client *client);
118 extern s32 gtp_read_version(struct i2c_client *, u16* );
119 extern struct i2c_client * i2c_connect_client;
120 extern void gtp_irq_enable(struct goodix_ts_data *ts);
121 extern void gtp_irq_disable(struct goodix_ts_data *ts);
122 extern s32 gtp_i2c_read_dbl_check(struct i2c_client *, u16, u8 *, int);
123 static u8 gup_burn_fw_gwake_section(struct i2c_client *client, u8 *fw_section, u16 start_addr, u32 len, u8 bank_cmd );
124
125 #define _CLOSE_FILE(p_file) if (p_file && !IS_ERR(p_file)) \
126 { \
127 filp_close(p_file, NULL); \
128 }
129
130 #if GTP_ESD_PROTECT
131 extern void gtp_esd_switch(struct i2c_client *, s32);
132 #endif
133
134 #if GTP_COMPATIBLE_MODE
135 s32 gup_fw_download_proc(void *dir, u8 dwn_mode);
136 #endif
137 /*******************************************************
138 Function:
139 Read data from the i2c slave device.
140 Input:
141 client: i2c device.
142 buf[0~1]: read start address.
143 buf[2~len-1]: read data buffer.
144 len: GTP_ADDR_LENGTH + read bytes count
145 Output:
146 numbers of i2c_msgs to transfer:
147 2: succeed, otherwise: failed
148 *********************************************************/
gup_i2c_read(struct i2c_client * client,u8 * buf,s32 len)149 s32 gup_i2c_read(struct i2c_client *client, u8 *buf, s32 len)
150 {
151 struct i2c_msg msgs[2];
152 s32 ret=-1;
153 s32 retries = 0;
154
155 GTP_DEBUG_FUNC();
156
157 msgs[0].flags = !I2C_M_RD;
158 msgs[0].addr = client->addr;
159 msgs[0].len = GTP_ADDR_LENGTH;
160 msgs[0].buf = &buf[0];
161 #ifdef CONFIG_I2C_ROCKCHIP_COMPAT
162 msgs[0].scl_rate=200 * 1000;
163 //msgs[0].scl_rate = 300 * 1000; // for Rockchip, etc
164 #endif
165 msgs[1].flags = I2C_M_RD;
166 msgs[1].addr = client->addr;
167 msgs[1].len = len - GTP_ADDR_LENGTH;
168 msgs[1].buf = &buf[GTP_ADDR_LENGTH];
169 #ifdef CONFIG_I2C_ROCKCHIP_COMPAT
170 msgs[1].scl_rate=200 * 1000;
171 //msgs[1].scl_rate = 300 * 1000; // for Rockchip, etc.
172 #endif
173 while(retries < 5)
174 {
175 ret = i2c_transfer(client->adapter, msgs, 2);
176 if(ret == 2)break;
177 retries++;
178 }
179
180 return ret;
181 }
182
183 /*******************************************************
184 Function:
185 Write data to the i2c slave device.
186 Input:
187 client: i2c device.
188 buf[0~1]: write start address.
189 buf[2~len-1]: data buffer
190 len: GTP_ADDR_LENGTH + write bytes count
191 Output:
192 numbers of i2c_msgs to transfer:
193 1: succeed, otherwise: failed
194 *********************************************************/
gup_i2c_write(struct i2c_client * client,u8 * buf,s32 len)195 s32 gup_i2c_write(struct i2c_client *client,u8 *buf,s32 len)
196 {
197 struct i2c_msg msg;
198 s32 ret=-1;
199 s32 retries = 0;
200
201 GTP_DEBUG_FUNC();
202
203 msg.flags = !I2C_M_RD;
204 msg.addr = client->addr;
205 msg.len = len;
206 msg.buf = buf;
207 #ifdef CONFIG_I2C_ROCKCHIP_COMPAT
208 msg.scl_rate=200 * 1000;
209 //msg.scl_rate = 300 * 1000; // for Rockchip, etc
210 #endif
211 while(retries < 5)
212 {
213 ret = i2c_transfer(client->adapter, &msg, 1);
214 if (ret == 1)break;
215 retries++;
216 }
217
218 return ret;
219 }
220
gup_init_panel(struct goodix_ts_data * ts)221 static s32 gup_init_panel(struct goodix_ts_data *ts)
222 {
223 s32 ret = 0;
224 s32 i = 0;
225 u8 check_sum = 0;
226 u8 opr_buf[16];
227 u8 sensor_id = 0;
228 u16 version = 0;
229
230 u8 cfg_info_group1[] = CTP_CFG_GROUP1;
231 u8 cfg_info_group2[] = CTP_CFG_GROUP2;
232 u8 cfg_info_group3[] = CTP_CFG_GROUP3;
233 u8 cfg_info_group4[] = CTP_CFG_GROUP4;
234 u8 cfg_info_group5[] = CTP_CFG_GROUP5;
235 u8 cfg_info_group6[] = CTP_CFG_GROUP6;
236 u8 *send_cfg_buf[] = {cfg_info_group1, cfg_info_group2, cfg_info_group3,
237 cfg_info_group4, cfg_info_group5, cfg_info_group6};
238 u8 cfg_info_len[] = { CFG_GROUP_LEN(cfg_info_group1),
239 CFG_GROUP_LEN(cfg_info_group2),
240 CFG_GROUP_LEN(cfg_info_group3),
241 CFG_GROUP_LEN(cfg_info_group4),
242 CFG_GROUP_LEN(cfg_info_group5),
243 CFG_GROUP_LEN(cfg_info_group6)};
244
245 if ((!cfg_info_len[1]) && (!cfg_info_len[2]) &&
246 (!cfg_info_len[3]) && (!cfg_info_len[4]) &&
247 (!cfg_info_len[5]))
248 {
249 sensor_id = 0;
250 }
251 else
252 {
253 ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_SENSOR_ID, &sensor_id, 1);
254 if (SUCCESS == ret)
255 {
256 if (sensor_id >= 0x06)
257 {
258 GTP_ERROR("Invalid sensor_id(0x%02X), No Config Sent!", sensor_id);
259 return -1;
260 }
261 }
262 else
263 {
264 GTP_ERROR("Failed to get sensor_id, No config sent!");
265 return -1;
266 }
267 }
268
269 GTP_DEBUG("Sensor_ID: %d", sensor_id);
270
271 ts->gtp_cfg_len = cfg_info_len[sensor_id];
272
273 if (ts->gtp_cfg_len < GTP_CONFIG_MIN_LENGTH)
274 {
275 GTP_ERROR("Sensor_ID(%d) matches with NULL or INVALID CONFIG GROUP! NO Config Sent! You need to check you header file CFG_GROUP section!", sensor_id);
276 return -1;
277 }
278
279 ret = gtp_i2c_read_dbl_check(ts->client, GTP_REG_CONFIG_DATA, &opr_buf[0], 1);
280
281 if (ret == SUCCESS)
282 {
283 GTP_DEBUG("CFG_GROUP%d Config Version: %d, IC Config Version: %d", sensor_id+1,
284 send_cfg_buf[sensor_id][0], opr_buf[0]);
285
286 send_cfg_buf[sensor_id][0] = opr_buf[0];
287 ts->fixed_cfg = 0;
288 }
289 else
290 {
291 GTP_ERROR("Failed to get ic config version!No config sent!");
292 return -1;
293 }
294
295 memset(&config[GTP_ADDR_LENGTH], 0, GTP_CONFIG_MAX_LENGTH);
296 memcpy(&config[GTP_ADDR_LENGTH], send_cfg_buf[sensor_id], ts->gtp_cfg_len);
297
298 GTP_DEBUG("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x",
299 ts->abs_x_max, ts->abs_y_max, ts->int_trigger_type);
300
301 config[RESOLUTION_LOC] = (u8)GTP_MAX_WIDTH;
302 config[RESOLUTION_LOC + 1] = (u8)(GTP_MAX_WIDTH>>8);
303 config[RESOLUTION_LOC + 2] = (u8)GTP_MAX_HEIGHT;
304 config[RESOLUTION_LOC + 3] = (u8)(GTP_MAX_HEIGHT>>8);
305
306 if (GTP_INT_TRIGGER == 0) //RISING
307 {
308 config[TRIGGER_LOC] &= 0xfe;
309 }
310 else if (GTP_INT_TRIGGER == 1) //FALLING
311 {
312 config[TRIGGER_LOC] |= 0x01;
313 }
314
315 check_sum = 0;
316 for (i = GTP_ADDR_LENGTH; i < ts->gtp_cfg_len; i++)
317 {
318 check_sum += config[i];
319 }
320 config[ts->gtp_cfg_len] = (~check_sum) + 1;
321
322 GTP_DEBUG_FUNC();
323 ret = gtp_send_cfg(ts->client);
324 if (ret < 0)
325 {
326 GTP_ERROR("Send config error.");
327 }
328 gtp_read_version(ts->client, &version);
329 msleep(10);
330 return 0;
331 }
332
333
gup_get_ic_msg(struct i2c_client * client,u16 addr,u8 * msg,s32 len)334 static u8 gup_get_ic_msg(struct i2c_client *client, u16 addr, u8* msg, s32 len)
335 {
336 s32 i = 0;
337
338 msg[0] = (addr >> 8) & 0xff;
339 msg[1] = addr & 0xff;
340
341 for (i = 0; i < 5; i++)
342 {
343 if (gup_i2c_read(client, msg, GTP_ADDR_LENGTH + len) > 0)
344 {
345 break;
346 }
347 }
348
349 if (i >= 5)
350 {
351 GTP_ERROR("Read data from 0x%02x%02x failed!", msg[0], msg[1]);
352 return FAIL;
353 }
354
355 return SUCCESS;
356 }
357
gup_set_ic_msg(struct i2c_client * client,u16 addr,u8 val)358 static u8 gup_set_ic_msg(struct i2c_client *client, u16 addr, u8 val)
359 {
360 s32 i = 0;
361 u8 msg[3];
362
363 msg[0] = (addr >> 8) & 0xff;
364 msg[1] = addr & 0xff;
365 msg[2] = val;
366
367 for (i = 0; i < 5; i++)
368 {
369 if (gup_i2c_write(client, msg, GTP_ADDR_LENGTH + 1) > 0)
370 {
371 break;
372 }
373 }
374
375 if (i >= 5)
376 {
377 GTP_ERROR("Set data to 0x%02x%02x failed!", msg[0], msg[1]);
378 return FAIL;
379 }
380
381 return SUCCESS;
382 }
383
gup_get_ic_fw_msg(struct i2c_client * client)384 static u8 gup_get_ic_fw_msg(struct i2c_client *client)
385 {
386 s32 ret = -1;
387 u8 retry = 0;
388 u8 buf[16];
389 u8 i;
390
391 // step1:get hardware info
392 ret = gtp_i2c_read_dbl_check(client, GUP_REG_HW_INFO, &buf[GTP_ADDR_LENGTH], 4);
393 if (FAIL == ret)
394 {
395 GTP_ERROR("[get_ic_fw_msg]get hw_info failed,exit");
396 return FAIL;
397 }
398
399 // buf[2~5]: 00 06 90 00
400 // hw_info: 00 90 06 00
401 for(i=0; i<4; i++)
402 {
403 update_msg.ic_fw_msg.hw_info[i] = buf[GTP_ADDR_LENGTH + 3 - i];
404 }
405 GTP_DEBUG("IC Hardware info:%02x%02x%02x%02x", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1],
406 update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]);
407 // step2:get firmware message
408 for(retry=0; retry<2; retry++)
409 {
410 ret = gup_get_ic_msg(client, GUP_REG_FW_MSG, buf, 1);
411 if(FAIL == ret)
412 {
413 GTP_ERROR("Read firmware message fail.");
414 return ret;
415 }
416
417 update_msg.force_update = buf[GTP_ADDR_LENGTH];
418 if((0xBE != update_msg.force_update)&&(!retry))
419 {
420 GTP_INFO("The check sum in ic is error.");
421 GTP_INFO("The IC will be updated by force.");
422 continue;
423 }
424 break;
425 }
426 GTP_DEBUG("IC force update flag:0x%x", update_msg.force_update);
427
428 // step3:get pid & vid
429 ret = gtp_i2c_read_dbl_check(client, GUP_REG_PID_VID, &buf[GTP_ADDR_LENGTH], 6);
430 if (FAIL == ret)
431 {
432 GTP_ERROR("[get_ic_fw_msg]get pid & vid failed,exit");
433 return FAIL;
434 }
435
436 memset(update_msg.ic_fw_msg.pid, 0, sizeof(update_msg.ic_fw_msg.pid));
437 memcpy(update_msg.ic_fw_msg.pid, &buf[GTP_ADDR_LENGTH], 4);
438 GTP_DEBUG("IC Product id:%s", update_msg.ic_fw_msg.pid);
439
440 //GT9XX PID MAPPING
441 /*|-----FLASH-----RAM-----|
442 |------918------918-----|
443 |------968------968-----|
444 |------913------913-----|
445 |------913P-----913P----|
446 |------927------927-----|
447 |------927P-----927P----|
448 |------9110-----9110----|
449 |------9110P----9111----|*/
450 if(update_msg.ic_fw_msg.pid[0] != 0)
451 {
452 if(!memcmp(update_msg.ic_fw_msg.pid, "9111", 4))
453 {
454 GTP_DEBUG("IC Mapping Product id:%s", update_msg.ic_fw_msg.pid);
455 memcpy(update_msg.ic_fw_msg.pid, "9110P", 5);
456 }
457 }
458
459 update_msg.ic_fw_msg.vid = buf[GTP_ADDR_LENGTH+4] + (buf[GTP_ADDR_LENGTH+5]<<8);
460 GTP_DEBUG("IC version id:%04x", update_msg.ic_fw_msg.vid);
461
462 return SUCCESS;
463 }
464
gup_enter_update_mode(struct i2c_client * client)465 s32 gup_enter_update_mode(struct i2c_client *client)
466 {
467 s32 ret = -1;
468 s32 retry = 0;
469 u8 rd_buf[3];
470 struct goodix_ts_data *ts = i2c_get_clientdata(client);
471
472 //step1:RST output low last at least 2ms
473 GTP_GPIO_OUTPUT(ts->rst_pin, 0);
474 msleep(2);
475
476 //step2:select I2C slave addr,INT:0--0xBA;1--0x28.
477 GTP_GPIO_OUTPUT(ts->irq_pin, (client->addr == 0x14));
478 msleep(2);
479
480 //step3:RST output high reset guitar
481 GTP_GPIO_OUTPUT(ts->rst_pin, 1);
482
483 //20121211 modify start
484 msleep(5);
485 while(retry++ < 200)
486 {
487 //step4:Hold ss51 & dsp
488 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
489 if(ret <= 0)
490 {
491 GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
492 continue;
493 }
494
495 //step5:Confirm hold
496 ret = gup_get_ic_msg(client, _rRW_MISCTL__SWRST_B0_, rd_buf, 1);
497 if(ret <= 0)
498 {
499 GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
500 continue;
501 }
502 if(0x0C == rd_buf[GTP_ADDR_LENGTH])
503 {
504 GTP_DEBUG("Hold ss51 & dsp confirm SUCCESS");
505 break;
506 }
507 GTP_DEBUG("Hold ss51 & dsp confirm 0x4180 failed,value:%d", rd_buf[GTP_ADDR_LENGTH]);
508 }
509 if(retry >= 200)
510 {
511 GTP_ERROR("Enter update Hold ss51 failed.");
512 return FAIL;
513 }
514
515 //step6:DSP_CK and DSP_ALU_CK PowerOn
516 ret = gup_set_ic_msg(client, 0x4010, 0x00);
517
518 //20121211 modify end
519 return ret;
520 }
521
gup_leave_update_mode(struct goodix_ts_data * ts)522 void gup_leave_update_mode(struct goodix_ts_data *ts)
523 {
524 gpio_direction_input(ts->irq_pin);
525 //s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE);
526 //s3c_gpio_cfgpin(pin, GTP_INT_CFG);
527
528 GTP_DEBUG("[leave_update_mode]reset chip.");
529 gtp_reset_guitar(i2c_connect_client, 20);
530 }
531
532 // Get the correct nvram data
533 // The correct conditions:
534 // 1. the hardware info is the same
535 // 2. the product id is the same
536 // 3. the firmware version in update file is greater than the firmware version in ic
537 // or the check sum in ic is wrong
538 /* Update Conditions:
539 1. Same hardware info
540 2. Same PID
541 3. File VID > IC VID
542 Force Update Conditions:
543 1. Wrong ic firmware checksum
544 2. INVALID IC PID or VID
545 3. (IC PID == 91XX || File PID == 91XX) && (File VID > IC VID)
546 */
547
gup_enter_update_judge(st_fw_head * fw_head)548 static u8 gup_enter_update_judge(st_fw_head *fw_head)
549 {
550 u16 u16_tmp;
551 s32 i = 0;
552 u32 fw_len = 0;
553 s32 pid_cmp_len = 0;
554 u16_tmp = fw_head->vid;
555 fw_head->vid = (u16)(u16_tmp>>8) + (u16)(u16_tmp<<8);
556
557 GTP_INFO("FILE HARDWARE INFO:%02x%02x%02x%02x", fw_head->hw_info[0], fw_head->hw_info[1], fw_head->hw_info[2], fw_head->hw_info[3]);
558 GTP_INFO("FILE PID:%s", fw_head->pid);
559 GTP_INFO("FILE VID:%04x", fw_head->vid);
560 GTP_INFO("IC HARDWARE INFO:%02x%02x%02x%02x", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1],
561 update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]);
562 GTP_INFO("IC PID:%s", update_msg.ic_fw_msg.pid);
563 GTP_INFO("IC VID:%04x", update_msg.ic_fw_msg.vid);
564
565 if (!memcmp(fw_head->pid, "9158", 4) && !memcmp(update_msg.ic_fw_msg.pid, "915S", 4))
566 {
567 GTP_INFO("Update GT915S to GT9158 directly!");
568 return SUCCESS;
569 }
570 //First two conditions
571 if (!memcmp(fw_head->hw_info, update_msg.ic_fw_msg.hw_info, sizeof(update_msg.ic_fw_msg.hw_info)))
572 {
573 fw_len = 42 * 1024;
574 }
575 else
576 {
577 fw_len = fw_head->hw_info[3];
578 fw_len += (((u32)fw_head->hw_info[2]) << 8);
579 fw_len += (((u32)fw_head->hw_info[1]) << 16);
580 fw_len += (((u32)fw_head->hw_info[0]) << 24);
581 }
582 if (update_msg.fw_total_len != fw_len)
583 {
584 GTP_ERROR("Inconsistent firmware size, Update aborted! Default size: %d(%dK), actual size: %d(%dK)", fw_len, fw_len/1024, update_msg.fw_total_len, update_msg.fw_total_len/1024);
585 return FAIL;
586 }
587 GTP_INFO("Firmware length:%d(%dK)", update_msg.fw_total_len, update_msg.fw_total_len/1024);
588
589 if (update_msg.force_update != 0xBE)
590 {
591 GTP_INFO("FW chksum error,need enter update.");
592 return SUCCESS;
593 }
594
595 // 20130523 start
596 if (strlen(update_msg.ic_fw_msg.pid) < 3)
597 {
598 GTP_INFO("Illegal IC pid, need enter update");
599 return SUCCESS;
600 }
601 else
602 {
603 for (i = 0; i < 3; i++)
604 {
605 if ((update_msg.ic_fw_msg.pid[i] < 0x30) || (update_msg.ic_fw_msg.pid[i] > 0x39))
606 {
607 GTP_INFO("Illegal IC pid, out of bound, need enter update");
608 return SUCCESS;
609 }
610 }
611 }
612 // 20130523 end
613
614 pid_cmp_len = strlen(fw_head->pid);
615 if (pid_cmp_len < strlen(update_msg.ic_fw_msg.pid))
616 {
617 pid_cmp_len = strlen(update_msg.ic_fw_msg.pid);
618 }
619
620 if ((!memcmp(fw_head->pid, update_msg.ic_fw_msg.pid, pid_cmp_len)) ||
621 (!memcmp(update_msg.ic_fw_msg.pid, "91XX", 4))||
622 (!memcmp(fw_head->pid, "91XX", 4)))
623 {
624 if(!memcmp(fw_head->pid, "91XX", 4))
625 {
626 GTP_DEBUG("Force none same pid update mode.");
627 }
628 else
629 {
630 GTP_DEBUG("Get the same pid.");
631 }
632
633 //The third condition
634 if (fw_head->vid > update_msg.ic_fw_msg.vid)
635 {
636 GTP_INFO("Need enter update.");
637 return SUCCESS;
638 }
639 GTP_ERROR("Don't meet the third condition.");
640 GTP_ERROR("File VID <= Ic VID, update aborted!");
641 }
642 else
643 {
644 GTP_ERROR("File PID != Ic PID, update aborted!");
645 }
646
647 return FAIL;
648 }
649
650
651
652 #if GTP_AUTO_UPDATE_CFG
ascii2hex(u8 a)653 static u8 ascii2hex(u8 a)
654 {
655 s8 value = 0;
656
657 if(a >= '0' && a <= '9')
658 {
659 value = a - '0';
660 }
661 else if(a >= 'A' && a <= 'F')
662 {
663 value = a - 'A' + 0x0A;
664 }
665 else if(a >= 'a' && a <= 'f')
666 {
667 value = a - 'a' + 0x0A;
668 }
669 else
670 {
671 value = 0xff;
672 }
673
674 return value;
675 }
676
gup_update_config(struct i2c_client * client)677 static s8 gup_update_config(struct i2c_client *client)
678 {
679 s32 file_len = 0;
680 s32 ret = 0;
681 s32 i = 0;
682 s32 file_cfg_len = 0;
683 s32 chip_cfg_len = 0;
684 s32 count = 0;
685 u8 *buf;
686 u8 *pre_buf;
687 u8 *file_config;
688 //u8 checksum = 0;
689 struct goodix_ts_data *ts = i2c_get_clientdata(client);
690
691 if(NULL == update_msg.cfg_file)
692 {
693 GTP_ERROR("[update_cfg]No need to upgrade config!");
694 return FAIL;
695 }
696 file_len = update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_END);
697
698 chip_cfg_len = ts->gtp_cfg_len;
699
700 GTP_DEBUG("[update_cfg]config file len:%d", file_len);
701 GTP_DEBUG("[update_cfg]need config len:%d", chip_cfg_len);
702 if((file_len+5) < chip_cfg_len*5)
703 {
704 GTP_ERROR("Config length error");
705 return -1;
706 }
707
708 buf = kzalloc(file_len, GFP_KERNEL);
709 pre_buf = kzalloc(file_len, GFP_KERNEL);
710 file_config = kzalloc(chip_cfg_len + GTP_ADDR_LENGTH, GFP_KERNEL);
711 update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_SET);
712
713 GTP_DEBUG("[update_cfg]Read config from file.");
714 ret = update_msg.cfg_file->f_op->read(update_msg.cfg_file, (char*)pre_buf, file_len, &update_msg.cfg_file->f_pos);
715 if(ret<0)
716 {
717 GTP_ERROR("[update_cfg]Read config file failed.");
718 goto update_cfg_file_failed;
719 }
720
721 GTP_DEBUG("[update_cfg]Delete illgal charactor.");
722 for(i=0,count=0; i<file_len; i++)
723 {
724 if (pre_buf[i] == ' ' || pre_buf[i] == '\r' || pre_buf[i] == '\n')
725 {
726 continue;
727 }
728 buf[count++] = pre_buf[i];
729 }
730
731 GTP_DEBUG("[update_cfg]Ascii to hex.");
732 file_config[0] = GTP_REG_CONFIG_DATA >> 8;
733 file_config[1] = GTP_REG_CONFIG_DATA & 0xff;
734 for(i=0,file_cfg_len=GTP_ADDR_LENGTH; i<count; i+=5)
735 {
736 if((buf[i]=='0') && ((buf[i+1]=='x') || (buf[i+1]=='X')))
737 {
738 u8 high,low;
739 high = ascii2hex(buf[i+2]);
740 low = ascii2hex(buf[i+3]);
741
742 if((high == 0xFF) || (low == 0xFF))
743 {
744 ret = 0;
745 GTP_ERROR("[update_cfg]Illegal config file.");
746 goto update_cfg_file_failed;
747 }
748 file_config[file_cfg_len++] = (high<<4) + low;
749 }
750 else
751 {
752 ret = 0;
753 GTP_ERROR("[update_cfg]Illegal config file.");
754 goto update_cfg_file_failed;
755 }
756 }
757
758
759 GTP_DEBUG("config:");
760 GTP_DEBUG_ARRAY(file_config+2, file_cfg_len);
761
762 i = 0;
763 while(i++ < 5)
764 {
765 ret = gup_i2c_write(client, file_config, file_cfg_len);
766 if(ret > 0)
767 {
768 GTP_INFO("[update_cfg]Send config SUCCESS.");
769 break;
770 }
771 GTP_ERROR("[update_cfg]Send config i2c error.");
772 }
773
774 update_cfg_file_failed:
775 kfree(pre_buf);
776 kfree(buf);
777 kfree(file_config);
778 return ret;
779 }
780
781 #endif
782
783 #if (GTP_AUTO_UPDATE && (!GTP_HEADER_FW_UPDATE || GTP_AUTO_UPDATE_CFG))
gup_search_file(s32 search_type)784 static void gup_search_file(s32 search_type)
785 {
786 s32 i = 0;
787 struct file *pfile = NULL;
788
789 got_file_flag = 0x00;
790
791 searching_file = 1;
792 for (i = 0; i < GUP_SEARCH_FILE_TIMES; ++i)
793 {
794 if (0 == searching_file)
795 {
796 GTP_INFO("Force exiting file searching");
797 got_file_flag = 0x00;
798 return;
799 }
800
801 if (search_type & AUTO_SEARCH_BIN)
802 {
803 GTP_DEBUG("Search for %s, %s for fw update.(%d/%d)", UPDATE_FILE_PATH_1, UPDATE_FILE_PATH_2, i+1, GUP_SEARCH_FILE_TIMES);
804 pfile = filp_open(UPDATE_FILE_PATH_1, O_RDONLY, 0);
805 if (IS_ERR(pfile))
806 {
807 pfile = filp_open(UPDATE_FILE_PATH_2, O_RDONLY, 0);
808 if (!IS_ERR(pfile))
809 {
810 GTP_INFO("Bin file: %s for fw update.", UPDATE_FILE_PATH_2);
811 got_file_flag |= BIN_FILE_READY;
812 update_msg.file = pfile;
813 }
814 }
815 else
816 {
817 GTP_INFO("Bin file: %s for fw update.", UPDATE_FILE_PATH_1);
818 got_file_flag |= BIN_FILE_READY;
819 update_msg.file = pfile;
820 }
821 if (got_file_flag & BIN_FILE_READY)
822 {
823 #if GTP_AUTO_UPDATE_CFG
824 if (search_type & AUTO_SEARCH_CFG)
825 {
826 i = GUP_SEARCH_FILE_TIMES; // Bin & Cfg File required to be in the same directory
827 }
828 else
829 #endif
830 {
831 searching_file = 0;
832 return;
833 }
834 }
835 }
836
837 #if GTP_AUTO_UPDATE_CFG
838 if ( (search_type & AUTO_SEARCH_CFG) && !(got_file_flag & CFG_FILE_READY) )
839 {
840 GTP_DEBUG("Search for %s, %s for config update.(%d/%d)", CONFIG_FILE_PATH_1, CONFIG_FILE_PATH_2, i+1, GUP_SEARCH_FILE_TIMES);
841 pfile = filp_open(CONFIG_FILE_PATH_1, O_RDONLY, 0);
842 if (IS_ERR(pfile))
843 {
844 pfile = filp_open(CONFIG_FILE_PATH_2, O_RDONLY, 0);
845 if (!IS_ERR(pfile))
846 {
847 GTP_INFO("Cfg file: %s for config update.", CONFIG_FILE_PATH_2);
848 got_file_flag |= CFG_FILE_READY;
849 update_msg.cfg_file = pfile;
850 }
851 }
852 else
853 {
854 GTP_INFO("Cfg file: %s for config update.", CONFIG_FILE_PATH_1);
855 got_file_flag |= CFG_FILE_READY;
856 update_msg.cfg_file = pfile;
857 }
858 if (got_file_flag & CFG_FILE_READY)
859 {
860 searching_file = 0;
861 return;
862 }
863 }
864 #endif
865 msleep(3000);
866 }
867 searching_file = 0;
868 }
869 #endif
870
871
gup_check_update_file(struct i2c_client * client,st_fw_head * fw_head,u8 * path)872 static u8 gup_check_update_file(struct i2c_client *client, st_fw_head* fw_head, u8* path)
873 {
874 s32 ret = 0;
875 s32 i = 0;
876 s32 fw_checksum = 0;
877 u8 buf[FW_HEAD_LENGTH];
878
879 got_file_flag = 0x00;
880 if (path)
881 {
882 GTP_DEBUG("Update File path:%s, %zu", path, strlen(path));
883 update_msg.file = filp_open(path, O_RDONLY, 0);
884
885 if (IS_ERR(update_msg.file))
886 {
887 GTP_ERROR("Open update file(%s) error!", path);
888 return FAIL;
889 }
890 got_file_flag = BIN_FILE_READY;
891 }
892 else
893 {
894 #if GTP_AUTO_UPDATE
895 #if GTP_HEADER_FW_UPDATE
896 GTP_INFO("Update by default firmware array");
897 update_msg.fw_total_len = sizeof(gtp_default_FW) - FW_HEAD_LENGTH;
898 if (sizeof(gtp_default_FW) < (FW_HEAD_LENGTH+FW_SECTION_LENGTH*4+FW_DSP_ISP_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH))
899 {
900 printk(" <<-GTP-ERROR->> haha INVALID gtp_default_FW, check your gt9xx_firmware.h file! sizeof(gtp_default_FW)=%d\n", sizeof(gtp_default_FW));
901 return FAIL;
902 }
903 GTP_DEBUG("Firmware actual size: %d(%dK)", update_msg.fw_total_len, update_msg.fw_total_len/1024);
904 memcpy(fw_head, >p_default_FW[0], FW_HEAD_LENGTH);
905
906 //check firmware legality
907 fw_checksum = 0;
908 for(i=0; i< update_msg.fw_total_len; i+=2)
909 {
910 fw_checksum += (gtp_default_FW[FW_HEAD_LENGTH + i] << 8) + gtp_default_FW[FW_HEAD_LENGTH + i + 1];
911 }
912
913 GTP_DEBUG("firmware checksum:%x", fw_checksum&0xFFFF);
914 if (fw_checksum&0xFFFF)
915 {
916 GTP_ERROR("Illegal firmware file.");
917 return FAIL;
918 }
919 got_file_flag = HEADER_FW_READY;
920 return SUCCESS;
921 #else
922
923 #if GTP_AUTO_UPDATE_CFG
924 gup_search_file(AUTO_SEARCH_BIN | AUTO_SEARCH_CFG);
925 if (got_file_flag & CFG_FILE_READY)
926 {
927 ret = gup_update_config(i2c_connect_client);
928 if(ret <= 0)
929 {
930 GTP_ERROR("Update config failed.");
931 }
932 _CLOSE_FILE(update_msg.cfg_file);
933 msleep(500); //waiting config to be stored in FLASH.
934 }
935 #else
936 gup_search_file(AUTO_SEARCH_BIN);
937 #endif
938
939 if ( !(got_file_flag & BIN_FILE_READY) )
940 {
941 GTP_ERROR("No bin file for fw update");
942 return FAIL;
943 }
944 #endif
945
946 #else
947 {
948 GTP_ERROR("NULL file for firmware update");
949 return FAIL;
950 }
951 #endif
952 }
953
954 update_msg.old_fs = get_fs();
955 set_fs(KERNEL_DS);
956
957 update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
958 update_msg.fw_total_len = update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_END);
959 if (update_msg.fw_total_len < (FW_HEAD_LENGTH + FW_SECTION_LENGTH*4+FW_DSP_ISP_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH))
960 {
961 GTP_ERROR("INVALID bin file(size: %d), update aborted.", update_msg.fw_total_len);
962 return FAIL;
963 }
964
965 update_msg.fw_total_len -= FW_HEAD_LENGTH;
966
967 GTP_DEBUG("Bin firmware actual size: %d(%dK)", update_msg.fw_total_len, update_msg.fw_total_len/1024);
968
969 update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
970 ret = update_msg.file->f_op->read(update_msg.file, (char*)buf, FW_HEAD_LENGTH, &update_msg.file->f_pos);
971 if (ret < 0)
972 {
973 GTP_ERROR("Read firmware head in update file error.");
974 return FAIL;
975 }
976
977 memcpy(fw_head, buf, FW_HEAD_LENGTH);
978
979 //check firmware legality
980 fw_checksum = 0;
981 for(i=0; i<update_msg.fw_total_len; i+=2)
982 {
983 u16 temp;
984 ret = update_msg.file->f_op->read(update_msg.file, (char*)buf, 2, &update_msg.file->f_pos);
985 if (ret < 0)
986 {
987 GTP_ERROR("Read firmware file error.");
988 return FAIL;
989 }
990 //GTP_DEBUG("BUF[0]:%x", buf[0]);
991 temp = (buf[0]<<8) + buf[1];
992 fw_checksum += temp;
993 }
994
995 GTP_DEBUG("firmware checksum:%x", fw_checksum&0xFFFF);
996 if(fw_checksum&0xFFFF)
997 {
998 GTP_ERROR("Illegal firmware file.");
999 return FAIL;
1000 }
1001
1002 return SUCCESS;
1003 }
1004
gup_burn_proc(struct i2c_client * client,u8 * burn_buf,u16 start_addr,u16 total_length)1005 static u8 gup_burn_proc(struct i2c_client *client, u8 *burn_buf, u16 start_addr, u16 total_length)
1006 {
1007 s32 ret = 0;
1008 u16 burn_addr = start_addr;
1009 u16 frame_length = 0;
1010 u16 burn_length = 0;
1011 u8 wr_buf[PACK_SIZE + GTP_ADDR_LENGTH];
1012 u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH];
1013 u8 retry = 0;
1014
1015 GTP_DEBUG("Begin burn %dk data to addr 0x%x", (total_length/1024), start_addr);
1016 while(burn_length < total_length)
1017 {
1018 GTP_DEBUG("B/T:%04d/%04d", burn_length, total_length);
1019 frame_length = ((total_length - burn_length) > PACK_SIZE) ? PACK_SIZE : (total_length - burn_length);
1020 wr_buf[0] = (u8)(burn_addr>>8);
1021 rd_buf[0] = wr_buf[0];
1022 wr_buf[1] = (u8)burn_addr;
1023 rd_buf[1] = wr_buf[1];
1024 memcpy(&wr_buf[GTP_ADDR_LENGTH], &burn_buf[burn_length], frame_length);
1025
1026 for(retry = 0; retry < MAX_FRAME_CHECK_TIME; retry++)
1027 {
1028 ret = gup_i2c_write(client, wr_buf, GTP_ADDR_LENGTH + frame_length);
1029 if(ret <= 0)
1030 {
1031 GTP_ERROR("Write frame data i2c error.");
1032 continue;
1033 }
1034 ret = gup_i2c_read(client, rd_buf, GTP_ADDR_LENGTH + frame_length);
1035 if(ret <= 0)
1036 {
1037 GTP_ERROR("Read back frame data i2c error.");
1038 continue;
1039 }
1040
1041 if(memcmp(&wr_buf[GTP_ADDR_LENGTH], &rd_buf[GTP_ADDR_LENGTH], frame_length))
1042 {
1043 GTP_ERROR("Check frame data fail,not equal.");
1044 GTP_DEBUG("write array:");
1045 GTP_DEBUG_ARRAY(&wr_buf[GTP_ADDR_LENGTH], frame_length);
1046 GTP_DEBUG("read array:");
1047 GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length);
1048 continue;
1049 }
1050 else
1051 {
1052 //GTP_DEBUG("Check frame data success.");
1053 break;
1054 }
1055 }
1056 if(retry >= MAX_FRAME_CHECK_TIME)
1057 {
1058 GTP_ERROR("Burn frame data time out,exit.");
1059 return FAIL;
1060 }
1061 burn_length += frame_length;
1062 burn_addr += frame_length;
1063 }
1064 return SUCCESS;
1065 }
1066
gup_load_section_file(u8 * buf,u32 offset,u16 length,u8 set_or_end)1067 static u8 gup_load_section_file(u8 *buf, u32 offset, u16 length, u8 set_or_end)
1068 {
1069 #if (GTP_AUTO_UPDATE && GTP_HEADER_FW_UPDATE)
1070 if (got_file_flag == HEADER_FW_READY)
1071 {
1072 if(SEEK_SET == set_or_end)
1073 {
1074 memcpy(buf, >p_default_FW[FW_HEAD_LENGTH + offset], length);
1075 }
1076 else //seek end
1077 {
1078 memcpy(buf, >p_default_FW[update_msg.fw_total_len + FW_HEAD_LENGTH - offset], length);
1079 }
1080 return SUCCESS;
1081 }
1082 #endif
1083 {
1084 s32 ret = 0;
1085
1086 if ( (update_msg.file == NULL) || IS_ERR(update_msg.file))
1087 {
1088 GTP_ERROR("cannot find update file,load section file fail.");
1089 return FAIL;
1090 }
1091
1092 if(SEEK_SET == set_or_end)
1093 {
1094 update_msg.file->f_pos = FW_HEAD_LENGTH + offset;
1095 }
1096 else //seek end
1097 {
1098 update_msg.file->f_pos = update_msg.fw_total_len + FW_HEAD_LENGTH - offset;
1099 }
1100
1101 ret = update_msg.file->f_op->read(update_msg.file, (char *)buf, length, &update_msg.file->f_pos);
1102
1103 if (ret < 0)
1104 {
1105 GTP_ERROR("Read update file fail.");
1106 return FAIL;
1107 }
1108
1109 return SUCCESS;
1110 }
1111 }
1112
gup_recall_check(struct i2c_client * client,u8 * chk_src,u16 start_rd_addr,u16 chk_length)1113 static u8 gup_recall_check(struct i2c_client *client, u8* chk_src, u16 start_rd_addr, u16 chk_length)
1114 {
1115 u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH];
1116 s32 ret = 0;
1117 u16 recall_addr = start_rd_addr;
1118 u16 recall_length = 0;
1119 u16 frame_length = 0;
1120
1121 while(recall_length < chk_length)
1122 {
1123 frame_length = ((chk_length - recall_length) > PACK_SIZE) ? PACK_SIZE : (chk_length - recall_length);
1124 ret = gup_get_ic_msg(client, recall_addr, rd_buf, frame_length);
1125 if(ret <= 0)
1126 {
1127 GTP_ERROR("recall i2c error,exit");
1128 return FAIL;
1129 }
1130
1131 if(memcmp(&rd_buf[GTP_ADDR_LENGTH], &chk_src[recall_length], frame_length))
1132 {
1133 GTP_ERROR("Recall frame data fail,not equal.");
1134 GTP_DEBUG("chk_src array:");
1135 GTP_DEBUG_ARRAY(&chk_src[recall_length], frame_length);
1136 GTP_DEBUG("recall array:");
1137 GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length);
1138 return FAIL;
1139 }
1140
1141 recall_length += frame_length;
1142 recall_addr += frame_length;
1143 }
1144 GTP_DEBUG("Recall check %dk firmware success.", (chk_length/1024));
1145
1146 return SUCCESS;
1147 }
1148
gup_burn_fw_section(struct i2c_client * client,u8 * fw_section,u16 start_addr,u8 bank_cmd)1149 static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, u16 start_addr, u8 bank_cmd )
1150 {
1151 s32 ret = 0;
1152 u8 rd_buf[5];
1153
1154 //step1:hold ss51 & dsp
1155 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1156 if(ret <= 0)
1157 {
1158 GTP_ERROR("[burn_fw_section]hold ss51 & dsp fail.");
1159 return FAIL;
1160 }
1161
1162 //step2:set scramble
1163 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
1164 if(ret <= 0)
1165 {
1166 GTP_ERROR("[burn_fw_section]set scramble fail.");
1167 return FAIL;
1168 }
1169
1170 //step3:select bank
1171 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F);
1172 if(ret <= 0)
1173 {
1174 GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4)&0x0F);
1175 return FAIL;
1176 }
1177
1178 //step4:enable accessing code
1179 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
1180 if(ret <= 0)
1181 {
1182 GTP_ERROR("[burn_fw_section]enable accessing code fail.");
1183 return FAIL;
1184 }
1185
1186 //step5:burn 8k fw section
1187 ret = gup_burn_proc(client, fw_section, start_addr, FW_SECTION_LENGTH);
1188 if(FAIL == ret)
1189 {
1190 GTP_ERROR("[burn_fw_section]burn fw_section fail.");
1191 return FAIL;
1192 }
1193
1194 //step6:hold ss51 & release dsp
1195 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04);
1196 if(ret <= 0)
1197 {
1198 GTP_ERROR("[burn_fw_section]hold ss51 & release dsp fail.");
1199 return FAIL;
1200 }
1201 //must delay
1202 msleep(1);
1203
1204 //step7:send burn cmd to move data to flash from sram
1205 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, bank_cmd&0x0f);
1206 if(ret <= 0)
1207 {
1208 GTP_ERROR("[burn_fw_section]send burn cmd fail.");
1209 return FAIL;
1210 }
1211 GTP_DEBUG("[burn_fw_section]Wait for the burn is complete......");
1212 do{
1213 ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
1214 if(ret <= 0)
1215 {
1216 GTP_ERROR("[burn_fw_section]Get burn state fail");
1217 return FAIL;
1218 }
1219 msleep(10);
1220 //GTP_DEBUG("[burn_fw_section]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
1221 }while(rd_buf[GTP_ADDR_LENGTH]);
1222
1223 //step8:select bank
1224 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F);
1225 if(ret <= 0)
1226 {
1227 GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4)&0x0F);
1228 return FAIL;
1229 }
1230
1231 //step9:enable accessing code
1232 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
1233 if(ret <= 0)
1234 {
1235 GTP_ERROR("[burn_fw_section]enable accessing code fail.");
1236 return FAIL;
1237 }
1238
1239 //step10:recall 8k fw section
1240 ret = gup_recall_check(client, fw_section, start_addr, FW_SECTION_LENGTH);
1241 if(FAIL == ret)
1242 {
1243 GTP_ERROR("[burn_fw_section]recall check %dk firmware fail.", FW_SECTION_LENGTH/1024);
1244 return FAIL;
1245 }
1246
1247 //step11:disable accessing code
1248 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x00);
1249 if(ret <= 0)
1250 {
1251 GTP_ERROR("[burn_fw_section]disable accessing code fail.");
1252 return FAIL;
1253 }
1254
1255 return SUCCESS;
1256 }
1257
gup_burn_dsp_isp(struct i2c_client * client)1258 static u8 gup_burn_dsp_isp(struct i2c_client *client)
1259 {
1260 s32 ret = 0;
1261 u8* fw_dsp_isp = NULL;
1262 u8 retry = 0;
1263
1264 GTP_INFO("[burn_dsp_isp]Begin burn dsp isp---->>");
1265
1266 //step1:alloc memory
1267 GTP_DEBUG("[burn_dsp_isp]step1:alloc memory");
1268 while(retry++ < 5)
1269 {
1270 fw_dsp_isp = kzalloc(FW_DSP_ISP_LENGTH, GFP_KERNEL);
1271 if(fw_dsp_isp == NULL)
1272 {
1273 continue;
1274 }
1275 else
1276 {
1277 GTP_INFO("[burn_dsp_isp]Alloc %dk byte memory success.", (FW_DSP_ISP_LENGTH/1024));
1278 break;
1279 }
1280 }
1281 if(retry >= 5)
1282 {
1283 GTP_ERROR("[burn_dsp_isp]Alloc memory fail,exit.");
1284 ret = FAIL;
1285 goto exit_burn_dsp_isp;
1286 }
1287
1288 //step2:load dsp isp file data
1289 GTP_DEBUG("[burn_dsp_isp]step2:load dsp isp file data");
1290 ret = gup_load_section_file(fw_dsp_isp, FW_DSP_ISP_LENGTH, FW_DSP_ISP_LENGTH, SEEK_END);
1291 if(FAIL == ret)
1292 {
1293 GTP_ERROR("[burn_dsp_isp]load firmware dsp_isp fail.");
1294 goto exit_burn_dsp_isp;
1295 }
1296
1297 //step3:disable wdt,clear cache enable
1298 GTP_DEBUG("[burn_dsp_isp]step3:disable wdt,clear cache enable");
1299 ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00);
1300 if(ret <= 0)
1301 {
1302 GTP_ERROR("[burn_dsp_isp]disable wdt fail.");
1303 ret = FAIL;
1304 goto exit_burn_dsp_isp;
1305 }
1306 ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00);
1307 if(ret <= 0)
1308 {
1309 GTP_ERROR("[burn_dsp_isp]clear cache enable fail.");
1310 ret = FAIL;
1311 goto exit_burn_dsp_isp;
1312 }
1313
1314 //step4:hold ss51 & dsp
1315 GTP_DEBUG("[burn_dsp_isp]step4:hold ss51 & dsp");
1316 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1317 if(ret <= 0)
1318 {
1319 GTP_ERROR("[burn_dsp_isp]hold ss51 & dsp fail.");
1320 ret = FAIL;
1321 goto exit_burn_dsp_isp;
1322 }
1323
1324 //step5:set boot from sram
1325 GTP_DEBUG("[burn_dsp_isp]step5:set boot from sram");
1326 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02);
1327 if(ret <= 0)
1328 {
1329 GTP_ERROR("[burn_dsp_isp]set boot from sram fail.");
1330 ret = FAIL;
1331 goto exit_burn_dsp_isp;
1332 }
1333
1334 //step6:software reboot
1335 GTP_DEBUG("[burn_dsp_isp]step6:software reboot");
1336 ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01);
1337 if(ret <= 0)
1338 {
1339 GTP_ERROR("[burn_dsp_isp]software reboot fail.");
1340 ret = FAIL;
1341 goto exit_burn_dsp_isp;
1342 }
1343
1344 //step7:select bank2
1345 GTP_DEBUG("[burn_dsp_isp]step7:select bank2");
1346 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02);
1347 if(ret <= 0)
1348 {
1349 GTP_ERROR("[burn_dsp_isp]select bank2 fail.");
1350 ret = FAIL;
1351 goto exit_burn_dsp_isp;
1352 }
1353
1354 //step8:enable accessing code
1355 GTP_DEBUG("[burn_dsp_isp]step8:enable accessing code");
1356 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
1357 if(ret <= 0)
1358 {
1359 GTP_ERROR("[burn_dsp_isp]enable accessing code fail.");
1360 ret = FAIL;
1361 goto exit_burn_dsp_isp;
1362 }
1363
1364 //step9:burn 4k dsp_isp
1365 GTP_DEBUG("[burn_dsp_isp]step9:burn 4k dsp_isp");
1366 ret = gup_burn_proc(client, fw_dsp_isp, 0xC000, FW_DSP_ISP_LENGTH);
1367 if(FAIL == ret)
1368 {
1369 GTP_ERROR("[burn_dsp_isp]burn dsp_isp fail.");
1370 goto exit_burn_dsp_isp;
1371 }
1372
1373 //step10:set scramble
1374 GTP_DEBUG("[burn_dsp_isp]step10:set scramble");
1375 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
1376 if(ret <= 0)
1377 {
1378 GTP_ERROR("[burn_dsp_isp]set scramble fail.");
1379 ret = FAIL;
1380 goto exit_burn_dsp_isp;
1381 }
1382 update_msg.fw_burned_len += FW_DSP_ISP_LENGTH;
1383 GTP_DEBUG("[burn_dsp_isp]Burned length:%d", update_msg.fw_burned_len);
1384 ret = SUCCESS;
1385
1386 exit_burn_dsp_isp:
1387 kfree(fw_dsp_isp);
1388 return ret;
1389 }
1390
gup_burn_fw_ss51(struct i2c_client * client)1391 static u8 gup_burn_fw_ss51(struct i2c_client *client)
1392 {
1393 u8* fw_ss51 = NULL;
1394 u8 retry = 0;
1395 s32 ret = 0;
1396
1397 GTP_INFO("[burn_fw_ss51]Begin burn ss51 firmware---->>");
1398
1399 //step1:alloc memory
1400 GTP_DEBUG("[burn_fw_ss51]step1:alloc memory");
1401 while(retry++ < 5)
1402 {
1403 fw_ss51 = kzalloc(FW_SECTION_LENGTH, GFP_KERNEL);
1404 if(fw_ss51 == NULL)
1405 {
1406 continue;
1407 }
1408 else
1409 {
1410 GTP_DEBUG("[burn_fw_ss51]Alloc %dk byte memory success.", (FW_SECTION_LENGTH / 1024));
1411 break;
1412 }
1413 }
1414 if(retry >= 5)
1415 {
1416 GTP_ERROR("[burn_fw_ss51]Alloc memory fail,exit.");
1417 ret = FAIL;
1418 goto exit_burn_fw_ss51;
1419 }
1420
1421 //step2:load ss51 firmware section 1 file data
1422 // GTP_DEBUG("[burn_fw_ss51]step2:load ss51 firmware section 1 file data");
1423 // ret = gup_load_section_file(fw_ss51, 0, FW_SECTION_LENGTH, SEEK_SET);
1424 // if(FAIL == ret)
1425 // {
1426 // GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 1 fail.");
1427 // goto exit_burn_fw_ss51;
1428 // }
1429
1430 GTP_INFO("[burn_fw_ss51]Reset first 8K of ss51 to 0xFF.");
1431 GTP_DEBUG("[burn_fw_ss51]step2: reset bank0 0xC000~0xD000");
1432 memset(fw_ss51, 0xFF, FW_SECTION_LENGTH);
1433
1434 //step3:clear control flag
1435 GTP_DEBUG("[burn_fw_ss51]step3:clear control flag");
1436 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00);
1437 if(ret <= 0)
1438 {
1439 GTP_ERROR("[burn_fw_ss51]clear control flag fail.");
1440 ret = FAIL;
1441 goto exit_burn_fw_ss51;
1442 }
1443
1444 //step4:burn ss51 firmware section 1
1445 GTP_DEBUG("[burn_fw_ss51]step4:burn ss51 firmware section 1");
1446 ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x01);
1447 if(FAIL == ret)
1448 {
1449 GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 1 fail.");
1450 goto exit_burn_fw_ss51;
1451 }
1452
1453 //step5:load ss51 firmware section 2 file data
1454 GTP_DEBUG("[burn_fw_ss51]step5:load ss51 firmware section 2 file data");
1455 ret = gup_load_section_file(fw_ss51, FW_SECTION_LENGTH, FW_SECTION_LENGTH, SEEK_SET);
1456 if(FAIL == ret)
1457 {
1458 GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 2 fail.");
1459 goto exit_burn_fw_ss51;
1460 }
1461
1462 //step6:burn ss51 firmware section 2
1463 GTP_DEBUG("[burn_fw_ss51]step6:burn ss51 firmware section 2");
1464 ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x02);
1465 if(FAIL == ret)
1466 {
1467 GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 2 fail.");
1468 goto exit_burn_fw_ss51;
1469 }
1470
1471 //step7:load ss51 firmware section 3 file data
1472 GTP_DEBUG("[burn_fw_ss51]step7:load ss51 firmware section 3 file data");
1473 ret = gup_load_section_file(fw_ss51, 2 * FW_SECTION_LENGTH, FW_SECTION_LENGTH, SEEK_SET);
1474 if(FAIL == ret)
1475 {
1476 GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 3 fail.");
1477 goto exit_burn_fw_ss51;
1478 }
1479
1480 //step8:burn ss51 firmware section 3
1481 GTP_DEBUG("[burn_fw_ss51]step8:burn ss51 firmware section 3");
1482 ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x13);
1483 if(FAIL == ret)
1484 {
1485 GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 3 fail.");
1486 goto exit_burn_fw_ss51;
1487 }
1488
1489 //step9:load ss51 firmware section 4 file data
1490 GTP_DEBUG("[burn_fw_ss51]step9:load ss51 firmware section 4 file data");
1491 ret = gup_load_section_file(fw_ss51, 3 * FW_SECTION_LENGTH, FW_SECTION_LENGTH, SEEK_SET);
1492 if(FAIL == ret)
1493 {
1494 GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 4 fail.");
1495 goto exit_burn_fw_ss51;
1496 }
1497
1498 //step10:burn ss51 firmware section 4
1499 GTP_DEBUG("[burn_fw_ss51]step10:burn ss51 firmware section 4");
1500 ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x14);
1501 if(FAIL == ret)
1502 {
1503 GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 4 fail.");
1504 goto exit_burn_fw_ss51;
1505 }
1506
1507 update_msg.fw_burned_len += (FW_SECTION_LENGTH*4);
1508 GTP_DEBUG("[burn_fw_ss51]Burned length:%d", update_msg.fw_burned_len);
1509 ret = SUCCESS;
1510
1511 exit_burn_fw_ss51:
1512 kfree(fw_ss51);
1513 return ret;
1514 }
1515
gup_burn_fw_dsp(struct i2c_client * client)1516 static u8 gup_burn_fw_dsp(struct i2c_client *client)
1517 {
1518 s32 ret = 0;
1519 u8* fw_dsp = NULL;
1520 u8 retry = 0;
1521 u8 rd_buf[5];
1522
1523 GTP_INFO("[burn_fw_dsp]Begin burn dsp firmware---->>");
1524 //step1:alloc memory
1525 GTP_DEBUG("[burn_fw_dsp]step1:alloc memory");
1526 while(retry++ < 5)
1527 {
1528 fw_dsp = kzalloc(FW_DSP_LENGTH, GFP_KERNEL);
1529 if(fw_dsp == NULL)
1530 {
1531 continue;
1532 }
1533 else
1534 {
1535 GTP_DEBUG("[burn_fw_dsp]Alloc %dk byte memory success.", (FW_SECTION_LENGTH / 1024));
1536 break;
1537 }
1538 }
1539 if(retry >= 5)
1540 {
1541 GTP_ERROR("[burn_fw_dsp]Alloc memory fail,exit.");
1542 ret = FAIL;
1543 goto exit_burn_fw_dsp;
1544 }
1545
1546 //step2:load firmware dsp
1547 GTP_DEBUG("[burn_fw_dsp]step2:load firmware dsp");
1548 ret = gup_load_section_file(fw_dsp, 4 * FW_SECTION_LENGTH, FW_DSP_LENGTH, SEEK_SET);
1549 if(FAIL == ret)
1550 {
1551 GTP_ERROR("[burn_fw_dsp]load firmware dsp fail.");
1552 goto exit_burn_fw_dsp;
1553 }
1554
1555 //step3:select bank3
1556 GTP_DEBUG("[burn_fw_dsp]step3:select bank3");
1557 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03);
1558 if(ret <= 0)
1559 {
1560 GTP_ERROR("[burn_fw_dsp]select bank3 fail.");
1561 ret = FAIL;
1562 goto exit_burn_fw_dsp;
1563 }
1564
1565 //step4:hold ss51 & dsp
1566 GTP_DEBUG("[burn_fw_dsp]step4:hold ss51 & dsp");
1567 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1568 if(ret <= 0)
1569 {
1570 GTP_ERROR("[burn_fw_dsp]hold ss51 & dsp fail.");
1571 ret = FAIL;
1572 goto exit_burn_fw_dsp;
1573 }
1574
1575 //step5:set scramble
1576 GTP_DEBUG("[burn_fw_dsp]step5:set scramble");
1577 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
1578 if(ret <= 0)
1579 {
1580 GTP_ERROR("[burn_fw_dsp]set scramble fail.");
1581 ret = FAIL;
1582 goto exit_burn_fw_dsp;
1583 }
1584
1585 //step6:release ss51 & dsp
1586 GTP_DEBUG("[burn_fw_dsp]step6:release ss51 & dsp");
1587 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); //20121211
1588 if(ret <= 0)
1589 {
1590 GTP_ERROR("[burn_fw_dsp]release ss51 & dsp fail.");
1591 ret = FAIL;
1592 goto exit_burn_fw_dsp;
1593 }
1594 //must delay
1595 msleep(1);
1596
1597 //step7:burn 4k dsp firmware
1598 GTP_DEBUG("[burn_fw_dsp]step7:burn 4k dsp firmware");
1599 ret = gup_burn_proc(client, fw_dsp, 0x9000, FW_DSP_LENGTH);
1600 if(FAIL == ret)
1601 {
1602 GTP_ERROR("[burn_fw_dsp]burn fw_section fail.");
1603 goto exit_burn_fw_dsp;
1604 }
1605
1606 //step8:send burn cmd to move data to flash from sram
1607 GTP_DEBUG("[burn_fw_dsp]step8:send burn cmd to move data to flash from sram");
1608 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x05);
1609 if(ret <= 0)
1610 {
1611 GTP_ERROR("[burn_fw_dsp]send burn cmd fail.");
1612 goto exit_burn_fw_dsp;
1613 }
1614 GTP_DEBUG("[burn_fw_dsp]Wait for the burn is complete......");
1615 do{
1616 ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
1617 if(ret <= 0)
1618 {
1619 GTP_ERROR("[burn_fw_dsp]Get burn state fail");
1620 goto exit_burn_fw_dsp;
1621 }
1622 msleep(10);
1623 //GTP_DEBUG("[burn_fw_dsp]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
1624 }while(rd_buf[GTP_ADDR_LENGTH]);
1625
1626 //step9:recall check 4k dsp firmware
1627 GTP_DEBUG("[burn_fw_dsp]step9:recall check 4k dsp firmware");
1628 ret = gup_recall_check(client, fw_dsp, 0x9000, FW_DSP_LENGTH);
1629 if(FAIL == ret)
1630 {
1631 GTP_ERROR("[burn_fw_dsp]recall check 4k dsp firmware fail.");
1632 goto exit_burn_fw_dsp;
1633 }
1634
1635 update_msg.fw_burned_len += FW_DSP_LENGTH;
1636 GTP_DEBUG("[burn_fw_dsp]Burned length:%d", update_msg.fw_burned_len);
1637 ret = SUCCESS;
1638
1639 exit_burn_fw_dsp:
1640 kfree(fw_dsp);
1641 return ret;
1642 }
1643
gup_burn_fw_boot(struct i2c_client * client)1644 static u8 gup_burn_fw_boot(struct i2c_client *client)
1645 {
1646 s32 ret = 0;
1647 u8* fw_boot = NULL;
1648 u8 retry = 0;
1649 u8 rd_buf[5];
1650
1651 GTP_INFO("[burn_fw_boot]Begin burn bootloader firmware---->>");
1652
1653 //step1:Alloc memory
1654 GTP_DEBUG("[burn_fw_boot]step1:Alloc memory");
1655 while(retry++ < 5)
1656 {
1657 fw_boot = kzalloc(FW_BOOT_LENGTH, GFP_KERNEL);
1658 if(fw_boot == NULL)
1659 {
1660 continue;
1661 }
1662 else
1663 {
1664 GTP_DEBUG("[burn_fw_boot]Alloc %dk byte memory success.", (FW_BOOT_LENGTH/1024));
1665 break;
1666 }
1667 }
1668 if(retry >= 5)
1669 {
1670 GTP_ERROR("[burn_fw_boot]Alloc memory fail,exit.");
1671 ret = FAIL;
1672 goto exit_burn_fw_boot;
1673 }
1674
1675 //step2:load firmware bootloader
1676 GTP_DEBUG("[burn_fw_boot]step2:load firmware bootloader");
1677 ret = gup_load_section_file(fw_boot, (4 * FW_SECTION_LENGTH + FW_DSP_LENGTH), FW_BOOT_LENGTH, SEEK_SET);
1678 if(FAIL == ret)
1679 {
1680 GTP_ERROR("[burn_fw_boot]load firmware bootcode fail.");
1681 goto exit_burn_fw_boot;
1682 }
1683
1684 //step3:hold ss51 & dsp
1685 GTP_DEBUG("[burn_fw_boot]step3:hold ss51 & dsp");
1686 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1687 if(ret <= 0)
1688 {
1689 GTP_ERROR("[burn_fw_boot]hold ss51 & dsp fail.");
1690 ret = FAIL;
1691 goto exit_burn_fw_boot;
1692 }
1693
1694 //step4:set scramble
1695 GTP_DEBUG("[burn_fw_boot]step4:set scramble");
1696 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
1697 if(ret <= 0)
1698 {
1699 GTP_ERROR("[burn_fw_boot]set scramble fail.");
1700 ret = FAIL;
1701 goto exit_burn_fw_boot;
1702 }
1703
1704 //step5:hold ss51 & release dsp
1705 GTP_DEBUG("[burn_fw_boot]step5:hold ss51 & release dsp");
1706 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); //20121211
1707 if(ret <= 0)
1708 {
1709 GTP_ERROR("[burn_fw_boot]release ss51 & dsp fail.");
1710 ret = FAIL;
1711 goto exit_burn_fw_boot;
1712 }
1713 //must delay
1714 msleep(1);
1715
1716 //step6:select bank3
1717 GTP_DEBUG("[burn_fw_boot]step6:select bank3");
1718 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03);
1719 if(ret <= 0)
1720 {
1721 GTP_ERROR("[burn_fw_boot]select bank3 fail.");
1722 ret = FAIL;
1723 goto exit_burn_fw_boot;
1724 }
1725
1726 //step6:burn 2k bootloader firmware
1727 GTP_DEBUG("[burn_fw_boot]step6:burn 2k bootloader firmware");
1728 ret = gup_burn_proc(client, fw_boot, 0x9000, FW_BOOT_LENGTH);
1729 if(FAIL == ret)
1730 {
1731 GTP_ERROR("[burn_fw_boot]burn fw_boot fail.");
1732 goto exit_burn_fw_boot;
1733 }
1734
1735 //step7:send burn cmd to move data to flash from sram
1736 GTP_DEBUG("[burn_fw_boot]step7:send burn cmd to move data to flash from sram");
1737 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x06);
1738 if(ret <= 0)
1739 {
1740 GTP_ERROR("[burn_fw_boot]send burn cmd fail.");
1741 goto exit_burn_fw_boot;
1742 }
1743 GTP_DEBUG("[burn_fw_boot]Wait for the burn is complete......");
1744 do{
1745 ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
1746 if(ret <= 0)
1747 {
1748 GTP_ERROR("[burn_fw_boot]Get burn state fail");
1749 goto exit_burn_fw_boot;
1750 }
1751 msleep(10);
1752 //GTP_DEBUG("[burn_fw_boot]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
1753 }while(rd_buf[GTP_ADDR_LENGTH]);
1754
1755 //step8:recall check 2k bootloader firmware
1756 GTP_DEBUG("[burn_fw_boot]step8:recall check 2k bootloader firmware");
1757 ret = gup_recall_check(client, fw_boot, 0x9000, FW_BOOT_LENGTH);
1758 if(FAIL == ret)
1759 {
1760 GTP_ERROR("[burn_fw_boot]recall check 2k bootcode firmware fail.");
1761 goto exit_burn_fw_boot;
1762 }
1763
1764 update_msg.fw_burned_len += FW_BOOT_LENGTH;
1765 GTP_DEBUG("[burn_fw_boot]Burned length:%d", update_msg.fw_burned_len);
1766 ret = SUCCESS;
1767
1768 exit_burn_fw_boot:
1769 kfree(fw_boot);
1770 return ret;
1771 }
gup_burn_fw_boot_isp(struct i2c_client * client)1772 static u8 gup_burn_fw_boot_isp(struct i2c_client *client)
1773 {
1774 s32 ret = 0;
1775 u8* fw_boot_isp = NULL;
1776 u8 retry = 0;
1777 u8 rd_buf[5];
1778
1779 if(update_msg.fw_burned_len >= update_msg.fw_total_len)
1780 {
1781 GTP_DEBUG("No need to upgrade the boot_isp code!");
1782 return SUCCESS;
1783 }
1784 GTP_INFO("[burn_fw_boot_isp]Begin burn boot_isp firmware---->>");
1785
1786 //step1:Alloc memory
1787 GTP_DEBUG("[burn_fw_boot_isp]step1:Alloc memory");
1788 while(retry++ < 5)
1789 {
1790 fw_boot_isp = kzalloc(FW_BOOT_ISP_LENGTH, GFP_KERNEL);
1791 if(fw_boot_isp == NULL)
1792 {
1793 continue;
1794 }
1795 else
1796 {
1797 GTP_DEBUG("[burn_fw_boot_isp]Alloc %dk byte memory success.", (FW_BOOT_ISP_LENGTH/1024));
1798 break;
1799 }
1800 }
1801 if(retry >= 5)
1802 {
1803 GTP_ERROR("[burn_fw_boot_isp]Alloc memory fail,exit.");
1804 ret = FAIL;
1805 goto exit_burn_fw_boot_isp;
1806 }
1807
1808 //step2:load firmware bootloader
1809 GTP_DEBUG("[burn_fw_boot_isp]step2:load firmware bootloader isp");
1810 //ret = gup_load_section_file(fw_boot_isp, (4*FW_SECTION_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH+FW_DSP_ISP_LENGTH), FW_BOOT_ISP_LENGTH, SEEK_SET);
1811 ret = gup_load_section_file(fw_boot_isp, (update_msg.fw_burned_len - FW_DSP_ISP_LENGTH), FW_BOOT_ISP_LENGTH, SEEK_SET);
1812 if(FAIL == ret)
1813 {
1814 GTP_ERROR("[burn_fw_boot_isp]load firmware boot_isp fail.");
1815 goto exit_burn_fw_boot_isp;
1816 }
1817
1818 //step3:hold ss51 & dsp
1819 GTP_DEBUG("[burn_fw_boot_isp]step3:hold ss51 & dsp");
1820 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1821 if(ret <= 0)
1822 {
1823 GTP_ERROR("[burn_fw_boot_isp]hold ss51 & dsp fail.");
1824 ret = FAIL;
1825 goto exit_burn_fw_boot_isp;
1826 }
1827
1828 //step4:set scramble
1829 GTP_DEBUG("[burn_fw_boot_isp]step4:set scramble");
1830 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
1831 if(ret <= 0)
1832 {
1833 GTP_ERROR("[burn_fw_boot_isp]set scramble fail.");
1834 ret = FAIL;
1835 goto exit_burn_fw_boot_isp;
1836 }
1837
1838
1839 //step5:hold ss51 & release dsp
1840 GTP_DEBUG("[burn_fw_boot_isp]step5:hold ss51 & release dsp");
1841 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); //20121211
1842 if(ret <= 0)
1843 {
1844 GTP_ERROR("[burn_fw_boot_isp]release ss51 & dsp fail.");
1845 ret = FAIL;
1846 goto exit_burn_fw_boot_isp;
1847 }
1848 //must delay
1849 msleep(1);
1850
1851 //step6:select bank3
1852 GTP_DEBUG("[burn_fw_boot_isp]step6:select bank3");
1853 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03);
1854 if(ret <= 0)
1855 {
1856 GTP_ERROR("[burn_fw_boot_isp]select bank3 fail.");
1857 ret = FAIL;
1858 goto exit_burn_fw_boot_isp;
1859 }
1860
1861 //step7:burn 2k bootload_isp firmware
1862 GTP_DEBUG("[burn_fw_boot_isp]step7:burn 2k bootloader firmware");
1863 ret = gup_burn_proc(client, fw_boot_isp, 0x9000, FW_BOOT_ISP_LENGTH);
1864 if(FAIL == ret)
1865 {
1866 GTP_ERROR("[burn_fw_boot_isp]burn fw_section fail.");
1867 goto exit_burn_fw_boot_isp;
1868 }
1869
1870 //step7:send burn cmd to move data to flash from sram
1871 GTP_DEBUG("[burn_fw_boot_isp]step8:send burn cmd to move data to flash from sram");
1872 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x07);
1873 if(ret <= 0)
1874 {
1875 GTP_ERROR("[burn_fw_boot_isp]send burn cmd fail.");
1876 goto exit_burn_fw_boot_isp;
1877 }
1878 GTP_DEBUG("[burn_fw_boot_isp]Wait for the burn is complete......");
1879 do{
1880 ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
1881 if(ret <= 0)
1882 {
1883 GTP_ERROR("[burn_fw_boot_isp]Get burn state fail");
1884 goto exit_burn_fw_boot_isp;
1885 }
1886 msleep(10);
1887 //GTP_DEBUG("[burn_fw_boot_isp]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
1888 }while(rd_buf[GTP_ADDR_LENGTH]);
1889
1890 //step8:recall check 2k bootload_isp firmware
1891 GTP_DEBUG("[burn_fw_boot_isp]step9:recall check 2k bootloader firmware");
1892 ret = gup_recall_check(client, fw_boot_isp, 0x9000, FW_BOOT_ISP_LENGTH);
1893 if(FAIL == ret)
1894 {
1895 GTP_ERROR("[burn_fw_boot_isp]recall check 2k bootcode_isp firmware fail.");
1896 goto exit_burn_fw_boot_isp;
1897 }
1898
1899 update_msg.fw_burned_len += FW_BOOT_ISP_LENGTH;
1900 GTP_DEBUG("[burn_fw_boot_isp]Burned length:%d", update_msg.fw_burned_len);
1901 ret = SUCCESS;
1902
1903 exit_burn_fw_boot_isp:
1904 kfree(fw_boot_isp);
1905 return ret;
1906 }
1907
gup_burn_fw_link(struct i2c_client * client)1908 static u8 gup_burn_fw_link(struct i2c_client *client)
1909 {
1910 s32 ret = 0;
1911 u8* fw_link = NULL;
1912 u8 retry = 0;
1913 u32 offset;
1914
1915 if(update_msg.fw_burned_len >= update_msg.fw_total_len)
1916 {
1917 GTP_DEBUG("No need to upgrade the link code!");
1918 return SUCCESS;
1919 }
1920 GTP_INFO("[burn_fw_link]Begin burn link firmware---->>");
1921
1922 //step1:Alloc memory
1923 GTP_DEBUG("[burn_fw_link]step1:Alloc memory");
1924 while(retry++ < 5)
1925 {
1926 fw_link = kzalloc(FW_SECTION_LENGTH, GFP_KERNEL);
1927 if(fw_link == NULL)
1928 {
1929 continue;
1930 }
1931 else
1932 {
1933 GTP_DEBUG("[burn_fw_link]Alloc %dk byte memory success.", (FW_SECTION_LENGTH/1024));
1934 break;
1935 }
1936 }
1937 if(retry >= 5)
1938 {
1939 GTP_ERROR("[burn_fw_link]Alloc memory fail,exit.");
1940 ret = FAIL;
1941 goto exit_burn_fw_link;
1942 }
1943
1944 //step2:load firmware link section 1
1945 GTP_DEBUG("[burn_fw_link]step2:load firmware link section 1");
1946 offset = update_msg.fw_burned_len - FW_DSP_ISP_LENGTH;
1947 ret = gup_load_section_file(fw_link, offset, FW_SECTION_LENGTH, SEEK_SET);
1948 if(FAIL == ret)
1949 {
1950 GTP_ERROR("[burn_fw_link]load firmware link section 1 fail.");
1951 goto exit_burn_fw_link;
1952 }
1953
1954 //step3:burn link firmware section 1
1955 GTP_DEBUG("[burn_fw_link]step3:burn link firmware section 1");
1956 ret = gup_burn_fw_gwake_section(client, fw_link, 0x9000, FW_SECTION_LENGTH, 0x38);
1957
1958 if (FAIL == ret)
1959 {
1960 GTP_ERROR("[burn_fw_link]burn link firmware section 1 fail.");
1961 goto exit_burn_fw_link;
1962 }
1963
1964 //step4:load link firmware section 2 file data
1965 GTP_DEBUG("[burn_fw_link]step4:load link firmware section 2 file data");
1966 offset += FW_SECTION_LENGTH;
1967 ret = gup_load_section_file(fw_link, offset, FW_GLINK_LENGTH - FW_SECTION_LENGTH, SEEK_SET);
1968
1969 if (FAIL == ret)
1970 {
1971 GTP_ERROR("[burn_fw_link]load link firmware section 2 fail.");
1972 goto exit_burn_fw_link;
1973 }
1974
1975 //step5:burn link firmware section 2
1976 GTP_DEBUG("[burn_fw_link]step4:burn link firmware section 2");
1977 ret = gup_burn_fw_gwake_section(client, fw_link, 0x9000, FW_GLINK_LENGTH - FW_SECTION_LENGTH, 0x39);
1978
1979 if (FAIL == ret)
1980 {
1981 GTP_ERROR("[burn_fw_link]burn link firmware section 2 fail.");
1982 goto exit_burn_fw_link;
1983 }
1984
1985 update_msg.fw_burned_len += FW_GLINK_LENGTH;
1986 GTP_DEBUG("[burn_fw_link]Burned length:%d", update_msg.fw_burned_len);
1987 ret = SUCCESS;
1988
1989 exit_burn_fw_link:
1990 kfree(fw_link);
1991 return ret;
1992 }
1993
gup_burn_fw_gwake_section(struct i2c_client * client,u8 * fw_section,u16 start_addr,u32 len,u8 bank_cmd)1994 static u8 gup_burn_fw_gwake_section(struct i2c_client *client, u8 *fw_section, u16 start_addr, u32 len, u8 bank_cmd )
1995 {
1996 s32 ret = 0;
1997 u8 rd_buf[5];
1998
1999 //step1:hold ss51 & dsp
2000 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
2001 if(ret <= 0)
2002 {
2003 GTP_ERROR("[burn_fw_app_section]hold ss51 & dsp fail.");
2004 return FAIL;
2005 }
2006
2007 //step2:set scramble
2008 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
2009 if(ret <= 0)
2010 {
2011 GTP_ERROR("[burn_fw_app_section]set scramble fail.");
2012 return FAIL;
2013 }
2014
2015 //step3:hold ss51 & release dsp
2016 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04);
2017 if(ret <= 0)
2018 {
2019 GTP_ERROR("[burn_fw_app_section]hold ss51 & release dsp fail.");
2020 return FAIL;
2021 }
2022 //must delay
2023 msleep(1);
2024
2025 //step4:select bank
2026 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F);
2027 if(ret <= 0)
2028 {
2029 GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4)&0x0F);
2030 return FAIL;
2031 }
2032
2033 //step5:burn fw section
2034 ret = gup_burn_proc(client, fw_section, start_addr, len);
2035 if(FAIL == ret)
2036 {
2037 GTP_ERROR("[burn_fw_app_section]burn fw_section fail.");
2038 return FAIL;
2039 }
2040
2041 //step6:send burn cmd to move data to flash from sram
2042 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, bank_cmd&0x0F);
2043 if(ret <= 0)
2044 {
2045 GTP_ERROR("[burn_fw_app_section]send burn cmd fail.");
2046 return FAIL;
2047 }
2048 GTP_DEBUG("[burn_fw_section]Wait for the burn is complete......");
2049 do{
2050 ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
2051 if(ret <= 0)
2052 {
2053 GTP_ERROR("[burn_fw_app_section]Get burn state fail");
2054 return FAIL;
2055 }
2056 msleep(10);
2057 //GTP_DEBUG("[burn_fw_app_section]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
2058 }while(rd_buf[GTP_ADDR_LENGTH]);
2059
2060 //step7:recall fw section
2061 ret = gup_recall_check(client, fw_section, start_addr, len);
2062 if(FAIL == ret)
2063 {
2064 GTP_ERROR("[burn_fw_app_section]recall check %dk firmware fail.", len/1024);
2065 return FAIL;
2066 }
2067
2068 return SUCCESS;
2069 }
2070
gup_burn_fw_gwake(struct i2c_client * client)2071 static u8 gup_burn_fw_gwake(struct i2c_client *client)
2072 {
2073 u8* fw_gwake = NULL;
2074 u8 retry = 0;
2075 s32 ret = 0;
2076 //u16 start_index = 4*FW_SECTION_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH + FW_DSP_ISP_LENGTH + FW_BOOT_ISP_LENGTH; // 32 + 4 + 2 + 4 = 42K
2077 u16 start_index;
2078
2079 if(update_msg.fw_burned_len >= update_msg.fw_total_len)
2080 {
2081 GTP_DEBUG("No need to upgrade the gwake code!");
2082 return SUCCESS;
2083 }
2084 start_index = update_msg.fw_burned_len - FW_DSP_ISP_LENGTH;
2085 GTP_INFO("[burn_fw_gwake]Begin burn gwake firmware---->>");
2086
2087 //step1:alloc memory
2088 GTP_DEBUG("[burn_fw_gwake]step1:alloc memory");
2089 while(retry++ < 5)
2090 {
2091 fw_gwake = kzalloc(FW_SECTION_LENGTH, GFP_KERNEL);
2092 if(fw_gwake == NULL)
2093 {
2094 continue;
2095 }
2096 else
2097 {
2098 GTP_DEBUG("[burn_fw_gwake]Alloc %dk byte memory success.", (FW_SECTION_LENGTH/1024));
2099 break;
2100 }
2101 }
2102 if(retry >= 5)
2103 {
2104 GTP_ERROR("[burn_fw_gwake]Alloc memory fail,exit.");
2105 ret = FAIL;
2106 goto exit_burn_fw_gwake;
2107 }
2108
2109 //step2:load app_code firmware section 1 file data
2110 GTP_DEBUG("[burn_fw_gwake]step2:load app_code firmware section 1 file data");
2111 ret = gup_load_section_file(fw_gwake, start_index, FW_SECTION_LENGTH, SEEK_SET);
2112 if(FAIL == ret)
2113 {
2114 GTP_ERROR("[burn_fw_gwake]load app_code firmware section 1 fail.");
2115 goto exit_burn_fw_gwake;
2116 }
2117
2118 //step3:burn app_code firmware section 1
2119 GTP_DEBUG("[burn_fw_gwake]step3:burn app_code firmware section 1");
2120 ret = gup_burn_fw_gwake_section(client, fw_gwake, 0x9000, FW_SECTION_LENGTH, 0x3A);
2121 if(FAIL == ret)
2122 {
2123 GTP_ERROR("[burn_fw_gwake]burn app_code firmware section 1 fail.");
2124 goto exit_burn_fw_gwake;
2125 }
2126
2127 //step5:load app_code firmware section 2 file data
2128 GTP_DEBUG("[burn_fw_gwake]step5:load app_code firmware section 2 file data");
2129 ret = gup_load_section_file(fw_gwake, start_index+FW_SECTION_LENGTH, FW_SECTION_LENGTH, SEEK_SET);
2130 if(FAIL == ret)
2131 {
2132 GTP_ERROR("[burn_fw_gwake]load app_code firmware section 2 fail.");
2133 goto exit_burn_fw_gwake;
2134 }
2135
2136 //step6:burn app_code firmware section 2
2137 GTP_DEBUG("[burn_fw_gwake]step6:burn app_code firmware section 2");
2138 ret = gup_burn_fw_gwake_section(client, fw_gwake, 0x9000, FW_SECTION_LENGTH, 0x3B);
2139 if(FAIL == ret)
2140 {
2141 GTP_ERROR("[burn_fw_gwake]burn app_code firmware section 2 fail.");
2142 goto exit_burn_fw_gwake;
2143 }
2144
2145 //step7:load app_code firmware section 3 file data
2146 GTP_DEBUG("[burn_fw_gwake]step7:load app_code firmware section 3 file data");
2147 ret = gup_load_section_file(fw_gwake, start_index+2*FW_SECTION_LENGTH, FW_SECTION_LENGTH, SEEK_SET);
2148 if(FAIL == ret)
2149 {
2150 GTP_ERROR("[burn_fw_gwake]load app_code firmware section 3 fail.");
2151 goto exit_burn_fw_gwake;
2152 }
2153
2154 //step8:burn app_code firmware section 3
2155 GTP_DEBUG("[burn_fw_gwake]step8:burn app_code firmware section 3");
2156 ret = gup_burn_fw_gwake_section(client, fw_gwake, 0x9000, FW_SECTION_LENGTH, 0x3C);
2157 if(FAIL == ret)
2158 {
2159 GTP_ERROR("[burn_fw_gwake]burn app_code firmware section 3 fail.");
2160 goto exit_burn_fw_gwake;
2161 }
2162
2163 //step9:load app_code firmware section 4 file data
2164 GTP_DEBUG("[burn_fw_gwake]step9:load app_code firmware section 4 file data");
2165 ret = gup_load_section_file(fw_gwake, start_index + 3*FW_SECTION_LENGTH, FW_SECTION_LENGTH, SEEK_SET);
2166 if(FAIL == ret)
2167 {
2168 GTP_ERROR("[burn_fw_gwake]load app_code firmware section 4 fail.");
2169 goto exit_burn_fw_gwake;
2170 }
2171
2172 //step10:burn app_code firmware section 4
2173 GTP_DEBUG("[burn_fw_gwake]step10:burn app_code firmware section 4");
2174 ret = gup_burn_fw_gwake_section(client, fw_gwake, 0x9000, FW_SECTION_LENGTH, 0x3D);
2175 if(FAIL == ret)
2176 {
2177 GTP_ERROR("[burn_fw_gwake]burn app_code firmware section 4 fail.");
2178 goto exit_burn_fw_gwake;
2179 }
2180
2181 update_msg.fw_burned_len += FW_GWAKE_LENGTH;
2182 GTP_DEBUG("[burn_fw_gwake]Burned length:%d", update_msg.fw_burned_len);
2183 ret = SUCCESS;
2184
2185 exit_burn_fw_gwake:
2186 kfree(fw_gwake);
2187 return ret;
2188 }
2189
gup_burn_fw_finish(struct i2c_client * client)2190 static u8 gup_burn_fw_finish(struct i2c_client *client)
2191 {
2192 u8* fw_ss51 = NULL;
2193 u8 retry = 0;
2194 s32 ret = 0;
2195
2196 GTP_INFO("[burn_fw_finish]burn first 8K of ss51 and finish update.");
2197 //step1:alloc memory
2198 GTP_DEBUG("[burn_fw_finish]step1:alloc memory");
2199 while(retry++ < 5)
2200 {
2201 fw_ss51 = kzalloc(FW_SECTION_LENGTH, GFP_KERNEL);
2202 if(fw_ss51 == NULL)
2203 {
2204 continue;
2205 }
2206 else
2207 {
2208 GTP_DEBUG("[burn_fw_finish]Alloc %dk byte memory success.", (FW_SECTION_LENGTH/1024));
2209 break;
2210 }
2211 }
2212 if(retry >= 5)
2213 {
2214 GTP_ERROR("[burn_fw_finish]Alloc memory fail,exit.");
2215 ret = FAIL;
2216 goto exit_burn_fw_finish;
2217 }
2218
2219 GTP_DEBUG("[burn_fw_finish]step2: burn ss51 first 8K.");
2220 ret = gup_load_section_file(fw_ss51, 0, FW_SECTION_LENGTH, SEEK_SET);
2221 if(FAIL == ret)
2222 {
2223 GTP_ERROR("[burn_fw_finish]load ss51 firmware section 1 fail.");
2224 goto exit_burn_fw_finish;
2225 }
2226
2227 GTP_DEBUG("[burn_fw_finish]step3:clear control flag");
2228 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00);
2229 if(ret <= 0)
2230 {
2231 GTP_ERROR("[burn_fw_finish]clear control flag fail.");
2232 goto exit_burn_fw_finish;
2233 }
2234
2235 GTP_DEBUG("[burn_fw_finish]step4:burn ss51 firmware section 1");
2236 ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x01);
2237 if(FAIL == ret)
2238 {
2239 GTP_ERROR("[burn_fw_finish]burn ss51 firmware section 1 fail.");
2240 goto exit_burn_fw_finish;
2241 }
2242
2243 //step11:enable download DSP code
2244 GTP_DEBUG("[burn_fw_finish]step5:enable download DSP code ");
2245 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x99);
2246 if(ret <= 0)
2247 {
2248 GTP_ERROR("[burn_fw_finish]enable download DSP code fail.");
2249 goto exit_burn_fw_finish;
2250 }
2251
2252 //step12:release ss51 & hold dsp
2253 GTP_DEBUG("[burn_fw_finish]step6:release ss51 & hold dsp");
2254 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x08);
2255 if(ret <= 0)
2256 {
2257 GTP_ERROR("[burn_fw_finish]release ss51 & hold dsp fail.");
2258 goto exit_burn_fw_finish;
2259 }
2260
2261 if (fw_ss51)
2262 {
2263 kfree(fw_ss51);
2264 }
2265 return SUCCESS;
2266
2267 exit_burn_fw_finish:
2268 if (fw_ss51)
2269 {
2270 kfree(fw_ss51);
2271 }
2272 return FAIL;
2273 }
gup_update_proc(void * dir)2274 s32 gup_update_proc(void *dir)
2275 {
2276 s32 ret = 0;
2277 s32 update_ret = FAIL;
2278 u8 retry = 0;
2279 st_fw_head fw_head;
2280 struct goodix_ts_data *ts = NULL;
2281
2282 GTP_DEBUG("[update_proc]Begin update ......");
2283
2284 ts = i2c_get_clientdata(i2c_connect_client);
2285
2286 #if GTP_AUTO_UPDATE
2287 if (searching_file)
2288 {
2289 u8 timeout = 0;
2290 searching_file = 0; // exit .bin update file searching
2291 GTP_INFO("Exiting searching .bin update file...");
2292 while ((show_len != 200) && (show_len != 100) && (timeout++ < 100)) // wait for auto update quitted completely
2293 {
2294 msleep(100);
2295 }
2296 }
2297 #endif
2298
2299 show_len = 1;
2300 total_len = 100;
2301
2302 #if GTP_COMPATIBLE_MODE
2303 if (CHIP_TYPE_GT9F == ts->chip_type)
2304 {
2305 return gup_fw_download_proc(dir, GTP_FL_FW_BURN);
2306 }
2307 #endif
2308
2309 update_msg.file = NULL;
2310 ret = gup_check_update_file(i2c_connect_client, &fw_head, (u8*)dir); //20121211
2311 if(FAIL == ret)
2312 {
2313 GTP_ERROR("[update_proc]check update file fail.");
2314 goto file_fail;
2315 }
2316
2317 ret = gup_get_ic_fw_msg(i2c_connect_client);
2318 if(FAIL == ret)
2319 {
2320 GTP_ERROR("[update_proc]get ic message fail.");
2321 goto file_fail;
2322 }
2323
2324 ret = gup_enter_update_judge(&fw_head);
2325 if(FAIL == ret)
2326 {
2327 GTP_ERROR("[update_proc]Check *.bin file fail.");
2328 goto file_fail;
2329 }
2330
2331 ts->enter_update = 1;
2332 gtp_irq_disable(ts);
2333 #if GTP_ESD_PROTECT
2334 gtp_esd_switch(ts->client, SWITCH_OFF);
2335 #endif
2336 ret = gup_enter_update_mode(i2c_connect_client);
2337 if(FAIL == ret)
2338 {
2339 GTP_ERROR("[update_proc]enter update mode fail.");
2340 goto update_fail;
2341 }
2342
2343 while(retry++ < 5)
2344 {
2345 show_len = 10;
2346 total_len = 100;
2347 update_msg.fw_burned_len = 0;
2348 ret = gup_burn_dsp_isp(i2c_connect_client);
2349 if(FAIL == ret)
2350 {
2351 GTP_ERROR("[update_proc]burn dsp isp fail.");
2352 continue;
2353 }
2354
2355 show_len = 20;
2356 ret = gup_burn_fw_ss51(i2c_connect_client);
2357 if(FAIL == ret)
2358 {
2359 GTP_ERROR("[update_proc]burn ss51 firmware fail.");
2360 continue;
2361 }
2362
2363 show_len = 30;
2364 ret = gup_burn_fw_dsp(i2c_connect_client);
2365 if(FAIL == ret)
2366 {
2367 GTP_ERROR("[update_proc]burn dsp firmware fail.");
2368 continue;
2369 }
2370
2371 show_len = 40;
2372 ret = gup_burn_fw_boot(i2c_connect_client);
2373 if(FAIL == ret)
2374 {
2375 GTP_ERROR("[update_proc]burn bootloader firmware fail.");
2376 continue;
2377 }
2378 show_len = 50;
2379
2380 ret = gup_burn_fw_boot_isp(i2c_connect_client);
2381 if (FAIL == ret)
2382 {
2383 GTP_ERROR("[update_proc]burn boot_isp firmware fail.");
2384 continue;
2385 }
2386
2387 show_len = 60;
2388 ret = gup_burn_fw_link(i2c_connect_client);
2389 if (FAIL == ret)
2390 {
2391 GTP_ERROR("[update_proc]burn link firmware fail.");
2392 continue;
2393 }
2394
2395 show_len = 70;
2396 ret = gup_burn_fw_gwake(i2c_connect_client);
2397 if (FAIL == ret)
2398 {
2399 GTP_ERROR("[update_proc]burn app_code firmware fail.");
2400 continue;
2401 }
2402 show_len = 80;
2403
2404 ret = gup_burn_fw_finish(i2c_connect_client);
2405 if (FAIL == ret)
2406 {
2407 GTP_ERROR("[update_proc]burn finish fail.");
2408 continue;
2409 }
2410 show_len = 90;
2411 GTP_INFO("[update_proc]UPDATE SUCCESS.");
2412 retry = 0;
2413 break;
2414 }
2415
2416 if (retry >= 5)
2417 {
2418 GTP_ERROR("[update_proc]retry timeout,UPDATE FAIL.");
2419 update_ret = FAIL;
2420 }
2421 else
2422 {
2423 update_ret = SUCCESS;
2424 }
2425
2426 update_fail:
2427 GTP_DEBUG("[update_proc]leave update mode.");
2428 gup_leave_update_mode(ts);
2429
2430 msleep(100);
2431
2432 if (SUCCESS == update_ret)
2433 {
2434 if (ts->fw_error)
2435 {
2436 GTP_INFO("firmware error auto update, resent config!");
2437 gup_init_panel(ts);
2438 }
2439 else
2440 {
2441 GTP_DEBUG("[update_proc]send config.");
2442 ret = gtp_send_cfg(i2c_connect_client);
2443 if (ret < 0)
2444 {
2445 GTP_ERROR("[update_proc]send config fail.");
2446 }
2447 else
2448 {
2449 msleep(100);
2450 }
2451 }
2452 }
2453 ts->enter_update = 0;
2454 gtp_irq_enable(ts);
2455
2456 #if GTP_ESD_PROTECT
2457 gtp_esd_switch(ts->client, SWITCH_ON);
2458 #endif
2459
2460 file_fail:
2461 if (update_msg.file && !IS_ERR(update_msg.file))
2462 {
2463 if (update_msg.old_fs)
2464 {
2465 set_fs(update_msg.old_fs);
2466 }
2467 filp_close(update_msg.file, NULL);
2468 }
2469 #if (GTP_AUTO_UPDATE && GTP_AUTO_UPDATE_CFG && GTP_HEADER_FW_UPDATE)
2470 if (NULL == dir)
2471 {
2472 gup_search_file(AUTO_SEARCH_CFG);
2473 if (got_file_flag & CFG_FILE_READY)
2474 {
2475 ret = gup_update_config(i2c_connect_client);
2476 if(ret <= 0)
2477 {
2478 GTP_ERROR("Update config failed.");
2479 }
2480 _CLOSE_FILE(update_msg.cfg_file);
2481 msleep(500); //waiting config to be stored in FLASH.
2482 }
2483 }
2484 #endif
2485
2486 total_len = 100;
2487 if (SUCCESS == update_ret)
2488 {
2489 show_len = 100;
2490 return SUCCESS;
2491 }
2492 else
2493 {
2494 show_len = 200;
2495 return FAIL;
2496 }
2497 }
2498
2499 #if GTP_AUTO_UPDATE
gup_init_update_proc(struct goodix_ts_data * ts)2500 u8 gup_init_update_proc(struct goodix_ts_data *ts)
2501 {
2502 struct task_struct *thread = NULL;
2503
2504 GTP_INFO("Ready to run update thread.");
2505
2506 #if GTP_COMPATIBLE_MODE
2507 if (CHIP_TYPE_GT9F == ts->chip_type)
2508 {
2509 thread = kthread_run(gup_update_proc, "update", "fl update");
2510 }
2511 else
2512 #endif
2513 {
2514 thread = kthread_run(gup_update_proc, (void*)NULL, "guitar_update");
2515 }
2516 if (IS_ERR(thread))
2517 {
2518 GTP_ERROR("Failed to create update thread.\n");
2519 return -1;
2520 }
2521
2522 return 0;
2523 }
2524 #endif
2525
2526
2527 //************************** For GT9XXF Start ***********************//
2528 #define FW_DOWNLOAD_LENGTH 0x4000
2529 #define FW_SS51_SECTION_LEN 0x2000 // 4 section, each 8k
2530 #define FL_PACK_SIZE 1024
2531 #define GUP_FW_CHK_SIZE FL_PACK_SIZE //FL_PACK_SIZE
2532
2533 #define FL_UPDATE_PATH "/data/_fl_update_.bin"
2534 #define FL_UPDATE_PATH_SD "/sdcard/_fl_update_.bin"
2535 //for clk cal
2536 #define PULSE_LENGTH (200)
2537 #define INIT_CLK_DAC (50)
2538 #define MAX_CLK_DAC (120)
2539 #define CLK_AVG_TIME (1)
2540 #define MILLION 1000000
2541
2542 #define _wRW_MISCTL__RG_DMY 0x4282
2543 #define _bRW_MISCTL__RG_OSC_CALIB 0x4268
2544 #define _fRW_MISCTL__GIO0 0x41e9
2545 #define _fRW_MISCTL__GIO1 0x41ed
2546 #define _fRW_MISCTL__GIO2 0x41f1
2547 #define _fRW_MISCTL__GIO3 0x41f5
2548 #define _fRW_MISCTL__GIO4 0x41f9
2549 #define _fRW_MISCTL__GIO5 0x41fd
2550 #define _fRW_MISCTL__GIO6 0x4201
2551 #define _fRW_MISCTL__GIO7 0x4205
2552 #define _fRW_MISCTL__GIO8 0x4209
2553 #define _fRW_MISCTL__GIO9 0x420d
2554 #define _fRW_MISCTL__MEA 0x41a0
2555 #define _bRW_MISCTL__MEA_MODE 0x41a1
2556 #define _wRW_MISCTL__MEA_MAX_NUM 0x41a4
2557 #define _dRO_MISCTL__MEA_VAL 0x41b0
2558 #define _bRW_MISCTL__MEA_SRCSEL 0x41a3
2559 #define _bRO_MISCTL__MEA_RDY 0x41a8
2560 #define _rRW_MISCTL__ANA_RXADC_B0_ 0x4250
2561 #define _bRW_MISCTL__RG_LDO_A18_PWD 0x426f
2562 #define _bRW_MISCTL__RG_BG_PWD 0x426a
2563 #define _bRW_MISCTL__RG_CLKGEN_PWD 0x4269
2564 #define _fRW_MISCTL__RG_RXADC_PWD 0x426a
2565 #define _bRW_MISCTL__OSC_CK_SEL 0x4030
2566 #define _rRW_MISCTL_RG_DMY83 0x4283
2567 #define _rRW_MISCTL__GIO1CTL_B2_ 0x41ee
2568 #define _rRW_MISCTL__GIO1CTL_B1_ 0x41ed
2569
2570
2571 #if GTP_COMPATIBLE_MODE
2572
2573 u8 i2c_opr_buf[GTP_ADDR_LENGTH + FL_PACK_SIZE] = {0};
2574 u8 chk_cmp_buf[FL_PACK_SIZE] = {0};
2575
2576 extern s32 gtp_fw_startup(struct i2c_client *client);
2577 static u8 gup_download_fw_dsp(struct i2c_client *client, u8 dwn_mode);
2578 static s32 gup_burn_fw_proc(struct i2c_client *client, u16 start_addr, s32 start_index, s32 burn_len);
2579 static s32 gup_check_and_repair(struct i2c_client *client, u16 start_addr, s32 start_index, s32 chk_len);
2580
2581
gup_check_fs_mounted(char * path_name)2582 u8 gup_check_fs_mounted(char *path_name)
2583 {
2584 struct path root_path;
2585 struct path path;
2586 int err;
2587 err = kern_path("/", LOOKUP_FOLLOW, &root_path);
2588
2589 if (err)
2590 {
2591 GTP_DEBUG("\"/\" NOT Mounted: %d", err);
2592 return FAIL;
2593 }
2594 err = kern_path(path_name, LOOKUP_FOLLOW, &path);
2595
2596 if (err)
2597 {
2598 GTP_DEBUG("%s NOT Mounted: %d", path_name, err);
2599 return FAIL;
2600 }
2601
2602 #if 1
2603 path_put(&path);
2604 return SUCCESS;
2605 #else
2606 if (path.mnt->mnt_sb == root_path.mnt->mnt_sb)
2607 {
2608 //-- not mounted
2609 path_put(&path);
2610 return FAIL;
2611 }
2612 else
2613 {
2614 path_put(&path);
2615 return SUCCESS;
2616 }
2617 #endif
2618 }
2619
i2c_write_bytes(struct i2c_client * client,u16 addr,u8 * buf,s32 len)2620 s32 i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len)
2621 {
2622 s32 ret = 0;
2623 s32 write_bytes = 0;
2624 s32 retry = 0;
2625 u8 *tx_buf = buf;
2626
2627 while (len > 0)
2628 {
2629 i2c_opr_buf[0] = (u8)(addr >> 8);
2630 i2c_opr_buf[1] = (u8)(addr & 0xFF);
2631 if (len > FL_PACK_SIZE)
2632 {
2633 write_bytes = FL_PACK_SIZE;
2634 }
2635 else
2636 {
2637 write_bytes = len;
2638 }
2639 memcpy(i2c_opr_buf + 2, tx_buf, write_bytes);
2640 for (retry = 0; retry < 5; ++retry)
2641 {
2642 ret = gup_i2c_write(client, i2c_opr_buf, write_bytes + GTP_ADDR_LENGTH);
2643 if (ret == 1)
2644 {
2645 break;
2646 }
2647 }
2648 if (retry >= 5)
2649 {
2650 GTP_ERROR("retry timeout, I2C write 0x%04X %d bytes failed!", addr, write_bytes);
2651 return -1;
2652 }
2653 addr += write_bytes;
2654 len -= write_bytes;
2655 tx_buf += write_bytes;
2656 }
2657
2658 return 1;
2659 }
2660
i2c_read_bytes(struct i2c_client * client,u16 addr,u8 * buf,s32 len)2661 s32 i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len)
2662 {
2663 s32 ret = 0;
2664 s32 read_bytes = 0;
2665 s32 retry = 0;
2666 u8 *tx_buf = buf;
2667
2668 while (len > 0)
2669 {
2670 i2c_opr_buf[0] = (u8)(addr >> 8);
2671 i2c_opr_buf[1] = (u8)(addr & 0xFF);
2672 if (len > FL_PACK_SIZE)
2673 {
2674 read_bytes = FL_PACK_SIZE;
2675 }
2676 else
2677 {
2678 read_bytes = len;
2679 }
2680 for (retry = 0; retry < 5; ++retry)
2681 {
2682 ret = gup_i2c_read(client, i2c_opr_buf, read_bytes + GTP_ADDR_LENGTH);
2683 if (ret == 2)
2684 {
2685 break;
2686 }
2687 }
2688 if (retry >= 5)
2689 {
2690 GTP_ERROR("retry timeout, I2C read 0x%04X %d bytes failed!", addr, read_bytes);
2691 return -1;
2692 }
2693 memcpy(tx_buf, i2c_opr_buf + 2, read_bytes);
2694 addr += read_bytes;
2695 len -= read_bytes;
2696 tx_buf += read_bytes;
2697 }
2698 return 2;
2699 }
2700
2701
2702
2703 // main clock calibration
2704 // bit: 0~7, val: 0/1
gup_bit_write(s32 addr,s32 bit,s32 val)2705 static void gup_bit_write(s32 addr, s32 bit, s32 val)
2706 {
2707 u8 buf;
2708 i2c_read_bytes(i2c_connect_client, addr, &buf, 1);
2709
2710 buf = (buf & (~((u8)1 << bit))) | ((u8)val << bit);
2711
2712 i2c_write_bytes(i2c_connect_client, addr, &buf, 1);
2713 }
2714
gup_clk_count_init(s32 bCh,s32 bCNT)2715 static void gup_clk_count_init(s32 bCh, s32 bCNT)
2716 {
2717 u8 buf;
2718
2719 //_fRW_MISCTL__MEA_EN = 0; //Frequency measure enable
2720 gup_bit_write(_fRW_MISCTL__MEA, 0, 0);
2721 //_fRW_MISCTL__MEA_CLR = 1; //Frequency measure clear
2722 gup_bit_write(_fRW_MISCTL__MEA, 1, 1);
2723 //_bRW_MISCTL__MEA_MODE = 0; //Pulse mode
2724 buf = 0;
2725 i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__MEA_MODE, &buf, 1);
2726 //_bRW_MISCTL__MEA_SRCSEL = 8 + bCh; //From GIO1
2727 buf = 8 + bCh;
2728 i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__MEA_SRCSEL, &buf, 1);
2729 //_wRW_MISCTL__MEA_MAX_NUM = bCNT; //Set the Measure Counts = 1
2730 buf = bCNT;
2731 i2c_write_bytes(i2c_connect_client, _wRW_MISCTL__MEA_MAX_NUM, &buf, 1);
2732 //_fRW_MISCTL__MEA_CLR = 0; //Frequency measure not clear
2733 gup_bit_write(_fRW_MISCTL__MEA, 1, 0);
2734 //_fRW_MISCTL__MEA_EN = 1;
2735 gup_bit_write(_fRW_MISCTL__MEA, 0, 1);
2736 }
2737
gup_clk_count_get(void)2738 static u32 gup_clk_count_get(void)
2739 {
2740 s32 ready = 0;
2741 s32 temp;
2742 s8 buf[4];
2743
2744 while (ready == 0) //Wait for measurement complete
2745 {
2746 i2c_read_bytes(i2c_connect_client, _bRO_MISCTL__MEA_RDY, buf, 1);
2747 ready = buf[0];
2748 }
2749
2750 msleep(50);
2751
2752 //_fRW_MISCTL__MEA_EN = 0;
2753 gup_bit_write(_fRW_MISCTL__MEA, 0, 0);
2754 i2c_read_bytes(i2c_connect_client, _dRO_MISCTL__MEA_VAL, buf, 4);
2755 GTP_DEBUG("Clk_count 0: %2X", buf[0]);
2756 GTP_DEBUG("Clk_count 1: %2X", buf[1]);
2757 GTP_DEBUG("Clk_count 2: %2X", buf[2]);
2758 GTP_DEBUG("Clk_count 3: %2X", buf[3]);
2759
2760 temp = (s32)buf[0] + ((s32)buf[1] << 8) + ((s32)buf[2] << 16) + ((s32)buf[3] << 24);
2761 GTP_INFO("Clk_count : %d", temp);
2762 return temp;
2763 }
gup_clk_dac_setting(int dac)2764 u8 gup_clk_dac_setting(int dac)
2765 {
2766 s8 buf1, buf2;
2767
2768 i2c_read_bytes(i2c_connect_client, _wRW_MISCTL__RG_DMY, &buf1, 1);
2769 i2c_read_bytes(i2c_connect_client, _bRW_MISCTL__RG_OSC_CALIB, &buf2, 1);
2770
2771 buf1 = (buf1 & 0xFFCF) | ((dac & 0x03) << 4);
2772 buf2 = (dac >> 2) & 0x3f;
2773
2774 i2c_write_bytes(i2c_connect_client, _wRW_MISCTL__RG_DMY, &buf1, 1);
2775 i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_OSC_CALIB, &buf2, 1);
2776
2777 return 0;
2778 }
2779
gup_clk_calibration_pin_select(s32 bCh)2780 static u8 gup_clk_calibration_pin_select(s32 bCh)
2781 {
2782 s32 i2c_addr;
2783
2784 switch (bCh)
2785 {
2786 case 0:
2787 i2c_addr = _fRW_MISCTL__GIO0;
2788 break;
2789
2790 case 1:
2791 i2c_addr = _fRW_MISCTL__GIO1;
2792 break;
2793
2794 case 2:
2795 i2c_addr = _fRW_MISCTL__GIO2;
2796 break;
2797
2798 case 3:
2799 i2c_addr = _fRW_MISCTL__GIO3;
2800 break;
2801
2802 case 4:
2803 i2c_addr = _fRW_MISCTL__GIO4;
2804 break;
2805
2806 case 5:
2807 i2c_addr = _fRW_MISCTL__GIO5;
2808 break;
2809
2810 case 6:
2811 i2c_addr = _fRW_MISCTL__GIO6;
2812 break;
2813
2814 case 7:
2815 i2c_addr = _fRW_MISCTL__GIO7;
2816 break;
2817
2818 case 8:
2819 i2c_addr = _fRW_MISCTL__GIO8;
2820 break;
2821
2822 case 9:
2823 i2c_addr = _fRW_MISCTL__GIO9;
2824 break;
2825 }
2826
2827 gup_bit_write(i2c_addr, 1, 0);
2828
2829 return 0;
2830 }
2831
gup_output_pulse(int t)2832 void gup_output_pulse(int t)
2833 {
2834 unsigned long flags;
2835 struct goodix_ts_data *ts;
2836
2837 ts = i2c_get_clientdata(i2c_connect_client);
2838
2839 GTP_GPIO_OUTPUT(ts->irq_pin, 0);
2840 msleep(10);
2841
2842 local_irq_save(flags);
2843
2844 GTP_GPIO_OUTPUT(ts->irq_pin, 1);
2845 msleep(50);
2846 GTP_GPIO_OUTPUT(ts->irq_pin, 0);
2847 msleep(t - 50);
2848 GTP_GPIO_OUTPUT(ts->irq_pin, 1);
2849
2850 local_irq_restore(flags);
2851
2852 msleep(20);
2853 GTP_GPIO_OUTPUT(ts->irq_pin, 0);
2854 }
2855
gup_sys_clk_init(void)2856 static void gup_sys_clk_init(void)
2857 {
2858 u8 buf;
2859
2860 //_fRW_MISCTL__RG_RXADC_CKMUX = 0;
2861 gup_bit_write(_rRW_MISCTL__ANA_RXADC_B0_, 5, 0);
2862 //_bRW_MISCTL__RG_LDO_A18_PWD = 0; //DrvMISCTL_A18_PowerON
2863 buf = 0;
2864 i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_LDO_A18_PWD, &buf, 1);
2865 //_bRW_MISCTL__RG_BG_PWD = 0; //DrvMISCTL_BG_PowerON
2866 buf = 0;
2867 i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_BG_PWD, &buf, 1);
2868 //_bRW_MISCTL__RG_CLKGEN_PWD = 0; //DrvMISCTL_CLKGEN_PowerON
2869 buf = 0;
2870 i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_CLKGEN_PWD, &buf, 1);
2871 //_fRW_MISCTL__RG_RXADC_PWD = 0; //DrvMISCTL_RX_ADC_PowerON
2872 gup_bit_write(_rRW_MISCTL__ANA_RXADC_B0_, 0, 0);
2873 //_fRW_MISCTL__RG_RXADC_REF_PWD = 0; //DrvMISCTL_RX_ADCREF_PowerON
2874 gup_bit_write(_rRW_MISCTL__ANA_RXADC_B0_, 1, 0);
2875 //gup_clk_dac_setting(60);
2876 //_bRW_MISCTL__OSC_CK_SEL = 1;;
2877 buf = 1;
2878 i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__OSC_CK_SEL, &buf, 1);
2879 }
2880
gup_clk_calibration(void)2881 s32 gup_clk_calibration(void)
2882 {
2883 u8 buf;
2884 //u8 trigger;
2885 s32 i;
2886 struct timespec64 start, end;
2887 s32 count;
2888 s32 count_ref;
2889 s32 sec;
2890 s32 usec;
2891 //unsigned long flags;
2892 struct goodix_ts_data *ts;
2893
2894 ts = i2c_get_clientdata(i2c_connect_client);
2895
2896 buf = 0x0C; // hold ss51 and dsp
2897 i2c_write_bytes(i2c_connect_client, _rRW_MISCTL__SWRST_B0_, &buf, 1);
2898
2899 //_fRW_MISCTL__CLK_BIAS = 0; //disable clock bias
2900 gup_bit_write(_rRW_MISCTL_RG_DMY83, 7, 0);
2901
2902 //_fRW_MISCTL__GIO1_PU = 0; //set TOUCH INT PIN MODE as input
2903 gup_bit_write(_rRW_MISCTL__GIO1CTL_B2_, 0, 0);
2904
2905 //_fRW_MISCTL__GIO1_OE = 0; //set TOUCH INT PIN MODE as input
2906 gup_bit_write(_rRW_MISCTL__GIO1CTL_B1_, 1, 0);
2907
2908 //buf = 0x00;
2909 //i2c_write_bytes(i2c_connect_client, _rRW_MISCTL__SWRST_B0_, &buf, 1);
2910 //msleep(1000);
2911
2912 GTP_INFO("CLK calibration GO");
2913 gup_sys_clk_init();
2914 gup_clk_calibration_pin_select(1);//use GIO1 to do the calibration
2915
2916 GTP_GPIO_OUTPUT(ts->irq_pin, 0);
2917
2918 for (i = INIT_CLK_DAC; i < MAX_CLK_DAC; i++)
2919 {
2920 GTP_INFO("CLK calibration DAC %d", i);
2921
2922 if (ts->gtp_is_suspend)
2923 {
2924 i = 72; // 80; // if sleeping while calibrating main clock, set it default 72
2925 break;
2926 }
2927
2928 gup_clk_dac_setting(i);
2929 gup_clk_count_init(1, CLK_AVG_TIME);
2930
2931 #if 0
2932 gup_output_pulse(PULSE_LENGTH);
2933 count = gup_clk_count_get();
2934
2935 if (count > PULSE_LENGTH * 60)//60= 60Mhz * 1us
2936 {
2937 break;
2938 }
2939
2940 #else
2941 GTP_GPIO_OUTPUT(ts->irq_pin, 0);
2942
2943 //local_irq_save(flags);
2944 ktime_get_real_ts64(&start);
2945 GTP_GPIO_OUTPUT(ts->irq_pin, 1);
2946 //local_irq_restore(flags);
2947
2948 msleep(1);
2949 GTP_GPIO_OUTPUT(ts->irq_pin, 0);
2950 msleep(1);
2951
2952 //local_irq_save(flags);
2953 ktime_get_real_ts64(&end);
2954 GTP_GPIO_OUTPUT(ts->irq_pin, 1);
2955 //local_irq_restore(flags);
2956
2957 count = gup_clk_count_get();
2958 msleep(20);
2959 GTP_GPIO_OUTPUT(ts->irq_pin, 0);
2960
2961 usec = (end.tv_nsec - start.tv_nsec)/1000;
2962 sec = end.tv_sec - start.tv_sec;
2963 count_ref = 60 * (usec+ sec * MILLION);//60= 60Mhz * 1us
2964
2965 GTP_DEBUG("== time %d, %d, %d", sec, usec, count_ref);
2966
2967 if (count > count_ref)
2968 {
2969 GTP_DEBUG("== count_diff %d", count - count_ref);
2970 break;
2971 }
2972
2973 #endif
2974 }
2975
2976 //clk_dac = i;
2977
2978 gtp_reset_guitar(i2c_connect_client, 20);
2979
2980 #if 0//for debug
2981 //-- ouput clk to GPIO 4
2982 buf = 0x00;
2983 i2c_write_bytes(i2c_connect_client, 0x41FA, &buf, 1);
2984 buf = 0x00;
2985 i2c_write_bytes(i2c_connect_client, 0x4104, &buf, 1);
2986 buf = 0x00;
2987 i2c_write_bytes(i2c_connect_client, 0x4105, &buf, 1);
2988 buf = 0x00;
2989 i2c_write_bytes(i2c_connect_client, 0x4106, &buf, 1);
2990 buf = 0x01;
2991 i2c_write_bytes(i2c_connect_client, 0x4107, &buf, 1);
2992 buf = 0x06;
2993 i2c_write_bytes(i2c_connect_client, 0x41F8, &buf, 1);
2994 buf = 0x02;
2995 i2c_write_bytes(i2c_connect_client, 0x41F9, &buf, 1);
2996 #endif
2997
2998 /*GTP_GPIO_AS_INT(ts->irq_pin);*/
2999 gpio_direction_input(ts->irq_pin);
3000 return i;
3001 }
3002
3003
3004
gup_hold_ss51_dsp(struct i2c_client * client)3005 s32 gup_hold_ss51_dsp(struct i2c_client *client)
3006 {
3007 s32 ret = -1;
3008 s32 retry = 0;
3009 u8 rd_buf[3];
3010
3011 while(retry++ < 200)
3012 {
3013 // step4:Hold ss51 & dsp
3014 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
3015 if(ret <= 0)
3016 {
3017 GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
3018 continue;
3019 }
3020
3021 // step5:Confirm hold
3022 ret = gup_get_ic_msg(client, _rRW_MISCTL__SWRST_B0_, rd_buf, 1);
3023 if (ret <= 0)
3024 {
3025 GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
3026 continue;
3027 }
3028 if (0x0C == rd_buf[GTP_ADDR_LENGTH])
3029 {
3030 GTP_DEBUG("[enter_update_mode]Hold ss51 & dsp confirm SUCCESS");
3031 break;
3032 }
3033 GTP_DEBUG("Hold ss51 & dsp confirm 0x4180 failed,value:%d", rd_buf[GTP_ADDR_LENGTH]);
3034 }
3035 if(retry >= 200)
3036 {
3037 GTP_ERROR("Enter update Hold ss51 failed.");
3038 return FAIL;
3039 }
3040 //DSP_CK and DSP_ALU_CK PowerOn
3041 ret = gup_set_ic_msg(client, 0x4010, 0x00);
3042 if (ret <= 0)
3043 {
3044 GTP_ERROR("[enter_update_mode]DSP_CK and DSP_ALU_CK PowerOn fail.");
3045 return FAIL;
3046 }
3047
3048 //disable wdt
3049 ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00);
3050
3051 if (ret <= 0)
3052 {
3053 GTP_ERROR("[enter_update_mode]disable wdt fail.");
3054 return FAIL;
3055 }
3056
3057 //clear cache enable
3058 ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00);
3059
3060 if (ret <= 0)
3061 {
3062 GTP_ERROR("[enter_update_mode]clear cache enable fail.");
3063 return FAIL;
3064 }
3065
3066 //set boot from sram
3067 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02);
3068
3069 if (ret <= 0)
3070 {
3071 GTP_ERROR("[enter_update_mode]set boot from sram fail.");
3072 return FAIL;
3073 }
3074
3075 //software reboot
3076 ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01);
3077 if (ret <= 0)
3078 {
3079 GTP_ERROR("[enter_update_mode]software reboot fail.");
3080 return FAIL;
3081 }
3082
3083 return SUCCESS;
3084 }
3085
gup_enter_update_mode_fl(struct i2c_client * client)3086 s32 gup_enter_update_mode_fl(struct i2c_client *client)
3087 {
3088 s32 ret = -1;
3089 //s32 retry = 0;
3090 //u8 rd_buf[3];
3091 struct goodix_ts_data *ts = i2c_get_clientdata(client);
3092
3093 //step1:RST output low last at least 2ms
3094 GTP_GPIO_OUTPUT(ts->rst_pin, 0);
3095 msleep(2);
3096
3097 //step2:select I2C slave addr,INT:0--0xBA;1--0x28.
3098 GTP_GPIO_OUTPUT(ts->irq_pin, (client->addr == 0x14));
3099 msleep(2);
3100
3101 //step3:RST output high reset guitar
3102 GTP_GPIO_OUTPUT(ts->rst_pin, 1);
3103
3104 msleep(5);
3105
3106 //select addr & hold ss51_dsp
3107 ret = gup_hold_ss51_dsp(client);
3108 if (ret <= 0)
3109 {
3110 GTP_ERROR("[enter_update_mode]hold ss51 & dsp failed.");
3111 return FAIL;
3112 }
3113
3114 //clear control flag
3115 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00);
3116
3117 if (ret <= 0)
3118 {
3119 GTP_ERROR("[enter_update_mode]clear control flag fail.");
3120 return FAIL;
3121 }
3122
3123 //set scramble
3124 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
3125
3126 if (ret <= 0)
3127 {
3128 GTP_ERROR("[enter_update_mode]set scramble fail.");
3129 return FAIL;
3130 }
3131
3132 //enable accessing code
3133 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
3134
3135 if (ret <= 0)
3136 {
3137 GTP_ERROR("[enter_update_mode]enable accessing code fail.");
3138 return FAIL;
3139 }
3140
3141 return SUCCESS;
3142 }
3143
gup_download_fw_dsp(struct i2c_client * client,u8 dwn_mode)3144 static u8 gup_download_fw_dsp(struct i2c_client *client, u8 dwn_mode)
3145 {
3146 s32 ret = 0;
3147
3148 //step1:select bank2
3149 GTP_DEBUG("[download_fw_dsp]step1:select bank2");
3150 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02);
3151 if (ret == FAIL)
3152 {
3153 GTP_ERROR("select bank 2 fail");
3154 return FAIL;
3155 }
3156
3157 if (GTP_FL_FW_BURN == dwn_mode)
3158 {
3159 GTP_INFO("[download_fw_dsp]Begin download dsp fw---->>");
3160
3161 if (ret <= 0)
3162 {
3163 GTP_ERROR("[download_fw_dsp]select bank2 fail.");
3164 return FAIL;
3165 }
3166 GTP_DEBUG("burn fw dsp");
3167 ret = gup_burn_fw_proc(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH); // write the second ban
3168 if (FAIL == ret)
3169 {
3170 GTP_ERROR("[download_fw_dsp]download FW dsp fail.");
3171 return FAIL;
3172 }
3173 GTP_INFO("check firmware dsp");
3174 ret = gup_check_and_repair(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH);
3175 if (FAIL == ret)
3176 {
3177 GTP_ERROR("check fw dsp failed!");
3178 return FAIL;
3179 }
3180 }
3181 else if (GTP_FL_ESD_RECOVERY == dwn_mode)
3182 {
3183 GTP_INFO("[download_fw_dsp]Begin esd check dsp fw---->>");
3184 //GTP_INFO("esd recovery: check fw dsp");
3185 //ret = gup_check_and_repair(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH);
3186
3187 //if(FAIL == ret)
3188 {
3189 //GTP_ERROR("[download_fw_dsp]Checked FW dsp fail, redownload fw dsp");
3190 GTP_INFO("esd recovery redownload firmware dsp code");
3191 ret = gup_burn_fw_proc(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH);
3192 if (FAIL == ret)
3193 {
3194 GTP_ERROR("redownload fw dsp failed!");
3195 return FAIL;
3196 }
3197 }
3198 }
3199 else
3200 {
3201 GTP_INFO("check firmware dsp");
3202 ret = gup_check_and_repair(client, 0xC000, 2 * FW_DOWNLOAD_LENGTH, FW_DSP_LENGTH);
3203 if (FAIL == ret)
3204 {
3205 GTP_ERROR("check fw dsp failed!");
3206 return FAIL;
3207 }
3208 }
3209 return SUCCESS;
3210 }
3211
gup_burn_fw_proc(struct i2c_client * client,u16 start_addr,s32 start_index,s32 burn_len)3212 static s32 gup_burn_fw_proc(struct i2c_client *client, u16 start_addr, s32 start_index, s32 burn_len)
3213 {
3214 s32 ret = 0;
3215
3216 GTP_DEBUG("burn firmware: 0x%04X, %d bytes, start_index: 0x%04X", start_addr, burn_len, start_index);
3217
3218 ret = i2c_write_bytes(client, start_addr, (u8*)>p_default_FW_fl[FW_HEAD_LENGTH + start_index], burn_len);
3219 if (ret < 0)
3220 {
3221 GTP_ERROR("burn 0x%04X, %d bytes failed!", start_addr, burn_len);
3222 return FAIL;
3223 }
3224 return SUCCESS;
3225 }
3226
gup_check_and_repair(struct i2c_client * client,u16 start_addr,s32 start_index,s32 chk_len)3227 static s32 gup_check_and_repair(struct i2c_client *client, u16 start_addr, s32 start_index, s32 chk_len)
3228 {
3229 s32 ret = 0;
3230 s32 cmp_len = 0;
3231 u16 cmp_addr = start_addr;
3232 s32 i = 0;
3233 s32 chked_times = 0;
3234 u8 chk_fail = 0;
3235
3236 GTP_DEBUG("check firmware: start 0x%04X, %d bytes", start_addr, chk_len);
3237 while ((chk_len > 0) && (chked_times < GTP_CHK_FW_MAX))
3238 {
3239 if (chk_len >= GUP_FW_CHK_SIZE)
3240 {
3241 cmp_len = GUP_FW_CHK_SIZE;
3242 }
3243 else
3244 {
3245 cmp_len = chk_len;
3246 }
3247 if ((FW_HEAD_LENGTH + start_index + cmp_len) > sizeof(gtp_default_FW_fl)) {
3248 GTP_ERROR("Check failed, buffer overflow\n");
3249 break;
3250 }
3251 ret = i2c_read_bytes(client, cmp_addr, chk_cmp_buf, cmp_len);
3252 if (ret < 0)
3253 {
3254 chk_fail = 1;
3255 break;
3256 }
3257 for (i = 0; i < cmp_len; i++)
3258 {
3259 if (chk_cmp_buf[i] != gtp_default_FW_fl[FW_HEAD_LENGTH + start_index +i])
3260 {
3261 chk_fail = 1;
3262 i2c_write_bytes(client, cmp_addr+i, >p_default_FW_fl[FW_HEAD_LENGTH + start_index + i], cmp_len-i);
3263 GTP_ERROR("Check failed index: %d(%d != %d), redownload chuck", i, chk_cmp_buf[i],
3264 gtp_default_FW_fl[FW_HEAD_LENGTH + start_index +i]);
3265 break;
3266 }
3267 }
3268 if (chk_fail == 1)
3269 {
3270 chk_fail = 0;
3271 chked_times++;
3272 }
3273 else
3274 {
3275 cmp_addr += cmp_len;
3276 start_index += cmp_len;
3277 chk_len -= cmp_len;
3278 }
3279 }
3280 if (chk_len > 0)
3281 {
3282 GTP_ERROR("cmp_addr: 0x%04X, start_index: 0x%02X, chk_len: 0x%04X", cmp_addr,
3283 start_index, chk_len);
3284 return FAIL;
3285 }
3286 return SUCCESS;
3287 }
3288
gup_download_fw_ss51(struct i2c_client * client,u8 dwn_mode)3289 static u8 gup_download_fw_ss51(struct i2c_client *client, u8 dwn_mode)
3290 {
3291 s32 section = 0;
3292 s32 ret = 0;
3293 s32 start_index = 0;
3294 u8 bank = 0;
3295 u16 burn_addr = 0xC000;
3296
3297 if (GTP_FL_FW_BURN == dwn_mode)
3298 {
3299 GTP_INFO("download firmware ss51");
3300 }
3301 else
3302 {
3303 GTP_INFO("check firmware ss51");
3304 }
3305 for (section = 1; section <= 4; section += 2)
3306 {
3307 switch (section)
3308 {
3309 case 1:
3310 bank = 0x00;
3311 burn_addr = (section - 1) * FW_SS51_SECTION_LEN + 0xC000;
3312 break;
3313 case 3:
3314 bank = 0x01;
3315 burn_addr = (section - 3) * FW_SS51_SECTION_LEN + 0xC000;
3316 break;
3317 }
3318 start_index = (section - 1) * FW_SS51_SECTION_LEN;
3319
3320 GTP_DEBUG("download firmware ss51: select bank%d", bank);
3321 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, bank);
3322 if (GTP_FL_FW_BURN == dwn_mode)
3323 {
3324 GTP_INFO("download firmware ss51 section%d & %d", section, section+1);
3325 ret = gup_burn_fw_proc(client, burn_addr, start_index, 2 * FW_SS51_SECTION_LEN);
3326 if (ret == FAIL)
3327 {
3328 GTP_ERROR("download fw ss51 section%d & %d failed!", section, section+1);
3329 return FAIL;
3330 }
3331 GTP_INFO("check firmware ss51 section%d & %d", section, section+1);
3332 ret = gup_check_and_repair(client, burn_addr, start_index, 2 * FW_SS51_SECTION_LEN);
3333 if (ret == FAIL)
3334 {
3335 GTP_ERROR("check ss51 section%d & %d failed!", section, section+1);
3336 return FAIL;
3337 }
3338 }
3339 else if (GTP_FL_ESD_RECOVERY == dwn_mode)// esd recovery mode
3340 {
3341 // GTP_INFO("esd recovery check ss51 section%d & %d", section, section+1);
3342 // ret = gup_check_and_repair(client, burn_addr, start_index, FW_SS51_SECTION_LEN);
3343 // if (ret == FAIL)
3344 {
3345 // GTP_ERROR("check ss51 section%d failed, redownload section%d", section, section);
3346 GTP_INFO("esd recovery redownload ss51 section%d & %d", section, section+1);
3347 ret = gup_burn_fw_proc(client, burn_addr, start_index, 2 * FW_SS51_SECTION_LEN);
3348 if (ret == FAIL)
3349 {
3350 GTP_ERROR("download fw ss51 section%d failed!", section);
3351 return FAIL;
3352 }
3353 }
3354 }
3355 else
3356 {
3357 GTP_INFO("check firmware ss51 section%d & %d", section, section+1);
3358 ret = gup_check_and_repair(client, burn_addr, start_index, 2 * FW_SS51_SECTION_LEN);
3359 if (ret == FAIL)
3360 {
3361 GTP_ERROR("check ss51 section%d & %d failed!", section, section+1);
3362 return FAIL;
3363 }
3364 }
3365 }
3366
3367 return SUCCESS;
3368 }
3369
3370
gup_prepare_fl_fw(char * path,st_fw_head * fw_head)3371 static s32 gup_prepare_fl_fw(char *path, st_fw_head *fw_head)
3372 {
3373 s32 ret = 0;
3374 s32 i = 0;
3375 s32 timeout = 0;
3376 struct goodix_ts_data *ts = i2c_get_clientdata(i2c_connect_client);
3377
3378 if (!memcmp(path, "update", 6))
3379 {
3380 GTP_INFO("Search for GT9XXF firmware file to update");
3381
3382 searching_file = 1;
3383 for (i = 0; i < GUP_SEARCH_FILE_TIMES; ++i)
3384 {
3385 if (0 == searching_file)
3386 {
3387 GTP_INFO("Force terminate auto update for GT9XXF...");
3388 return FAIL;
3389 }
3390 GTP_DEBUG("Search for %s, %s for fw update.(%d/%d)", FL_UPDATE_PATH, FL_UPDATE_PATH_SD, i+1, GUP_SEARCH_FILE_TIMES);
3391 update_msg.file = filp_open(FL_UPDATE_PATH, O_RDONLY, 0);
3392 if (IS_ERR(update_msg.file))
3393 {
3394 update_msg.file = filp_open(FL_UPDATE_PATH_SD, O_RDONLY, 0);
3395 if (IS_ERR(update_msg.file))
3396 {
3397 msleep(3000);
3398 continue;
3399 }
3400 else
3401 {
3402 path = FL_UPDATE_PATH_SD;
3403 break;
3404 }
3405 }
3406 else
3407 {
3408 path = FL_UPDATE_PATH;
3409 break;
3410 }
3411 }
3412 searching_file = 0;
3413 if (i == 50)
3414 {
3415 GTP_INFO("Search timeout, update aborted");
3416 return FAIL;
3417 }
3418 else
3419 {
3420 GTP_INFO("GT9XXF firmware file %s found!", path);
3421 _CLOSE_FILE(update_msg.file);
3422 }
3423 while (ts->rqst_processing && (timeout++ < 5))
3424 {
3425 GTP_DEBUG("request processing, waiting for accomplishment");
3426 msleep(1000);
3427 }
3428 }
3429 GTP_INFO("Firmware update file path: %s", path);
3430
3431 update_msg.file = filp_open(path, O_RDONLY, 0);
3432
3433 if (IS_ERR(update_msg.file))
3434 {
3435 GTP_ERROR("Open update file(%s) error!", path);
3436 return FAIL;
3437 }
3438
3439 update_msg.old_fs = get_fs();
3440 set_fs(KERNEL_DS);
3441
3442 update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
3443 update_msg.fw_total_len = update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_END);
3444
3445 update_msg.force_update = 0xBE; // GT9XXF ignore the 0xBE
3446 if (update_msg.fw_total_len != sizeof(gtp_default_FW_fl))
3447 {
3448 GTP_ERROR(
3449 "Inconsistent fw size. default size: %d(%dK), file size: %d(%dK)",
3450 (unsigned int)sizeof(gtp_default_FW_fl),
3451 (unsigned int)sizeof(gtp_default_FW_fl) / 1024,
3452 update_msg.fw_total_len,
3453 update_msg.fw_total_len / 1024);
3454 set_fs(update_msg.old_fs);
3455 _CLOSE_FILE(update_msg.file);
3456 return FAIL;
3457 }
3458
3459 update_msg.fw_total_len -= FW_HEAD_LENGTH;
3460 GTP_DEBUG("Fimrware size: %d(%dK)", update_msg.fw_total_len, update_msg.fw_total_len / 1024);
3461
3462 update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
3463 ret = update_msg.file->f_op->read(update_msg.file, (char*)gtp_default_FW_fl,
3464 update_msg.fw_total_len + FW_HEAD_LENGTH,
3465 &update_msg.file->f_pos);
3466 set_fs(update_msg.old_fs);
3467 _CLOSE_FILE(update_msg.file);
3468
3469 if (ret < 0)
3470 {
3471 GTP_ERROR("read %s failed, err-code: %d", path, ret);
3472 return FAIL;
3473 }
3474 return SUCCESS;
3475 }
gup_check_update_file_fl(struct i2c_client * client,st_fw_head * fw_head,char * path)3476 static u8 gup_check_update_file_fl(struct i2c_client *client, st_fw_head* fw_head, char* path)
3477 {
3478 s32 ret = 0;
3479 s32 i = 0;
3480 s32 fw_checksum = 0;
3481
3482 if (NULL != path)
3483 {
3484 ret = gup_prepare_fl_fw(path, fw_head);
3485 if (FAIL == ret)
3486 {
3487 return FAIL;
3488 }
3489 }
3490
3491 memcpy(fw_head, gtp_default_FW_fl, FW_HEAD_LENGTH);
3492 GTP_INFO("FILE HARDWARE INFO: %02x%02x%02x%02x", fw_head->hw_info[0], fw_head->hw_info[1], fw_head->hw_info[2], fw_head->hw_info[3]);
3493 GTP_INFO("FILE PID: %s", fw_head->pid);
3494 fw_head->vid = ((fw_head->vid & 0xFF00) >> 8) + ((fw_head->vid & 0x00FF) << 8);
3495 GTP_INFO("FILE VID: %04x", fw_head->vid);
3496
3497 //check firmware legality
3498 fw_checksum = 0;
3499 for(i = FW_HEAD_LENGTH; i < (FW_HEAD_LENGTH + update_msg.fw_total_len); i += 2)
3500 {
3501 fw_checksum += (gtp_default_FW_fl[i] << 8) + gtp_default_FW_fl[i+1];
3502 }
3503 ret = SUCCESS;
3504
3505 GTP_DEBUG("firmware checksum: %x", fw_checksum&0xFFFF);
3506 if (fw_checksum & 0xFFFF)
3507 {
3508 GTP_ERROR("Illegal firmware file.");
3509 ret = FAIL;
3510 }
3511
3512 return ret;
3513 }
3514
gup_fw_download_proc(void * dir,u8 dwn_mode)3515 s32 gup_fw_download_proc(void *dir, u8 dwn_mode)
3516 {
3517 s32 ret = 0;
3518 u8 retry = 0;
3519 st_fw_head fw_head;
3520 struct goodix_ts_data *ts;
3521
3522 ts = i2c_get_clientdata(i2c_connect_client);
3523 if (NULL == dir)
3524 {
3525 if(GTP_FL_FW_BURN == dwn_mode) // GT9XXF firmware burn mode
3526 {
3527 GTP_INFO("[fw_download_proc]Begin fw download ......");
3528 }
3529 else if (GTP_FL_ESD_RECOVERY == dwn_mode) // GTP_FL_ESD_RECOVERY: GT9XXF esd recovery mode
3530 {
3531 GTP_INFO("[fw_download_proc]Begin fw esd recovery check ......");
3532 }
3533 else
3534 {
3535 GTP_INFO("[fw_download_proc]Being fw repair check......");
3536 }
3537 }
3538 else
3539 {
3540 GTP_INFO("[fw_download_proc]Begin firmware update by bin file");
3541 }
3542
3543 total_len = 100;
3544 show_len = 0;
3545
3546 ret = gup_check_update_file_fl(i2c_connect_client, &fw_head, (char *)dir);
3547 show_len = 10;
3548
3549 if (FAIL == ret)
3550 {
3551 GTP_ERROR("[fw_download_proc]check update file fail.");
3552 goto file_fail;
3553 }
3554
3555 if (!memcmp(fw_head.pid, "950", 3))
3556 {
3557 ts->is_950 = 1;
3558 GTP_DEBUG("GT9XXF Ic Type: gt950");
3559 }
3560 else
3561 {
3562 ts->is_950 = 0;
3563 }
3564
3565 if (NULL != dir)
3566 {
3567 gtp_irq_disable(ts);
3568 #if GTP_ESD_PROTECT
3569 gtp_esd_switch(ts->client, SWITCH_OFF);
3570 #endif
3571 }
3572
3573 ret = gup_enter_update_mode_fl(i2c_connect_client);
3574 show_len = 20;
3575 if (FAIL == ret)
3576 {
3577 GTP_ERROR("[fw_download_proc]enter update mode fail.");
3578 goto download_fail;
3579 }
3580
3581 while (retry++ < 5)
3582 {
3583 ret = gup_download_fw_ss51(i2c_connect_client, dwn_mode);
3584 show_len = 60;
3585 if (FAIL == ret)
3586 {
3587 GTP_ERROR("[fw_download_proc]burn ss51 firmware fail.");
3588 continue;
3589 }
3590
3591 ret = gup_download_fw_dsp(i2c_connect_client, dwn_mode);
3592 show_len = 80;
3593 if (FAIL == ret)
3594 {
3595 GTP_ERROR("[fw_download_proc]burn dsp firmware fail.");
3596 continue;
3597 }
3598
3599 GTP_INFO("[fw_download_proc]UPDATE SUCCESS.");
3600 break;
3601 }
3602
3603 if (retry >= 5)
3604 {
3605 GTP_ERROR("[fw_download_proc]retry timeout,UPDATE FAIL.");
3606 goto download_fail;
3607 }
3608
3609 if (NULL != dir)
3610 {
3611 gtp_irq_enable(ts);
3612 gtp_fw_startup(ts->client);
3613 #if GTP_ESD_PROTECT
3614 gtp_esd_switch(ts->client, SWITCH_ON);
3615 #endif
3616 }
3617 show_len = 100;
3618 return SUCCESS;
3619
3620 download_fail:
3621 if (NULL != dir)
3622 {
3623 gtp_irq_enable(ts);
3624 gtp_fw_startup(ts->client);
3625 #if GTP_ESD_PROTECT
3626 gtp_esd_switch(ts->client, SWITCH_ON);
3627 #endif
3628 }
3629 file_fail:
3630 show_len = 200;
3631
3632 return FAIL;
3633 }
3634
3635 #endif
3636
3637 //**************** For GT9XXF End ********************//
3638