1 /******************************************************************************
2 *
3 * Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 ******************************************************************************/
15
16 #include "halmac_init_88xx.h"
17 #include "halmac_88xx_cfg.h"
18 #include "halmac_fw_88xx.h"
19 #include "halmac_common_88xx.h"
20 #include "halmac_cfg_wmac_88xx.h"
21 #include "halmac_efuse_88xx.h"
22 #include "halmac_mimo_88xx.h"
23 #include "halmac_bb_rf_88xx.h"
24 #if HALMAC_SDIO_SUPPORT
25 #include "halmac_sdio_88xx.h"
26 #endif
27 #if HALMAC_USB_SUPPORT
28 #include "halmac_usb_88xx.h"
29 #endif
30 #if HALMAC_PCIE_SUPPORT
31 #include "halmac_pcie_88xx.h"
32 #endif
33 #include "halmac_gpio_88xx.h"
34 #include "halmac_flash_88xx.h"
35
36 #if HALMAC_8822B_SUPPORT
37 #include "halmac_8822b/halmac_init_8822b.h"
38 #endif
39
40 #if HALMAC_8821C_SUPPORT
41 #include "halmac_8821c/halmac_init_8821c.h"
42 #endif
43
44 #if HALMAC_8822C_SUPPORT
45 #include "halmac_8822c/halmac_init_8822c.h"
46 #endif
47
48 #if HALMAC_8812F_SUPPORT
49 #include "halmac_8812f/halmac_init_8812f.h"
50 #endif
51
52 #if HALMAC_PLATFORM_TESTPROGRAM
53 #include "halmisc_api_88xx.h"
54 #endif
55
56 #if HALMAC_88XX_SUPPORT
57
58 #define PLTFM_INFO_MALLOC_MAX_SIZE 16384
59 #define PLTFM_INFO_RSVD_PG_SIZE 16384
60 #define DLFW_PKT_MAX_SIZE 8192 /* need multiple of 2 */
61
62 static void
63 init_state_machine_88xx(struct halmac_adapter *adapter);
64
65 static enum halmac_ret_status
66 verify_io_88xx(struct halmac_adapter *adapter);
67
68 static enum halmac_ret_status
69 verify_send_rsvd_page_88xx(struct halmac_adapter *adapter);
70
71 void
init_adapter_param_88xx(struct halmac_adapter * adapter)72 init_adapter_param_88xx(struct halmac_adapter *adapter)
73 {
74 adapter->api_registry.rx_exp_en = 1;
75 adapter->api_registry.la_mode_en = 1;
76 adapter->api_registry.cfg_drv_rsvd_pg_en = 1;
77 adapter->api_registry.sdio_cmd53_4byte_en = 1;
78
79 adapter->efuse_map = (u8 *)NULL;
80 adapter->efuse_map_valid = 0;
81 adapter->efuse_end = 0;
82
83 adapter->dlfw_pkt_size = DLFW_PKT_MAX_SIZE;
84 adapter->pltfm_info.malloc_size = PLTFM_INFO_MALLOC_MAX_SIZE;
85 adapter->pltfm_info.rsvd_pg_size = PLTFM_INFO_RSVD_PG_SIZE;
86
87 adapter->cfg_param_info.buf = NULL;
88 adapter->cfg_param_info.buf_wptr = NULL;
89 adapter->cfg_param_info.num = 0;
90 adapter->cfg_param_info.full_fifo_mode = 0;
91 adapter->cfg_param_info.buf_size = 0;
92 adapter->cfg_param_info.avl_buf_size = 0;
93 adapter->cfg_param_info.offset_accum = 0;
94 adapter->cfg_param_info.value_accum = 0;
95
96 adapter->ch_sw_info.buf = NULL;
97 adapter->ch_sw_info.buf_wptr = NULL;
98 adapter->ch_sw_info.extra_info_en = 0;
99 adapter->ch_sw_info.buf_size = 0;
100 adapter->ch_sw_info.avl_buf_size = 0;
101 adapter->ch_sw_info.total_size = 0;
102 adapter->ch_sw_info.ch_num = 0;
103
104 adapter->drv_info_size = 0;
105 adapter->tx_desc_transfer = 0;
106
107 adapter->txff_alloc.tx_fifo_pg_num = 0;
108 adapter->txff_alloc.acq_pg_num = 0;
109 adapter->txff_alloc.rsvd_boundary = 0;
110 adapter->txff_alloc.rsvd_drv_addr = 0;
111 adapter->txff_alloc.rsvd_h2c_info_addr = 0;
112 adapter->txff_alloc.rsvd_h2cq_addr = 0;
113 adapter->txff_alloc.rsvd_cpu_instr_addr = 0;
114 adapter->txff_alloc.rsvd_fw_txbuf_addr = 0;
115 adapter->txff_alloc.pub_queue_pg_num = 0;
116 adapter->txff_alloc.high_queue_pg_num = 0;
117 adapter->txff_alloc.low_queue_pg_num = 0;
118 adapter->txff_alloc.normal_queue_pg_num = 0;
119 adapter->txff_alloc.extra_queue_pg_num = 0;
120
121 adapter->txff_alloc.la_mode = HALMAC_LA_MODE_DISABLE;
122 adapter->txff_alloc.rx_fifo_exp_mode =
123 HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE;
124
125 adapter->hw_cfg_info.chk_security_keyid = 0;
126 adapter->hw_cfg_info.acq_num = 8;
127 adapter->hw_cfg_info.page_size = TX_PAGE_SIZE_88XX;
128 adapter->hw_cfg_info.tx_align_size = TX_ALIGN_SIZE_88XX;
129 adapter->hw_cfg_info.txdesc_size = TX_DESC_SIZE_88XX;
130 adapter->hw_cfg_info.rxdesc_size = RX_DESC_SIZE_88XX;
131 adapter->hw_cfg_info.rx_desc_fifo_size = 0;
132
133 adapter->sdio_cmd53_4byte = HALMAC_SDIO_CMD53_4BYTE_MODE_DISABLE;
134 adapter->sdio_hw_info.io_hi_speed_flag = 0;
135 adapter->sdio_hw_info.io_indir_flag = 1;
136 adapter->sdio_hw_info.io_warn_flag = 0;
137 adapter->sdio_hw_info.spec_ver = HALMAC_SDIO_SPEC_VER_2_00;
138 adapter->sdio_hw_info.clock_speed = 50;
139 adapter->sdio_hw_info.block_size = 512;
140 adapter->sdio_hw_info.tx_seq = 1;
141 adapter->sdio_fs.macid_map = (u8 *)NULL;
142
143 adapter->watcher.get_watcher.sdio_rn_not_align = 0;
144
145 adapter->pinmux_info.wl_led = 0;
146 adapter->pinmux_info.sdio_int = 0;
147 adapter->pinmux_info.sw_io_0 = 0;
148 adapter->pinmux_info.sw_io_1 = 0;
149 adapter->pinmux_info.sw_io_2 = 0;
150 adapter->pinmux_info.sw_io_3 = 0;
151 adapter->pinmux_info.sw_io_4 = 0;
152 adapter->pinmux_info.sw_io_5 = 0;
153 adapter->pinmux_info.sw_io_6 = 0;
154 adapter->pinmux_info.sw_io_7 = 0;
155 adapter->pinmux_info.sw_io_8 = 0;
156 adapter->pinmux_info.sw_io_9 = 0;
157 adapter->pinmux_info.sw_io_10 = 0;
158 adapter->pinmux_info.sw_io_11 = 0;
159 adapter->pinmux_info.sw_io_12 = 0;
160 adapter->pinmux_info.sw_io_13 = 0;
161 adapter->pinmux_info.sw_io_14 = 0;
162 adapter->pinmux_info.sw_io_15 = 0;
163
164 adapter->pcie_refautok_en = 1;
165 adapter->pwr_off_flow_flag = 0;
166 adapter->curr_bw = HALMAC_BW_20;
167
168 adapter->rx_ignore_info.hdr_chk_mask = 1;
169 adapter->rx_ignore_info.fcs_chk_mask = 1;
170 adapter->rx_ignore_info.hdr_chk_en = 0;
171 adapter->rx_ignore_info.fcs_chk_en = 0;
172 adapter->rx_ignore_info.cck_rst_en = 0;
173 adapter->rx_ignore_info.fcs_chk_thr = HALMAC_PSF_FCS_CHK_THR_28;
174
175 init_adapter_dynamic_param_88xx(adapter);
176 init_state_machine_88xx(adapter);
177 }
178
179 void
init_adapter_dynamic_param_88xx(struct halmac_adapter * adapter)180 init_adapter_dynamic_param_88xx(struct halmac_adapter *adapter)
181 {
182 adapter->h2c_info.seq_num = 0;
183 adapter->h2c_info.buf_fs = 0;
184 }
185
186 enum halmac_ret_status
mount_api_88xx(struct halmac_adapter * adapter)187 mount_api_88xx(struct halmac_adapter *adapter)
188 {
189 struct halmac_api *api = NULL;
190
191 adapter->halmac_api =
192 (struct halmac_api *)PLTFM_MALLOC(sizeof(struct halmac_api));
193 if (!adapter->halmac_api)
194 return HALMAC_RET_MALLOC_FAIL;
195
196 api = (struct halmac_api *)adapter->halmac_api;
197
198 api->halmac_read_efuse = NULL;
199 api->halmac_write_efuse = NULL;
200
201 /* Mount function pointer */
202 api->halmac_register_api = register_api_88xx;
203 api->halmac_download_firmware = download_firmware_88xx;
204 api->halmac_free_download_firmware = free_download_firmware_88xx;
205 api->halmac_reset_wifi_fw = reset_wifi_fw_88xx;
206 api->halmac_get_fw_version = get_fw_version_88xx;
207 api->halmac_cfg_mac_addr = cfg_mac_addr_88xx;
208 api->halmac_cfg_bssid = cfg_bssid_88xx;
209 api->halmac_cfg_transmitter_addr = cfg_transmitter_addr_88xx;
210 api->halmac_cfg_net_type = cfg_net_type_88xx;
211 api->halmac_cfg_tsf_rst = cfg_tsf_rst_88xx;
212 api->halmac_cfg_bcn_space = cfg_bcn_space_88xx;
213 api->halmac_rw_bcn_ctrl = rw_bcn_ctrl_88xx;
214 api->halmac_cfg_multicast_addr = cfg_multicast_addr_88xx;
215 api->halmac_cfg_operation_mode = cfg_operation_mode_88xx;
216 api->halmac_cfg_ch_bw = cfg_ch_bw_88xx;
217 api->halmac_cfg_bw = cfg_bw_88xx;
218 api->halmac_init_mac_cfg = init_mac_cfg_88xx;
219 api->halmac_dump_efuse_map = dump_efuse_map_88xx;
220 api->halmac_dump_efuse_map_bt = dump_efuse_map_bt_88xx;
221 api->halmac_write_efuse_bt = write_efuse_bt_88xx;
222 api->halmac_read_efuse_bt = read_efuse_bt_88xx;
223 api->halmac_cfg_efuse_auto_check = cfg_efuse_auto_check_88xx;
224 api->halmac_dump_logical_efuse_map = dump_log_efuse_map_88xx;
225 api->halmac_dump_logical_efuse_mask = dump_log_efuse_mask_88xx;
226 api->halmac_pg_efuse_by_map = pg_efuse_by_map_88xx;
227 api->halmac_mask_logical_efuse = mask_log_efuse_88xx;
228 api->halmac_get_efuse_size = get_efuse_size_88xx;
229 api->halmac_get_efuse_available_size = get_efuse_available_size_88xx;
230 api->halmac_get_c2h_info = get_c2h_info_88xx;
231
232 api->halmac_get_logical_efuse_size = get_log_efuse_size_88xx;
233
234 api->halmac_write_logical_efuse = write_log_efuse_88xx;
235 api->halmac_write_logical_efuse_word = write_log_efuse_word_88xx;
236 api->halmac_read_logical_efuse = read_logical_efuse_88xx;
237
238 api->halmac_write_wifi_phy_efuse = write_wifi_phy_efuse_88xx;
239 api->halmac_read_wifi_phy_efuse = read_wifi_phy_efuse_88xx;
240
241 api->halmac_ofld_func_cfg = ofld_func_cfg_88xx;
242 api->halmac_h2c_lb = h2c_lb_88xx;
243 api->halmac_debug = mac_debug_88xx;
244 api->halmac_cfg_parameter = cfg_parameter_88xx;
245 api->halmac_update_datapack = update_datapack_88xx;
246 api->halmac_run_datapack = run_datapack_88xx;
247 api->halmac_send_bt_coex = send_bt_coex_88xx;
248 api->halmac_verify_platform_api = verify_platform_api_88xx;
249 api->halmac_update_packet = update_packet_88xx;
250 api->halmac_bcn_ie_filter = bcn_ie_filter_88xx;
251 api->halmac_cfg_txbf = cfg_txbf_88xx;
252 api->halmac_cfg_mumimo = cfg_mumimo_88xx;
253 api->halmac_cfg_sounding = cfg_sounding_88xx;
254 api->halmac_del_sounding = del_sounding_88xx;
255 api->halmac_su_bfer_entry_init = su_bfer_entry_init_88xx;
256 api->halmac_su_bfee_entry_init = su_bfee_entry_init_88xx;
257 api->halmac_mu_bfer_entry_init = mu_bfer_entry_init_88xx;
258 api->halmac_mu_bfee_entry_init = mu_bfee_entry_init_88xx;
259 api->halmac_su_bfer_entry_del = su_bfer_entry_del_88xx;
260 api->halmac_su_bfee_entry_del = su_bfee_entry_del_88xx;
261 api->halmac_mu_bfer_entry_del = mu_bfer_entry_del_88xx;
262 api->halmac_mu_bfee_entry_del = mu_bfee_entry_del_88xx;
263
264 api->halmac_add_ch_info = add_ch_info_88xx;
265 api->halmac_add_extra_ch_info = add_extra_ch_info_88xx;
266 api->halmac_ctrl_ch_switch = ctrl_ch_switch_88xx;
267 api->halmac_p2pps = p2pps_88xx;
268 api->halmac_clear_ch_info = clear_ch_info_88xx;
269 api->halmac_send_general_info = send_general_info_88xx;
270 api->halmac_send_scan_packet = send_scan_packet_88xx;
271 api->halmac_drop_scan_packet = drop_scan_packet_88xx;
272
273 api->halmac_start_iqk = start_iqk_88xx;
274 api->halmac_start_dpk = start_dpk_88xx;
275 api->halmac_ctrl_pwr_tracking = ctrl_pwr_tracking_88xx;
276 api->halmac_psd = psd_88xx;
277 api->halmac_cfg_la_mode = cfg_la_mode_88xx;
278 api->halmac_cfg_rxff_expand_mode = cfg_rxfifo_expand_mode_88xx;
279
280 api->halmac_config_security = config_security_88xx;
281 api->halmac_get_used_cam_entry_num = get_used_cam_entry_num_88xx;
282 api->halmac_read_cam_entry = read_cam_entry_88xx;
283 api->halmac_write_cam = write_cam_88xx;
284 api->halmac_clear_cam_entry = clear_cam_entry_88xx;
285
286 api->halmac_cfg_drv_rsvd_pg_num = cfg_drv_rsvd_pg_num_88xx;
287 api->halmac_get_chip_version = get_version_88xx;
288
289 api->halmac_query_status = query_status_88xx;
290 api->halmac_reset_feature = reset_ofld_feature_88xx;
291 api->halmac_check_fw_status = check_fw_status_88xx;
292 api->halmac_dump_fw_dmem = dump_fw_dmem_88xx;
293 api->halmac_cfg_max_dl_size = cfg_max_dl_size_88xx;
294
295 api->halmac_dump_fifo = dump_fifo_88xx;
296 api->halmac_get_fifo_size = get_fifo_size_88xx;
297
298 api->halmac_chk_txdesc = chk_txdesc_88xx;
299 api->halmac_dl_drv_rsvd_page = dl_drv_rsvd_page_88xx;
300 api->halmac_cfg_csi_rate = cfg_csi_rate_88xx;
301
302 api->halmac_txfifo_is_empty = txfifo_is_empty_88xx;
303 api->halmac_download_flash = download_flash_88xx;
304 api->halmac_read_flash = read_flash_88xx;
305 api->halmac_erase_flash = erase_flash_88xx;
306 api->halmac_check_flash = check_flash_88xx;
307 api->halmac_cfg_edca_para = cfg_edca_para_88xx;
308 api->halmac_pinmux_wl_led_mode = pinmux_wl_led_mode_88xx;
309 api->halmac_pinmux_wl_led_sw_ctrl = pinmux_wl_led_sw_ctrl_88xx;
310 api->halmac_pinmux_sdio_int_polarity = pinmux_sdio_int_polarity_88xx;
311 api->halmac_pinmux_gpio_mode = pinmux_gpio_mode_88xx;
312 api->halmac_pinmux_gpio_output = pinmux_gpio_output_88xx;
313 api->halmac_pinmux_pin_status = pinmux_pin_status_88xx;
314
315 api->halmac_rx_cut_amsdu_cfg = rx_cut_amsdu_cfg_88xx;
316 api->halmac_fw_snding = fw_snding_88xx;
317 api->halmac_get_mac_addr = get_mac_addr_88xx;
318
319 api->halmac_enter_cpu_sleep_mode = enter_cpu_sleep_mode_88xx;
320 api->halmac_get_cpu_mode = get_cpu_mode_88xx;
321 api->halmac_drv_fwctrl = drv_fwctrl_88xx;
322 api->halmac_get_watcher = get_watcher_88xx;
323
324 if (adapter->intf == HALMAC_INTERFACE_SDIO) {
325 #if HALMAC_SDIO_SUPPORT
326 api->halmac_deinit_sdio_cfg = deinit_sdio_cfg_88xx;
327 api->halmac_cfg_rx_aggregation = cfg_sdio_rx_agg_88xx;
328 api->halmac_deinit_interface_cfg = deinit_sdio_cfg_88xx;
329 api->halmac_cfg_tx_agg_align = cfg_txagg_sdio_align_88xx;
330 api->halmac_set_bulkout_num = set_sdio_bulkout_num_88xx;
331 api->halmac_get_usb_bulkout_id = get_sdio_bulkout_id_88xx;
332 api->halmac_reg_read_indirect_32 = sdio_indirect_reg_r32_88xx;
333 api->halmac_reg_sdio_cmd53_read_n = sdio_reg_rn_88xx;
334 api->halmac_sdio_cmd53_4byte = sdio_cmd53_4byte_88xx;
335 api->halmac_sdio_hw_info = sdio_hw_info_88xx;
336 api->halmac_en_ref_autok_pcie = en_ref_autok_sdio_88xx;
337
338 #endif
339 } else if (adapter->intf == HALMAC_INTERFACE_USB) {
340 #if HALMAC_USB_SUPPORT
341 api->halmac_init_usb_cfg = init_usb_cfg_88xx;
342 api->halmac_deinit_usb_cfg = deinit_usb_cfg_88xx;
343 api->halmac_cfg_rx_aggregation = cfg_usb_rx_agg_88xx;
344 api->halmac_init_interface_cfg = init_usb_cfg_88xx;
345 api->halmac_deinit_interface_cfg = deinit_usb_cfg_88xx;
346 api->halmac_cfg_tx_agg_align = cfg_txagg_usb_align_88xx;
347 api->halmac_tx_allowed_sdio = tx_allowed_usb_88xx;
348 api->halmac_set_bulkout_num = set_usb_bulkout_num_88xx;
349 api->halmac_get_sdio_tx_addr = get_usb_tx_addr_88xx;
350 api->halmac_get_usb_bulkout_id = get_usb_bulkout_id_88xx;
351 api->halmac_reg_read_8 = reg_r8_usb_88xx;
352 api->halmac_reg_write_8 = reg_w8_usb_88xx;
353 api->halmac_reg_read_16 = reg_r16_usb_88xx;
354 api->halmac_reg_write_16 = reg_w16_usb_88xx;
355 api->halmac_reg_read_32 = reg_r32_usb_88xx;
356 api->halmac_reg_write_32 = reg_w32_usb_88xx;
357 api->halmac_reg_read_indirect_32 = usb_indirect_reg_r32_88xx;
358 api->halmac_reg_sdio_cmd53_read_n = usb_reg_rn_88xx;
359 api->halmac_en_ref_autok_pcie = en_ref_autok_usb_88xx;
360 #endif
361 } else if (adapter->intf == HALMAC_INTERFACE_PCIE) {
362 #if HALMAC_PCIE_SUPPORT
363 api->halmac_init_pcie_cfg = init_pcie_cfg_88xx;
364 api->halmac_deinit_pcie_cfg = deinit_pcie_cfg_88xx;
365 api->halmac_cfg_rx_aggregation = cfg_pcie_rx_agg_88xx;
366 api->halmac_init_interface_cfg = init_pcie_cfg_88xx;
367 api->halmac_deinit_interface_cfg = deinit_pcie_cfg_88xx;
368 api->halmac_cfg_tx_agg_align = cfg_txagg_pcie_align_88xx;
369 api->halmac_tx_allowed_sdio = tx_allowed_pcie_88xx;
370 api->halmac_set_bulkout_num = set_pcie_bulkout_num_88xx;
371 api->halmac_get_sdio_tx_addr = get_pcie_tx_addr_88xx;
372 api->halmac_get_usb_bulkout_id = get_pcie_bulkout_id_88xx;
373 api->halmac_reg_read_8 = reg_r8_pcie_88xx;
374 api->halmac_reg_write_8 = reg_w8_pcie_88xx;
375 api->halmac_reg_read_16 = reg_r16_pcie_88xx;
376 api->halmac_reg_write_16 = reg_w16_pcie_88xx;
377 api->halmac_reg_read_32 = reg_r32_pcie_88xx;
378 api->halmac_reg_write_32 = reg_w32_pcie_88xx;
379 api->halmac_reg_read_indirect_32 = pcie_indirect_reg_r32_88xx;
380 api->halmac_reg_sdio_cmd53_read_n = pcie_reg_rn_88xx;
381 api->halmac_en_ref_autok_pcie = en_ref_autok_pcie_88xx;
382 #endif
383 } else {
384 PLTFM_MSG_ERR("[ERR]Set halmac io function Error!!\n");
385 }
386
387 if (adapter->chip_id == HALMAC_CHIP_ID_8822B) {
388 #if HALMAC_8822B_SUPPORT
389 mount_api_8822b(adapter);
390 #endif
391 } else if (adapter->chip_id == HALMAC_CHIP_ID_8821C) {
392 #if HALMAC_8821C_SUPPORT
393 mount_api_8821c(adapter);
394 #endif
395 } else if (adapter->chip_id == HALMAC_CHIP_ID_8822C) {
396 #if HALMAC_8822C_SUPPORT
397 mount_api_8822c(adapter);
398 #endif
399 } else if (adapter->chip_id == HALMAC_CHIP_ID_8812F) {
400 #if HALMAC_8812F_SUPPORT
401 mount_api_8812f(adapter);
402 #endif
403 } else {
404 PLTFM_MSG_ERR("[ERR]Chip ID undefine!!\n");
405 return HALMAC_RET_CHIP_NOT_SUPPORT;
406 }
407
408 #if HALMAC_PLATFORM_TESTPROGRAM
409 halmac_mount_misc_api_88xx(adapter);
410 #endif
411
412 return HALMAC_RET_SUCCESS;
413 }
414
415 static void
init_state_machine_88xx(struct halmac_adapter * adapter)416 init_state_machine_88xx(struct halmac_adapter *adapter)
417 {
418 struct halmac_state *state = &adapter->halmac_state;
419
420 init_ofld_feature_state_machine_88xx(adapter);
421
422 state->api_state = HALMAC_API_STATE_INIT;
423
424 state->dlfw_state = HALMAC_DLFW_NONE;
425 state->mac_pwr = HALMAC_MAC_POWER_OFF;
426 state->gpio_cfg_state = HALMAC_GPIO_CFG_STATE_IDLE;
427 state->rsvd_pg_state = HALMAC_RSVD_PG_STATE_IDLE;
428 }
429
430 void
init_ofld_feature_state_machine_88xx(struct halmac_adapter * adapter)431 init_ofld_feature_state_machine_88xx(struct halmac_adapter *adapter)
432 {
433 struct halmac_state *state = &adapter->halmac_state;
434
435 state->efuse_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
436 state->efuse_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
437 state->efuse_state.seq_num = adapter->h2c_info.seq_num;
438
439 state->cfg_param_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
440 state->cfg_param_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
441 state->cfg_param_state.seq_num = adapter->h2c_info.seq_num;
442
443 state->scan_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
444 state->scan_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
445 state->scan_state.seq_num = adapter->h2c_info.seq_num;
446
447 state->update_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
448 state->update_pkt_state.seq_num = adapter->h2c_info.seq_num;
449
450 state->iqk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
451 state->iqk_state.seq_num = adapter->h2c_info.seq_num;
452
453 state->pwr_trk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
454 state->pwr_trk_state.seq_num = adapter->h2c_info.seq_num;
455
456 state->psd_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
457 state->psd_state.seq_num = adapter->h2c_info.seq_num;
458 state->psd_state.data_size = 0;
459 state->psd_state.seg_size = 0;
460 state->psd_state.data = NULL;
461
462 state->fw_snding_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
463 state->fw_snding_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
464 state->fw_snding_state.seq_num = adapter->h2c_info.seq_num;
465
466 state->wlcpu_mode = HALMAC_WLCPU_ACTIVE;
467 }
468
469 /**
470 * register_api_88xx() - register feature list
471 * @adapter
472 * @registry : feature list, 1->enable 0->disable
473 * Author : Ivan Lin
474 *
475 * Default is enable all api registry
476 *
477 * Return : enum halmac_ret_status
478 * More details of status code can be found in prototype document
479 */
480 enum halmac_ret_status
register_api_88xx(struct halmac_adapter * adapter,struct halmac_api_registry * registry)481 register_api_88xx(struct halmac_adapter *adapter,
482 struct halmac_api_registry *registry)
483 {
484 if (!registry)
485 return HALMAC_RET_NULL_POINTER;
486
487 PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
488
489 PLTFM_MEMCPY(&adapter->api_registry, registry, sizeof(*registry));
490
491 PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
492
493 return HALMAC_RET_SUCCESS;
494 }
495
496 /**
497 * init_mac_cfg_88xx() - config page1~page7 register
498 * @adapter : the adapter of halmac
499 * @mode : trx mode
500 * Author : KaiYuan Chang/Ivan Lin
501 * Return : enum halmac_ret_status
502 * More details of status code can be found in prototype document
503 */
504 enum halmac_ret_status
init_mac_cfg_88xx(struct halmac_adapter * adapter,enum halmac_trx_mode mode)505 init_mac_cfg_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode)
506 {
507 struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
508 enum halmac_ret_status status = HALMAC_RET_SUCCESS;
509
510 PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
511
512 status = api->halmac_init_trx_cfg(adapter, mode);
513 if (status != HALMAC_RET_SUCCESS) {
514 PLTFM_MSG_ERR("[ERR]init trx %x\n", status);
515 return status;
516 }
517
518 status = api->halmac_init_protocol_cfg(adapter);
519 if (status != HALMAC_RET_SUCCESS) {
520 PLTFM_MSG_ERR("[ERR]init ptcl %x\n", status);
521 return status;
522 }
523
524 status = api->halmac_init_edca_cfg(adapter);
525 if (status != HALMAC_RET_SUCCESS) {
526 PLTFM_MSG_ERR("[ERR]init edca %x\n", status);
527 return status;
528 }
529
530 status = api->halmac_init_wmac_cfg(adapter);
531 if (status != HALMAC_RET_SUCCESS) {
532 PLTFM_MSG_ERR("[ERR]init wmac %x\n", status);
533 return status;
534 }
535
536 PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
537
538 return status;
539 }
540
541 /**
542 * reset_ofld_feature_88xx() -reset async api cmd status
543 * @adapter : the adapter of halmac
544 * @feature_id : feature_id
545 * Author : Ivan Lin/KaiYuan Chang
546 * Return : enum halmac_ret_status.
547 * More details of status code can be found in prototype document
548 */
549 enum halmac_ret_status
reset_ofld_feature_88xx(struct halmac_adapter * adapter,enum halmac_feature_id feature_id)550 reset_ofld_feature_88xx(struct halmac_adapter *adapter,
551 enum halmac_feature_id feature_id)
552 {
553 struct halmac_state *state = &adapter->halmac_state;
554
555 PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
556
557 switch (feature_id) {
558 case HALMAC_FEATURE_CFG_PARA:
559 state->cfg_param_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
560 state->cfg_param_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
561 break;
562 case HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE:
563 case HALMAC_FEATURE_DUMP_LOGICAL_EFUSE:
564 case HALMAC_FEATURE_DUMP_LOGICAL_EFUSE_MASK:
565 state->efuse_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
566 state->efuse_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
567 break;
568 case HALMAC_FEATURE_CHANNEL_SWITCH:
569 state->scan_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
570 state->scan_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
571 break;
572 case HALMAC_FEATURE_UPDATE_PACKET:
573 state->update_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
574 break;
575 case HALMAC_FEATURE_SEND_SCAN_PACKET:
576 state->scan_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
577 break;
578 case HALMAC_FEATURE_DROP_SCAN_PACKET:
579 state->drop_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
580 break;
581 case HALMAC_FEATURE_IQK:
582 state->iqk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
583 break;
584 case HALMAC_FEATURE_POWER_TRACKING:
585 state->pwr_trk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
586 break;
587 case HALMAC_FEATURE_PSD:
588 state->psd_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
589 break;
590 case HALMAC_FEATURE_FW_SNDING:
591 state->fw_snding_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
592 state->fw_snding_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
593 break;
594 case HALMAC_FEATURE_DPK:
595 state->dpk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
596 break;
597 case HALMAC_FEATURE_ALL:
598 state->cfg_param_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
599 state->cfg_param_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
600 state->efuse_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
601 state->efuse_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
602 state->scan_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
603 state->scan_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
604 state->update_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
605 state->scan_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
606 state->drop_pkt_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
607 state->iqk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
608 state->pwr_trk_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
609 state->psd_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
610 state->fw_snding_state.proc_status = HALMAC_CMD_PROCESS_IDLE;
611 state->fw_snding_state.cmd_cnstr_state = HALMAC_CMD_CNSTR_IDLE;
612 break;
613 default:
614 PLTFM_MSG_ERR("[ERR]invalid feature id\n");
615 return HALMAC_RET_INVALID_FEATURE_ID;
616 }
617
618 PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
619
620 return HALMAC_RET_SUCCESS;
621 }
622
623 /**
624 * (debug API)verify_platform_api_88xx() - verify platform api
625 * @adapter : the adapter of halmac
626 * Author : KaiYuan Chang/Ivan Lin
627 * Return : enum halmac_ret_status
628 * More details of status code can be found in prototype document
629 */
630 enum halmac_ret_status
verify_platform_api_88xx(struct halmac_adapter * adapter)631 verify_platform_api_88xx(struct halmac_adapter *adapter)
632 {
633 enum halmac_ret_status ret_status = HALMAC_RET_SUCCESS;
634
635 PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
636
637 ret_status = verify_io_88xx(adapter);
638
639 if (ret_status != HALMAC_RET_SUCCESS)
640 return ret_status;
641
642 if (adapter->txff_alloc.la_mode != HALMAC_LA_MODE_FULL)
643 ret_status = verify_send_rsvd_page_88xx(adapter);
644
645 if (ret_status != HALMAC_RET_SUCCESS)
646 return ret_status;
647
648 PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
649
650 return ret_status;
651 }
652
653 void
tx_desc_chksum_88xx(struct halmac_adapter * adapter,u8 enable)654 tx_desc_chksum_88xx(struct halmac_adapter *adapter, u8 enable)
655 {
656 u16 value16;
657 struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
658
659 PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
660
661 adapter->tx_desc_checksum = enable;
662
663 value16 = HALMAC_REG_R16(REG_TXDMA_OFFSET_CHK);
664 if (enable == 1)
665 HALMAC_REG_W16(REG_TXDMA_OFFSET_CHK, value16 | BIT(13));
666 else
667 HALMAC_REG_W16(REG_TXDMA_OFFSET_CHK, value16 & ~BIT(13));
668 }
669
670 static enum halmac_ret_status
verify_io_88xx(struct halmac_adapter * adapter)671 verify_io_88xx(struct halmac_adapter *adapter)
672 {
673 u8 value8;
674 u8 wvalue8;
675 u32 value32;
676 u32 value32_2;
677 u32 wvalue32;
678 u32 offset;
679 enum halmac_ret_status ret_status = HALMAC_RET_SUCCESS;
680
681 if (adapter->intf == HALMAC_INTERFACE_SDIO) {
682 #if HALMAC_SDIO_SUPPORT
683 offset = REG_PAGE5_DUMMY;
684 if (0 == (offset & 0xFFFF0000))
685 offset |= WLAN_IOREG_OFFSET;
686
687 ret_status = cnv_to_sdio_bus_offset_88xx(adapter, &offset);
688
689 /* Verify CMD52 R/W */
690 wvalue8 = 0xab;
691 PLTFM_SDIO_CMD52_W(offset, wvalue8);
692
693 value8 = PLTFM_SDIO_CMD52_R(offset);
694
695 if (value8 != wvalue8) {
696 PLTFM_MSG_ERR("[ERR]cmd52 r/w\n");
697 ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
698 }
699
700 /* Verify CMD53 R/W */
701 PLTFM_SDIO_CMD52_W(offset, 0xaa);
702 PLTFM_SDIO_CMD52_W(offset + 1, 0xbb);
703 PLTFM_SDIO_CMD52_W(offset + 2, 0xcc);
704 PLTFM_SDIO_CMD52_W(offset + 3, 0xdd);
705
706 value32 = PLTFM_SDIO_CMD53_R32(offset);
707
708 if (value32 != 0xddccbbaa) {
709 PLTFM_MSG_ERR("[ERR]cmd53 r\n");
710 ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
711 }
712
713 wvalue32 = 0x11223344;
714 PLTFM_SDIO_CMD53_W32(offset, wvalue32);
715
716 value32 = PLTFM_SDIO_CMD53_R32(offset);
717
718 if (value32 != wvalue32) {
719 PLTFM_MSG_ERR("[ERR]cmd53 w\n");
720 ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
721 }
722
723 /* value32 should be 0x33441122 */
724 value32 = PLTFM_SDIO_CMD53_R32(offset + 2);
725
726 wvalue32 = 0x11225566;
727 PLTFM_SDIO_CMD53_W32(offset, wvalue32);
728
729 /* value32 should be 0x55661122 */
730 value32_2 = PLTFM_SDIO_CMD53_R32(offset + 2);
731 if (value32_2 == value32) {
732 PLTFM_MSG_ERR("[ERR]cmd52 is used\n");
733 ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
734 }
735 #else
736 return HALMAC_RET_WRONG_INTF;
737 #endif
738 } else {
739 wvalue32 = 0x77665511;
740 PLTFM_REG_W32(REG_PAGE5_DUMMY, wvalue32);
741
742 value32 = PLTFM_REG_R32(REG_PAGE5_DUMMY);
743 if (value32 != wvalue32) {
744 PLTFM_MSG_ERR("[ERR]reg rw\n");
745 ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
746 }
747 }
748
749 return ret_status;
750 }
751
752 static enum halmac_ret_status
verify_send_rsvd_page_88xx(struct halmac_adapter * adapter)753 verify_send_rsvd_page_88xx(struct halmac_adapter *adapter)
754 {
755 u8 txdesc_size = adapter->hw_cfg_info.txdesc_size;
756 u8 *rsvd_buf = NULL;
757 u8 *rsvd_page = NULL;
758 u32 i;
759 u32 pkt_size = 64;
760 u32 payload = 0xab;
761 enum halmac_ret_status ret_status = HALMAC_RET_SUCCESS;
762
763 rsvd_buf = (u8 *)PLTFM_MALLOC(pkt_size);
764
765 if (!rsvd_buf) {
766 PLTFM_MSG_ERR("[ERR]rsvd buf malloc!!\n");
767 return HALMAC_RET_MALLOC_FAIL;
768 }
769
770 PLTFM_MEMSET(rsvd_buf, (u8)payload, pkt_size);
771
772 ret_status = dl_rsvd_page_88xx(adapter,
773 adapter->txff_alloc.rsvd_boundary,
774 rsvd_buf, pkt_size);
775 if (ret_status != HALMAC_RET_SUCCESS) {
776 PLTFM_FREE(rsvd_buf, pkt_size);
777 return ret_status;
778 }
779
780 rsvd_page = (u8 *)PLTFM_MALLOC(pkt_size + txdesc_size);
781
782 if (!rsvd_page) {
783 PLTFM_MSG_ERR("[ERR]rsvd page malloc!!\n");
784 PLTFM_FREE(rsvd_buf, pkt_size);
785 return HALMAC_RET_MALLOC_FAIL;
786 }
787
788 PLTFM_MEMSET(rsvd_page, 0x00, pkt_size + txdesc_size);
789
790 ret_status = dump_fifo_88xx(adapter, HAL_FIFO_SEL_RSVD_PAGE, 0,
791 pkt_size + txdesc_size, rsvd_page);
792
793 if (ret_status != HALMAC_RET_SUCCESS) {
794 PLTFM_FREE(rsvd_buf, pkt_size);
795 PLTFM_FREE(rsvd_page, pkt_size + txdesc_size);
796 return ret_status;
797 }
798
799 for (i = 0; i < pkt_size; i++) {
800 if (*(rsvd_buf + i) != *(rsvd_page + (i + txdesc_size))) {
801 PLTFM_MSG_ERR("[ERR]Compare RSVD page Fail\n");
802 ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
803 }
804 }
805
806 PLTFM_FREE(rsvd_buf, pkt_size);
807 PLTFM_FREE(rsvd_page, pkt_size + txdesc_size);
808
809 return ret_status;
810 }
811
812 enum halmac_ret_status
pg_num_parser_88xx(struct halmac_adapter * adapter,enum halmac_trx_mode mode,struct halmac_pg_num * tbl)813 pg_num_parser_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode,
814 struct halmac_pg_num *tbl)
815 {
816 u8 flag;
817 u16 hpq_num = 0;
818 u16 lpq_num = 0;
819 u16 npq_num = 0;
820 u16 gapq_num = 0;
821 u16 expq_num = 0;
822 u16 pubq_num = 0;
823 u32 i = 0;
824
825 flag = 0;
826 for (i = 0; i < HALMAC_TRX_MODE_MAX; i++) {
827 if (mode == tbl[i].mode) {
828 hpq_num = tbl[i].hq_num;
829 lpq_num = tbl[i].lq_num;
830 npq_num = tbl[i].nq_num;
831 expq_num = tbl[i].exq_num;
832 gapq_num = tbl[i].gap_num;
833 pubq_num = adapter->txff_alloc.acq_pg_num - hpq_num -
834 lpq_num - npq_num - expq_num - gapq_num;
835 flag = 1;
836 PLTFM_MSG_TRACE("[TRACE]%s done\n", __func__);
837 break;
838 }
839 }
840
841 if (flag == 0) {
842 PLTFM_MSG_ERR("[ERR]trx mode!!\n");
843 return HALMAC_RET_TRX_MODE_NOT_SUPPORT;
844 }
845
846 if (adapter->txff_alloc.acq_pg_num <
847 hpq_num + lpq_num + npq_num + expq_num + gapq_num) {
848 PLTFM_MSG_ERR("[ERR]acqnum = %d\n",
849 adapter->txff_alloc.acq_pg_num);
850 PLTFM_MSG_ERR("[ERR]hpq_num = %d\n", hpq_num);
851 PLTFM_MSG_ERR("[ERR]LPQ_num = %d\n", lpq_num);
852 PLTFM_MSG_ERR("[ERR]npq_num = %d\n", npq_num);
853 PLTFM_MSG_ERR("[ERR]EPQ_num = %d\n", expq_num);
854 PLTFM_MSG_ERR("[ERR]gapq_num = %d\n", gapq_num);
855 return HALMAC_RET_CFG_TXFIFO_PAGE_FAIL;
856 }
857
858 adapter->txff_alloc.high_queue_pg_num = hpq_num;
859 adapter->txff_alloc.low_queue_pg_num = lpq_num;
860 adapter->txff_alloc.normal_queue_pg_num = npq_num;
861 adapter->txff_alloc.extra_queue_pg_num = expq_num;
862 adapter->txff_alloc.pub_queue_pg_num = pubq_num;
863
864 return HALMAC_RET_SUCCESS;
865 }
866
867 enum halmac_ret_status
rqpn_parser_88xx(struct halmac_adapter * adapter,enum halmac_trx_mode mode,struct halmac_rqpn * tbl)868 rqpn_parser_88xx(struct halmac_adapter *adapter, enum halmac_trx_mode mode,
869 struct halmac_rqpn *tbl)
870 {
871 u8 flag;
872 u32 i;
873
874 flag = 0;
875 for (i = 0; i < HALMAC_TRX_MODE_MAX; i++) {
876 if (mode == tbl[i].mode) {
877 adapter->pq_map[HALMAC_PQ_MAP_VO] = tbl[i].dma_map_vo;
878 adapter->pq_map[HALMAC_PQ_MAP_VI] = tbl[i].dma_map_vi;
879 adapter->pq_map[HALMAC_PQ_MAP_BE] = tbl[i].dma_map_be;
880 adapter->pq_map[HALMAC_PQ_MAP_BK] = tbl[i].dma_map_bk;
881 adapter->pq_map[HALMAC_PQ_MAP_MG] = tbl[i].dma_map_mg;
882 adapter->pq_map[HALMAC_PQ_MAP_HI] = tbl[i].dma_map_hi;
883 flag = 1;
884 PLTFM_MSG_TRACE("[TRACE]%s done\n", __func__);
885 break;
886 }
887 }
888
889 if (flag == 0) {
890 PLTFM_MSG_ERR("[ERR]trx mdoe!!\n");
891 return HALMAC_RET_TRX_MODE_NOT_SUPPORT;
892 }
893
894 return HALMAC_RET_SUCCESS;
895 }
896
897 enum halmac_ret_status
fwff_is_empty_88xx(struct halmac_adapter * adapter)898 fwff_is_empty_88xx(struct halmac_adapter *adapter)
899 {
900 struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
901 u32 cnt;
902
903 cnt = 5000;
904 while (HALMAC_REG_R16(REG_FWFF_CTRL) !=
905 HALMAC_REG_R16(REG_FWFF_PKT_INFO)) {
906 if (cnt == 0) {
907 PLTFM_MSG_ERR("[ERR]polling fwff empty fail\n");
908 return HALMAC_RET_FWFF_NO_EMPTY;
909 }
910 cnt--;
911 PLTFM_DELAY_US(50);
912 }
913 return HALMAC_RET_SUCCESS;
914 }
915
916 #endif /* HALMAC_88XX_SUPPORT */
917