1 // Copyright (C) 2022 Beken Corporation 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 typedef volatile struct { 22 /* REG_0x0 */ 23 union { 24 struct { 25 uint32_t int_en: 4; /**< bit[0:3] */ 26 uint32_t mclk_div: 2; /**< bit[4:5] */ 27 uint32_t vsync_int_en: 1; /**< bit[6] */ 28 uint32_t reserved1: 25; /**< bit[7:31] */ 29 }; 30 uint32_t v; 31 } int_en; 32 33 /* REG_0x1 */ 34 union { 35 struct { 36 uint32_t vck_edge: 1; /**< bit[0] */ 37 uint32_t video_byte_reverse: 1; /**< bit[1] */ 38 uint32_t yuv_fmt_sel: 2; /**< bit[2:3] */ 39 uint32_t jpeg_enc_en: 1; /**< bit[4] */ 40 uint32_t yuv_word_reverse: 1; /**< bit[5] */ 41 uint32_t only_y: 1; /**< bit[6] */ 42 uint32_t yuvbuf_mode: 1; /**< bit[7] */ 43 uint32_t x_pixel: 8; /**< bit[8:15] */ 44 uint32_t jpeg_enc_size: 1; /**< bit[16] */ 45 uint32_t bitrate_ctrl: 1; /**< bit[17] */ 46 uint32_t bitrate_step: 2; /**< bit[18:19] */ 47 uint32_t auto_step: 1; /**< bit[20] */ 48 uint32_t hsync_rev: 1; /**< bit[21] */ 49 uint32_t vsync_rev: 1; /**< bit[22] */ 50 uint32_t bitrate_mode: 1; /**< bit[23] */ 51 uint32_t y_pixel: 8; /**< bit[24:31] */ 52 }; 53 uint32_t v; 54 } cfg; 55 56 /* REG_0x2 */ 57 uint32_t target_byte_h; 58 59 /* REG_0x3 */ 60 uint32_t target_byte_l; 61 62 /* REG_0x4 */ 63 union { 64 struct { 65 uint32_t em_base_addr: 32; //bit[15:0], the highest 16bit address of sensor data saved, bit[31:16]:eof_int offset 66 }; 67 uint32_t v; 68 }em_base_addr; 69 70 /* REG_0x5 */ 71 uint32_t rx_fifo_data; 72 73 /* REG_0x6 */ 74 union { 75 struct { 76 uint32_t int_status: 5; /**< bit[0:4] */ 77 uint32_t fifo_rd_finish: 1; /**< bit[5]*/ 78 uint32_t reserved: 26; /**< bit[6:31] */ 79 }; 80 uint32_t v; 81 } int_status; 82 83 /* REG_0x7 */ 84 uint32_t byte_count_pfrm; 85 86 /* REG_0x8 */ 87 union { 88 struct { 89 uint32_t x_partial_offset_l: 11; /**< bit[0:10] */ 90 uint32_t reserved: 1; /**< bit[11] */ 91 uint32_t x_partial_offset_r: 11; /**< bit[12:22] */ 92 uint32_t reserved1: 1; /**< bit[23] */ 93 uint32_t partial_display_en: 1; /**< bit[24] */ 94 uint32_t sync_edge_dect_en: 1; /**< bit[25] */ 95 uint32_t stream_fifo_empty: 1; /**< bit[26] */ 96 uint32_t stream_fifo_full: 1; /**< bit[27] */ 97 uint32_t is_data_set: 1; /**< bit[28] */ 98 uint32_t reserved2: 3; /**< bit[29:31] */ 99 }; 100 uint32_t v; 101 }x_partial; 102 103 /* REG_0x9 */ 104 union { 105 struct { 106 uint32_t y_partial_offset_l: 11; /**< bit[0:10] */ 107 uint32_t reserved: 1; /**< bit[11] */ 108 uint32_t y_partial_offset_r: 11; /**< bit[12:22] */ 109 uint32_t reserved1: 1; /**< bit[23] */ 110 uint32_t y_count: 8; /**< bit[24:31] */ 111 }; 112 uint32_t v; 113 }y_partial; 114 } jpeg_hw_t; 115 116 #ifdef __cplusplus 117 } 118 #endif 119 120