1 /* 2 * Custom OID/ioctl definitions for 3 * 4 * 5 * Broadcom 802.11abg Networking Device Driver 6 * 7 * Definitions subject to change without notice. 8 * 9 * Copyright (C) 2020, Broadcom. 10 * 11 * Unless you and Broadcom execute a separate written software license 12 * agreement governing use of this software, this software is licensed to you 13 * under the terms of the GNU General Public License version 2 (the "GPL"), 14 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 15 * following added to such license: 16 * 17 * As a special exception, the copyright holders of this software give you 18 * permission to link this software with independent modules, and to copy and 19 * distribute the resulting executable under terms of your choice, provided that 20 * you also meet, for each linked independent module, the terms and conditions of 21 * the license of that module. An independent module is a module which is not 22 * derived from this software. The special exception does not apply to any 23 * modifications of the software. 24 * 25 * 26 * <<Broadcom-WL-IPTag/Dual:>> 27 */ 28 29 #ifndef _wlioctl_h_ 30 #define _wlioctl_h_ 31 32 #include <typedefs.h> 33 #include <ethernet.h> 34 #include <bcmip.h> 35 #include <bcmeth.h> 36 #include <bcmip.h> 37 #include <bcmipv6.h> 38 #include <bcmevent.h> 39 #include <802.11.h> 40 #include <802.11s.h> 41 #include <802.1d.h> 42 #include <bcmwifi_channels.h> 43 #ifdef WL11AX 44 #include <802.11ax.h> 45 #endif /* WL11AX */ 46 #include <bcmwifi_rates.h> 47 #include <wlioctl_defs.h> 48 #include <bcmipv6.h> 49 50 #include <bcm_mpool_pub.h> 51 #include <bcmcdc.h> 52 #define SSSR_NEW_API 53 54 /* Include bcmerror.h for error codes or aliases */ 55 #ifdef BCMUTILS_ERR_CODES 56 #include <bcmerror.h> 57 #endif /* BCMUTILS_ERR_CODES */ 58 #include <bcmtlv.h> 59 60 /* NOTE re: Module specific error codes. 61 * 62 * BCME_.. error codes are extended by various features - e.g. FTM, NAN, SAE etc. 63 * The current process is to allocate a range of 1024 negative 32 bit integers to 64 * each module that extends the error codes to indicate a module specific status. 65 * 66 * The next range to use is below. If that range is used for a new feature, please 67 * update the range to be used by the next feature. 68 * 69 * The error codes -4096 ... -5119 are reserved for firmware signing. 70 * 71 * Next available (inclusive) range: [-8*1024 + 1, -7*1024] 72 * 73 * End Note 74 */ 75 76 /* 11ax trigger frame format - versioning info */ 77 #define TRIG_FRAME_FORMAT_11AX_DRAFT_1P1 0 78 79 typedef struct { 80 uint32 num; 81 chanspec_t list[1]; 82 } chanspec_list_t; 83 84 #define RSN_KCK_LENGTH 16 85 #define RSN_KEK_LENGTH 16 86 #define TPK_FTM_LEN 16 87 #ifndef INTF_NAME_SIZ 88 #define INTF_NAME_SIZ 16 89 #endif 90 91 #define WL_ASSOC_START_EVT_DATA_VERSION 1 92 93 typedef struct assoc_event_data { 94 uint32 version; 95 uint32 flags; 96 chanspec_t join_chspec; 97 } assoc_event_data_t; 98 99 /**Used to send ioctls over the transport pipe */ 100 typedef struct remote_ioctl { 101 cdc_ioctl_t msg; 102 uint32 data_len; 103 char intf_name[INTF_NAME_SIZ]; 104 } rem_ioctl_t; 105 #define REMOTE_SIZE sizeof(rem_ioctl_t) 106 107 #define BCM_IOV_XTLV_VERSION 0 108 109 #define MAX_NUM_D11CORES 2 110 111 /**DFS Forced param */ 112 typedef struct wl_dfs_forced_params { 113 chanspec_t chspec; 114 uint16 version; 115 chanspec_list_t chspec_list; 116 } wl_dfs_forced_t; 117 118 #define DFS_PREFCHANLIST_VER 0x01 119 #define WL_CHSPEC_LIST_FIXED_SIZE OFFSETOF(chanspec_list_t, list) 120 /* size of dfs forced param size given n channels are in the list */ 121 #define WL_DFS_FORCED_PARAMS_SIZE(n) \ 122 (sizeof(wl_dfs_forced_t) + (((n) < 1) ? (0) : (((n) - 1)* sizeof(chanspec_t)))) 123 #define WL_DFS_FORCED_PARAMS_FIXED_SIZE \ 124 (WL_CHSPEC_LIST_FIXED_SIZE + OFFSETOF(wl_dfs_forced_t, chspec_list)) 125 #define WL_DFS_FORCED_PARAMS_MAX_SIZE \ 126 WL_DFS_FORCED_PARAMS_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(chanspec_t)) 127 128 /**association decision information */ 129 typedef struct { 130 uint8 assoc_approved; /**< (re)association approved */ 131 uint8 pad; 132 uint16 reject_reason; /**< reason code for rejecting association */ 133 struct ether_addr da; 134 uint8 pad1[6]; 135 #if defined(NDIS) && (NDISVER >= 0x0620) 136 LARGE_INTEGER sys_time; /**< current system time */ 137 #else 138 int64 sys_time; /**< current system time */ 139 #endif 140 } assoc_decision_t; 141 142 #define DFS_SCAN_S_IDLE -1 143 #define DFS_SCAN_S_RADAR_FREE 0 144 #define DFS_SCAN_S_RADAR_FOUND 1 145 #define DFS_SCAN_S_INPROGESS 2 146 #define DFS_SCAN_S_SCAN_ABORTED 3 147 #define DFS_SCAN_S_SCAN_MODESW_INPROGRESS 4 148 #define DFS_SCAN_S_MAX 5 149 150 #define ACTION_FRAME_SIZE 1800 151 152 typedef struct wl_action_frame { 153 struct ether_addr da; 154 uint16 len; 155 uint32 packetId; 156 uint8 data[ACTION_FRAME_SIZE]; 157 } wl_action_frame_t; 158 159 #define WL_WIFI_ACTION_FRAME_SIZE sizeof(struct wl_action_frame) 160 161 typedef struct ssid_info 162 { 163 uint8 ssid_len; /**< the length of SSID */ 164 uint8 ssid[32]; /**< SSID string */ 165 } ssid_info_t; 166 167 typedef struct wl_af_params { 168 uint32 channel; 169 int32 dwell_time; 170 struct ether_addr BSSID; 171 uint8 PAD[2]; 172 wl_action_frame_t action_frame; 173 } wl_af_params_t; 174 175 #define WL_WIFI_AF_PARAMS_SIZE sizeof(struct wl_af_params) 176 177 #define MFP_TEST_FLAG_NORMAL 0 178 #define MFP_TEST_FLAG_ANY_KEY 1 179 typedef struct wl_sa_query { 180 uint32 flag; 181 uint8 action; 182 uint8 PAD; 183 uint16 id; 184 struct ether_addr da; 185 uint16 PAD; 186 } wl_sa_query_t; 187 188 /* EXT_STA */ 189 /**association information */ 190 typedef struct { 191 uint32 assoc_req; /**< offset to association request frame */ 192 uint32 assoc_req_len; /**< association request frame length */ 193 uint32 assoc_rsp; /**< offset to association response frame */ 194 uint32 assoc_rsp_len; /**< association response frame length */ 195 uint32 bcn; /**< offset to AP beacon */ 196 uint32 bcn_len; /**< AP beacon length */ 197 uint32 wsec; /**< ucast security algo */ 198 uint32 wpaie; /**< offset to WPA ie */ 199 uint8 auth_alg; /**< 802.11 authentication mode */ 200 uint8 WPA_auth; /**< WPA: authenticated key management */ 201 uint8 ewc_cap; /**< EWC (MIMO) capable */ 202 uint8 ofdm; /**< OFDM */ 203 } assoc_info_t; 204 /* defined(EXT_STA) */ 205 206 /* Flags for OBSS IOVAR Parameters */ 207 #define WL_OBSS_DYN_BWSW_FLAG_ACTIVITY_PERIOD (0x01) 208 #define WL_OBSS_DYN_BWSW_FLAG_NOACTIVITY_PERIOD (0x02) 209 #define WL_OBSS_DYN_BWSW_FLAG_NOACTIVITY_INCR_PERIOD (0x04) 210 #define WL_OBSS_DYN_BWSW_FLAG_PSEUDO_SENSE_PERIOD (0x08) 211 #define WL_OBSS_DYN_BWSW_FLAG_RX_CRS_PERIOD (0x10) 212 #define WL_OBSS_DYN_BWSW_FLAG_DUR_THRESHOLD (0x20) 213 #define WL_OBSS_DYN_BWSW_FLAG_TXOP_PERIOD (0x40) 214 215 /* OBSS IOVAR Version information */ 216 #define WL_PROT_OBSS_CONFIG_PARAMS_VERSION 1 217 218 #include <packed_section_start.h> 219 typedef BWL_PRE_PACKED_STRUCT struct { 220 uint8 obss_bwsw_activity_cfm_count_cfg; /**< configurable count in 221 * seconds before we confirm that OBSS is present and 222 * dynamically activate dynamic bwswitch. 223 */ 224 uint8 obss_bwsw_no_activity_cfm_count_cfg; /**< configurable count in 225 * seconds before we confirm that OBSS is GONE and 226 * dynamically start pseudo upgrade. If in pseudo sense time, we 227 * will see OBSS, [means that, we false detected that OBSS-is-gone 228 * in watchdog] this count will be incremented in steps of 229 * obss_bwsw_no_activity_cfm_count_incr_cfg for confirming OBSS 230 * detection again. Note that, at present, max 30seconds is 231 * allowed like this. [OBSS_BWSW_NO_ACTIVITY_MAX_INCR_DEFAULT] 232 */ 233 uint8 obss_bwsw_no_activity_cfm_count_incr_cfg; /* see above 234 */ 235 uint16 obss_bwsw_pseudo_sense_count_cfg; /**< number of msecs/cnt to be in 236 * pseudo state. This is used to sense/measure the stats from lq. 237 */ 238 uint8 obss_bwsw_rx_crs_threshold_cfg; /**< RX CRS default threshold */ 239 uint8 obss_bwsw_dur_thres; /**< OBSS dyn bwsw trigger/RX CRS Sec */ 240 uint8 obss_bwsw_txop_threshold_cfg; /**< TXOP default threshold */ 241 } BWL_POST_PACKED_STRUCT wlc_obss_dynbwsw_config_t; 242 #include <packed_section_end.h> 243 244 #include <packed_section_start.h> 245 typedef BWL_PRE_PACKED_STRUCT struct { 246 uint32 version; /**< version field */ 247 uint32 config_mask; 248 uint32 reset_mask; 249 wlc_obss_dynbwsw_config_t config_params; 250 } BWL_POST_PACKED_STRUCT obss_config_params_t; 251 #include <packed_section_end.h> 252 253 /**bsscfg type */ 254 typedef enum bsscfg_type { 255 BSSCFG_TYPE_GENERIC = 0, /**< Generic AP/STA/IBSS BSS */ 256 BSSCFG_TYPE_P2P = 1, /**< P2P BSS */ 257 /* index 2 earlier used for BTAMP */ 258 BSSCFG_TYPE_PSTA = 3, 259 BSSCFG_TYPE_TDLS = 4, 260 BSSCFG_TYPE_SLOTTED_BSS = 5, 261 BSSCFG_TYPE_PROXD = 6, 262 BSSCFG_TYPE_NAN = 7, 263 BSSCFG_TYPE_MESH = 8, 264 BSSCFG_TYPE_AIBSS = 9 265 } bsscfg_type_t; 266 267 /* bsscfg subtype */ 268 typedef enum bsscfg_subtype { 269 BSSCFG_SUBTYPE_NONE = 0, 270 BSSCFG_GENERIC_STA = 1, /* GENERIC */ 271 BSSCFG_GENERIC_AP = 2, 272 BSSCFG_GENERIC_IBSS = 6, 273 BSSCFG_P2P_GC = 3, /* P2P */ 274 BSSCFG_P2P_GO = 4, 275 BSSCFG_P2P_DISC = 5, 276 /* Index 7 & 8 earlier used for BTAMP */ 277 BSSCFG_SUBTYPE_AWDL = 9, /* SLOTTED_BSS_TYPE */ 278 BSSCFG_SUBTYPE_NAN_MGMT = 10, 279 BSSCFG_SUBTYPE_NAN_DATA = 11, 280 BSSCFG_SUBTYPE_NAN_MGMT_DATA = 12 281 } bsscfg_subtype_t; 282 283 typedef struct wlc_bsscfg_info { 284 uint32 type; 285 uint32 subtype; 286 } wlc_bsscfg_info_t; 287 288 /* ULP SHM Offsets info */ 289 typedef struct ulp_shm_info { 290 uint32 m_ulp_ctrl_sdio; 291 uint32 m_ulp_wakeevt_ind; 292 uint32 m_ulp_wakeind; 293 } ulp_shm_info_t; 294 295 /* Note: Due to unpredictable size, bool type should not be used in any ioctl argument structure 296 * Cf PR53622 297 */ 298 299 #define WL_BSS_INFO_VERSION 109 /**< current version of wl_bss_info struct */ 300 301 /** 302 * BSS info structure 303 * Applications MUST CHECK ie_offset field and length field to access IEs and 304 * next bss_info structure in a vector (in wl_scan_results_t) 305 */ 306 typedef struct wl_bss_info { 307 uint32 version; /**< version field */ 308 uint32 length; /**< byte length of data in this record, 309 * starting at version and including IEs 310 */ 311 struct ether_addr BSSID; 312 uint16 beacon_period; /**< units are Kusec */ 313 uint16 capability; /**< Capability information */ 314 uint8 SSID_len; 315 uint8 SSID[32]; 316 uint8 bcnflags; /* additional flags w.r.t. beacon */ 317 struct { 318 uint32 count; /**< # rates in this set */ 319 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 320 } rateset; /**< supported rates */ 321 chanspec_t chanspec; /**< chanspec for bss */ 322 uint16 atim_window; /**< units are Kusec */ 323 uint8 dtim_period; /**< DTIM period */ 324 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 325 int16 RSSI; /**< receive signal strength (in dBm) */ 326 int8 phy_noise; /**< noise (in dBm) */ 327 uint8 n_cap; /**< BSS is 802.11N Capable */ 328 uint8 freespace1; /* make implicit padding explicit */ 329 uint8 load; /**< BSS Load from QBSS load IE if available */ 330 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 331 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 332 uint8 padding1[3]; /**< explicit struct alignment padding */ 333 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 334 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 335 uint8 flags; /**< flags */ 336 uint8 vht_cap; /**< BSS is vht capable */ 337 uint8 reserved[2]; /**< Reserved for expansion of BSS properties */ 338 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 339 340 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 341 uint16 freespace2; /* making implicit padding explicit */ 342 uint32 ie_length; /**< byte length of Information Elements */ 343 int16 SNR; /**< average SNR of during frame reception */ 344 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 345 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 346 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 347 } wl_bss_info_v109_t; 348 349 /** 350 * BSS info structure 351 * Applications MUST CHECK ie_offset field and length field to access IEs and 352 * next bss_info structure in a vector (in wl_scan_results_t) 353 */ 354 typedef struct wl_bss_info_v109_1 { 355 uint32 version; /**< version field */ 356 uint32 length; /**< byte length of data in this record, 357 * starting at version and including IEs 358 */ 359 struct ether_addr BSSID; 360 uint16 beacon_period; /**< units are Kusec */ 361 uint16 capability; /**< Capability information */ 362 uint8 SSID_len; 363 uint8 SSID[32]; 364 uint8 bcnflags; /* additional flags w.r.t. beacon */ 365 struct { 366 uint32 count; /**< # rates in this set */ 367 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 368 } rateset; /**< supported rates */ 369 chanspec_t chanspec; /**< chanspec for bss */ 370 uint16 atim_window; /**< units are Kusec */ 371 uint8 dtim_period; /**< DTIM period */ 372 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 373 int16 RSSI; /**< receive signal strength (in dBm) */ 374 int8 phy_noise; /**< noise (in dBm) */ 375 uint8 n_cap; /**< BSS is 802.11N Capable */ 376 uint8 he_cap; /**< BSS is he capable */ 377 uint8 load; /**< BSS Load from QBSS load IE if available */ 378 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 379 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 380 uint8 padding1[3]; /**< explicit struct alignment padding */ 381 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 382 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 383 uint8 flags; /**< flags */ 384 uint8 vht_cap; /**< BSS is vht capable */ 385 uint8 reserved[2]; /**< Reserved for expansion of BSS properties */ 386 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 387 388 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 389 uint16 freespace2; /* making implicit padding explicit */ 390 uint32 ie_length; /**< byte length of Information Elements */ 391 int16 SNR; /**< average SNR of during frame reception */ 392 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 393 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 394 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 395 uint32 he_mcsmap; /**< STA's Associated hemcsmap */ 396 uint32 he_rxmcsmap; /**< HE rx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 397 uint32 he_txmcsmap; /**< HE tx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 398 } wl_bss_info_v109_1_t; 399 400 /** 401 * BSS info structure 402 * Applications MUST CHECK ie_offset field and length field to access IEs and 403 * next bss_info structure in a vector (in wl_scan_results_t) 404 */ 405 typedef struct wl_bss_info_v109_2 { 406 uint32 version; /**< version field */ 407 uint32 length; /**< byte length of data in this record, 408 * starting at version and including IEs 409 */ 410 struct ether_addr BSSID; 411 uint16 beacon_period; /**< units are Kusec */ 412 uint16 capability; /**< Capability information */ 413 uint8 SSID_len; 414 uint8 SSID[32]; 415 uint8 bcnflags; /* additional flags w.r.t. beacon */ 416 struct { 417 uint32 count; /**< # rates in this set */ 418 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 419 } rateset; /**< supported rates */ 420 chanspec_t chanspec; /**< chanspec for bss */ 421 uint16 atim_window; /**< units are Kusec */ 422 uint8 dtim_period; /**< DTIM period */ 423 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 424 int16 RSSI; /**< receive signal strength (in dBm) */ 425 int8 phy_noise; /**< noise (in dBm) */ 426 uint8 n_cap; /**< BSS is 802.11N Capable */ 427 uint8 he_cap; /**< BSS is he capable */ 428 uint8 load; /**< BSS Load from QBSS load IE if available */ 429 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 430 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 431 uint8 RSVD1[3]; 432 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 433 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 434 uint8 flags; /**< flags */ 435 uint8 vht_cap; /**< BSS is vht capable */ 436 uint8 RSVD2[2]; 437 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 438 439 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 440 uint16 freespace2; /* making implicit padding explicit */ 441 uint32 ie_length; /**< byte length of Information Elements */ 442 int16 SNR; /**< average SNR of during frame reception */ 443 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 444 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 445 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 446 uint32 he_mcsmap; /**< STA's Associated hemcsmap */ 447 uint32 he_rxmcsmap; /**< HE rx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 448 uint32 he_txmcsmap; /**< HE tx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 449 uint32 timestamp[2]; /* Beacon Timestamp for FAKEAP req */ 450 } wl_bss_info_v109_2_t; 451 452 /** 453 * BSS info structure 454 * Applications MUST CHECK ie_offset field and length field to access IEs and 455 * next bss_info structure in a vector (in wl_scan_results_t) 456 */ 457 typedef struct wl_bss_info_v112 { 458 uint32 version; /**< version field */ 459 uint32 length; /**< byte length of data in this record, 460 * starting at version and including IEs 461 */ 462 struct ether_addr BSSID; 463 uint16 beacon_period; /**< units are Kusec */ 464 uint16 capability; /**< Capability information */ 465 uint8 SSID_len; 466 uint8 SSID[32]; 467 uint8 bcnflags; /* additional flags w.r.t. beacon */ 468 struct { 469 uint32 count; /**< # rates in this set */ 470 uint8 rates[16]; /**< rates in 500kbps units w/hi bit set if basic */ 471 } rateset; /**< supported rates */ 472 chanspec_t chanspec; /**< chanspec for bss */ 473 uint16 atim_window; /**< units are Kusec */ 474 uint8 dtim_period; /**< DTIM period */ 475 uint8 accessnet; /* from beacon interwork IE (if bcnflags) */ 476 int16 RSSI; /**< receive signal strength (in dBm) */ 477 int8 phy_noise; /**< noise (in dBm) */ 478 uint8 n_cap; /**< BSS is 802.11N Capable */ 479 uint8 he_cap; /**< BSS is he capable */ 480 uint8 load; /**< BSS Load from QBSS load IE if available */ 481 uint32 nbss_cap; /**< 802.11N+AC BSS Capabilities */ 482 uint8 ctl_ch; /**< 802.11N BSS control channel number */ 483 uint8 RSVD1[3]; 484 uint16 vht_rxmcsmap; /**< VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 485 uint16 vht_txmcsmap; /**< VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ 486 uint8 flags; /**< flags */ 487 uint8 vht_cap; /**< BSS is vht capable */ 488 uint8 RSVD2[2]; 489 uint8 basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */ 490 uint16 ie_offset; /**< offset at which IEs start, from beginning */ 491 uint16 freespace2; /* making implicit padding explicit */ 492 uint32 ie_length; /**< byte length of Information Elements */ 493 int16 SNR; /**< average SNR of during frame reception */ 494 uint16 vht_mcsmap; /**< STA's Associated vhtmcsmap */ 495 uint16 vht_mcsmap_prop; /**< STA's Associated prop vhtmcsmap */ 496 uint16 vht_txmcsmap_prop; /**< prop VHT tx mcs prop */ 497 uint32 he_mcsmap; /**< STA's Associated hemcsmap */ 498 uint32 he_rxmcsmap; /**< HE rx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 499 uint32 he_txmcsmap; /**< HE tx mcs map (802.11ax IE, HE_CAP_MCS_MAP_*) */ 500 uint32 timestamp[2]; /* Beacon Timestamp for FAKEAP req */ 501 uint8 eht_cap; /* BSS is EHT capable */ 502 uint8 RSVD3[3]; 503 /* by the spec. it is maximum 16 streams hence all mcs code for all nss may not fit 504 * in a 32 bit mcs nss map but since this field only reflects the common mcs nss map 505 * between that of the peer and our device so it's probably ok to make it 32 bit and 506 * allow only a limited number of nss e.g. upto 8 of them in the map given the fact 507 * that our device probably won't exceed 4 streams anyway... 508 */ 509 uint32 eht_mcsmap; /* STA's associated EHT mcs code map */ 510 /* FIXME: change the following mcs code map to uint32 if all mcs+nss can fit in */ 511 uint8 eht_rxmcsmap[6]; /* EHT rx mcs code map */ 512 uint8 eht_txmcsmap[6]; /* EHT tx mcs code map */ 513 } wl_bss_info_v112_t; 514 515 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 516 typedef wl_bss_info_v109_t wl_bss_info_t; 517 #endif 518 519 #define WL_GSCAN_FULL_RESULT_VERSION 2 /* current version of wl_gscan_result_t struct */ 520 521 typedef struct wl_gscan_bss_info_v2 { 522 uint32 timestamp[2]; 523 wl_bss_info_v109_t info; 524 /* Do not add any more members below, fixed */ 525 /* and variable length Information Elements to follow */ 526 } wl_gscan_bss_info_v2_t; 527 528 typedef struct wl_gscan_bss_info_v3 { 529 uint32 timestamp[2]; 530 uint8 info[]; /* var length wl_bss_info_X structures */ 531 /* Do not add any more members below, fixed */ 532 /* and variable length Information Elements to follow */ 533 } wl_gscan_bss_info_v3_t; 534 535 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 536 typedef wl_gscan_bss_info_v2_t wl_gscan_bss_info_t; 537 #define WL_GSCAN_INFO_FIXED_FIELD_SIZE (sizeof(wl_gscan_bss_info_t) - sizeof(wl_bss_info_t)) 538 #endif 539 540 typedef struct wl_bsscfg { 541 uint32 bsscfg_idx; 542 uint32 wsec; 543 uint32 WPA_auth; 544 uint32 wsec_index; 545 uint32 associated; 546 uint32 BSS; 547 uint32 phytest_on; 548 struct ether_addr prev_BSSID; 549 struct ether_addr BSSID; 550 uint32 targetbss_wpa2_flags; 551 uint32 assoc_type; 552 uint32 assoc_state; 553 } wl_bsscfg_t; 554 555 typedef struct wl_if_add { 556 uint32 bsscfg_flags; 557 uint32 if_flags; 558 uint32 ap; 559 struct ether_addr mac_addr; 560 uint16 PAD; 561 uint32 wlc_index; 562 } wl_if_add_t; 563 564 typedef struct wl_bss_config { 565 uint32 atim_window; 566 uint32 beacon_period; 567 uint32 chanspec; 568 } wl_bss_config_t; 569 570 /* Number of Bsscolor supported per core */ 571 #ifndef HE_MAX_BSSCOLOR_RES 572 #define HE_MAX_BSSCOLOR_RES 2 573 #endif 574 575 #ifndef HE_MAX_STAID_PER_BSSCOLOR 576 #define HE_MAX_STAID_PER_BSSCOLOR 4 577 #endif 578 579 /* BSSColor indices */ 580 #define BSSCOLOR0_IDX 0 581 #define BSSCOLOR1_IDX 1 582 #define HE_BSSCOLOR0 0 583 #define HE_BSSCOLOR_MAX_VAL 63 584 585 /* STAID indices */ 586 #define STAID0_IDX 0 587 #define STAID1_IDX 1 588 #define STAID2_IDX 2 589 #define STAID3_IDX 3 590 #define HE_STAID_MAX_VAL 0x07FF 591 592 typedef struct wl_bsscolor_info { 593 uint16 version; /**< structure version */ 594 uint16 length; /**< length of the bsscolor info */ 595 uint8 bsscolor_index; /**< bsscolor index 0-1 */ 596 uint8 bsscolor; /**<bsscolor value from 0 to 63 */ 597 uint8 partial_bsscolor_ind; 598 uint8 disable_bsscolor_ind; /**< To disable particular bsscolor */ 599 /* bsscolor_disable to be added as part of D1.0 */ 600 uint16 staid_info[HE_MAX_STAID_PER_BSSCOLOR]; /**< 0-3 staid info of each bsscolor */ 601 } wl_bsscolor_info_t; 602 603 #define WL_BSS_USER_RADAR_CHAN_SELECT 0x1 /**< User application will randomly select 604 * radar channel. 605 */ 606 607 #define DLOAD_HANDLER_VER 1 /**< Downloader version */ 608 #define DLOAD_FLAG_VER_MASK 0xf000 /**< Downloader version mask */ 609 #define DLOAD_FLAG_VER_SHIFT 12 /**< Downloader version shift */ 610 611 #define DL_CRC_NOT_INUSE 0x0001 612 #define DL_BEGIN 0x0002 613 #define DL_END 0x0004 614 615 /* Flags for Major/Minor/Date number shift and mask */ 616 #define EPI_VER_SHIFT 16 617 #define EPI_VER_MASK 0xFFFF 618 /** generic download types & flags */ 619 enum { 620 DL_TYPE_UCODE = 1, 621 DL_TYPE_CLM = 2 622 }; 623 624 /** ucode type values */ 625 enum { 626 UCODE_FW, 627 INIT_VALS, 628 BS_INIT_VALS 629 }; 630 631 struct wl_dload_data { 632 uint16 flag; 633 uint16 dload_type; 634 uint32 len; 635 uint32 crc; 636 uint8 data[1]; 637 }; 638 typedef struct wl_dload_data wl_dload_data_t; 639 640 struct wl_ucode_info { 641 uint32 ucode_type; 642 uint32 num_chunks; 643 uint32 chunk_len; 644 uint32 chunk_num; 645 uint8 data_chunk[1]; 646 }; 647 typedef struct wl_ucode_info wl_ucode_info_t; 648 649 struct wl_clm_dload_info { 650 uint32 ds_id; 651 uint32 clm_total_len; 652 uint32 num_chunks; 653 uint32 chunk_len; 654 uint32 chunk_offset; 655 uint8 data_chunk[1]; 656 }; 657 typedef struct wl_clm_dload_info wl_clm_dload_info_t; 658 659 typedef struct wlc_ssid { 660 uint32 SSID_len; 661 uint8 SSID[DOT11_MAX_SSID_LEN]; 662 } wlc_ssid_t; 663 664 typedef struct wlc_ssid_ext { 665 uint8 hidden; 666 uint8 PAD; 667 uint16 flags; 668 uint8 SSID_len; 669 int8 rssi_thresh; 670 uint8 SSID[DOT11_MAX_SSID_LEN]; 671 } wlc_ssid_ext_t; 672 673 #define MAX_PREFERRED_AP_NUM 5 674 typedef struct wlc_fastssidinfo { 675 uint32 SSID_channel[MAX_PREFERRED_AP_NUM]; 676 wlc_ssid_t SSID_info[MAX_PREFERRED_AP_NUM]; 677 } wlc_fastssidinfo_t; 678 679 typedef struct wnm_url { 680 uint8 len; 681 uint8 data[1]; 682 } wnm_url_t; 683 684 typedef struct chan_scandata { 685 uint8 txpower; 686 uint8 pad; 687 chanspec_t channel; /**< Channel num, bw, ctrl_sb and band */ 688 uint32 channel_mintime; 689 uint32 channel_maxtime; 690 } chan_scandata_t; 691 692 typedef enum wl_scan_type { 693 EXTDSCAN_FOREGROUND_SCAN, 694 EXTDSCAN_BACKGROUND_SCAN, 695 EXTDSCAN_FORCEDBACKGROUND_SCAN 696 } wl_scan_type_t; 697 698 #define WLC_EXTDSCAN_MAX_SSID 5 699 700 typedef struct wl_extdscan_params { 701 int8 nprobes; /**< 0, passive, otherwise active */ 702 int8 split_scan; /**< split scan */ 703 int8 band; /**< band */ 704 int8 pad; 705 wlc_ssid_t ssid[WLC_EXTDSCAN_MAX_SSID]; /**< ssid list */ 706 uint32 tx_rate; /**< in 500ksec units */ 707 wl_scan_type_t scan_type; /**< enum */ 708 int32 channel_num; 709 chan_scandata_t channel_list[1]; /**< list of chandata structs */ 710 } wl_extdscan_params_t; 711 712 #define WL_EXTDSCAN_PARAMS_FIXED_SIZE (sizeof(wl_extdscan_params_t) - sizeof(chan_scandata_t)) 713 714 #define WL_SCAN_PARAMS_SSID_MAX 10 715 716 struct wl_scan_params { 717 wlc_ssid_t ssid; /**< default: {0, ""} */ 718 struct ether_addr bssid; /**< default: bcast */ 719 int8 bss_type; /**< default: any, 720 * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT 721 */ 722 uint8 scan_type; /**< flags, 0 use default */ 723 int32 nprobes; /**< -1 use default, number of probes per channel */ 724 int32 active_time; /**< -1 use default, dwell time per channel for 725 * active scanning 726 */ 727 int32 passive_time; /**< -1 use default, dwell time per channel 728 * for passive scanning 729 */ 730 int32 home_time; /**< -1 use default, dwell time for the home channel 731 * between channel scans 732 */ 733 int32 channel_num; /**< count of channels and ssids that follow 734 * 735 * low half is count of channels in channel_list, 0 736 * means default (use all available channels) 737 * 738 * high half is entries in wlc_ssid_t array that 739 * follows channel_list, aligned for int32 (4 bytes) 740 * meaning an odd channel count implies a 2-byte pad 741 * between end of channel_list and first ssid 742 * 743 * if ssid count is zero, single ssid in the fixed 744 * parameter portion is assumed, otherwise ssid in 745 * the fixed portion is ignored 746 */ 747 uint16 channel_list[1]; /**< list of chanspecs */ 748 }; 749 750 /* changes in wl_scan_params_v2 as comapred to wl_scan_params (v1) 751 * unit8 scantype to uint32 752 */ 753 typedef struct wl_scan_params_v2 { 754 uint16 version; /* Version of wl_scan_params, change value of 755 * WL_SCAN_PARAM_VERSION on version update 756 */ 757 uint16 length; /* length of structure wl_scan_params_v1_t 758 * without implicit pad 759 */ 760 wlc_ssid_t ssid; /**< default: {0, ""} */ 761 struct ether_addr bssid; /**< default: bcast */ 762 int8 bss_type; /**< default: any, 763 * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT 764 */ 765 uint8 PAD; 766 uint32 scan_type; /**< flags, 0 use default, and flags specified in 767 * WL_SCANFLAGS_XXX 768 */ 769 int32 nprobes; /**< -1 use default, number of probes per channel */ 770 int32 active_time; /**< -1 use default, dwell time per channel for 771 * active scanning 772 */ 773 int32 passive_time; /**< -1 use default, dwell time per channel 774 * for passive scanning 775 */ 776 int32 home_time; /**< -1 use default, dwell time for the home channel 777 * between channel scans 778 */ 779 int32 channel_num; /**< count of channels and ssids that follow 780 * 781 * low half is count of channels in channel_list, 0 782 * means default (use all available channels) 783 * 784 * high half is entries in wlc_ssid_t array that 785 * follows channel_list, aligned for int32 (4 bytes) 786 * meaning an odd channel count implies a 2-byte pad 787 * between end of channel_list and first ssid 788 * 789 * if ssid count is zero, single ssid in the fixed 790 * parameter portion is assumed, otherwise ssid in 791 * the fixed portion is ignored 792 */ 793 uint16 channel_list[1]; /**< list of chanspecs */ 794 } wl_scan_params_v2_t; 795 796 #define WL_SCAN_PARAMS_VERSION_V2 2 797 798 /** size of wl_scan_params not including variable length array */ 799 #define WL_SCAN_PARAMS_V2_FIXED_SIZE (OFFSETOF(wl_scan_params_v2_t, channel_list)) 800 #define WL_MAX_ROAMSCAN_DATSZ \ 801 (WL_SCAN_PARAMS_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 802 #define WL_MAX_ROAMSCAN_V2_DATSZ \ 803 (WL_SCAN_PARAMS_V2_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 804 805 /* changes in wl_scan_params_v3 as comapred to wl_scan_params (v2) 806 * pad byte used to differentiate Short SSID and Regular SSID 807 */ 808 typedef struct wl_scan_params_v3 { 809 uint16 version; /* Version of wl_scan_params, change value of 810 * WL_SCAN_PARAM_VERSION on version update 811 */ 812 uint16 length; /* length of structure wl_scan_params_v1_t 813 * without implicit pad 814 */ 815 wlc_ssid_t ssid; /**< default: {0, ""} */ 816 struct ether_addr bssid; /**< default: bcast */ 817 int8 bss_type; /**< default: any, 818 * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT 819 */ 820 uint8 ssid_type; /**< ssid_type_flag ,0 use default, and flags specified 821 * WL_SCAN_SSID_FLAGS 822 */ 823 uint32 scan_type; /**< flags, 0 use default, and flags specified in 824 * WL_SCANFLAGS_XXX 825 */ 826 int32 nprobes; /**< -1 use default, number of probes per channel */ 827 int32 active_time; /**< -1 use default, dwell time per channel for 828 * active scanning 829 */ 830 int32 passive_time; /**< -1 use default, dwell time per channel 831 * for passive scanning 832 */ 833 int32 home_time; /**< -1 use default, dwell time for the home channel 834 * between channel scans 835 */ 836 int32 channel_num; /**< count of channels and ssids that follow 837 * 838 * low half is count of channels in channel_list, 0 839 * means default (use all available channels) 840 * 841 * high half is entries in wlc_ssid_t array that 842 * follows channel_list, aligned for int32 (4 bytes) 843 * meaning an odd channel count implies a 2-byte pad 844 * between end of channel_list and first ssid 845 * 846 * if ssid count is zero, single ssid in the fixed 847 * parameter portion is assumed, otherwise ssid in 848 * the fixed portion is ignored 849 */ 850 uint16 channel_list[]; /**< list of chanspecs */ 851 } wl_scan_params_v3_t; 852 853 #define WL_SCAN_PARAMS_VERSION_V3 3 854 855 /** size of wl_scan_params not including variable length array */ 856 #define WL_SCAN_PARAMS_V3_FIXED_SIZE (OFFSETOF(wl_scan_params_v3_t, channel_list)) 857 #define WL_MAX_ROAMSCAN_V3_DATSZ \ 858 (WL_SCAN_PARAMS_V3_FIXED_SIZE + (WL_NUMCHANNELS * sizeof(uint16))) 859 860 #define ISCAN_REQ_VERSION 1 861 #define ISCAN_REQ_VERSION_V2 2 862 863 /** incremental scan struct */ 864 struct wl_iscan_params { 865 uint32 version; 866 uint16 action; 867 uint16 scan_duration; 868 struct wl_scan_params params; 869 }; 870 871 /** incremental scan struct */ 872 typedef struct wl_iscan_params_v2 { 873 uint32 version; 874 uint16 action; 875 uint16 scan_duration; 876 wl_scan_params_v2_t params; 877 } wl_iscan_params_v2_t; 878 879 /** incremental scan struct */ 880 typedef struct wl_iscan_params_v3 { 881 uint32 version; 882 uint16 action; 883 uint16 scan_duration; 884 wl_scan_params_v3_t params; 885 } wl_iscan_params_v3_t; 886 887 /** 3 fields + size of wl_scan_params, not including variable length array */ 888 #define WL_ISCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_iscan_params_t, params) + sizeof(wlc_ssid_t)) 889 #define WL_ISCAN_PARAMS_V2_FIXED_SIZE \ 890 (OFFSETOF(wl_iscan_params_v2_t, params) + sizeof(wlc_ssid_t)) 891 #define WL_ISCAN_PARAMS_V3_FIXED_SIZE \ 892 (OFFSETOF(wl_iscan_params_v3_t, params) + sizeof(wlc_ssid_t)) 893 894 typedef struct wl_scan_results_v109 { 895 uint32 buflen; 896 uint32 version; 897 uint32 count; 898 wl_bss_info_v109_t bss_info[1]; 899 } wl_scan_results_v109_t; 900 901 typedef struct wl_scan_results_v2 { 902 uint32 buflen; 903 uint32 version; 904 uint32 count; 905 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 906 } wl_scan_results_v2_t; 907 908 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 909 typedef wl_scan_results_v109_t wl_scan_results_t; 910 /** size of wl_scan_results not including variable length array */ 911 #define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t)) 912 #endif 913 914 #if defined(SIMPLE_ISCAN) 915 /** the buf lengh can be WLC_IOCTL_MAXLEN (8K) to reduce iteration */ 916 #define WLC_IW_ISCAN_MAXLEN 2048 917 typedef struct iscan_buf { 918 struct iscan_buf * next; 919 int8 iscan_buf[WLC_IW_ISCAN_MAXLEN]; 920 } iscan_buf_t; 921 #endif /* SIMPLE_ISCAN */ 922 #define ESCAN_REQ_VERSION 1 923 #define ESCAN_REQ_VERSION_V2 2 924 925 /** event scan reduces amount of SOC memory needed to store scan results */ 926 struct wl_escan_params { 927 uint32 version; 928 uint16 action; 929 uint16 sync_id; 930 struct wl_scan_params params; 931 }; 932 933 typedef struct wl_escan_params_v2 { 934 uint32 version; 935 uint16 action; 936 uint16 sync_id; 937 wl_scan_params_v2_t params; 938 } wl_escan_params_v2_t; 939 940 typedef struct wl_escan_params_v3 { 941 uint32 version; 942 uint16 action; 943 uint16 sync_id; 944 wl_scan_params_v3_t params; 945 } wl_escan_params_v3_t; 946 947 #define WL_ESCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_escan_params_t, params) + sizeof(wlc_ssid_t)) 948 #define WL_ESCAN_PARAMS_V2_FIXED_SIZE (OFFSETOF(wl_escan_params_v2_t, params) + sizeof(wlc_ssid_t)) 949 #define WL_ESCAN_PARAMS_V3_FIXED_SIZE (OFFSETOF(wl_escan_params_v3_t, params) + sizeof(wlc_ssid_t)) 950 /* New scan version is defined then change old version of scan to 951 * wl_scan_params_v1_t and new one to wl_scan_params_t 952 */ 953 #if defined (WL_SCAN_PARAMS_V3) 954 typedef struct wl_scan_params wl_scan_params_v1_t; 955 typedef struct wl_escan_params wl_escan_params_v1_t; 956 typedef struct wl_iscan_params wl_iscan_params_v1_t; 957 typedef struct wl_scan_params_v3 wl_scan_params_t; 958 typedef struct wl_escan_params_v3 wl_escan_params_t; 959 typedef struct wl_iscan_params_v3 wl_iscan_params_t; 960 #define WL_SCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_scan_params_t, channel_list)) 961 #elif defined(WL_SCAN_PARAMS_V2) 962 typedef struct wl_scan_params wl_scan_params_v1_t; 963 typedef struct wl_escan_params wl_escan_params_v1_t; 964 typedef struct wl_iscan_params wl_iscan_params_v1_t; 965 typedef struct wl_scan_params_v2 wl_scan_params_t; 966 typedef struct wl_escan_params_v2 wl_escan_params_t; 967 typedef struct wl_iscan_params_v2 wl_iscan_params_t; 968 #define WL_SCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_scan_params_t, channel_list)) 969 #else 970 typedef struct wl_scan_params wl_scan_params_t; 971 typedef struct wl_escan_params wl_escan_params_t; 972 typedef struct wl_iscan_params wl_iscan_params_t; 973 #define WL_SCAN_PARAMS_FIXED_SIZE 64 974 #endif /* WL_SCAN_PARAMS_V3 */ 975 976 /** event scan reduces amount of SOC memory needed to store scan results */ 977 typedef struct wl_escan_result_v109 { 978 uint32 buflen; 979 uint32 version; 980 uint16 sync_id; 981 uint16 bss_count; 982 wl_bss_info_v109_t bss_info[1]; 983 } wl_escan_result_v109_t; 984 985 /** event scan reduces amount of SOC memory needed to store scan results */ 986 typedef struct wl_escan_result_v2 { 987 uint32 buflen; 988 uint32 version; 989 uint16 sync_id; 990 uint16 bss_count; 991 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 992 } wl_escan_result_v2_t; 993 994 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 995 typedef wl_escan_result_v109_t wl_escan_result_t; 996 #define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t)) 997 #endif 998 999 typedef struct wl_gscan_result_v2 { 1000 uint32 buflen; 1001 uint32 version; 1002 uint32 scan_ch_bucket; 1003 wl_gscan_bss_info_v2_t bss_info[1]; 1004 } wl_gscan_result_v2_t; 1005 1006 typedef struct wl_gscan_result_v2_1 { 1007 uint32 buflen; 1008 uint32 version; 1009 uint32 scan_ch_bucket; 1010 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 1011 } wl_gscan_result_v2_1_t; 1012 1013 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 1014 typedef wl_gscan_result_v2_t wl_gscan_result_t; 1015 #define WL_GSCAN_RESULTS_FIXED_SIZE (sizeof(wl_gscan_result_t) - sizeof(wl_gscan_bss_info_t)) 1016 #endif 1017 1018 /** incremental scan results struct */ 1019 typedef struct wl_iscan_results { 1020 uint32 status; 1021 wl_scan_results_v109_t results; 1022 } wl_iscan_results_v109_t; 1023 1024 /** incremental scan results struct */ 1025 typedef struct wl_iscan_results_v2 { 1026 uint32 status; 1027 wl_scan_results_v2_t results; 1028 } wl_iscan_results_v2_t; 1029 1030 #ifndef WL_BSS_INFO_TYPEDEF_HAS_ALIAS 1031 typedef wl_iscan_results_v109_t wl_iscan_results_t; 1032 /** size of wl_iscan_results not including variable length array */ 1033 #define WL_ISCAN_RESULTS_FIXED_SIZE \ 1034 (WL_SCAN_RESULTS_FIXED_SIZE + OFFSETOF(wl_iscan_results_t, results)) 1035 #endif 1036 1037 typedef struct wl_probe_params { 1038 wlc_ssid_t ssid; 1039 struct ether_addr bssid; 1040 struct ether_addr mac; 1041 } wl_probe_params_t; 1042 1043 #define WL_MAXRATES_IN_SET 16 /**< max # of rates in a rateset */ 1044 1045 typedef struct wl_rateset { 1046 uint32 count; /**< # rates in this set */ 1047 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1048 } wl_rateset_t; 1049 1050 #define WL_VHT_CAP_MCS_MAP_NSS_MAX 8 1051 1052 typedef struct wl_rateset_args_v1 { 1053 uint32 count; /**< # rates in this set */ 1054 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1055 uint8 mcs[MCSSET_LEN]; /**< supported mcs index bit map */ 1056 uint16 vht_mcs[WL_VHT_CAP_MCS_MAP_NSS_MAX]; /**< supported mcs index bit map per nss */ 1057 } wl_rateset_args_v1_t; 1058 1059 #define RATESET_ARGS_V1 (1) 1060 #define RATESET_ARGS_V2 (2) 1061 #define RATESET_ARGS_V3 (3) 1062 1063 /* RATESET_VERSION_ENABLED is defined in wl.mk post J branch. 1064 * Guidelines to use wl_rateset_args_t: 1065 * [a] in wlioctl.h: Add macro RATESET_ARGS_VX where X is the new version number. 1066 * [b] in wlioctl.h: Add a new structure with wl_rateset_args_vX_t 1067 * [c] in wlu.c app: Add support to parse new structure under RATESET_ARGS_VX 1068 * [d] in wlc_types.h: in respective branch and trunk: redefine wl_rateset_args_t with 1069 * new wl_rateset_args_vX_t 1070 */ 1071 #ifndef RATESET_VERSION_ENABLED 1072 /* rateset structure before versioning. legacy. DONOT update anymore here */ 1073 #define RATESET_ARGS_VERSION (RATESET_ARGS_V1) 1074 typedef wl_rateset_args_v1_t wl_rateset_args_t; 1075 #endif /* RATESET_VERSION_ENABLED */ 1076 1077 /* Note: dependent structures: sta_info_vX_t. When any update to this structure happens, 1078 * update sta_info_vX_t also. 1079 */ 1080 #define WL_HE_CAP_MCS_MAP_NSS_MAX 8 1081 1082 typedef struct wl_rateset_args_v2 { 1083 uint16 version; /**< version. */ 1084 uint16 len; /**< length */ 1085 uint32 count; /**< # rates in this set */ 1086 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1087 uint8 mcs[MCSSET_LEN]; /**< supported mcs index bit map */ 1088 uint16 vht_mcs[WL_VHT_CAP_MCS_MAP_NSS_MAX]; /**< supported mcs index bit map per nss */ 1089 uint16 he_mcs[WL_HE_CAP_MCS_MAP_NSS_MAX]; /**< supported he mcs index bit map per nss */ 1090 } wl_rateset_args_v2_t; 1091 1092 /* HE Rates BITMAP */ 1093 #define WL_HE_CAP_MCS_0_7_MAP 0x00ff 1094 #define WL_HE_CAP_MCS_0_9_MAP 0x03ff 1095 #define WL_HE_CAP_MCS_0_11_MAP 0x0fff 1096 1097 /* Note: dependent structures: sta_info_vX_t. When any update to this structure happens, 1098 * update sta_info_vX_t also. 1099 */ 1100 #define WL_EHT_CAP_MCS_MAP_NSS_MAX 8u /* could be max. 16 streams by the spec, 1101 * but it's to control our own rateset 1102 * so it probably won't exceed 4 streams 1103 * anyway... 1104 */ 1105 1106 typedef struct wl_rateset_args_v3 { 1107 uint16 version; /**< version. */ 1108 uint16 len; /**< length */ 1109 uint32 count; /**< # rates in 'rates' */ 1110 uint8 rates[WL_MAXRATES_IN_SET]; /**< rates in 500kbps units w/hi bit set if basic */ 1111 uint8 mcs[MCSSET_LEN]; /**< supported mcs index bit map */ 1112 uint16 vht_mcs[WL_VHT_CAP_MCS_MAP_NSS_MAX]; /**< supported VHT mcs per nss */ 1113 uint16 he_mcs[WL_HE_CAP_MCS_MAP_NSS_MAX]; /**< supported HE mcs per nss */ 1114 uint16 eht_mcs[WL_EHT_CAP_MCS_MAP_NSS_MAX]; /**< supported EHT mcs bitmap per nss */ 1115 } wl_rateset_args_v3_t; 1116 1117 /* EHT MCS BITMAP */ 1118 #define WL_EHT_CAP_MCS_0_7_MAP 0x00ffu 1119 #define WL_EHT_CAP_MCS_0_9_MAP 0x03ffu 1120 #define WL_EHT_CAP_MCS_0_11_MAP 0x0fffu 1121 #define WL_EHT_CAP_MCS_0_13_MAP 0x3fffu 1122 1123 #define TXBF_RATE_MCS_ALL 4 1124 #define TXBF_RATE_VHT_ALL 4 1125 #define TXBF_RATE_OFDM_ALL 8 1126 1127 typedef struct wl_txbf_rateset { 1128 uint8 txbf_rate_mcs[TXBF_RATE_MCS_ALL]; /**< one for each stream */ 1129 uint8 txbf_rate_mcs_bcm[TXBF_RATE_MCS_ALL]; /**< one for each stream */ 1130 uint16 txbf_rate_vht[TXBF_RATE_VHT_ALL]; /**< one for each stream */ 1131 uint16 txbf_rate_vht_bcm[TXBF_RATE_VHT_ALL]; /**< one for each stream */ 1132 uint8 txbf_rate_ofdm[TXBF_RATE_OFDM_ALL]; /**< bitmap of ofdm rates that enables txbf */ 1133 uint8 txbf_rate_ofdm_bcm[TXBF_RATE_OFDM_ALL]; /* bitmap of ofdm rates that enables txbf */ 1134 uint8 txbf_rate_ofdm_cnt; 1135 uint8 txbf_rate_ofdm_cnt_bcm; 1136 } wl_txbf_rateset_t; 1137 1138 #define NUM_BFGAIN_ARRAY_1RX 2 1139 #define NUM_BFGAIN_ARRAY_2RX 3 1140 #define NUM_BFGAIN_ARRAY_3RX 4 1141 #define NUM_BFGAIN_ARRAY_4RX 5 1142 1143 typedef struct wl_txbf_expgainset { 1144 /* bitmap for each element: B[4:0]=>c0, B[9:5]=>c1, B[14:10]=>c2, B[19:15]=>c[3-7] 1145 * B[24:20]=>c[8-9], B[29:25]=>c[10-11] 1146 */ 1147 uint32 bfgain_2x1[NUM_BFGAIN_ARRAY_1RX]; /* exp 1ss, imp 1ss */ 1148 uint32 bfgain_2x2[NUM_BFGAIN_ARRAY_2RX]; /* exp [1-2]ss, imp 1ss */ 1149 uint32 bfgain_3x1[NUM_BFGAIN_ARRAY_1RX]; 1150 uint32 bfgain_3x2[NUM_BFGAIN_ARRAY_2RX]; 1151 uint32 bfgain_3x3[NUM_BFGAIN_ARRAY_3RX]; /* exp [1-3]ss, imp 1ss */ 1152 uint32 bfgain_4x1[NUM_BFGAIN_ARRAY_1RX]; 1153 uint32 bfgain_4x2[NUM_BFGAIN_ARRAY_2RX]; 1154 uint32 bfgain_4x3[NUM_BFGAIN_ARRAY_3RX]; 1155 uint32 bfgain_4x4[NUM_BFGAIN_ARRAY_4RX]; /* exp [1-4]ss, imp 1ss */ 1156 } wl_txbf_expgainset_t; 1157 1158 #define OFDM_RATE_MASK 0x0000007f 1159 typedef uint8 ofdm_rates_t; 1160 1161 typedef struct wl_rates_info { 1162 wl_rateset_t rs_tgt; 1163 uint32 phy_type; 1164 int32 bandtype; 1165 uint8 cck_only; 1166 uint8 rate_mask; 1167 uint8 mcsallow; 1168 uint8 bw; 1169 uint8 txstreams; 1170 uint8 PAD[3]; 1171 } wl_rates_info_t; 1172 1173 /**uint32 list */ 1174 typedef struct wl_uint32_list { 1175 /** in - # of elements, out - # of entries */ 1176 uint32 count; 1177 /** variable length uint32 list */ 1178 uint32 element[1]; 1179 } wl_uint32_list_t; 1180 /* Size in bytes for wl_uint32_list_t with 'count' elements */ 1181 #define WL_UINT32_LIST_SIZE(count) (((count) + 1) * sizeof(uint32)) 1182 1183 #define CHAN_INFO_LIST_ALL_V1 1 1184 1185 typedef struct wl_chanspec_attr_s_v1 { 1186 uint32 chaninfo; 1187 uint32 chanspec; 1188 } wl_chanspec_attr_v1_t; 1189 1190 /**chanspecs list */ 1191 typedef struct wl_chanspec_list_s_v1 { 1192 uint16 version; 1193 /** in - # of chanspecs, out - # of entries */ 1194 uint16 count; 1195 /** variable length chanspecs list */ 1196 wl_chanspec_attr_v1_t chspecs[1]; 1197 } wl_chanspec_list_v1_t; 1198 1199 /* WLC_SET_ALLOW_MODE values */ 1200 #define ALLOW_MODE_ANY_BSSID 0 1201 #define ALLOW_MODE_ONLY_DESIRED_BSSID 1 1202 #define ALLOW_MODE_NO_BSSID 2 1203 1204 /** used for association with a specific BSSID and chanspec list */ 1205 typedef struct wl_assoc_params { 1206 struct ether_addr bssid; /**< 00:00:00:00:00:00: broadcast scan */ 1207 uint16 bssid_cnt; /**< 0: use chanspec_num, and the single bssid, 1208 * otherwise count of chanspecs in chanspec_list 1209 * AND paired bssids following chanspec_list 1210 * also, chanspec_num has to be set to zero 1211 * for bssid list to be used 1212 */ 1213 int32 chanspec_num; /**< 0: all available channels, 1214 * otherwise count of chanspecs in chanspec_list 1215 */ 1216 chanspec_t chanspec_list[1]; /**< list of chanspecs */ 1217 1218 } wl_assoc_params_t; 1219 1220 typedef struct wl_assoc_params_v1 { 1221 uint16 version; 1222 uint16 flags; 1223 struct ether_addr bssid; /**< 00:00:00:00:00:00: broadcast scan */ 1224 uint16 bssid_cnt; /**< 0: use chanspec_num, and the single bssid, 1225 * otherwise count of chanspecs in chanspec_list 1226 * AND paired bssids following chanspec_list 1227 * also, chanspec_num has to be set to zero 1228 * for bssid list to be used 1229 */ 1230 int32 chanspec_num; /**< 0: all available channels, 1231 * otherwise count of chanspecs in chanspec_list 1232 */ 1233 chanspec_t chanspec_list[1]; /**< list of chanspecs */ 1234 } wl_assoc_params_v1_t; 1235 1236 #define ASSOC_HINT_BSSID_PRESENT (1 << 0) 1237 1238 #define WL_ASSOC_PARAMS_FIXED_SIZE OFFSETOF(wl_assoc_params_t, chanspec_list) 1239 #define WL_ASSOC_PARAMS_FIXED_SIZE_V1 OFFSETOF(wl_assoc_params_v1_t, chanspec_list) 1240 /** used for reassociation/roam to a specific BSSID and channel */ 1241 typedef wl_assoc_params_t wl_reassoc_params_t; 1242 #define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE 1243 #define WL_EXT_REASSOC_VER 1 1244 1245 typedef struct wl_ext_reassoc_params { 1246 uint16 version; 1247 uint16 length; 1248 uint32 flags; 1249 wl_reassoc_params_t params; 1250 } wl_ext_reassoc_params_t; 1251 1252 /* Flags field defined above in wl_ext_reassoc_params 1253 * The value in bits [2:0] is used to specify the type 1254 * of scan to be used for reassoc 1255 */ 1256 1257 #define WL_SCAN_MODE_HIGH_ACC 0u /**< use high accuracy scans for roam */ 1258 #define WL_SCAN_MODE_LOW_SPAN 1u /**< use low span scans for roam */ 1259 #define WL_SCAN_MODE_LOW_POWER 2u /**< use low power scans for roam */ 1260 1261 #define WL_EXTREASSOC_PARAMS_FIXED_SIZE (OFFSETOF(wl_ext_reassoc_params_t, params) + \ 1262 WL_REASSOC_PARAMS_FIXED_SIZE) 1263 1264 /** used for association to a specific BSSID and channel */ 1265 typedef wl_assoc_params_t wl_join_assoc_params_t; 1266 typedef wl_assoc_params_v1_t wl_join_assoc_params_v1_t; 1267 #define WL_JOIN_ASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE 1268 #define WL_JOIN_ASSOC_PARAMS_FIXED_SIZE_V1 WL_ASSOC_PARAMS_FIXED_SIZE_V1 1269 /** used for join with or without a specific bssid and channel list */ 1270 typedef struct wl_join_params { 1271 wlc_ssid_t ssid; 1272 wl_assoc_params_t params; /**< optional field, but it must include the fixed portion 1273 * of the wl_assoc_params_t struct when it does present. 1274 */ 1275 } wl_join_params_t; 1276 1277 /** used for join with or without a specific bssid and channel list */ 1278 typedef struct wl_join_params_v1 { 1279 wlc_ssid_t ssid; 1280 wl_assoc_params_v1_t params; /**< optional field, but it must include the fixed portion 1281 * of the wl_assoc_params_t struct when it does present. 1282 */ 1283 } wl_join_params_v1_t; 1284 1285 #define WL_JOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_join_params_t, params) + \ 1286 WL_ASSOC_PARAMS_FIXED_SIZE) 1287 #define WL_JOIN_PARAMS_FIXED_SIZE_V1 (OFFSETOF(wl_join_params_v1_t, params) + \ 1288 WL_ASSOC_PARAMS_FIXED_SIZE_V1) 1289 typedef struct wlc_roam_exp_params { 1290 int8 a_band_boost_threshold; 1291 int8 a_band_penalty_threshold; 1292 int8 a_band_boost_factor; 1293 int8 a_band_penalty_factor; 1294 int8 cur_bssid_boost; 1295 int8 alert_roam_trigger_threshold; 1296 int16 a_band_max_boost; 1297 } wlc_roam_exp_params_t; 1298 1299 #define ROAM_EXP_CFG_VERSION 1 1300 1301 #define ROAM_EXP_ENABLE_FLAG (1 << 0) 1302 1303 #define ROAM_EXP_CFG_PRESENT (1 << 1) 1304 1305 typedef struct wl_roam_exp_cfg { 1306 uint16 version; 1307 uint16 flags; 1308 wlc_roam_exp_params_t params; 1309 } wl_roam_exp_cfg_t; 1310 1311 typedef struct wl_bssid_pref_list { 1312 struct ether_addr bssid; 1313 /* Add this to modify rssi */ 1314 int8 rssi_factor; 1315 int8 flags; 1316 } wl_bssid_pref_list_t; 1317 1318 #define BSSID_PREF_LIST_VERSION 1 1319 #define ROAM_EXP_CLEAR_BSSID_PREF (1 << 0) 1320 1321 typedef struct wl_bssid_pref_cfg { 1322 uint16 version; 1323 uint16 flags; 1324 uint16 count; 1325 uint16 reserved; 1326 wl_bssid_pref_list_t bssids[]; 1327 } wl_bssid_pref_cfg_t; 1328 1329 #define SSID_WHITELIST_VERSION 1 1330 1331 #define ROAM_EXP_CLEAR_SSID_WHITELIST (1 << 0) 1332 1333 /* Roam SSID whitelist, ssids in this list are ok to */ 1334 /* be considered as targets to join when considering a roam */ 1335 1336 typedef struct wl_ssid_whitelist { 1337 1338 uint16 version; 1339 uint16 flags; 1340 1341 uint8 ssid_count; 1342 uint8 reserved[3]; 1343 wlc_ssid_t ssids[]; 1344 } wl_ssid_whitelist_t; 1345 1346 #define ROAM_EXP_EVENT_VERSION 1 1347 1348 typedef struct wl_roam_exp_event { 1349 1350 uint16 version; 1351 uint16 flags; 1352 wlc_ssid_t cur_ssid; 1353 } wl_roam_exp_event_t; 1354 1355 /** scan params for extended join */ 1356 typedef struct wl_join_scan_params { 1357 uint8 scan_type; /**< 0 use default, active or passive scan */ 1358 uint8 PAD[3]; 1359 int32 nprobes; /**< -1 use default, number of probes per channel */ 1360 int32 active_time; /**< -1 use default, dwell time per channel for 1361 * active scanning 1362 */ 1363 int32 passive_time; /**< -1 use default, dwell time per channel 1364 * for passive scanning 1365 */ 1366 int32 home_time; /**< -1 use default, dwell time for the home channel 1367 * between channel scans 1368 */ 1369 } wl_join_scan_params_t; 1370 1371 #define wl_join_assoc_params_t wl_assoc_params_t 1372 #define wl_join_assoc_params_v1_t wl_assoc_params_v1_t 1373 /** extended join params */ 1374 typedef struct wl_extjoin_params { 1375 wlc_ssid_t ssid; /**< {0, ""}: wildcard scan */ 1376 wl_join_scan_params_t scan; 1377 wl_join_assoc_params_t assoc; /**< optional field, but it must include the fixed portion 1378 * of the wl_join_assoc_params_t struct when it does 1379 * present. 1380 */ 1381 } wl_extjoin_params_t; 1382 1383 typedef struct wl_extjoin_params_v1 { 1384 uint16 version; 1385 wlc_ssid_t ssid; /**< {0, ""}: wildcard scan */ 1386 wl_join_scan_params_t scan; 1387 wl_join_assoc_params_v1_t assoc; /**< optional field, but it must include the fixed portion 1388 * of the wl_join_assoc_params_t struct when it does 1389 * present. 1390 */ 1391 } wl_extjoin_params_v1_t; 1392 1393 #define WL_EXTJOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_extjoin_params_t, assoc) + \ 1394 WL_JOIN_ASSOC_PARAMS_FIXED_SIZE) 1395 #define WL_EXTJOIN_PARAMS_FIXED_SIZE_V1 (OFFSETOF(wl_extjoin_params_v1_t, assoc) + \ 1396 WL_JOIN_ASSOC_PARAMS_FIXED_SIZE_V1) 1397 #define ANT_SELCFG_MAX 4 /**< max number of antenna configurations */ 1398 #define MAX_STREAMS_SUPPORTED 4 /**< max number of streams supported */ 1399 typedef struct { 1400 uint8 ant_config[ANT_SELCFG_MAX]; /**< antenna configuration */ 1401 uint8 num_antcfg; /**< number of available antenna configurations */ 1402 } wlc_antselcfg_t; 1403 1404 /* This is obsolete.Pls add new fields by extending versioned structure. 1405 * cca_congest_ext_vX_t [X is latest version] 1406 */ 1407 typedef struct cca_congest { 1408 uint32 duration; /**< millisecs spent sampling this channel */ 1409 union { 1410 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 1411 /**< move if cur bss moves channels) */ 1412 uint32 congest_me; /**< millisecs in my own traffic */ 1413 }; 1414 union { 1415 uint32 congest_obss; /**< traffic not in our bss */ 1416 uint32 congest_notme; /**< traffic not from/to me (including bc/mc) */ 1417 }; 1418 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 1419 uint32 timestamp; /**< second timestamp */ 1420 } cca_congest_t; 1421 1422 /* This is obsolete.Pls add new fields by extending versioned structure. 1423 * cca_congest_ext_channel_req_vX_t [X is latest version] 1424 */ 1425 typedef struct cca_congest_channel_req { 1426 chanspec_t chanspec; /**< Which channel? */ 1427 uint16 num_secs; /**< How many secs worth of data */ 1428 cca_congest_t secs[1]; /**< Data */ 1429 } cca_congest_channel_req_t; 1430 1431 typedef struct cca_congest_ext { 1432 uint32 timestamp; /**< second timestamp */ 1433 1434 /* Base structure of cca_congest_t: CCA statistics all inclusive */ 1435 uint32 duration; /**< millisecs spent sampling this channel */ 1436 uint32 congest_meonly; /**< millisecs in my own traffic (TX + RX) */ 1437 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 1438 /**< move if cur bss moves channels) */ 1439 uint32 congest_obss; /**< traffic not in our bss */ 1440 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 1441 1442 /* CCA statistics for non PM only */ 1443 uint32 duration_nopm; /**< millisecs spent sampling this channel */ 1444 uint32 congest_meonly_nopm; /**< millisecs in my own traffic (TX + RX) */ 1445 uint32 congest_ibss_nopm; /**< millisecs in our bss (presumably this traffic will */ 1446 /**< move if cur bss moves channels) */ 1447 uint32 congest_obss_nopm; /**< traffic not in our bss */ 1448 uint32 interference_nopm; /**< millisecs detecting a non 802.11 interferer. */ 1449 1450 /* CCA statistics for during PM only */ 1451 uint32 duration_pm; /**< millisecs spent sampling this channel */ 1452 uint32 congest_meonly_pm; /**< millisecs in my own traffic (TX + RX) */ 1453 uint32 congest_ibss_pm; /**< millisecs in our bss (presumably this traffic will */ 1454 /**< move if cur bss moves channels) */ 1455 uint32 congest_obss_pm; /**< traffic not in our bss */ 1456 uint32 interference_pm; /**< millisecs detecting a non 802.11 interferer. */ 1457 } cca_congest_ext_t; 1458 1459 typedef struct cca_congest_ext_v2 { 1460 uint32 timestamp; /**< second timestamp */ 1461 1462 /* Base structure of cca_congest_t: CCA statistics all inclusive */ 1463 uint32 duration; /**< millisecs spent sampling this channel */ 1464 uint32 congest_meonly; /**< millisecs in my own traffic (TX + RX) */ 1465 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 1466 /**< move if cur bss moves channels) */ 1467 uint32 congest_obss; /**< traffic not in our bss */ 1468 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 1469 1470 /* CCA statistics for non PM only */ 1471 uint32 duration_nopm; /**< millisecs spent sampling this channel */ 1472 uint32 congest_meonly_nopm; /**< millisecs in my own traffic (TX + RX) */ 1473 uint32 congest_ibss_nopm; /**< millisecs in our bss (presumably this traffic will */ 1474 /**< move if cur bss moves channels) */ 1475 uint32 congest_obss_nopm; /**< traffic not in our bss */ 1476 uint32 interference_nopm; /**< millisecs detecting a non 802.11 interferer. */ 1477 1478 /* CCA statistics for during PM only */ 1479 uint32 duration_pm; /**< millisecs spent sampling this channel */ 1480 uint32 congest_meonly_pm; /**< millisecs in my own traffic (TX + RX) */ 1481 uint32 congest_ibss_pm; /**< millisecs in our bss (presumably this traffic will */ 1482 /**< move if cur bss moves channels) */ 1483 uint32 congest_obss_pm; /**< traffic not in our bss */ 1484 uint32 interference_pm; /**< millisecs detecting a non 802.11 interferer. */ 1485 uint32 radio_on_time; /* Awake time on this channel */ 1486 uint32 cca_busy_time; /* CCA is held busy on this channel */ 1487 } cca_congest_ext_v2_t; 1488 1489 #define WL_CCA_EXT_REQ_VER 0u 1490 #define WL_CCA_EXT_REQ_VER_V2 2u 1491 #define WL_CCA_EXT_REQ_VER_V3 3u 1492 1493 typedef struct cca_congest_ext_channel_req { 1494 uint16 ver; /**< version of this struct */ 1495 uint16 len; /**< len of this structure */ 1496 chanspec_t chanspec; /**< Which channel? */ 1497 uint16 num_secs; /**< How many secs worth of data */ 1498 struct cca_congest_ext secs[1]; /**< Data - 3 sets for ALL - non-PM - PM */ 1499 } cca_congest_ext_channel_req_t; 1500 1501 typedef struct cca_congest_ext_channel_req_v2 { 1502 uint16 ver; /**< version of this struct */ 1503 uint16 len; /**< len of this structure */ 1504 chanspec_t chanspec; /**< Which channel? */ 1505 uint16 num_secs; /* How many secs worth of data */ 1506 cca_congest_ext_v2_t secs[1]; /* Data - 3 sets for ALL - non-PM - PM */ 1507 } cca_congest_ext_channel_req_v2_t; 1508 1509 /* Struct holding all channels cca statistics */ 1510 typedef struct cca_congest_ext_channel_req_v3 { 1511 uint16 ver; 1512 uint16 len; 1513 uint8 PAD[2]; 1514 uint16 num_of_entries; 1515 cca_congest_ext_channel_req_v2_t per_chan_stats[1]; 1516 } cca_congest_ext_channel_req_v3_t; 1517 1518 typedef struct { 1519 uint32 duration; /**< millisecs spent sampling this channel */ 1520 uint32 congest; /**< millisecs detecting busy CCA */ 1521 uint32 timestamp; /**< second timestamp */ 1522 } cca_congest_simple_t; 1523 1524 /* The following two structure must have same first 4 fields. 1525 * The cca_chan_qual_event_t is used to report CCA in older formats and NF. 1526 * The cca_only_chan_qual_event_t is used to report CCA only with newer format. 1527 */ 1528 typedef struct { 1529 uint16 status; 1530 uint16 id; 1531 chanspec_t chanspec; /**< Which channel? */ 1532 uint16 len; 1533 union { 1534 cca_congest_simple_t cca_busy; /**< CCA busy */ 1535 cca_congest_t cca_busy_ext; /**< Extended CCA report */ 1536 int32 noise; /**< noise floor */ 1537 }; 1538 } cca_chan_qual_event_t; 1539 1540 typedef struct { 1541 uint16 status; 1542 uint16 id; 1543 chanspec_t chanspec; /**< Which channel? */ 1544 uint16 len; 1545 union { 1546 cca_congest_simple_t cca_busy; /**< CCA busy */ 1547 struct { 1548 cca_congest_t cca_busy_ext; /**< Extended CCA report */ 1549 cca_congest_t cca_busy_nopm; /**< Extedned CCA report (PM awake time) */ 1550 cca_congest_t cca_busy_pm; /**< Extedned CCA report (PM sleep time) */ 1551 }; 1552 }; 1553 } cca_only_chan_qual_event_t; 1554 1555 typedef struct { 1556 uint16 status; /* Indicates the status of event */ 1557 uint16 id; 1558 /* id is used to indicate the number of bytes to read */ 1559 chanspec_t chanspec; /**< Which channel? */ 1560 uint16 len; 1561 union { 1562 cca_congest_simple_t cca_busy; /**< CCA busy */ 1563 struct { 1564 cca_congest_t cca_busy_ext; /**< Extended CCA report */ 1565 cca_congest_t cca_busy_nopm; /**< Extedned CCA report (PM awake time) */ 1566 cca_congest_t cca_busy_pm; /**< Extedned CCA report (PM sleep time) */ 1567 }; 1568 }; 1569 int32 ofdm_desense; 1570 } cca_only_chan_qual_event_v2_t; 1571 1572 typedef struct { 1573 uint32 msrmnt_time; /**< Time for Measurement (msec) */ 1574 uint32 msrmnt_done; /**< flag set when measurement complete */ 1575 char buf[]; 1576 } cca_stats_n_flags; 1577 1578 typedef struct { 1579 uint32 msrmnt_query; /* host to driver query for measurement done */ 1580 uint32 time_req; /* time required for measurement */ 1581 uint8 report_opt; /* option to print different stats in report */ 1582 uint8 PAD[3]; 1583 } cca_msrmnt_query; 1584 1585 /* interference sources */ 1586 enum interference_source { 1587 ITFR_NONE = 0, /**< interference */ 1588 ITFR_PHONE, /**< wireless phone */ 1589 ITFR_VIDEO_CAMERA, /**< wireless video camera */ 1590 ITFR_MICROWAVE_OVEN, /**< microwave oven */ 1591 ITFR_BABY_MONITOR, /**< wireless baby monitor */ 1592 ITFR_BLUETOOTH, /**< bluetooth */ 1593 ITFR_VIDEO_CAMERA_OR_BABY_MONITOR, /**< wireless camera or baby monitor */ 1594 ITFR_BLUETOOTH_OR_BABY_MONITOR, /**< bluetooth or baby monitor */ 1595 ITFR_VIDEO_CAMERA_OR_PHONE, /**< video camera or phone */ 1596 ITFR_UNIDENTIFIED /**< interference from unidentified source */ 1597 }; 1598 1599 /** structure for interference source report */ 1600 typedef struct { 1601 uint32 flags; /**< flags. bit definitions below */ 1602 uint32 source; /**< last detected interference source */ 1603 uint32 timestamp; /**< second timestamp on interferenced flag change */ 1604 } interference_source_rep_t; 1605 1606 #define WLC_CNTRY_BUF_SZ 4 /**< Country string is 3 bytes + NUL */ 1607 1608 typedef struct wl_country { 1609 char country_abbrev[WLC_CNTRY_BUF_SZ]; /**< nul-terminated country code used in 1610 * the Country IE 1611 */ 1612 int32 rev; /**< revision specifier for ccode 1613 * on set, -1 indicates unspecified. 1614 * on get, rev >= 0 1615 */ 1616 char ccode[WLC_CNTRY_BUF_SZ]; /**< nul-terminated built-in country code. 1617 * variable length, but fixed size in 1618 * struct allows simple allocation for 1619 * expected country strings <= 3 chars. 1620 */ 1621 } wl_country_t; 1622 1623 #define CCODE_INFO_VERSION 1 1624 1625 typedef enum wl_ccode_role { 1626 WLC_CCODE_ROLE_ACTIVE = 0, 1627 WLC_CCODE_ROLE_HOST, 1628 WLC_CCODE_ROLE_80211D_ASSOC, 1629 WLC_CCODE_ROLE_80211D_SCAN, 1630 WLC_CCODE_ROLE_DEFAULT, 1631 WLC_CCODE_ROLE_DEFAULT_SROM_BKUP, 1632 WLC_CCODE_LAST 1633 } wl_ccode_role_t; 1634 #define WLC_NUM_CCODE_INFO WLC_CCODE_LAST 1635 1636 typedef struct wl_ccode_entry { 1637 uint16 reserved; 1638 uint8 band; 1639 uint8 role; 1640 char ccode[WLC_CNTRY_BUF_SZ]; 1641 } wl_ccode_entry_t; 1642 1643 typedef struct wl_ccode_info { 1644 uint16 version; 1645 uint16 count; /**< Number of ccodes entries in the set */ 1646 wl_ccode_entry_t ccodelist[1]; 1647 } wl_ccode_info_t; 1648 #define WL_CCODE_INFO_FIXED_LEN OFFSETOF(wl_ccode_info_t, ccodelist) 1649 typedef struct wl_channels_in_country { 1650 uint32 buflen; 1651 uint32 band; 1652 char country_abbrev[WLC_CNTRY_BUF_SZ]; 1653 uint32 count; 1654 uint32 channel[1]; 1655 } wl_channels_in_country_t; 1656 1657 typedef struct wl_country_list { 1658 uint32 buflen; 1659 uint32 band_set; 1660 uint32 band; 1661 uint32 count; 1662 char country_abbrev[1]; 1663 } wl_country_list_t; 1664 1665 typedef struct wl_rm_req_elt { 1666 int8 type; 1667 int8 flags; 1668 chanspec_t chanspec; 1669 uint32 token; /**< token for this measurement */ 1670 uint32 tsf_h; /**< TSF high 32-bits of Measurement start time */ 1671 uint32 tsf_l; /**< TSF low 32-bits */ 1672 uint32 dur; /**< TUs */ 1673 } wl_rm_req_elt_t; 1674 1675 typedef struct wl_rm_req { 1676 uint32 token; /**< overall measurement set token */ 1677 uint32 count; /**< number of measurement requests */ 1678 void *cb; /**< completion callback function: may be NULL */ 1679 void *cb_arg; /**< arg to completion callback function */ 1680 wl_rm_req_elt_t req[1]; /**< variable length block of requests */ 1681 } wl_rm_req_t; 1682 #define WL_RM_REQ_FIXED_LEN OFFSETOF(wl_rm_req_t, req) 1683 1684 typedef struct wl_rm_rep_elt { 1685 int8 type; 1686 int8 flags; 1687 chanspec_t chanspec; 1688 uint32 token; /**< token for this measurement */ 1689 uint32 tsf_h; /**< TSF high 32-bits of Measurement start time */ 1690 uint32 tsf_l; /**< TSF low 32-bits */ 1691 uint32 dur; /**< TUs */ 1692 uint32 len; /**< byte length of data block */ 1693 uint8 data[1]; /**< variable length data block */ 1694 } wl_rm_rep_elt_t; 1695 #define WL_RM_REP_ELT_FIXED_LEN 24 /**< length excluding data block */ 1696 1697 #define WL_RPI_REP_BIN_NUM 8 1698 typedef struct wl_rm_rpi_rep { 1699 uint8 rpi[WL_RPI_REP_BIN_NUM]; 1700 int8 rpi_max[WL_RPI_REP_BIN_NUM]; 1701 } wl_rm_rpi_rep_t; 1702 1703 typedef struct wl_rm_rep { 1704 uint32 token; /**< overall measurement set token */ 1705 uint32 len; /**< length of measurement report block */ 1706 wl_rm_rep_elt_t rep[1]; /**< variable length block of reports */ 1707 } wl_rm_rep_t; 1708 #define WL_RM_REP_FIXED_LEN 8 1709 1710 #ifdef BCMCCX 1711 #define LEAP_USER_MAX 32 1712 #define LEAP_DOMAIN_MAX 32 1713 #define LEAP_PASSWORD_MAX 32 1714 1715 typedef struct wl_leap_info { 1716 wlc_ssid_t ssid; 1717 uint8 user_len; 1718 uint8 user[LEAP_USER_MAX]; 1719 uint8 password_len; 1720 uint8 password[LEAP_PASSWORD_MAX]; 1721 uint8 domain_len; 1722 uint8 domain[LEAP_DOMAIN_MAX]; 1723 uint8 PAD; 1724 } wl_leap_info_t; 1725 1726 typedef struct wl_leap_list { 1727 uint32 buflen; 1728 uint32 version; 1729 uint32 count; 1730 wl_leap_info_t leap_info[1]; 1731 } wl_leap_list_t; 1732 #endif /* BCMCCX */ 1733 1734 typedef enum sup_auth_status { 1735 /* Basic supplicant authentication states */ 1736 WLC_SUP_DISCONNECTED = 0, 1737 WLC_SUP_CONNECTING, 1738 WLC_SUP_IDREQUIRED, 1739 WLC_SUP_AUTHENTICATING, 1740 WLC_SUP_AUTHENTICATED, 1741 WLC_SUP_KEYXCHANGE, 1742 WLC_SUP_KEYED, 1743 WLC_SUP_TIMEOUT, 1744 WLC_SUP_LAST_BASIC_STATE, 1745 1746 /* Extended supplicant authentication states */ 1747 /** Waiting to receive handshake msg M1 */ 1748 WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED, 1749 /** Preparing to send handshake msg M2 */ 1750 WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE, 1751 /* Waiting to receive handshake msg M3 */ 1752 WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE, 1753 WLC_SUP_KEYXCHANGE_PREP_M4, /**< Preparing to send handshake msg M4 */ 1754 WLC_SUP_KEYXCHANGE_WAIT_G1, /**< Waiting to receive handshake msg G1 */ 1755 WLC_SUP_KEYXCHANGE_PREP_G2 /**< Preparing to send handshake msg G2 */ 1756 } sup_auth_status_t; 1757 1758 typedef struct wl_wsec_key { 1759 uint32 index; /**< key index */ 1760 uint32 len; /**< key length */ 1761 uint8 data[DOT11_MAX_KEY_SIZE]; /**< key data */ 1762 uint32 pad_1[18]; 1763 uint32 algo; /**< CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ 1764 uint32 flags; /**< misc flags */ 1765 uint32 pad_2[2]; 1766 int32 pad_3; 1767 int32 iv_initialized; /**< has IV been initialized already? */ 1768 int32 pad_4; 1769 /* Rx IV */ 1770 struct { 1771 uint32 hi; /**< upper 32 bits of IV */ 1772 uint16 lo; /**< lower 16 bits of IV */ 1773 uint16 PAD; 1774 } rxiv; 1775 uint32 pad_5[2]; 1776 struct ether_addr ea; /**< per station */ 1777 uint16 PAD; 1778 } wl_wsec_key_t; 1779 1780 /* Min length for PSK passphrase */ 1781 #define WSEC_MIN_PSK_LEN 8 1782 /* Max length of supported passphrases for PSK */ 1783 #define WSEC_MAX_PSK_LEN 64 1784 /* Max length of supported passphrases for SAE */ 1785 #define WSEC_MAX_PASSPHRASE_LEN 256u 1786 /* Max length of SAE password ID */ 1787 #define WSEC_MAX_SAE_PASSWORD_ID 255u 1788 1789 /* Flag for key material needing passhash'ing */ 1790 #define WSEC_PASSPHRASE 1u 1791 /* Flag indicating an SAE passphrase */ 1792 #define WSEC_SAE_PASSPHRASE 2u 1793 1794 /**receptacle for WLC_SET_WSEC_PMK parameter */ 1795 1796 typedef struct wsec_pmk { 1797 ushort key_len; /* octets in key material */ 1798 ushort flags; /* key handling qualification */ 1799 uint8 key[WSEC_MAX_PASSPHRASE_LEN]; /* PMK material */ 1800 uint16 opt_len; /* optional field length */ 1801 uint8 opt_tlvs[1]; /* optional filed in bcm_xtlv_t format */ 1802 } wsec_pmk_t; 1803 1804 typedef enum { 1805 WL_PMK_TLV_PASSWORD_ID = 1, 1806 WL_PMK_TLV_SSID = 2, 1807 WL_PMK_TLV_BSSID = 3 1808 } wl_pmk_tlv_types_t; 1809 1810 #define WL_AUTH_EVENT_DATA_V1 0x1 1811 #define WL_AUTH_EVENT_DATA_V2 0x2 1812 1813 /* tlv ids for auth event */ 1814 #define WL_AUTH_PMK_TLV_ID 1u 1815 #define WL_AUTH_PMKID_TLV_ID 2u 1816 #define WL_AUTH_PMKID_TYPE_TLV_ID 3u 1817 #define WL_AUTH_SSID_TLV_ID 4u 1818 1819 #define WL_AUTH_PMKID_TYPE_BSSID 1u 1820 #define WL_AUTH_PMKID_TYPE_SSID 2u 1821 /* AUTH event data 1822 * pmk and pmkid in case of SAE auth 1823 * xtlvs will be 32 bit alligned 1824 */ 1825 typedef struct wl_auth_event { 1826 uint16 version; 1827 uint16 length; 1828 uint8 xtlvs[]; 1829 } wl_auth_event_t; 1830 1831 #define WL_AUTH_EVENT_FIXED_LEN_V1 OFFSETOF(wl_auth_event_t, xtlvs) 1832 #define WL_AUTH_EVENT_FIXED_LEN_V2 OFFSETOF(wl_auth_event_t, xtlvs) 1833 1834 #define WL_PMKSA_EVENT_DATA_V1 1u 1835 1836 /* tlv ids for PMKSA event */ 1837 #define WL_PMK_TLV_ID 1u 1838 #define WL_PMKID_TLV_ID 2u 1839 #define WL_PEER_ADDR_TLV_ID 3u 1840 1841 /* PMKSA event data structure */ 1842 typedef struct wl_pmksa_event { 1843 uint16 version; 1844 uint16 length; 1845 uint8 xtlvs[]; 1846 } wl_pmksa_event_t; 1847 1848 #define WL_PMKSA_EVENT_FIXED_LEN_V1 OFFSETOF(wl_pmksa_event_t, xtlvs) 1849 1850 #define FILS_CACHE_ID_LEN 2u 1851 #define PMK_LEN_MAX 48u 1852 1853 typedef struct _pmkid_v1 { 1854 struct ether_addr BSSID; 1855 uint8 PMKID[WPA2_PMKID_LEN]; 1856 } pmkid_v1_t; 1857 1858 #define PMKID_ELEM_V2_LENGTH (sizeof(struct ether_addr) + WPA2_PMKID_LEN + PMK_LEN_MAX + \ 1859 sizeof(ssid_info_t) + FILS_CACHE_ID_LEN) 1860 1861 typedef struct _pmkid_v2 { 1862 uint16 length; /* Should match PMKID_ELEM_VX_LENGTH */ 1863 struct ether_addr BSSID; 1864 uint8 PMKID[WPA2_PMKID_LEN]; 1865 uint8 pmk[PMK_LEN_MAX]; /* for FILS key deriviation */ 1866 uint16 pmk_len; 1867 ssid_info_t ssid; 1868 uint8 fils_cache_id[FILS_CACHE_ID_LEN]; 1869 } pmkid_v2_t; 1870 1871 #define PMKID_LIST_VER_2 2 1872 1873 typedef struct _pmkid_v3 { 1874 struct ether_addr bssid; 1875 uint8 pmkid[WPA2_PMKID_LEN]; 1876 uint8 pmkid_len; 1877 uint8 pmk[PMK_LEN_MAX]; 1878 uint8 pmk_len; 1879 uint16 fils_cache_id; /* 2-byte length */ 1880 uint8 akm; 1881 uint8 ssid_len; 1882 uint8 ssid[DOT11_MAX_SSID_LEN]; /* For FILS, to save ESSID */ 1883 /* one pmkid used in whole ESS */ 1884 uint32 time_left; /* remaining time until expirary in sec. */ 1885 /* 0 means expired, all 0xFF means never expire */ 1886 } pmkid_v3_t; 1887 1888 #define PMKID_LIST_VER_3 3 1889 typedef struct _pmkid_list_v1 { 1890 uint32 npmkid; 1891 pmkid_v1_t pmkid[1]; 1892 } pmkid_list_v1_t; 1893 1894 typedef struct _pmkid_list_v2 { 1895 uint16 version; 1896 uint16 length; 1897 pmkid_v2_t pmkid[1]; 1898 } pmkid_list_v2_t; 1899 1900 #define PMKDB_SET_IOVAR 1u 1901 #define PMKDB_GET_IOVAR 2u 1902 #define PMKDB_CLEAR_IOVAR 4u 1903 1904 typedef struct _pmkid_list_v3 { 1905 uint16 version; 1906 uint16 length; 1907 uint16 count; 1908 uint16 flag; 1909 pmkid_v3_t pmkid[]; 1910 } pmkid_list_v3_t; 1911 1912 #ifndef PMKID_VERSION_ENABLED 1913 /* pmkid structure before versioning. legacy. DONOT update anymore here */ 1914 typedef pmkid_v1_t pmkid_t; 1915 typedef pmkid_list_v1_t pmkid_list_t; 1916 #endif /* PMKID_VERSION_ENABLED */ 1917 1918 typedef struct _pmkid_cand { 1919 struct ether_addr BSSID; 1920 uint8 preauth; 1921 } pmkid_cand_t; 1922 1923 typedef struct _pmkid_cand_list { 1924 uint32 npmkid_cand; 1925 pmkid_cand_t pmkid_cand[1]; 1926 } pmkid_cand_list_t; 1927 1928 #define WL_STA_ANT_MAX 4 /**< max possible rx antennas */ 1929 1930 typedef struct wl_assoc_info { 1931 uint32 req_len; 1932 uint32 resp_len; 1933 uint32 flags; 1934 struct dot11_assoc_req req; 1935 struct ether_addr reassoc_bssid; /**< used in reassoc's */ 1936 struct dot11_assoc_resp resp; 1937 uint32 state; 1938 } wl_assoc_info_t; 1939 1940 /** srom read/write struct passed through ioctl */ 1941 typedef struct { 1942 uint32 byteoff; /**< byte offset */ 1943 uint32 nbytes; /**< number of bytes */ 1944 uint16 buf[]; 1945 } srom_rw_t; 1946 1947 #define CISH_FLAG_PCIECIS (1 << 15) /**< write CIS format bit for PCIe CIS */ 1948 1949 /** similar cis (srom or otp) struct [iovar: may not be aligned] */ 1950 typedef struct { 1951 uint16 source; /**< cis source */ 1952 uint16 flags; /**< flags */ 1953 uint32 byteoff; /**< byte offset */ 1954 uint32 nbytes; /**< number of bytes */ 1955 /* data follows here */ 1956 } cis_rw_t; 1957 1958 /** R_REG and W_REG struct passed through ioctl */ 1959 typedef struct { 1960 uint32 byteoff; /**< byte offset of the field in d11regs_t */ 1961 uint32 val; /**< read/write value of the field */ 1962 uint32 size; /**< sizeof the field */ 1963 uint32 band; /**< band (optional) */ 1964 } rw_reg_t; 1965 1966 /** 1967 * Structure used by GET/SET_ATTEN ioctls - it controls power in b/g-band 1968 * PCL - Power Control Loop 1969 */ 1970 typedef struct { 1971 uint16 auto_ctrl; /**< WL_ATTEN_XX */ 1972 uint16 bb; /**< Baseband attenuation */ 1973 uint16 radio; /**< Radio attenuation */ 1974 uint16 txctl1; /**< Radio TX_CTL1 value */ 1975 } atten_t; 1976 1977 /** Per-AC retry parameters */ 1978 struct wme_tx_params_s { 1979 uint8 short_retry; 1980 uint8 short_fallback; 1981 uint8 long_retry; 1982 uint8 long_fallback; 1983 uint16 max_rate; /**< In units of 512 Kbps */ 1984 }; 1985 1986 typedef struct wme_tx_params_s wme_tx_params_t; 1987 1988 #define WL_WME_TX_PARAMS_IO_BYTES (sizeof(wme_tx_params_t) * AC_COUNT) 1989 1990 /**Used to get specific link/ac parameters */ 1991 typedef struct { 1992 int32 ac; 1993 uint8 val; 1994 struct ether_addr ea; 1995 uint8 PAD; 1996 } link_val_t; 1997 1998 #define WL_PM_MUTE_TX_VER 1 1999 2000 typedef struct wl_pm_mute_tx { 2001 uint16 version; /**< version */ 2002 uint16 len; /**< length */ 2003 uint16 deadline; /**< deadline timer (in milliseconds) */ 2004 uint8 enable; /**< set to 1 to enable mode; set to 0 to disable it */ 2005 uint8 PAD; 2006 } wl_pm_mute_tx_t; 2007 2008 /* 2009 * Pay attention to version if structure changes. 2010 */ 2011 2012 /* sta_info_t version 4 */ 2013 typedef struct { 2014 uint16 ver; /**< version of this struct */ 2015 uint16 len; /**< length in bytes of this structure */ 2016 uint16 cap; /**< sta's advertised capabilities */ 2017 uint16 PAD; 2018 uint32 flags; /**< flags defined below */ 2019 uint32 idle; /**< time since data pkt rx'd from sta */ 2020 struct ether_addr ea; /**< Station address */ 2021 uint16 PAD; 2022 wl_rateset_t rateset; /**< rateset in use */ 2023 uint32 in; /**< seconds elapsed since associated */ 2024 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 2025 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 2026 uint32 tx_failures; /**< # of user packets failed */ 2027 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 2028 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 2029 uint32 tx_rate; /**< Rate used by last tx frame */ 2030 uint32 rx_rate; /**< Rate of last successful rx frame */ 2031 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 2032 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 2033 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 2034 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 2035 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 2036 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 2037 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 2038 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 2039 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 2040 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 2041 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 2042 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 2043 * of data frames 2044 */ 2045 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 2046 uint16 aid; /**< association ID */ 2047 uint16 ht_capabilities; /**< advertised ht caps */ 2048 uint16 vht_flags; /**< converted vht flags */ 2049 uint16 PAD; 2050 uint32 tx_pkts_retried; /**< # of frames where a retry was 2051 * necessary 2052 */ 2053 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 2054 * was exhausted 2055 */ 2056 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 2057 * received data frame. 2058 */ 2059 /* TX WLAN retry/failure statistics: 2060 * Separated for host requested frames and WLAN locally generated frames. 2061 * Include unicast frame only where the retries/failures can be counted. 2062 */ 2063 uint32 tx_pkts_total; /**< # user frames sent successfully */ 2064 uint32 tx_pkts_retries; /**< # user frames retries */ 2065 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 2066 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 2067 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 2068 * was exhausted 2069 */ 2070 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 2071 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 2072 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 2073 2074 uint32 rx_dur_total; /* total user RX duration (estimated) */ 2075 2076 chanspec_t chanspec; /** chanspec this sta is on */ 2077 uint16 PAD; 2078 wl_rateset_args_v1_t rateset_adv; /* rateset along with mcs index bitmap */ 2079 uint32 PAD; 2080 } sta_info_v4_t; 2081 2082 /* Note: Version 4 is the latest version of sta_info_t. Version 5 is abandoned. 2083 * Please add new fields to version 4, not version 5. 2084 */ 2085 /* sta_info_t version 5 */ 2086 typedef struct { 2087 uint16 ver; /**< version of this struct */ 2088 uint16 len; /**< length in bytes of this structure */ 2089 uint16 cap; /**< sta's advertised capabilities */ 2090 uint16 PAD; 2091 uint32 flags; /**< flags defined below */ 2092 uint32 idle; /**< time since data pkt rx'd from sta */ 2093 struct ether_addr ea; /**< Station address */ 2094 uint16 PAD; 2095 wl_rateset_t rateset; /**< rateset in use */ 2096 uint32 in; /**< seconds elapsed since associated */ 2097 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 2098 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 2099 uint32 tx_failures; /**< # of user packets failed */ 2100 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 2101 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 2102 uint32 tx_rate; /**< Rate used by last tx frame */ 2103 uint32 rx_rate; /**< Rate of last successful rx frame */ 2104 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 2105 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 2106 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 2107 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 2108 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 2109 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 2110 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 2111 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 2112 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 2113 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 2114 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 2115 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 2116 * of data frames 2117 */ 2118 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 2119 uint16 aid; /**< association ID */ 2120 uint16 ht_capabilities; /**< advertised ht caps */ 2121 uint16 vht_flags; /**< converted vht flags */ 2122 uint16 PAD; 2123 uint32 tx_pkts_retried; /**< # of frames where a retry was 2124 * necessary 2125 */ 2126 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 2127 * was exhausted 2128 */ 2129 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 2130 * received data frame. 2131 */ 2132 /* TX WLAN retry/failure statistics: 2133 * Separated for host requested frames and WLAN locally generated frames. 2134 * Include unicast frame only where the retries/failures can be counted. 2135 */ 2136 uint32 tx_pkts_total; /**< # user frames sent successfully */ 2137 uint32 tx_pkts_retries; /**< # user frames retries */ 2138 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 2139 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 2140 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 2141 * was exhausted 2142 */ 2143 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 2144 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 2145 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 2146 2147 chanspec_t chanspec; /** chanspec this sta is on */ 2148 uint16 PAD; 2149 wl_rateset_args_v1_t rateset_adv; /* rateset along with mcs index bitmap */ 2150 } sta_info_v5_t; 2151 2152 /* 2153 * Pay attention to version if structure changes. 2154 */ 2155 2156 /* sta_info_t version 6 2157 changes to wl_rateset_args_t is leading to update this struct version as well. 2158 */ 2159 typedef struct sta_info_v6 { 2160 uint16 ver; /**< version of this struct */ 2161 uint16 len; /**< length in bytes of this structure */ 2162 uint16 cap; /**< sta's advertised capabilities */ 2163 uint16 PAD; 2164 uint32 flags; /**< flags defined below */ 2165 uint32 idle; /**< time since data pkt rx'd from sta */ 2166 struct ether_addr ea; /**< Station address */ 2167 uint16 PAD; 2168 wl_rateset_t rateset; /**< rateset in use */ 2169 uint32 in; /**< seconds elapsed since associated */ 2170 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 2171 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 2172 uint32 tx_failures; /**< # of user packets failed */ 2173 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 2174 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 2175 uint32 tx_rate; /**< Rate used by last tx frame */ 2176 uint32 rx_rate; /**< Rate of last successful rx frame */ 2177 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 2178 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 2179 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 2180 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 2181 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 2182 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 2183 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 2184 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 2185 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 2186 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 2187 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 2188 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 2189 * of data frames 2190 */ 2191 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 2192 uint16 aid; /**< association ID */ 2193 uint16 ht_capabilities; /**< advertised ht caps */ 2194 uint16 vht_flags; /**< converted vht flags */ 2195 uint16 PAD; 2196 uint32 tx_pkts_retried; /**< # of frames where a retry was 2197 * necessary 2198 */ 2199 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 2200 * was exhausted 2201 */ 2202 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 2203 * received data frame. 2204 */ 2205 /* TX WLAN retry/failure statistics: 2206 * Separated for host requested frames and WLAN locally generated frames. 2207 * Include unicast frame only where the retries/failures can be counted. 2208 */ 2209 uint32 tx_pkts_total; /**< # user frames sent successfully */ 2210 uint32 tx_pkts_retries; /**< # user frames retries */ 2211 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 2212 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 2213 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 2214 * was exhausted 2215 */ 2216 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 2217 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 2218 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 2219 2220 uint32 rx_dur_total; /* total user RX duration (estimated) */ 2221 2222 chanspec_t chanspec; /** chanspec this sta is on */ 2223 uint16 PAD; 2224 wl_rateset_args_v2_t rateset_adv; /* rateset along with mcs index bitmap */ 2225 } sta_info_v6_t; 2226 2227 /* 2228 * Pay attention to version if structure changes. 2229 */ 2230 2231 /* sta_info_t version 7 2232 changes to wl_rateset_args_t is leading to update this struct version as well. 2233 */ 2234 typedef struct sta_info_v7 { 2235 uint16 ver; /**< version of this struct */ 2236 uint16 len; /**< length in bytes of this structure */ 2237 uint16 cap; /**< sta's advertised capabilities */ 2238 uint16 PAD; 2239 uint32 flags; /**< flags defined below */ 2240 uint32 idle; /**< time since data pkt rx'd from sta */ 2241 struct ether_addr ea; /**< Station address */ 2242 uint16 PAD; 2243 wl_rateset_t rateset; /**< rateset in use */ 2244 uint32 in; /**< seconds elapsed since associated */ 2245 uint32 listen_interval_inms; /**< Min Listen interval in ms for this STA */ 2246 uint32 tx_pkts; /**< # of user packets transmitted (unicast) */ 2247 uint32 tx_failures; /**< # of user packets failed */ 2248 uint32 rx_ucast_pkts; /**< # of unicast packets received */ 2249 uint32 rx_mcast_pkts; /**< # of multicast packets received */ 2250 uint32 tx_rate; /**< Rate used by last tx frame */ 2251 uint32 rx_rate; /**< Rate of last successful rx frame */ 2252 uint32 rx_decrypt_succeeds; /**< # of packet decrypted successfully */ 2253 uint32 rx_decrypt_failures; /**< # of packet decrypted unsuccessfully */ 2254 uint32 tx_tot_pkts; /**< # of user tx pkts (ucast + mcast) */ 2255 uint32 rx_tot_pkts; /**< # of data packets recvd (uni + mcast) */ 2256 uint32 tx_mcast_pkts; /**< # of mcast pkts txed */ 2257 uint64 tx_tot_bytes; /**< data bytes txed (ucast + mcast) */ 2258 uint64 rx_tot_bytes; /**< data bytes recvd (ucast + mcast) */ 2259 uint64 tx_ucast_bytes; /**< data bytes txed (ucast) */ 2260 uint64 tx_mcast_bytes; /**< # data bytes txed (mcast) */ 2261 uint64 rx_ucast_bytes; /**< data bytes recvd (ucast) */ 2262 uint64 rx_mcast_bytes; /**< data bytes recvd (mcast) */ 2263 int8 rssi[WL_STA_ANT_MAX]; /**< average rssi per antenna 2264 * of data frames 2265 */ 2266 int8 nf[WL_STA_ANT_MAX]; /**< per antenna noise floor */ 2267 uint16 aid; /**< association ID */ 2268 uint16 ht_capabilities; /**< advertised ht caps */ 2269 uint16 vht_flags; /**< converted vht flags */ 2270 uint16 PAD; 2271 uint32 tx_pkts_retried; /**< # of frames where a retry was 2272 * necessary 2273 */ 2274 uint32 tx_pkts_retry_exhausted; /**< # of user frames where a retry 2275 * was exhausted 2276 */ 2277 int8 rx_lastpkt_rssi[WL_STA_ANT_MAX]; /**< Per antenna RSSI of last 2278 * received data frame. 2279 */ 2280 /* TX WLAN retry/failure statistics: 2281 * Separated for host requested frames and WLAN locally generated frames. 2282 * Include unicast frame only where the retries/failures can be counted. 2283 */ 2284 uint32 tx_pkts_total; /**< # user frames sent successfully */ 2285 uint32 tx_pkts_retries; /**< # user frames retries */ 2286 uint32 tx_pkts_fw_total; /**< # FW generated sent successfully */ 2287 uint32 tx_pkts_fw_retries; /**< # retries for FW generated frames */ 2288 uint32 tx_pkts_fw_retry_exhausted; /**< # FW generated where a retry 2289 * was exhausted 2290 */ 2291 uint32 rx_pkts_retried; /**< # rx with retry bit set */ 2292 uint32 tx_rate_fallback; /**< lowest fallback TX rate */ 2293 /* Fields above this line are common to sta_info_t versions 4 and 5 */ 2294 2295 uint32 rx_dur_total; /* total user RX duration (estimated) */ 2296 2297 chanspec_t chanspec; /** chanspec this sta is on */ 2298 uint16 PAD; 2299 wl_rateset_args_v3_t rateset_adv; /* rateset along with mcs index bitmap */ 2300 } sta_info_v7_t; 2301 2302 /* define to help support one version older sta_info_t from user level 2303 * applications. 2304 */ 2305 #define WL_OLD_STAINFO_SIZE OFFSETOF(sta_info_t, tx_tot_pkts) 2306 2307 #define WL_STA_VER_4 4 2308 #define WL_STA_VER_5 5 2309 /* FIXME: the user/branch should make the selection! */ 2310 #define WL_STA_VER WL_STA_VER_4 2311 2312 #define SWDIV_STATS_VERSION_2 2 2313 #define SWDIV_STATS_CURRENT_VERSION SWDIV_STATS_VERSION_2 2314 2315 struct wlc_swdiv_stats_v1 { 2316 uint32 auto_en; 2317 uint32 active_ant; 2318 uint32 rxcount; 2319 int32 avg_snr_per_ant0; 2320 int32 avg_snr_per_ant1; 2321 int32 avg_snr_per_ant2; 2322 uint32 swap_ge_rxcount0; 2323 uint32 swap_ge_rxcount1; 2324 uint32 swap_ge_snrthresh0; 2325 uint32 swap_ge_snrthresh1; 2326 uint32 swap_txfail0; 2327 uint32 swap_txfail1; 2328 uint32 swap_timer0; 2329 uint32 swap_timer1; 2330 uint32 swap_alivecheck0; 2331 uint32 swap_alivecheck1; 2332 uint32 rxcount_per_ant0; 2333 uint32 rxcount_per_ant1; 2334 uint32 acc_rxcount; 2335 uint32 acc_rxcount_per_ant0; 2336 uint32 acc_rxcount_per_ant1; 2337 uint32 tx_auto_en; 2338 uint32 tx_active_ant; 2339 uint32 rx_policy; 2340 uint32 tx_policy; 2341 uint32 cell_policy; 2342 uint32 swap_snrdrop0; 2343 uint32 swap_snrdrop1; 2344 uint32 mws_antsel_ovr_tx; 2345 uint32 mws_antsel_ovr_rx; 2346 uint8 swap_trig_event_id; 2347 }; 2348 2349 struct wlc_swdiv_stats_v2 { 2350 uint16 version; /* version of the structure 2351 * as defined by SWDIV_STATS_CURRENT_VERSION 2352 */ 2353 uint16 length; /* length of the entire structure */ 2354 uint32 auto_en; 2355 uint32 active_ant; 2356 uint32 rxcount; 2357 int32 avg_snr_per_ant0; 2358 int32 avg_snr_per_ant1; 2359 int32 avg_snr_per_ant2; 2360 uint32 swap_ge_rxcount0; 2361 uint32 swap_ge_rxcount1; 2362 uint32 swap_ge_snrthresh0; 2363 uint32 swap_ge_snrthresh1; 2364 uint32 swap_txfail0; 2365 uint32 swap_txfail1; 2366 uint32 swap_timer0; 2367 uint32 swap_timer1; 2368 uint32 swap_alivecheck0; 2369 uint32 swap_alivecheck1; 2370 uint32 rxcount_per_ant0; 2371 uint32 rxcount_per_ant1; 2372 uint32 acc_rxcount; 2373 uint32 acc_rxcount_per_ant0; 2374 uint32 acc_rxcount_per_ant1; 2375 uint32 tx_auto_en; 2376 uint32 tx_active_ant; 2377 uint32 rx_policy; 2378 uint32 tx_policy; 2379 uint32 cell_policy; 2380 uint32 swap_snrdrop0; 2381 uint32 swap_snrdrop1; 2382 uint32 mws_antsel_ovr_tx; 2383 uint32 mws_antsel_ovr_rx; 2384 uint32 swap_trig_event_id; 2385 }; 2386 2387 #define WLC_NUMRATES 16 /**< max # of rates in a rateset */ 2388 2389 /**Used to get specific STA parameters */ 2390 typedef struct { 2391 uint32 val; 2392 struct ether_addr ea; 2393 uint16 PAD; 2394 } scb_val_t; 2395 2396 /**Used by iovar versions of some ioctls, i.e. WLC_SCB_AUTHORIZE et al */ 2397 typedef struct { 2398 uint32 code; 2399 scb_val_t ioctl_args; 2400 } authops_t; 2401 2402 /** channel encoding */ 2403 typedef struct channel_info { 2404 int32 hw_channel; 2405 int32 target_channel; 2406 int32 scan_channel; 2407 } channel_info_t; 2408 2409 /** For ioctls that take a list of MAC addresses */ 2410 typedef struct maclist { 2411 uint32 count; /**< number of MAC addresses */ 2412 struct ether_addr ea[1]; /**< variable length array of MAC addresses */ 2413 } maclist_t; 2414 2415 typedef struct wds_client_info { 2416 char ifname[INTF_NAME_SIZ]; /* WDS ifname */ 2417 struct ether_addr ea; /* WDS client MAC address */ 2418 } wds_client_info_t; 2419 2420 #define WDS_MACLIST_MAGIC 0xFFFFFFFF 2421 #define WDS_MACLIST_VERSION 1 2422 2423 /* For wds MAC list ioctls */ 2424 typedef struct wds_maclist { 2425 uint32 count; /* Number of WDS clients */ 2426 uint32 magic; /* Magic number */ 2427 uint32 version; /* Version number */ 2428 struct wds_client_info client_list[1]; /* Variable length array of WDS clients */ 2429 } wds_maclist_t; 2430 2431 /**get pkt count struct passed through ioctl */ 2432 typedef struct get_pktcnt { 2433 uint32 rx_good_pkt; 2434 uint32 rx_bad_pkt; 2435 uint32 tx_good_pkt; 2436 uint32 tx_bad_pkt; 2437 uint32 rx_ocast_good_pkt; /**< unicast packets destined for others */ 2438 } get_pktcnt_t; 2439 2440 /* NINTENDO2 */ 2441 #define LQ_IDX_MIN 0 2442 #define LQ_IDX_MAX 1 2443 #define LQ_IDX_AVG 2 2444 #define LQ_IDX_SUM 2 2445 #define LQ_IDX_LAST 3 2446 #define LQ_STOP_MONITOR 0 2447 #define LQ_START_MONITOR 1 2448 2449 /** Get averages RSSI, Rx PHY rate and SNR values */ 2450 /* Link Quality */ 2451 typedef struct { 2452 int32 rssi[LQ_IDX_LAST]; /**< Array to keep min, max, avg rssi */ 2453 int32 snr[LQ_IDX_LAST]; /**< Array to keep min, max, avg snr */ 2454 int32 isvalid; /**< Flag indicating whether above data is valid */ 2455 } wl_lq_t; 2456 2457 typedef enum wl_wakeup_reason_type { 2458 LCD_ON = 1, 2459 LCD_OFF, 2460 DRC1_WAKE, 2461 DRC2_WAKE, 2462 REASON_LAST 2463 } wl_wr_type_t; 2464 2465 typedef struct { 2466 /** Unique filter id */ 2467 uint32 id; 2468 /** stores the reason for the last wake up */ 2469 uint8 reason; 2470 uint8 PAD[3]; 2471 } wl_wr_t; 2472 2473 /** Get MAC specific rate histogram command */ 2474 typedef struct { 2475 struct ether_addr ea; /**< MAC Address */ 2476 uint8 ac_cat; /**< Access Category */ 2477 uint8 num_pkts; /**< Number of packet entries to be averaged */ 2478 } wl_mac_ratehisto_cmd_t; 2479 /** Get MAC rate histogram response */ 2480 /* deprecated after JAGUAR branch */ 2481 typedef struct { 2482 uint32 rate[DOT11_RATE_MAX + 1]; /**< Rates */ 2483 uint32 mcs[WL_RATESET_SZ_HT_IOCTL * WL_TX_CHAINS_MAX]; /**< MCS counts */ 2484 uint32 vht[WL_RATESET_SZ_VHT_MCS][WL_TX_CHAINS_MAX]; /**< VHT counts */ 2485 uint32 tsf_timer[2][2]; /**< Start and End time for 8bytes value */ 2486 uint32 prop11n_mcs[WLC_11N_LAST_PROP_MCS - WLC_11N_FIRST_PROP_MCS + 1]; /** MCS counts */ 2487 } wl_mac_ratehisto_res_t; 2488 2489 /* sta_info ecounters */ 2490 typedef struct { 2491 struct ether_addr ea; /* Station MAC addr */ 2492 struct ether_addr BSSID; /* BSSID of the BSS */ 2493 uint32 tx_pkts_fw_total; /* # FW generated sent successfully */ 2494 uint32 tx_pkts_fw_retries; /* # retries for FW generated frames */ 2495 uint32 tx_pkts_fw_retry_exhausted; /* # FW generated which 2496 * failed after retry 2497 */ 2498 } sta_info_ecounters_t; 2499 2500 #define STAMON_MODULE_VER 1 2501 2502 /**Linux network driver ioctl encoding */ 2503 typedef struct wl_ioctl { 2504 uint32 cmd; /**< common ioctl definition */ 2505 void *buf; /**< pointer to user buffer */ 2506 uint32 len; /**< length of user buffer */ 2507 uint8 set; /**< 1=set IOCTL; 0=query IOCTL */ 2508 uint32 used; /**< bytes read or written (optional) */ 2509 uint32 needed; /**< bytes needed (optional) */ 2510 } wl_ioctl_t; 2511 2512 #ifdef CONFIG_COMPAT 2513 typedef struct compat_wl_ioctl { 2514 uint32 cmd; /**< common ioctl definition */ 2515 uint32 buf; /**< pointer to user buffer */ 2516 uint32 len; /**< length of user buffer */ 2517 uint8 set; /**< 1=set IOCTL; 0=query IOCTL */ 2518 uint32 used; /**< bytes read or written (optional) */ 2519 uint32 needed; /**< bytes needed (optional) */ 2520 } compat_wl_ioctl_t; 2521 #endif /* CONFIG_COMPAT */ 2522 2523 #define WL_NUM_RATES_CCK 4 /**< 1, 2, 5.5, 11 Mbps */ 2524 #define WL_NUM_RATES_OFDM 8 /**< 6, 9, 12, 18, 24, 36, 48, 54 Mbps SISO/CDD */ 2525 #define WL_NUM_RATES_MCS_1STREAM 8 /**< MCS 0-7 1-stream rates - SISO/CDD/STBC/MCS */ 2526 #define WL_NUM_RATES_EXTRA_VHT 2 /**< Additional VHT 11AC rates */ 2527 #define WL_NUM_RATES_VHT 10 2528 #define WL_NUM_RATES_VHT_ALL (WL_NUM_RATES_VHT + WL_NUM_RATES_EXTRA_VHT) 2529 #define WL_NUM_RATES_HE 12 2530 #define WL_NUM_RATES_EHT 14 2531 #define WL_NUM_RATES_MCS32 1 2532 #define UC_PATH_LEN 128u /**< uCode path length */ 2533 2534 /* 2535 * Structure for passing hardware and software 2536 * revision info up from the driver. 2537 */ 2538 typedef struct wlc_rev_info { 2539 uint32 vendorid; /**< PCI vendor id */ 2540 uint32 deviceid; /**< device id of chip */ 2541 uint32 radiorev; /**< radio revision */ 2542 uint32 chiprev; /**< chip revision */ 2543 uint32 corerev; /**< core revision */ 2544 uint32 boardid; /**< board identifier (usu. PCI sub-device id) */ 2545 uint32 boardvendor; /**< board vendor (usu. PCI sub-vendor id) */ 2546 uint32 boardrev; /**< board revision */ 2547 uint32 driverrev; /**< driver version */ 2548 uint32 ucoderev; /**< uCode version */ 2549 uint32 bus; /**< bus type */ 2550 uint32 chipnum; /**< chip number */ 2551 uint32 phytype; /**< phy type */ 2552 uint32 phyrev; /**< phy revision */ 2553 uint32 anarev; /**< anacore rev */ 2554 uint32 chippkg; /**< chip package info */ 2555 uint32 nvramrev; /**< nvram revision number */ 2556 uint32 phyminorrev; /**< phy minor rev */ 2557 uint32 coreminorrev; /**< core minor rev */ 2558 uint32 drvrev_major; /**< driver version: major */ 2559 uint32 drvrev_minor; /**< driver version: minor */ 2560 uint32 drvrev_rc; /**< driver version: rc */ 2561 uint32 drvrev_rc_inc; /**< driver version: rc incremental */ 2562 uint16 ucodeprebuilt; /**< uCode prebuilt flag */ 2563 uint16 ucodediffct; /**< uCode diff count */ 2564 uchar ucodeurl[128u]; /* obsolete, kept for ROM compatiblity */ 2565 uchar ucodepath[UC_PATH_LEN]; /**< uCode URL or path */ 2566 } wlc_rev_info_t; 2567 2568 #define WL_REV_INFO_LEGACY_LENGTH 48 2569 2570 #define WL_BRAND_MAX 10 2571 typedef struct wl_instance_info { 2572 uint32 instance; 2573 int8 brand[WL_BRAND_MAX]; 2574 int8 PAD[4-(WL_BRAND_MAX%4)]; 2575 } wl_instance_info_t; 2576 2577 /** structure to change size of tx fifo */ 2578 typedef struct wl_txfifo_sz { 2579 uint16 magic; 2580 uint16 fifo; 2581 uint16 size; 2582 } wl_txfifo_sz_t; 2583 2584 /* Transfer info about an IOVar from the driver */ 2585 /**Max supported IOV name size in bytes, + 1 for nul termination */ 2586 #define WLC_IOV_NAME_LEN (32 + 1) 2587 2588 typedef struct wlc_iov_trx_s { 2589 uint8 module; 2590 uint8 type; 2591 char name[WLC_IOV_NAME_LEN]; 2592 } wlc_iov_trx_t; 2593 2594 /** bump this number if you change the ioctl interface */ 2595 #define WLC_IOCTL_VERSION 2 2596 #define WLC_IOCTL_VERSION_LEGACY_IOTYPES 1 2597 /* ifdef EXT_STA */ 2598 typedef struct _wl_assoc_result { 2599 ulong associated; 2600 ulong NDIS_auth; 2601 ulong NDIS_infra; 2602 } wl_assoc_result_t; 2603 /* EXT_STA */ 2604 2605 #define WL_PHY_PAVARS_LEN 64 /**< Phytype, Bandrange, chain, a[0], b[0], c[0], d[0] .. */ 2606 2607 #define WL_PHY_PAVAR_VER 1 /**< pavars version */ 2608 #define WL_PHY_PAVARS2_NUM 3 /**< a1, b0, b1 */ 2609 typedef struct wl_pavars2 { 2610 uint16 ver; /**< version of this struct */ 2611 uint16 len; /**< len of this structure */ 2612 uint16 inuse; /**< driver return 1 for a1,b0,b1 in current band range */ 2613 uint16 phy_type; /**< phy type */ 2614 uint16 bandrange; 2615 uint16 chain; 2616 uint16 inpa[WL_PHY_PAVARS2_NUM]; /**< phy pavars for one band range */ 2617 } wl_pavars2_t; 2618 2619 typedef struct wl_po { 2620 uint16 phy_type; /**< Phy type */ 2621 uint16 band; 2622 uint16 cckpo; 2623 uint16 PAD; 2624 uint32 ofdmpo; 2625 uint16 mcspo[8]; 2626 } wl_po_t; 2627 2628 #define WL_NUM_RPCALVARS 5 /**< number of rpcal vars */ 2629 2630 typedef struct wl_rpcal { 2631 uint16 value; 2632 uint16 update; 2633 } wl_rpcal_t; 2634 2635 #define WL_NUM_RPCALPHASEVARS 5 /* number of rpcal phase vars */ 2636 2637 typedef struct wl_rpcal_phase { 2638 uint16 value; 2639 uint16 update; 2640 } wl_rpcal_phase_t; 2641 2642 typedef struct wl_aci_args { 2643 int32 enter_aci_thresh; /* Trigger level to start detecting ACI */ 2644 int32 exit_aci_thresh; /* Trigger level to exit ACI mode */ 2645 int32 usec_spin; /* microsecs to delay between rssi samples */ 2646 int32 glitch_delay; /* interval between ACI scans when glitch count is consistently high */ 2647 uint16 nphy_adcpwr_enter_thresh; /**< ADC power to enter ACI mitigation mode */ 2648 uint16 nphy_adcpwr_exit_thresh; /**< ADC power to exit ACI mitigation mode */ 2649 uint16 nphy_repeat_ctr; /**< Number of tries per channel to compute power */ 2650 uint16 nphy_num_samples; /**< Number of samples to compute power on one channel */ 2651 uint16 nphy_undetect_window_sz; /**< num of undetects to exit ACI Mitigation mode */ 2652 uint16 nphy_b_energy_lo_aci; /**< low ACI power energy threshold for bphy */ 2653 uint16 nphy_b_energy_md_aci; /**< mid ACI power energy threshold for bphy */ 2654 uint16 nphy_b_energy_hi_aci; /**< high ACI power energy threshold for bphy */ 2655 uint16 nphy_noise_noassoc_glitch_th_up; /**< wl interference 4 */ 2656 uint16 nphy_noise_noassoc_glitch_th_dn; 2657 uint16 nphy_noise_assoc_glitch_th_up; 2658 uint16 nphy_noise_assoc_glitch_th_dn; 2659 uint16 nphy_noise_assoc_aci_glitch_th_up; 2660 uint16 nphy_noise_assoc_aci_glitch_th_dn; 2661 uint16 nphy_noise_assoc_enter_th; 2662 uint16 nphy_noise_noassoc_enter_th; 2663 uint16 nphy_noise_assoc_rx_glitch_badplcp_enter_th; 2664 uint16 nphy_noise_noassoc_crsidx_incr; 2665 uint16 nphy_noise_assoc_crsidx_incr; 2666 uint16 nphy_noise_crsidx_decr; 2667 } wl_aci_args_t; 2668 2669 #define WL_ACI_ARGS_LEGACY_LENGTH 16 /**< bytes of pre NPHY aci args */ 2670 2671 #define WL_MACFIFO_PLAY_ARGS_T_VERSION 1u /* version of wl_macfifo_play_args_t struct */ 2672 2673 enum wl_macfifo_play_flags { 2674 WL_MACFIFO_PLAY_STOP = 0x00u, /* stop playing samples */ 2675 WL_MACFIFO_PLAY_START = 0x01u, /* start playing samples */ 2676 WL_MACFIFO_PLAY_LOAD = 0x02u, /* for set: load samples 2677 for get: samples are loaded 2678 */ 2679 WL_MACFIFO_PLAY_GET_MAX_SIZE = 0x10u, /* get the macfifo buffer size */ 2680 WL_MACFIFO_PLAY_GET_STATUS = 0x20u, /* get macfifo play status */ 2681 }; 2682 2683 typedef struct wl_macfifo_play_args { 2684 uint16 version; /* structure version */ 2685 uint16 len; /* size of structure */ 2686 uint16 flags; 2687 uint8 PAD[2]; 2688 uint32 data_len; /* data length */ 2689 } wl_macfifo_play_args_t; 2690 2691 #define WL_MACFIFO_PLAY_DATA_T_VERSION 1u /* version of wl_macfifo_play_data_t struct */ 2692 2693 typedef struct wl_macfifo_play_data { 2694 uint16 version; /* structure version */ 2695 uint16 len; /* size of structure */ 2696 uint32 data_len; /* data length */ 2697 } wl_macfifo_play_data_t; 2698 2699 #define WL_SAMPLECOLLECT_T_VERSION 2 /**< version of wl_samplecollect_args_t struct */ 2700 typedef struct wl_samplecollect_args { 2701 /* version 0 fields */ 2702 uint8 coll_us; 2703 uint8 PAD[3]; 2704 int32 cores; 2705 /* add'l version 1 fields */ 2706 uint16 version; /**< see definition of WL_SAMPLECOLLECT_T_VERSION */ 2707 uint16 length; /**< length of entire structure */ 2708 int8 trigger; 2709 uint8 PAD; 2710 uint16 timeout; 2711 uint16 mode; 2712 uint16 PAD; 2713 uint32 pre_dur; 2714 uint32 post_dur; 2715 uint8 gpio_sel; 2716 uint8 downsamp; 2717 uint8 be_deaf; 2718 uint8 agc; /**< loop from init gain and going down */ 2719 uint8 filter; /**< override high pass corners to lowest */ 2720 /* add'l version 2 fields */ 2721 uint8 trigger_state; 2722 uint8 module_sel1; 2723 uint8 module_sel2; 2724 uint16 nsamps; 2725 uint16 PAD; 2726 int32 bitStart; 2727 uint32 gpioCapMask; 2728 uint8 gpio_collection; 2729 uint8 PAD[3]; 2730 } wl_samplecollect_args_t; 2731 2732 #define WL_SAMPLEDATA_T_VERSION 1 /**< version of wl_samplecollect_args_t struct */ 2733 /* version for unpacked sample data, int16 {(I,Q),Core(0..N)} */ 2734 #define WL_SAMPLEDATA_T_VERSION_SPEC_AN 2 2735 2736 typedef struct wl_sampledata { 2737 uint16 version; /**< structure version */ 2738 uint16 size; /**< size of structure */ 2739 uint16 tag; /**< Header/Data */ 2740 uint16 length; /**< data length */ 2741 uint32 flag; /**< bit def */ 2742 } wl_sampledata_t; 2743 2744 /* WL_OTA START */ 2745 /* OTA Test Status */ 2746 enum { 2747 WL_OTA_TEST_IDLE = 0, /**< Default Idle state */ 2748 WL_OTA_TEST_ACTIVE = 1, /**< Test Running */ 2749 WL_OTA_TEST_SUCCESS = 2, /**< Successfully Finished Test */ 2750 WL_OTA_TEST_FAIL = 3 /**< Test Failed in the Middle */ 2751 }; 2752 2753 /* OTA SYNC Status */ 2754 enum { 2755 WL_OTA_SYNC_IDLE = 0, /**< Idle state */ 2756 WL_OTA_SYNC_ACTIVE = 1, /**< Waiting for Sync */ 2757 WL_OTA_SYNC_FAIL = 2 /**< Sync pkt not recieved */ 2758 }; 2759 2760 /* Various error states dut can get stuck during test */ 2761 enum { 2762 WL_OTA_SKIP_TEST_CAL_FAIL = 1, /**< Phy calibration failed */ 2763 WL_OTA_SKIP_TEST_SYNCH_FAIL = 2, /**< Sync Packet not recieved */ 2764 WL_OTA_SKIP_TEST_FILE_DWNLD_FAIL = 3, /**< Cmd flow file download failed */ 2765 WL_OTA_SKIP_TEST_NO_TEST_FOUND = 4, /**< No test found in Flow file */ 2766 WL_OTA_SKIP_TEST_WL_NOT_UP = 5, /**< WL UP failed */ 2767 WL_OTA_SKIP_TEST_UNKNOWN_CALL /**< Unintentional scheduling on ota test */ 2768 }; 2769 2770 /* Differentiator for ota_tx and ota_rx */ 2771 enum { 2772 WL_OTA_TEST_TX = 0, /**< ota_tx */ 2773 WL_OTA_TEST_RX = 1, /**< ota_rx */ 2774 }; 2775 2776 /* Catch 3 modes of operation: 20Mhz, 40Mhz, 20 in 40 Mhz */ 2777 enum { 2778 WL_OTA_TEST_BW_20_IN_40MHZ = 0, /**< 20 in 40 operation */ 2779 WL_OTA_TEST_BW_20MHZ = 1, /**< 20 Mhz operation */ 2780 WL_OTA_TEST_BW_40MHZ = 2, /**< full 40Mhz operation */ 2781 WL_OTA_TEST_BW_80MHZ = 3 /* full 80Mhz operation */ 2782 }; 2783 #define HT_MCS_INUSE 0x00000080 /* HT MCS in use,indicates b0-6 holds an mcs */ 2784 #define VHT_MCS_INUSE 0x00000100 /* VHT MCS in use,indicates b0-6 holds an mcs */ 2785 #define OTA_RATE_MASK 0x0000007f /* rate/mcs value */ 2786 #define OTA_STF_SISO 0 2787 #define OTA_STF_CDD 1 2788 #define OTA_STF_STBC 2 2789 #define OTA_STF_SDM 3 2790 2791 typedef struct ota_rate_info { 2792 uint8 rate_cnt; /**< Total number of rates */ 2793 uint8 PAD; 2794 uint16 rate_val_mbps[WL_OTA_TEST_MAX_NUM_RATE]; /**< array of rates from 1mbps to 130mbps */ 2795 /**< for legacy rates : ratein mbps * 2 */ 2796 /**< for HT rates : mcs index */ 2797 } ota_rate_info_t; 2798 2799 typedef struct ota_power_info { 2800 int8 pwr_ctrl_on; /**< power control on/off */ 2801 int8 start_pwr; /**< starting power/index */ 2802 int8 delta_pwr; /**< delta power/index */ 2803 int8 end_pwr; /**< end power/index */ 2804 } ota_power_info_t; 2805 2806 typedef struct ota_packetengine { 2807 uint16 delay; /**< Inter-packet delay */ 2808 /**< for ota_tx, delay is tx ifs in micro seconds */ 2809 /* for ota_rx, delay is wait time in milliseconds */ 2810 uint16 nframes; /**< Number of frames */ 2811 uint16 length; /**< Packet length */ 2812 } ota_packetengine_t; 2813 2814 /* 2815 * OTA txant/rxant parameter 2816 * bit7-4: 4 bits swdiv_tx/rx_policy bitmask, specify antenna-policy for SW diversity 2817 * bit3-0: 4 bits TxCore bitmask, specify cores used for transmit frames 2818 * (maximum spatial expansion) 2819 */ 2820 #define WL_OTA_TEST_ANT_MASK 0xF0 2821 #define WL_OTA_TEST_CORE_MASK 0x0F 2822 2823 /* OTA txant/rxant 'ant_mask' field; map to Tx/Rx antenna policy for SW diversity */ 2824 enum { 2825 WL_OTA_TEST_FORCE_ANT0 = 0x10, /* force antenna to Ant 0 */ 2826 WL_OTA_TEST_FORCE_ANT1 = 0x20, /* force antenna to Ant 1 */ 2827 }; 2828 2829 /* antenna/core fields access */ 2830 #define WL_OTA_TEST_GET_ANT(_txant) ((_txant) & WL_OTA_TEST_ANT_MASK) 2831 #define WL_OTA_TEST_GET_CORE(_txant) ((_txant) & WL_OTA_TEST_CORE_MASK) 2832 2833 /** Test info vector */ 2834 typedef struct wl_ota_test_args { 2835 uint8 cur_test; /**< test phase */ 2836 uint8 chan; /**< channel */ 2837 uint8 bw; /**< bandwidth */ 2838 uint8 control_band; /**< control band */ 2839 uint8 stf_mode; /**< stf mode */ 2840 uint8 PAD; 2841 ota_rate_info_t rt_info; /**< Rate info */ 2842 ota_packetengine_t pkteng; /**< packeteng info */ 2843 uint8 txant; /**< tx antenna */ 2844 uint8 rxant; /**< rx antenna */ 2845 ota_power_info_t pwr_info; /**< power sweep info */ 2846 uint8 wait_for_sync; /**< wait for sync or not */ 2847 uint8 ldpc; 2848 uint8 sgi; 2849 uint8 PAD; 2850 /* Update WL_OTA_TESTVEC_T_VERSION for adding new members to this structure */ 2851 } wl_ota_test_args_t; 2852 2853 #define WL_OTA_TESTVEC_T_VERSION 1 /* version of wl_ota_test_vector_t struct */ 2854 typedef struct wl_ota_test_vector { 2855 uint16 version; 2856 wl_ota_test_args_t test_arg[WL_OTA_TEST_MAX_NUM_SEQ]; /**< Test argument struct */ 2857 uint16 test_cnt; /**< Total no of test */ 2858 uint8 file_dwnld_valid; /**< File successfully downloaded */ 2859 uint8 sync_timeout; /**< sync packet timeout */ 2860 int8 sync_fail_action; /**< sync fail action */ 2861 struct ether_addr sync_mac; /**< macaddress for sync pkt */ 2862 struct ether_addr tx_mac; /**< macaddress for tx */ 2863 struct ether_addr rx_mac; /**< macaddress for rx */ 2864 int8 loop_test; /**< dbg feature to loop the test */ 2865 uint16 test_rxcnt; 2866 /* Update WL_OTA_TESTVEC_T_VERSION for adding new members to this structure */ 2867 } wl_ota_test_vector_t; 2868 2869 /** struct copied back form dongle to host to query the status */ 2870 typedef struct wl_ota_test_status { 2871 int16 cur_test_cnt; /**< test phase */ 2872 int8 skip_test_reason; /**< skip test reasoin */ 2873 uint8 PAD; 2874 wl_ota_test_args_t test_arg; /**< cur test arg details */ 2875 uint16 test_cnt; /**< total no of test downloaded */ 2876 uint8 file_dwnld_valid; /**< file successfully downloaded ? */ 2877 uint8 sync_timeout; /**< sync timeout */ 2878 int8 sync_fail_action; /**< sync fail action */ 2879 struct ether_addr sync_mac; /**< macaddress for sync pkt */ 2880 struct ether_addr tx_mac; /**< tx mac address */ 2881 struct ether_addr rx_mac; /**< rx mac address */ 2882 uint8 test_stage; /**< check the test status */ 2883 int8 loop_test; /**< Debug feature to puts test enfine in a loop */ 2884 uint8 sync_status; /**< sync status */ 2885 } wl_ota_test_status_t; 2886 2887 /* FOR ioctl that take the sta monitor information */ 2888 typedef struct stamon_data { 2889 struct ether_addr ea; 2890 uint8 PAD[2]; 2891 int32 rssi; 2892 } stamon_data_t; 2893 2894 typedef struct stamon_info { 2895 int32 version; 2896 uint32 count; 2897 stamon_data_t sta_data[1]; 2898 } stamon_info_t; 2899 2900 typedef struct wl_ota_rx_rssi { 2901 uint16 pktcnt; /* Pkt count used for this rx test */ 2902 chanspec_t chanspec; /* Channel info on which the packets are received */ 2903 int16 rssi; /* Average RSSI of the first 50% packets received */ 2904 } wl_ota_rx_rssi_t; 2905 2906 #define WL_OTARSSI_T_VERSION 1 /* version of wl_ota_test_rssi_t struct */ 2907 #define WL_OTA_TEST_RSSI_FIXED_SIZE OFFSETOF(wl_ota_test_rssi_t, rx_rssi) 2908 2909 typedef struct wl_ota_test_rssi { 2910 uint8 version; 2911 uint8 testcnt; /* total measured RSSI values, valid on output only */ 2912 wl_ota_rx_rssi_t rx_rssi[1]; /* Variable length array of wl_ota_rx_rssi_t */ 2913 } wl_ota_test_rssi_t; 2914 2915 /* WL_OTA END */ 2916 2917 /**wl_radar_args_t */ 2918 typedef struct { 2919 int32 npulses; /**< required number of pulses at n * t_int */ 2920 int32 ncontig; /**< required number of pulses at t_int */ 2921 int32 min_pw; /**< minimum pulse width (20 MHz clocks) */ 2922 int32 max_pw; /**< maximum pulse width (20 MHz clocks) */ 2923 uint16 thresh0; /**< Radar detection, thresh 0 */ 2924 uint16 thresh1; /**< Radar detection, thresh 1 */ 2925 uint16 blank; /**< Radar detection, blank control */ 2926 uint16 fmdemodcfg; /**< Radar detection, fmdemod config */ 2927 int32 npulses_lp; /**< Radar detection, minimum long pulses */ 2928 int32 min_pw_lp; /**< Minimum pulsewidth for long pulses */ 2929 int32 max_pw_lp; /**< Maximum pulsewidth for long pulses */ 2930 int32 min_fm_lp; /**< Minimum fm for long pulses */ 2931 int32 max_span_lp; /**< Maximum deltat for long pulses */ 2932 int32 min_deltat; /**< Minimum spacing between pulses */ 2933 int32 max_deltat; /**< Maximum spacing between pulses */ 2934 uint16 autocorr; /**< Radar detection, autocorr on or off */ 2935 uint16 st_level_time; /**< Radar detection, start_timing level */ 2936 uint16 t2_min; /**< minimum clocks needed to remain in state 2 */ 2937 uint8 PAD[2]; 2938 uint32 version; /**< version */ 2939 uint32 fra_pulse_err; /**< sample error margin for detecting French radar pulsed */ 2940 int32 npulses_fra; /**< Radar detection, minimum French pulses set */ 2941 int32 npulses_stg2; /**< Radar detection, minimum staggered-2 pulses set */ 2942 int32 npulses_stg3; /**< Radar detection, minimum staggered-3 pulses set */ 2943 uint16 percal_mask; /**< defines which period cal is masked from radar detection */ 2944 uint8 PAD[2]; 2945 int32 quant; /**< quantization resolution to pulse positions */ 2946 uint32 min_burst_intv_lp; /**< minimum burst to burst interval for bin3 radar */ 2947 uint32 max_burst_intv_lp; /**< maximum burst to burst interval for bin3 radar */ 2948 int32 nskip_rst_lp; /**< number of skipped pulses before resetting lp buffer */ 2949 int32 max_pw_tol; /* maximum tolerance allowd in detected pulse width for radar detection */ 2950 uint16 feature_mask; /**< 16-bit mask to specify enabled features */ 2951 uint16 thresh0_sc; /**< Radar detection, thresh 0 */ 2952 uint16 thresh1_sc; /**< Radar detection, thresh 1 */ 2953 uint8 PAD[2]; 2954 } wl_radar_args_t; 2955 2956 #define WL_RADAR_ARGS_VERSION 2 2957 2958 typedef struct { 2959 uint32 version; /**< version */ 2960 uint16 thresh0_20_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 20MHz */ 2961 uint16 thresh1_20_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 20MHz */ 2962 uint16 thresh0_40_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 40MHz */ 2963 uint16 thresh1_40_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 40MHz */ 2964 uint16 thresh0_80_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 80MHz */ 2965 uint16 thresh1_80_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 80MHz */ 2966 uint16 thresh0_20_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 20MHz */ 2967 uint16 thresh1_20_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 20MHz */ 2968 uint16 thresh0_40_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 40MHz */ 2969 uint16 thresh1_40_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 40MHz */ 2970 uint16 thresh0_80_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 80MHz */ 2971 uint16 thresh1_80_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 80MHz */ 2972 uint16 thresh0_160_lo; /**< Radar detection, thresh 0 (range 5250-5350MHz) for BW 160MHz */ 2973 uint16 thresh1_160_lo; /**< Radar detection, thresh 1 (range 5250-5350MHz) for BW 160MHz */ 2974 uint16 thresh0_160_hi; /**< Radar detection, thresh 0 (range 5470-5725MHz) for BW 160MHz */ 2975 uint16 thresh1_160_hi; /**< Radar detection, thresh 1 (range 5470-5725MHz) for BW 160MHz */ 2976 } wl_radar_thr_t; 2977 2978 typedef struct { 2979 uint32 version; /* version */ 2980 uint16 thresh0_sc_20_lo; 2981 uint16 thresh1_sc_20_lo; 2982 uint16 thresh0_sc_40_lo; 2983 uint16 thresh1_sc_40_lo; 2984 uint16 thresh0_sc_80_lo; 2985 uint16 thresh1_sc_80_lo; 2986 uint16 thresh0_sc_20_hi; 2987 uint16 thresh1_sc_20_hi; 2988 uint16 thresh0_sc_40_hi; 2989 uint16 thresh1_sc_40_hi; 2990 uint16 thresh0_sc_80_hi; 2991 uint16 thresh1_sc_80_hi; 2992 uint16 fc_varth_sb; 2993 uint16 fc_varth_bin5_sb; 2994 uint16 notradar_enb; 2995 uint16 max_notradar_lp; 2996 uint16 max_notradar; 2997 uint16 max_notradar_lp_sc; 2998 uint16 max_notradar_sc; 2999 uint16 highpow_war_enb; 3000 uint16 highpow_sp_ratio; //unit is 0.5 3001 } wl_radar_thr2_t; 3002 3003 #define WL_RADAR_THR_VERSION 2 3004 3005 typedef struct { 3006 uint32 ver; 3007 uint32 len; 3008 int32 rssi_th[3]; 3009 uint8 rssi_gain_80[4]; 3010 uint8 rssi_gain_160[4]; 3011 } wl_dyn_switch_th_t; 3012 3013 #define WL_PHY_DYN_SWITCH_TH_VERSION 1 3014 3015 /** RSSI per antenna */ 3016 typedef struct { 3017 uint32 version; /**< version field */ 3018 uint32 count; /**< number of valid antenna rssi */ 3019 int8 rssi_ant[WL_RSSI_ANT_MAX]; /**< rssi per antenna */ 3020 int8 rssi_sum; /**< summed rssi across all antennas */ 3021 int8 PAD[3]; 3022 } wl_rssi_ant_t; 3023 3024 /* SNR per antenna */ 3025 typedef struct { 3026 uint32 version; /* version field */ 3027 uint32 count; /* number of valid antenna snr */ 3028 int8 snr_ant[WL_RSSI_ANT_MAX]; /* snr per antenna */ 3029 } wl_snr_ant_t; 3030 3031 /* Weighted average support */ 3032 #define WL_WA_VER 0 /* Initial version - Basic WA algorithm only */ 3033 3034 #define WL_WA_ALGO_BASIC 0 /* Basic weighted average algorithm (all 4 metrics) */ 3035 #define WL_WA_TYPE_RSSI 0 3036 #define WL_WA_TYPE_SNR 1 3037 #define WL_WA_TYPE_TXRATE 2 3038 #define WL_WA_TYPE_RXRATE 3 3039 #define WL_WA_TYPE_MAX 4 3040 3041 typedef struct { /* payload of subcmd in xtlv */ 3042 uint8 id; 3043 uint8 n_total; /* Total number of samples (n_total >= n_recent) */ 3044 uint8 n_recent; /* Number of samples denoted as recent */ 3045 uint8 w_recent; /* Total weight for the recent samples (as percentage) */ 3046 } wl_wa_basic_params_t; 3047 3048 typedef struct { 3049 uint16 ver; 3050 uint16 len; 3051 uint8 subcmd[]; /* sub-cmd in bcm_xtlv_t */ 3052 } wl_wa_cmd_t; 3053 3054 /** data structure used in 'dfs_status' wl interface, which is used to query dfs status */ 3055 typedef struct { 3056 uint32 state; /**< noted by WL_DFS_CACSTATE_XX. */ 3057 uint32 duration; /**< time spent in ms in state. */ 3058 /** 3059 * as dfs enters ISM state, it removes the operational channel from quiet channel 3060 * list and notes the channel in channel_cleared. set to 0 if no channel is cleared 3061 */ 3062 chanspec_t chanspec_cleared; 3063 /** chanspec cleared used to be a uint32, add another to uint16 to maintain size */ 3064 uint16 pad; 3065 } wl_dfs_status_t; 3066 3067 typedef struct { 3068 uint32 state; /* noted by WL_DFS_CACSTATE_XX */ 3069 uint32 duration; /* time spent in ms in state */ 3070 chanspec_t chanspec; /* chanspec of this core */ 3071 chanspec_t chanspec_last_cleared; /* chanspec last cleared for operation by scanning */ 3072 uint16 sub_type; /* currently just the index of the core or the respective PLL */ 3073 uint16 pad; 3074 } wl_dfs_sub_status_t; 3075 3076 #define WL_DFS_STATUS_ALL_VERSION (1) 3077 typedef struct { 3078 uint16 version; /* version field; current max version 1 */ 3079 uint16 num_sub_status; 3080 wl_dfs_sub_status_t dfs_sub_status[1]; /* struct array of length num_sub_status */ 3081 } wl_dfs_status_all_t; 3082 3083 #define WL_DFS_AP_MOVE_VERSION (1) 3084 3085 struct wl_dfs_ap_move_status_v1 { 3086 int16 dfs_status; /* DFS scan status */ 3087 chanspec_t chanspec; /* New AP Chanspec */ 3088 wl_dfs_status_t cac_status; /* CAC status */ 3089 }; 3090 3091 typedef struct wl_dfs_ap_move_status_v2 { 3092 int8 version; /* version field; current max version 1 */ 3093 int8 move_status; /* DFS move status */ 3094 chanspec_t chanspec; /* New AP Chanspec */ 3095 wl_dfs_status_all_t scan_status; /* status; see dfs_status_all for wl_dfs_status_all_t */ 3096 } wl_dfs_ap_move_status_v2_t; 3097 3098 #define WL_DFS_AP_MOVE_ABORT -1 /* Abort any dfs_ap_move in progress immediately */ 3099 #define WL_DFS_AP_MOVE_STUNT -2 /* Stunt move but continue background CSA if in progress */ 3100 3101 /** data structure used in 'radar_status' wl interface, which is use to query radar det status */ 3102 typedef struct { 3103 uint8 detected; 3104 uint8 PAD[3]; 3105 int32 count; 3106 uint8 pretended; 3107 uint8 PAD[3]; 3108 uint32 radartype; 3109 uint32 timenow; 3110 uint32 timefromL; 3111 int32 lp_csect_single; 3112 int32 detected_pulse_index; 3113 int32 nconsecq_pulses; 3114 chanspec_t ch; 3115 uint8 PAD[2]; 3116 int32 pw[10]; 3117 int32 intv[10]; 3118 int32 fm[10]; 3119 } wl_radar_status_t; 3120 3121 #define NUM_PWRCTRL_RATES 12 3122 3123 typedef struct { 3124 uint8 txpwr_band_max[NUM_PWRCTRL_RATES]; /**< User set target */ 3125 uint8 txpwr_limit[NUM_PWRCTRL_RATES]; /**< reg and local power limit */ 3126 uint8 txpwr_local_max; /**< local max according to the AP */ 3127 uint8 txpwr_local_constraint; /**< local constraint according to the AP */ 3128 uint8 txpwr_chan_reg_max; /**< Regulatory max for this channel */ 3129 uint8 txpwr_target[2][NUM_PWRCTRL_RATES]; /**< Latest target for 2.4 and 5 Ghz */ 3130 uint8 txpwr_est_Pout[2]; /**< Latest estimate for 2.4 and 5 Ghz */ 3131 uint8 txpwr_opo[NUM_PWRCTRL_RATES]; /**< On G phy, OFDM power offset */ 3132 uint8 txpwr_bphy_cck_max[NUM_PWRCTRL_RATES]; /**< Max CCK power for this band (SROM) */ 3133 uint8 txpwr_bphy_ofdm_max; /**< Max OFDM power for this band (SROM) */ 3134 uint8 txpwr_aphy_max[NUM_PWRCTRL_RATES]; /**< Max power for A band (SROM) */ 3135 int8 txpwr_antgain[2]; /**< Ant gain for each band - from SROM */ 3136 uint8 txpwr_est_Pout_gofdm; /**< Pwr estimate for 2.4 OFDM */ 3137 } tx_power_legacy_t; 3138 3139 #define WL_TX_POWER_RATES_LEGACY 45 3140 #define WL_TX_POWER_MCS20_FIRST 12 3141 #define WL_TX_POWER_MCS20_NUM 16 3142 #define WL_TX_POWER_MCS40_FIRST 28 3143 #define WL_TX_POWER_MCS40_NUM 17 3144 3145 typedef struct { 3146 uint32 flags; 3147 chanspec_t chanspec; /**< txpwr report for this channel */ 3148 chanspec_t local_chanspec; /**< channel on which we are associated */ 3149 uint8 local_max; /**< local max according to the AP */ 3150 uint8 local_constraint; /**< local constraint according to the AP */ 3151 int8 antgain[2]; /**< Ant gain for each band - from SROM */ 3152 uint8 rf_cores; /**< count of RF Cores being reported */ 3153 uint8 est_Pout[4]; /**< Latest tx power out estimate per RF 3154 * chain without adjustment 3155 */ 3156 uint8 est_Pout_cck; /**< Latest CCK tx power out estimate */ 3157 uint8 user_limit[WL_TX_POWER_RATES_LEGACY]; /**< User limit */ 3158 uint8 reg_limit[WL_TX_POWER_RATES_LEGACY]; /**< Regulatory power limit */ 3159 uint8 board_limit[WL_TX_POWER_RATES_LEGACY]; /**< Max power board can support (SROM) */ 3160 uint8 target[WL_TX_POWER_RATES_LEGACY]; /**< Latest target power */ 3161 uint8 PAD[2]; 3162 } tx_power_legacy2_t; 3163 3164 #define WL_NUM_2x2_ELEMENTS 4 3165 #define WL_NUM_3x3_ELEMENTS 6 3166 #define WL_NUM_4x4_ELEMENTS 10 3167 3168 typedef struct { 3169 uint16 ver; /**< version of this struct */ 3170 uint16 len; /**< length in bytes of this structure */ 3171 uint32 flags; 3172 chanspec_t chanspec; /**< txpwr report for this channel */ 3173 chanspec_t local_chanspec; /**< channel on which we are associated */ 3174 uint32 buflen; /**< ppr buffer length */ 3175 uint8 pprbuf[1]; /**< Latest target power buffer */ 3176 } wl_txppr_t; 3177 3178 #define WL_TXPPR_VERSION 1 3179 #define WL_TXPPR_LENGTH (sizeof(wl_txppr_t)) 3180 #define TX_POWER_T_VERSION 45 3181 #define TX_POWER_T_VERSION_V2 46 3182 3183 /* curpower ppr types */ 3184 enum { 3185 PPRTYPE_TARGETPOWER = 1, 3186 PPRTYPE_BOARDLIMITS = 2, 3187 PPRTYPE_REGLIMITS = 3, 3188 PPRTYPE_RU_REGLIMITS = 4, 3189 PPRTYPE_RU_BOARDLIMITS = 5, 3190 PPRTYPE_RU_TARGETPOWER = 6, 3191 PPRTYPE_DYNAMIC_INFO = 7, 3192 PPRTYPE_LAST 3193 }; 3194 3195 /** number of ppr serialization buffers, it should be reg, board and target */ 3196 #define WL_TXPPR_SER_BUF_NUM (PPRTYPE_LAST - 1) 3197 3198 typedef struct chanspec_txpwr_max { 3199 chanspec_t chanspec; /**< chanspec */ 3200 uint8 txpwr_max; /**< max txpwr in all the rates */ 3201 uint8 padding; 3202 } chanspec_txpwr_max_t; 3203 3204 typedef struct wl_chanspec_txpwr_max { 3205 uint16 ver; /**< version of this struct */ 3206 uint16 len; /**< length in bytes of this structure */ 3207 uint32 count; /**< number of elements of (chanspec, txpwr_max) pair */ 3208 chanspec_txpwr_max_t txpwr[1]; /**< array of (chanspec, max_txpwr) pair */ 3209 } wl_chanspec_txpwr_max_t; 3210 3211 #define WL_CHANSPEC_TXPWR_MAX_VER 1 3212 #define WL_CHANSPEC_TXPWR_MAX_LEN (sizeof(wl_chanspec_txpwr_max_t)) 3213 3214 typedef struct tx_inst_power { 3215 uint8 txpwr_est_Pout[2]; /**< Latest estimate for 2.4 and 5 Ghz */ 3216 uint8 txpwr_est_Pout_gofdm; /**< Pwr estimate for 2.4 OFDM */ 3217 } tx_inst_power_t; 3218 3219 #define WL_NUM_TXCHAIN_MAX 4 3220 typedef struct wl_txchain_pwr_offsets { 3221 int8 offset[WL_NUM_TXCHAIN_MAX]; /**< quarter dBm signed offset for each chain */ 3222 } wl_txchain_pwr_offsets_t; 3223 3224 /** maximum channels returned by the get valid channels iovar */ 3225 #define WL_NUMCHANNELS 64 3226 #define WL_NUMCHANNELS_MANY_CHAN 10 3227 #define WL_ITER_LIMIT_MANY_CHAN 5 3228 3229 #define WL_MIMO_PS_CFG_VERSION_1 1 3230 3231 typedef struct wl_mimops_cfg { 3232 uint8 version; 3233 /* active_chains: 0 for all, 1 for 1 chain. */ 3234 uint8 active_chains; 3235 /* static (0) or dynamic (1).or disabled (3) Mode applies only when active_chains = 0. */ 3236 uint8 mode; 3237 /* bandwidth = Full (0), 20M (1), 40M (2), 80M (3). */ 3238 uint8 bandwidth; 3239 uint8 applychangesafterlearning; 3240 uint8 pad[3]; 3241 } wl_mimops_cfg_t; 3242 3243 /* This event is for tracing MIMO PS metrics snapshot calls. 3244 * It is helpful to debug out-of-sync issue between 3245 * ucode SHM values and FW snapshot calculation. 3246 * It is part of the EVENT_LOG_TAG_MIMO_PS_TRACE. 3247 */ 3248 #define WL_MIMO_PS_METRICS_SNAPSHOT_TRACE_TYPE 0 3249 typedef struct wl_mimo_ps_metrics_snapshot_trace { 3250 /* type field for this TLV: */ 3251 uint16 type; 3252 /* length field for this TLV */ 3253 uint16 len; 3254 uint32 idle_slotcnt_mimo; /* MIMO idle slotcnt raw SHM value */ 3255 uint32 last_idle_slotcnt_mimo; /* stored value snapshot */ 3256 uint32 idle_slotcnt_siso; /* SISO idle slotcnt raw SHM value */ 3257 uint32 last_idle_slotcnt_siso; /* stored value snapshot */ 3258 uint32 rx_time_mimo; /* Rx MIMO raw SHM value */ 3259 uint32 last_rx_time_mimo; /* stored value snapshot */ 3260 uint32 rx_time_siso; /* RX SISO raw SHM value */ 3261 uint32 last_rx_time_siso; /* stored value snapshot */ 3262 uint32 tx_time_1chain; /* Tx 1-chain raw SHM value */ 3263 uint32 last_tx_time_1chain; /* stored value snapshot */ 3264 uint32 tx_time_2chain; /* Tx 2-chain raw SHM value */ 3265 uint32 last_tx_time_2chain; /* stored value snapshot */ 3266 uint32 tx_time_3chain; /* Tx 3-chain raw SHM value */ 3267 uint32 last_tx_time_3chain; /* stored value snapshot */ 3268 uint16 reason; /* reason for snapshot call, see below */ 3269 /* Does the call reset last values after delta calculation */ 3270 uint16 reset_last; 3271 } wl_mimo_ps_metrics_snapshot_trace_t; 3272 /* reason codes for mimo ps metrics snapshot function calls */ 3273 #define WL_MIMOPS_METRICS_SNAPSHOT_REPORT 1 3274 #define WL_MIMOPS_METRICS_SNAPSHOT_RXCHAIN_SET 2 3275 #define WL_MIMOPS_METRICS_SNAPSHOT_ARBI 3 3276 #define WL_MIMOPS_METRICS_SNAPSHOT_SLOTUPD 4 3277 #define WL_MIMOPS_METRICS_SNAPSHOT_PMBCNRX 5 3278 #define WL_MIMOPS_METRICS_SNAPSHOT_BMACINIT 6 3279 #define WL_MIMOPS_METRICS_SNAPSHOT_HT_COMPLETE 7 3280 #define WL_MIMOPS_METRICS_SNAPSHOT_OCL 8 3281 3282 #define WL_MIMO_PS_STATUS_VERSION_2 2 3283 typedef struct wl_mimo_ps_status { 3284 uint8 version; 3285 uint8 ap_cap; /* The associated AP's capability (BW, MIMO/SISO). */ 3286 uint8 association_status; /* How we are associated to the AP (MIMO/SISO). */ 3287 uint8 mimo_ps_state; /* mimo_ps_cfg states: [0-5]. See below for values */ 3288 uint8 mrc_state; /* MRC state: NONE (0), ACTIVE(1) */ 3289 uint8 bss_rxchain; /* bss rxchain bitmask */ 3290 uint8 bss_txchain; /* bss txchain bitmask */ 3291 uint8 bss_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 3292 uint16 hw_state; /* bitmask of hw state. See below for values */ 3293 uint8 hw_rxchain; /* actual HW rxchain bitmask */ 3294 uint8 hw_txchain; /* actual HW txchain bitmask */ 3295 uint8 hw_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 3296 uint8 pm_bcnrx_state; /* actual state of ucode flag */ 3297 uint8 basic_rates_present; /* internal flag to trigger siso bcmc rx */ 3298 uint8 siso_bcmc_rx_state; /* actual state of ucode flag */ 3299 } wl_mimo_ps_status_t; 3300 3301 #define WL_MIMO_PS_STATUS_VERSION_1 1 3302 typedef struct wl_mimo_ps_status_v1 { 3303 uint8 version; 3304 uint8 ap_cap; /* The associated AP's capability (BW, MIMO/SISO). */ 3305 uint8 association_status; /* How we are associated to the AP (MIMO/SISO). */ 3306 uint8 mimo_ps_state; /* mimo_ps_cfg states: [0-5]. See below for values */ 3307 uint8 mrc_state; /* MRC state: NONE (0), ACTIVE(1) */ 3308 uint8 bss_rxchain; /* bss rxchain bitmask */ 3309 uint8 bss_txchain; /* bss txchain bitmask */ 3310 uint8 bss_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 3311 uint16 hw_state; /* bitmask of hw state. See below for values */ 3312 uint8 hw_rxchain; /* actual HW rxchain bitmask */ 3313 uint8 hw_txchain; /* actual HW txchain bitmask */ 3314 uint8 hw_bw; /* bandwidth: Full (0), 20M (1), 40M (2), 80M (3), etc */ 3315 uint8 pad[3]; 3316 } wl_mimo_ps_status_v1_t; 3317 3318 #define WL_MIMO_PS_STATUS_AP_CAP(ap_cap) (ap_cap & 0x0F) 3319 #define WL_MIMO_PS_STATUS_AP_CAP_BW(ap_cap) (ap_cap >> 4) 3320 #define WL_MIMO_PS_STATUS_ASSOC_BW_SHIFT 4 3321 3322 /* version 3: assoc status: low nibble is status enum, high other flags */ 3323 #define WL_MIMO_PS_STATUS_VERSION_3 3 3324 #define WL_MIMO_PS_STATUS_ASSOC_STATUS_MASK 0x0F 3325 #define WL_MIMO_PS_STATUS_ASSOC_STATUS_VHT_WITHOUT_OMN 0x80 3326 3327 /* mimo_ps_status: ap_cap/association status */ 3328 enum { 3329 WL_MIMO_PS_STATUS_ASSOC_NONE = 0, 3330 WL_MIMO_PS_STATUS_ASSOC_SISO = 1, 3331 WL_MIMO_PS_STATUS_ASSOC_MIMO = 2, 3332 WL_MIMO_PS_STATUS_ASSOC_LEGACY = 3 3333 }; 3334 3335 /* mimo_ps_status: mimo_ps_cfg states */ 3336 enum { 3337 WL_MIMO_PS_CFG_STATE_NONE = 0, 3338 WL_MIMO_PS_CFG_STATE_INFORM_AP_INPROGRESS = 1, 3339 WL_MIMO_PS_CFG_STATE_INFORM_AP_DONE = 2, 3340 WL_MIMO_PS_CFG_STATE_LEARNING = 3, 3341 WL_MIMO_PS_CFG_STATE_HW_CONFIGURE = 4, 3342 WL_MIMO_PS_CFG_STATE_INFORM_AP_PENDING = 5 3343 }; 3344 3345 /* mimo_ps_status: hw_state values */ 3346 #define WL_MIMO_PS_STATUS_HW_STATE_NONE 0 3347 #define WL_MIMO_PS_STATUS_HW_STATE_LTECOEX (0x1 << 0) 3348 #define WL_MIMO_PS_STATUS_HW_STATE_MIMOPS_BSS (0x1 << 1) 3349 3350 #ifdef WLAWDL 3351 #define WL_MIMO_PS_STATUS_HW_STATE_AWDL_BSS (0x1 << 2) 3352 #endif /* WLAWDL */ 3353 3354 #define WL_MIMO_PS_STATUS_HW_STATE_SCAN (0x1 << 3) 3355 #define WL_MIMO_PS_STATUS_HW_STATE_TXPPR (0x1 << 4) 3356 #define WL_MIMO_PS_STATUS_HW_STATE_PWRTHOTTLE (0x1 << 5) 3357 #define WL_MIMO_PS_STATUS_HW_STATE_TMPSENSE (0x1 << 6) 3358 #define WL_MIMO_PS_STATUS_HW_STATE_IOVAR (0x1 << 7) 3359 #define WL_MIMO_PS_STATUS_HW_STATE_AP_BSS (0x1 << 8) 3360 3361 /* mimo_ps_status: mrc states */ 3362 #define WL_MIMO_PS_STATUS_MRC_NONE 0 3363 #define WL_MIMO_PS_STATUS_MRC_ACTIVE 1 3364 3365 /* mimo_ps_status: core flag states for single-core beacon and siso-bcmc rx */ 3366 #define WL_MIMO_PS_STATUS_MHF_FLAG_NONE 0 3367 #define WL_MIMO_PS_STATUS_MHF_FLAG_ACTIVE 1 3368 #define WL_MIMO_PS_STATUS_MHF_FLAG_COREDOWN 2 3369 #define WL_MIMO_PS_STATUS_MHF_FLAG_INVALID 3 3370 3371 /* Type values for the REASON */ 3372 #define WL_MIMO_PS_PS_LEARNING_ABORTED (1 << 0) 3373 #define WL_MIMO_PS_PS_LEARNING_COMPLETED (1 << 1) 3374 #define WL_MIMO_PS_PS_LEARNING_ONGOING (1 << 2) 3375 3376 typedef struct wl_mimo_ps_learning_event_data { 3377 uint32 startTimeStamp; 3378 uint32 endTimeStamp; 3379 uint16 reason; 3380 struct ether_addr BSSID; 3381 uint32 totalSISO_below_rssi_threshold; 3382 uint32 totalMIMO_below_rssi_threshold; 3383 uint32 totalSISO_above_rssi_threshold; 3384 uint32 totalMIMO_above_rssi_threshold; 3385 } wl_mimo_ps_learning_event_data_t; 3386 3387 #define WL_MIMO_PS_PS_LEARNING_CFG_ABORT (1 << 0) 3388 #define WL_MIMO_PS_PS_LEARNING_CFG_STATUS (1 << 1) 3389 #define WL_MIMO_PS_PS_LEARNING_CFG_CONFIG (1 << 2) 3390 #define WL_MIMO_PS_PS_LEARNING_CFG_MASK (0x7) 3391 3392 #define WL_MIMO_PS_PS_LEARNING_CFG_V1 1 3393 3394 typedef struct wl_mimops_learning_cfg { 3395 /* flag: bit 0 for abort */ 3396 /* flag: bit 1 for status */ 3397 /* flag: bit 2 for configuring no of packets and rssi */ 3398 uint8 flag; 3399 /* mimo ps learning version, compatible version is 0 */ 3400 uint8 version; 3401 /* if version is 0 or rssi is 0, ignored */ 3402 int8 learning_rssi_threshold; 3403 uint8 reserved; 3404 uint32 no_of_packets_for_learning; 3405 wl_mimo_ps_learning_event_data_t mimops_learning_data; 3406 } wl_mimops_learning_cfg_t; 3407 3408 #define WL_OCL_STATUS_VERSION 1 3409 typedef struct ocl_status_info { 3410 uint8 version; 3411 uint8 len; 3412 uint16 fw_status; /* Bits representing FW disable reasons */ 3413 uint8 hw_status; /* Bits for actual HW config and SISO/MIMO coremask */ 3414 uint8 coremask; /* The ocl core mask (indicating listening core) */ 3415 } ocl_status_info_t; 3416 3417 /* MWS OCL map */ 3418 #define WL_MWS_OCL_OVERRIDE_VERSION 1 3419 typedef struct wl_mws_ocl_override { 3420 uint16 version; /* Structure version */ 3421 uint16 bitmap_2g; /* bitmap for 2.4G channels bits 1-13 */ 3422 uint16 bitmap_5g_lo; /* bitmap for 5G low channels by 2: 3423 *34-48, 52-56, 60-64, 100-102 3424 */ 3425 uint16 bitmap_5g_mid; /* bitmap for 5G mid channels by 2: 3426 * 104, 108-112, 116-120, 124-128, 3427 * 132-136, 140, 149-151 3428 */ 3429 uint16 bitmap_5g_high; /* bitmap for 5G high channels by 2 3430 * 153, 157-161, 165 3431 */ 3432 } wl_mws_ocl_override_t; 3433 3434 /* Bits for fw_status */ 3435 #define OCL_DISABLED_HOST 0x01 /* Host has disabled through ocl_enable */ 3436 #define OCL_DISABLED_RSSI 0x02 /* Disabled because of ocl_rssi_threshold */ 3437 #define OCL_DISABLED_LTEC 0x04 /* Disabled due to LTE Coex activity */ 3438 #define OCL_DISABLED_SISO 0x08 /* Disabled while in SISO mode */ 3439 #define OCL_DISABLED_CAL 0x10 /* Disabled during active calibration */ 3440 #define OCL_DISABLED_CHANSWITCH 0x20 /* Disabled during active channel switch */ 3441 #define OCL_DISABLED_ASPEND 0x40 /* Disabled due to assoc pending */ 3442 #define OCL_DISABLED_SEQ_RANGE 0x80 /* Disabled during SEQ Ranging */ 3443 #define OCL_DISABLED_RXIQ_EST_BTLOWAR 0x100 /* Disabled if the bt-lo-war is active */ 3444 #define OCL_DISABLED_IDLE_TSSICAL 0x200 3445 #define OCL_DISABLED_TONE 0x400 /* Disabled if the tone is active */ 3446 #define OCL_DISABLED_NOISECAL 0x800 /* Disabled if the noise cal is active */ 3447 3448 /* Bits for hw_status */ 3449 #define OCL_HWCFG 0x01 /* State of OCL config bit in phy HW */ 3450 #define OCL_HWMIMO 0x02 /* Set if current coremask is > 1 bit */ 3451 #define OCL_COREDOWN 0x80 /* Set if core is currently down */ 3452 3453 #define WL_OPS_CFG_VERSION_1 1 3454 /* Common IOVAR struct */ 3455 typedef struct wl_ops_cfg_v1 { 3456 uint16 version; 3457 uint16 len; /* total length includes fixed fields and variable data[] */ 3458 uint16 subcmd_id; /* subcommand id */ 3459 uint16 padding; /* reserved / padding for 4 byte align */ 3460 uint8 data[]; /* subcommand data; could be empty */ 3461 } wl_ops_cfg_v1_t; 3462 3463 /* subcommands ids */ 3464 enum { 3465 WL_OPS_CFG_SUBCMD_ENABLE = 0, /* OPS enable/disable mybss and obss 3466 * for nav and plcp options 3467 */ 3468 WL_OPS_CFG_SUBCMD_MAX_SLEEP_DUR = 1, /* Max sleep duration used for OPS */ 3469 WL_OPS_CFG_SUBCMD_RESET_STATS = 2 /* Reset stats part of ops_status 3470 * on both slices 3471 */ 3472 }; 3473 3474 #define WL_OPS_CFG_MASK 0xffff 3475 #define WL_OPS_CFG_CAP_MASK 0xffff0000 3476 #define WL_OPS_CFG_CAP_SHIFT 16 /* Shift bits to locate the OPS CAP */ 3477 #define WL_OPS_MAX_SLEEP_DUR 12500 /* max ops duration in us */ 3478 #define WL_OPS_MINOF_MAX_SLEEP_DUR 512 /* minof max ops duration in us */ 3479 #define WL_OPS_SUPPORTED_CFG (WL_OPS_MYBSS_PLCP_DUR | WL_OPS_MYBSS_NAV_DUR \ 3480 | WL_OPS_OBSS_PLCP_DUR | WL_OPS_OBSS_NAV_DUR) 3481 #define WL_OPS_DEFAULT_CFG WL_OPS_SUPPORTED_CFG 3482 3483 /* WL_OPS_CFG_SUBCMD_ENABLE */ 3484 typedef struct wl_ops_cfg_enable { 3485 uint32 bits; /* selectively enable ops for mybss and obss */ 3486 } wl_ops_cfg_enable_t; 3487 /* Bits for WL_OPS_CFG_SUBCMD_ENABLE Parameter */ 3488 #define WL_OPS_MYBSS_PLCP_DUR 0x1 /* OPS based on mybss 11b & 11n mixed HT frames 3489 * PLCP header duration 3490 */ 3491 #define WL_OPS_MYBSS_NAV_DUR 0x2 /* OPS based on mybss RTS-CTS duration */ 3492 #define WL_OPS_OBSS_PLCP_DUR 0x4 /* OPS based on obss 11b & 11n mixed HT frames 3493 * PLCP header duration 3494 */ 3495 #define WL_OPS_OBSS_NAV_DUR 0x8 /* OPS based on obss RTS-CTS duration */ 3496 3497 /* WL_OPS_CFG_SUBCMD_MAX_SLEEP_DUR */ 3498 typedef struct wl_ops_cfg_max_sleep_dur { 3499 uint32 val; /* maximum sleep duration (us) used for OPS */ 3500 } wl_ops_cfg_max_sleep_dur_t; 3501 3502 /* WL_OPS_CFG_SUBCMD_RESET_STATS */ 3503 typedef struct wl_ops_cfg_reset_stats { 3504 uint32 val; /* bitmap of slices, 0 means all slices */ 3505 } wl_ops_cfg_reset_stats_t; 3506 3507 #define WL_OPS_STATUS_VERSION_1 1 3508 #define OPS_DUR_HIST_BINS 5 /* number of bins used, 0-1, 1-2, 2-4, 4-8, >8 msec */ 3509 typedef struct wl_ops_status_v1 { 3510 uint16 version; 3511 uint16 len; /* Total length including all fixed fields */ 3512 uint8 slice_index; /* Slice for which status is reported */ 3513 uint8 disable_obss; /* indicate if obss cfg is disabled */ 3514 uint8 pad[2]; /* 4-byte alignment */ 3515 uint32 disable_reasons; /* FW disable reasons */ 3516 uint32 disable_duration; /* ops disable time(ms) due to disable reasons */ 3517 uint32 applied_ops_config; /* currently applied ops config */ 3518 uint32 partial_ops_dur; /* Total time (in usec) of partial ops duration */ 3519 uint32 full_ops_dur; /* Total time (in usec) of full ops duration */ 3520 uint32 count_dur_hist[OPS_DUR_HIST_BINS]; /* ops occurrence histogram */ 3521 uint32 nav_cnt; /* number of times ops triggered based NAV duration */ 3522 uint32 plcp_cnt; /* number of times ops triggered based PLCP duration */ 3523 uint32 mybss_cnt; /* number of times mybss ops trigger */ 3524 uint32 obss_cnt; /* number of times obss ops trigger */ 3525 uint32 miss_dur_cnt; /* number of times ops couldn't happen 3526 * due to insufficient duration 3527 */ 3528 uint32 miss_premt_cnt; /* number of times ops couldn't happen due 3529 * to not meeting Phy preemption thresh 3530 */ 3531 uint32 max_dur_cnt; /* number of times ops did not trigger due to 3532 * frames exceeding max sleep duration 3533 */ 3534 uint32 wake_cnt; /* number of ops miss due to wake reason */ 3535 uint32 bcn_wait_cnt; /* number of ops miss due to waiting for bcn */ 3536 } wl_ops_status_v1_t; 3537 /* Bits for disable_reasons */ 3538 #define OPS_DISABLED_HOST 0x01 /* Host has disabled through ops_cfg */ 3539 #define OPS_DISABLED_UNASSOC 0x02 /* Disabled because the slice is in unassociated state */ 3540 #define OPS_DISABLED_SCAN 0x04 /* Disabled because the slice is in scan state */ 3541 #define OPS_DISABLED_BCN_MISS 0x08 /* Disabled because beacon missed for a duration */ 3542 3543 #define WL_PSBW_CFG_VERSION_1 1 3544 /* Common IOVAR struct */ 3545 typedef struct wl_psbw_cfg_v1 { 3546 uint16 version; 3547 uint16 len; /* total length includes fixed fields and variable data[] */ 3548 uint16 subcmd_id; /* subcommand id */ 3549 uint16 pad; /* reserved / padding for 4 byte align */ 3550 uint8 data[]; /* subcommand data */ 3551 } wl_psbw_cfg_v1_t; 3552 3553 /* subcommands ids */ 3554 enum { 3555 /* PSBW enable/disable */ 3556 WL_PSBW_CFG_SUBCMD_ENABLE = 0, 3557 /* override psbw disable requests */ 3558 WL_PSBW_CFG_SUBCMD_OVERRIDE_DISABLE_MASK = 1, 3559 /* Reset stats part of psbw status */ 3560 WL_PSBW_CFG_SUBCMD_RESET_STATS = 2 3561 }; 3562 3563 #define WL_PSBW_OVERRIDE_DISA_CFG_MASK 0x0000ffff 3564 #define WL_PSBW_OVERRIDE_DISA_CAP_MASK 0xffff0000 3565 #define WL_PSBW_OVERRIDE_DISA_CAP_SHIFT 16 /* shift bits for cap */ 3566 3567 /* WL_PSBW_CFG_SUBCMD_ENABLE */ 3568 typedef struct wl_psbw_cfg_enable { 3569 bool enable; /* enable or disable */ 3570 } wl_psbw_cfg_enable_t; 3571 3572 /* WL_PSBW_CFG_SUBCMD_OVERRIDE_DISABLE_MASK */ 3573 typedef struct wl_psbw_cfg_override_disable_mask { 3574 uint32 mask; /* disable requests to override, cap and current cfg */ 3575 } wl_psbw_cfg_override_disable_mask_t; 3576 3577 /* WL_PSBW_CFG_SUBCMD_RESET_STATS */ 3578 typedef struct wl_psbw_cfg_reset_stats { 3579 uint32 val; /* infra interface index, 0 */ 3580 } wl_psbw_cfg_reset_stats_t; 3581 3582 #define WL_PSBW_STATUS_VERSION_1 1 3583 typedef struct wl_psbw_status_v1 { 3584 uint16 version; 3585 uint16 len; /* total length including all fixed fields */ 3586 uint8 curr_slice_index; /* current slice index of the interface */ 3587 uint8 associated; /* interface associatd */ 3588 chanspec_t chspec; /* radio chspec */ 3589 uint32 state; /* psbw state */ 3590 uint32 disable_reasons; /* FW disable reasons */ 3591 uint32 slice_enable_dur; /* time(ms) psbw remains enabled on this slice */ 3592 uint32 total_enable_dur; /* time(ms) psbw remains enabled total */ 3593 uint32 enter_cnt; /* total cnt entering PSBW active */ 3594 uint32 exit_cnt; /* total cnt exiting PSBW active */ 3595 uint32 exit_imd_cnt; /* total cnt imd exit when waited N tbtts */ 3596 uint32 enter_skip_cnt; /* total cnt entering PSBW active skipped */ 3597 } wl_psbw_status_v1_t; 3598 3599 /* Bit for state */ 3600 #define PSBW_ACTIVE 0x1 /* active 20MHz */ 3601 #define PSBW_TTTT_PEND 0x2 /* waiting for TTTT intr */ 3602 #define PSBW_WAIT_ENTER 0x4 /* in wait period before entering */ 3603 #define PSBW_CAL_DONE 0x8 /* 20M channel cal done */ 3604 3605 /* Bits for disable_reasons */ 3606 #define WL_PSBW_DISA_HOST 0x00000001 /* Host has disabled through psbw_cfg */ 3607 #define WL_PSBW_DISA_AP20M 0x00000002 /* AP is operating on 20 MHz */ 3608 #define WL_PSBW_DISA_SLOTTED_BSS 0x00000004 /* slot_bss active */ 3609 #define WL_PSBW_DISA_NOT_PMFAST 0x00000008 /* Not PM_FAST */ 3610 #define WL_PSBW_DISA_BASICRATESET 0x00000010 /* BasicRateSet is empty */ 3611 #define WL_PSBW_DISA_NOT_D3 0x00000020 /* PCIe not in D3 */ 3612 #define WL_PSBW_DISA_CSA 0x00000040 /* CSA IE is present */ 3613 #define WL_PSBW_DISA_ASSOC 0x00000080 /* assoc state is active/or unassoc */ 3614 #define WL_PSBW_DISA_SCAN 0x00000100 /* scan state is active */ 3615 #define WL_PSBW_DISA_CAL 0x00000200 /* cal pending or active */ 3616 #define WL_PSBW_DISA_BCN_OFFLOAD 0x00000400 /* PSBW disabled due to scan 3617 * core beacon offload 3618 */ 3619 #define WL_PSBW_DISA_DISASSOC 0x00000800 /* STA is disassociated */ 3620 /* following are not part of disable reasons */ 3621 #define WL_PSBW_EXIT_PM 0x00001000 /* Out of PM */ 3622 #define WL_PSBW_EXIT_TIM 0x00002000 /* unicast TIM bit present */ 3623 #define WL_PSBW_EXIT_DATA 0x00004000 /* Data for transmission */ 3624 #define WL_PSBW_EXIT_MGMTDATA 0x00008000 /* management frame for transmission */ 3625 #define WL_PSBW_EXIT_BW_UPD 0x00010000 /* BW being updated */ 3626 #define WL_PSBW_DISA_NONE 0x80000000 /* reserved for internal use only */ 3627 3628 /* DVFS */ 3629 #define DVFS_CMND_VERSION_1 1 3630 /* Common IOVAR struct */ 3631 typedef struct dvfs_cmnd_v1 { 3632 uint16 ver; /* version of this structure */ 3633 uint16 len; /* includes both fixed and variable data[] fields */ 3634 uint32 subcmd; /* subcommand id */ 3635 uint8 data[]; /* subcommand data */ 3636 } dvfs_cmnd_v1_t; 3637 3638 /* subcommand ids */ 3639 enum { 3640 DVFS_SUBCMD_ENABLE = 0, /* DVFS enable/disable, 1-byte data 3641 * DVFS enable:1, disable:0 3642 */ 3643 DVFS_SUBCMD_LDV = 1, /* DVFS force arm state to LDV, 1-byte data 3644 * DVFS force LDV ON 1, LDV OFF 0 3645 */ 3646 DVFS_SUBCMD_STATUS = 2, /* DVFS status, data[] contains dvfs_status */ 3647 DVFS_SUBCMD_HIST = 3, /* DVFS history, data[] contains 3648 * history of dvfs state change 3649 */ 3650 DVFS_SUBCMD_LAST 3651 }; 3652 3653 /* DVFS Status */ 3654 /* current DVFS state request for ARM */ 3655 #define DVFS_STATE_BIT_MASK 0x0Fu 3656 #define DVFS_STATE_BIT_SHIFT 0u 3657 /* Bit value for DVFS state request */ 3658 #define DVFS_STATE_LDV 0u 3659 #define DVFS_STATE_NDV 1u 3660 /* current DVFS status */ 3661 #define DVFS_STATUS_BIT_MASK 0xF0u 3662 #define DVFS_STATUS_BIT_SHIFT 4u 3663 /* Bit value for DVFS status */ 3664 #define DVFS_STATUS_LDV 0u 3665 #define DVFS_STATUS_NDV 1u 3666 /* DVFS bits are for status, raw request and active request */ 3667 /* 4387b0 supports only status bits for aux, main, and bt */ 3668 /* 4387c0 supports all eight status and request bits */ 3669 #define DVFS_BIT_AUX_MASK 0x0001u 3670 #define DVFS_BIT_AUX_SHIFT 0u 3671 #define DVFS_BIT_AUX_VAL(_val) (((_val) & DVFS_BIT_AUX_MASK) \ 3672 >> DVFS_BIT_AUX_SHIFT) 3673 #define DVFS_BIT_MAIN_MASK 0x0002u 3674 #define DVFS_BIT_MAIN_SHIFT 1u 3675 #define DVFS_BIT_MAIN_VAL(_val) (((_val) & DVFS_BIT_MAIN_MASK) \ 3676 >> DVFS_BIT_MAIN_SHIFT) 3677 #define DVFS_BIT_BT_MASK 0x0004u 3678 #define DVFS_BIT_BT_SHIFT 2u 3679 #define DVFS_BIT_BT_VAL(_val) (((_val) & DVFS_BIT_BT_MASK) \ 3680 >> DVFS_BIT_BT_SHIFT) 3681 #define DVFS_BIT_CHIPC_MASK 0x0008u 3682 #define DVFS_BIT_CHIPC_SHIFT 3u 3683 #define DVFS_BIT_CHIPC_VAL(_val) (((_val) & DVFS_BIT_CHIPC_MASK) \ 3684 >> DVFS_BIT_CHIPC_SHIFT) 3685 #define DVFS_BIT_PCIE_MASK 0x0010u 3686 #define DVFS_BIT_PCIE_SHIFT 4u 3687 #define DVFS_BIT_PCIE_VAL(_val) (((_val) & DVFS_BIT_PCIE_MASK) \ 3688 >> DVFS_BIT_PCIE_SHIFT) 3689 #define DVFS_BIT_ARM_MASK 0x0020u 3690 #define DVFS_BIT_ARM_SHIFT 5u 3691 #define DVFS_BIT_ARM_VAL(_val) (((_val) & DVFS_BIT_ARM_MASK) \ 3692 >> DVFS_BIT_ARM_SHIFT) 3693 #define DVFS_BIT_SCAN_MASK 0x0040u 3694 #define DVFS_BIT_SCAN_SHIFT 6u 3695 #define DVFS_BIT_SCAN_VAL(_val) (((_val) & DVFS_BIT_SCAN_MASK) \ 3696 >> DVFS_BIT_SCAN_SHIFT) 3697 #define DVFS_BIT_BTSCAN_MASK 0x0080u 3698 #define DVFS_BIT_BTSCAN_SHIFT 7u 3699 #define DVFS_BIT_BTSCAN_VAL(_val) (((_val) & DVFS_BIT_BTSCAN_MASK) \ 3700 >> DVFS_BIT_BTSCAN_SHIFT) 3701 #define DVFS_BIT_HWA_MASK 0x0100u 3702 #define DVFS_BIT_HWA_SHIFT 8u 3703 #define DVFS_BIT_HWA_VAL(_val) (((_val) & DVFS_BIT_HWA_MASK) \ 3704 >> DVFS_BIT_HWA_SHIFT) 3705 #define DVFS_BIT_SYSMEM_MASK 0x0200u 3706 #define DVFS_BIT_SYSMEM_SHIFT 9u 3707 #define DVFS_BIT_SYSMEM_VAL(_val) (((_val) & DVFS_BIT_SYSMEM_MASK) \ 3708 >> DVFS_BIT_SYSMEM_SHIFT) 3709 /* to convert voltage to volt from multiple of 10mVolt */ 3710 #define DVFS_CONVERT_TO_VOLT 100u 3711 3712 /* status version for 4387b0 */ 3713 #define DVFS_STATUS_VERSION_1 1 3714 typedef struct dvfs_status_v1 { 3715 uint16 version; /* version of dvfs_status */ 3716 uint16 len; /* total length including all fixed fields */ 3717 uint8 info; /* current dvfs state request and status */ 3718 uint8 voltage; /* voltage (multiple of 10mV) */ 3719 uint16 freq; /* arm clock frequency (in MHz) */ 3720 uint32 state_change_count; /* total state (LDV/NDV) transition count */ 3721 uint32 ldv_duration; /* total time (ms) in LDV */ 3722 uint32 ndv_duration; /* total time (ms) in NDV */ 3723 uint16 status; /* status bits */ 3724 uint16 pad; /* word aligned for size */ 3725 } dvfs_status_v1_t; 3726 #define DVFS_STATUS_VER_1_LEN (sizeof(dvfs_status_v1_t)) 3727 /* status version for 4387c0 */ 3728 #define DVFS_STATUS_VERSION_2 2 3729 #define DVFS_STATUS_VERSION_3 3 3730 typedef struct dvfs_status_v2 { 3731 uint16 version; /* version of dvfs_status */ 3732 uint16 len; /* total length including all fixed fields */ 3733 uint8 info; /* current dvfs state request and status */ 3734 uint8 voltage; /* voltage (multiple of 10mV) */ 3735 uint16 freq; /* arm clock frequency (in MHz) */ 3736 uint32 state_change_count; /* total state (LDV/NDV) transition count */ 3737 uint32 ldv_duration; /* total time (ms) in LDV */ 3738 uint32 ndv_duration; /* total time (ms) in NDV */ 3739 uint16 status; /* status bits */ 3740 uint16 raw_request; /* raw request bits */ 3741 uint16 active_request; /* active request bits */ 3742 /* DVFS_STATUS_VERSION_3 for pmurev >= 40 */ 3743 uint16 valid_cores; /* bitmap to indicate valid cores status */ 3744 } dvfs_status_v2_t; 3745 #define DVFS_STATUS_V2_VALID_CORES (0xFFu) 3746 #define DVFS_STATUS_VER_3_LEN (sizeof(dvfs_status_v2_t)) 3747 #define DVFS_STATUS_VER_2_LEN (DVFS_STATUS_VER_3_LEN - (sizeof(uint16))) 3748 3749 /* DVFS_SUBCMD_HIST */ 3750 #define DVFS_HIST_CMD_VERSION_1 1 3751 typedef struct dvfs_hist_cmd_v1 { 3752 uint16 version; /* version of this structure */ 3753 uint16 len; /* includes both fixed and variable data[] fields */ 3754 uint8 data[]; /* subcommand data : array of dvfs_hist_v1_t */ 3755 } dvfs_hist_cmd_v1_t; 3756 3757 /* DVFS_SUBCMD_HIST data[] payload */ 3758 typedef struct dvfs_hist_v1 { 3759 uint8 old_state; /* old state */ 3760 uint8 new_state; /* new state */ 3761 uint16 reason; /* reason for state change */ 3762 uint32 timestamp; /* timestamp of state change */ 3763 } dvfs_hist_v1_t; 3764 3765 /* Bits for DVFS state change reason */ 3766 #define WL_DVFS_REASON_NOTPM 0x0001u /* Not PM */ 3767 #define WL_DVFS_REASON_MPC 0x0002u /* MPC */ 3768 #define WL_DVFS_REASON_TX_ACTIVE 0x0004u /* TX Active */ 3769 #define WL_DVFS_REASON_DBGST_ACTIVE 0x0008u /* Power state active */ 3770 #define WL_DVFS_REASON_DBGST_ASLEEP 0x0010u /* Power state asleep */ 3771 #define WL_DVFS_REASON_LTR_ACTIVE 0x0020u /* LTR Active */ 3772 #define WL_DVFS_REASON_HOST 0x0040u /* Host disabled */ 3773 #define WL_DVFS_REASON_SCAN 0x0080u /* Scan */ 3774 #define WL_DVFS_REASON_SLOTTED_BSS 0x0100u /* Slotted BSS */ 3775 #define WL_DVFS_REASON_CHAN 0x0200u /* Channel Change */ 3776 #define WL_DVFS_REASON_CAL 0x0400u /* CAL */ 3777 #define WL_DVFS_REASON_ASSOC 0x0800u /* ASSOC */ 3778 #define WL_DVFS_REASON_WD 0x1000u /* WD */ 3779 #define WL_DVFS_REASON_SOFTAP 0x2000u /* SoftAP */ 3780 3781 /* 3782 * Join preference iovar value is an array of tuples. Each tuple has a one-byte type, 3783 * a one-byte length, and a variable length value. RSSI type tuple must be present 3784 * in the array. 3785 * 3786 * Types are defined in "join preference types" section. 3787 * 3788 * Length is the value size in octets. It is reserved for WL_JOIN_PREF_WPA type tuple 3789 * and must be set to zero. 3790 * 3791 * Values are defined below. 3792 * 3793 * 1. RSSI - 2 octets 3794 * offset 0: reserved 3795 * offset 1: reserved 3796 * 3797 * 2. WPA - 2 + 12 * n octets (n is # tuples defined below) 3798 * offset 0: reserved 3799 * offset 1: # of tuples 3800 * offset 2: tuple 1 3801 * offset 14: tuple 2 3802 * ... 3803 * offset 2 + 12 * (n - 1) octets: tuple n 3804 * 3805 * struct wpa_cfg_tuple { 3806 * uint8 akm[DOT11_OUI_LEN+1]; akm suite 3807 * uint8 ucipher[DOT11_OUI_LEN+1]; unicast cipher suite 3808 * uint8 mcipher[DOT11_OUI_LEN+1]; multicast cipher suite 3809 * }; 3810 * 3811 * multicast cipher suite can be specified as a specific cipher suite or WL_WPA_ACP_MCS_ANY. 3812 * 3813 * 3. BAND - 2 octets 3814 * offset 0: reserved 3815 * offset 1: see "band preference" and "band types" 3816 * 3817 * 4. BAND RSSI - 2 octets 3818 * offset 0: band types 3819 * offset 1: +ve RSSI boost value in dB 3820 */ 3821 3822 struct tsinfo_arg { 3823 uint8 octets[3]; 3824 }; 3825 3826 #define RATE_CCK_1MBPS 0 3827 #define RATE_CCK_2MBPS 1 3828 #define RATE_CCK_5_5MBPS 2 3829 #define RATE_CCK_11MBPS 3 3830 3831 #define RATE_LEGACY_OFDM_6MBPS 0 3832 #define RATE_LEGACY_OFDM_9MBPS 1 3833 #define RATE_LEGACY_OFDM_12MBPS 2 3834 #define RATE_LEGACY_OFDM_18MBPS 3 3835 #define RATE_LEGACY_OFDM_24MBPS 4 3836 #define RATE_LEGACY_OFDM_36MBPS 5 3837 #define RATE_LEGACY_OFDM_48MBPS 6 3838 #define RATE_LEGACY_OFDM_54MBPS 7 3839 3840 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION 1 3841 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION_V1 1 3842 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION_V2 2 3843 #define WL_BSSTRANS_RSSI_RATE_MAP_VERSION_V3 3 3844 3845 typedef struct wl_bsstrans_rssi { 3846 int8 rssi_2g; /**< RSSI in dbm for 2.4 G */ 3847 int8 rssi_5g; /**< RSSI in dbm for 5G, unused for cck */ 3848 } wl_bsstrans_rssi_t; 3849 3850 #define RSSI_RATE_MAP_MAX_STREAMS 4 /**< max streams supported */ 3851 3852 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3853 typedef struct wl_bsstrans_rssi_rate_map_v3 { 3854 uint16 ver; 3855 uint16 len; /**< length of entire structure */ 3856 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3857 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3858 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3859 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT_ALL]; /* MCS0-11 */ 3860 wl_bsstrans_rssi_t phy_ax[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_HE]; /* MCS0-11 */ 3861 wl_bsstrans_rssi_t phy_be[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_EHT]; /* MCS0-13 */ 3862 } wl_bsstrans_rssi_rate_map_v3_t; 3863 3864 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3865 typedef struct wl_bsstrans_rssi_rate_map_v2 { 3866 uint16 ver; 3867 uint16 len; /**< length of entire structure */ 3868 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3869 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3870 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3871 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT_ALL]; /**< MCS0-11 */ 3872 wl_bsstrans_rssi_t phy_ax[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_HE]; /**< MCS0-11 */ 3873 } wl_bsstrans_rssi_rate_map_v2_t; 3874 3875 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3876 typedef struct wl_bsstrans_rssi_rate_map_v1 { 3877 uint16 ver; 3878 uint16 len; /**< length of entire structure */ 3879 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3880 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3881 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3882 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT]; /**< MCS0-9 */ 3883 } wl_bsstrans_rssi_rate_map_v1_t; 3884 3885 /** RSSI to rate mapping, all 20Mhz, no SGI */ 3886 typedef struct wl_bsstrans_rssi_rate_map { 3887 uint16 ver; 3888 uint16 len; /**< length of entire structure */ 3889 wl_bsstrans_rssi_t cck[WL_NUM_RATES_CCK]; /**< 2.4G only */ 3890 wl_bsstrans_rssi_t ofdm[WL_NUM_RATES_OFDM]; /**< 6 to 54mbps */ 3891 wl_bsstrans_rssi_t phy_n[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_MCS_1STREAM]; /* MCS0-7 */ 3892 wl_bsstrans_rssi_t phy_ac[RSSI_RATE_MAP_MAX_STREAMS][WL_NUM_RATES_VHT]; /**< MCS0-9 */ 3893 } wl_bsstrans_rssi_rate_map_t; 3894 3895 #define WL_BSSTRANS_ROAMTHROTTLE_VERSION 1 3896 3897 /** Configure number of scans allowed per throttle period */ 3898 typedef struct wl_bsstrans_roamthrottle { 3899 uint16 ver; 3900 uint16 period; 3901 uint16 scans_allowed; 3902 } wl_bsstrans_roamthrottle_t; 3903 3904 #define NFIFO 6 /**< # tx/rx fifopairs */ 3905 3906 #ifndef NFIFO_EXT 3907 #if defined(BCM_AQM_DMA_DESC) && !defined(BCM_AQM_DMA_DESC_DISABLED) 3908 #ifdef WL_LLW 3909 #define NFIFO_EXT 11 /* 4EDCA + 4 TWT + 1 Mcast/Bcast + 1 Spare + 1 LLQ */ 3910 #else 3911 #define NFIFO_EXT 10 /* 4EDCA + 4 TWT + 1 Mcast/Bcast + 1 Spare */ 3912 #endif 3913 #elif defined(WL11AX_TRIGGERQ) && !defined(WL11AX_TRIGGERQ_DISABLED) 3914 #define NFIFO_EXT 10 3915 #else 3916 #define NFIFO_EXT NFIFO 3917 #endif /* BCM_AQM_DMA_DESC && !BCM_AQM_DMA_DESC_DISABLED */ 3918 #endif /* NFIFO_EXT */ 3919 3920 /* When new reason codes are added to list, Please update wl_reinit_names also */ 3921 /* Reinit reason codes */ 3922 enum { 3923 WL_REINIT_RC_NONE = 0, 3924 WL_REINIT_RC_PS_SYNC = 1, 3925 WL_REINIT_RC_PSM_WD = 2, 3926 WL_REINIT_RC_MAC_WAKE = 3, 3927 WL_REINIT_RC_MAC_SUSPEND = 4, 3928 WL_REINIT_RC_MAC_SPIN_WAIT = 5, 3929 WL_REINIT_RC_AXI_BUS_ERROR = 6, 3930 WL_REINIT_RC_DEVICE_REMOVED = 7, 3931 WL_REINIT_RC_PCIE_FATAL_ERROR = 8, 3932 WL_REINIT_RC_OL_FW_TRAP = 9, 3933 WL_REINIT_RC_FIFO_ERR = 10, 3934 WL_REINIT_RC_INV_TX_STATUS = 11, 3935 WL_REINIT_RC_MQ_ERROR = 12, 3936 WL_REINIT_RC_PHYTXERR_THRESH = 13, 3937 WL_REINIT_RC_USER_FORCED = 14, 3938 WL_REINIT_RC_FULL_RESET = 15, 3939 WL_REINIT_RC_AP_BEACON = 16, 3940 WL_REINIT_RC_PM_EXCESSED = 17, 3941 WL_REINIT_RC_NO_CLK = 18, 3942 WL_REINIT_RC_SW_ASSERT = 19, 3943 WL_REINIT_RC_PSM_JMP0 = 20, 3944 WL_REINIT_RC_PSM_RUN = 21, 3945 WL_REINIT_RC_ENABLE_MAC = 22, 3946 WL_REINIT_RC_SCAN_TIMEOUT = 23, 3947 WL_REINIT_RC_JOIN_TIMEOUT = 24, 3948 /* Below error codes are generated during D3 exit validation */ 3949 WL_REINIT_RC_LINK_NOT_ACTIVE = 25, 3950 WL_REINIT_RC_PCI_CFG_RD_FAIL = 26, 3951 WL_REINIT_RC_INV_VEN_ID = 27, 3952 WL_REINIT_RC_INV_DEV_ID = 28, 3953 WL_REINIT_RC_INV_BAR0 = 29, 3954 WL_REINIT_RC_INV_BAR2 = 30, 3955 WL_REINIT_RC_AER_UC_FATAL = 31, 3956 WL_REINIT_RC_AER_UC_NON_FATAL = 32, 3957 WL_REINIT_RC_AER_CORR = 33, 3958 WL_REINIT_RC_AER_DEV_STS = 34, 3959 WL_REINIT_RC_PCIe_STS = 35, 3960 WL_REINIT_RC_MMIO_RD_FAIL = 36, 3961 WL_REINIT_RC_MMIO_RD_INVAL = 37, 3962 WL_REINIT_RC_MMIO_ARM_MEM_RD_FAIL = 38, 3963 WL_REINIT_RC_MMIO_ARM_MEM_INVAL = 39, 3964 WL_REINIT_RC_SROM_LOAD_FAILED = 40, 3965 WL_REINIT_RC_PHY_CRASH = 41, 3966 WL_REINIT_TX_STALL = 42, 3967 WL_REINIT_RC_TX_FLOW_CONTROL_BLOCKED = 43, 3968 WL_REINIT_RC_RX_HC_FAIL = 44, 3969 WL_REINIT_RC_RX_DMA_STALL = 45, 3970 WL_REINIT_UTRACE_BUF_OVERLAP_SR = 46, 3971 WL_REINIT_UTRACE_TPL_OUT_BOUNDS = 47, 3972 WL_REINIT_UTRACE_TPL_OSET_STRT0 = 48, 3973 WL_REINIT_RC_PHYTXERR = 49, 3974 WL_REINIT_RC_PSM_FATAL_SUSP = 50, 3975 WL_REINIT_RC_TX_FIFO_SUSP = 51, 3976 WL_REINIT_RC_MAC_ENABLE = 52, 3977 WL_REINIT_RC_SCAN_STALLED = 53, 3978 WL_REINIT_RC_PHY_HC = 54, 3979 WL_REINIT_RC_LAST, /* DONOT use this any more, kept for legacy reasons */ 3980 WL_REINIT_RC_RADIO_CRASH = 55, 3981 WL_REINIT_RC_SUPPORTED_LAST /* Use for app ONLY, DONOT use this in wlc code. 3982 * For wlc, use WL_REINIT_RC_VERSIONED_LAST 3983 */ 3984 }; 3985 3986 #define WL_REINIT_RC_V2 (2u) 3987 #define WL_REINIT_RC_LAST_V2 (WL_REINIT_RC_RADIO_CRASH) 3988 3989 #define WL_REINIT_RC_INVALID 255 3990 3991 #define NREINITREASONCOUNT 8 3992 /* NREINITREASONCOUNT is 8 in other branches. 3993 * Any change to this will break wl tool compatibility with other branches 3994 * #define NREINITREASONCOUNT WL_REINIT_RC_LAST 3995 */ 3996 /* REINITRSNIDX is kept for legacy reasons. Use REINIT_RSN_IDX for new versioned structure */ 3997 #define REINITRSNIDX(_x) (((_x) < WL_REINIT_RC_LAST) ? (_x) : 0) 3998 #define REINIT_RSN_IDX(_x) (((_x) < WL_REINIT_RC_SUPPORTED_LAST) ? (_x) : 0) /* TBD: move 3999 * this to src 4000 */ 4001 #define REINIT_RSN_IDX_V2(_x) (((_x) <= WL_REINIT_RC_LAST_V2) ? (_x) : 0) 4002 4003 #define WL_CNT_T_VERSION 30 /**< current version of wl_cnt_t struct */ 4004 #define WL_CNT_VERSION_6 6 4005 #define WL_CNT_VERSION_7 7 4006 #define WL_CNT_VERSION_11 11 4007 #define WL_CNT_VERSION_XTLV 30 4008 4009 #define WL_COUNTERS_IOV_VERSION_1 1 4010 #define WL_SUBCNTR_IOV_VER WL_COUNTERS_IOV_VERSION_1 4011 /* First two uint16 are version and lenght fields. So offset of the first counter will be 4 */ 4012 #define FIRST_COUNTER_OFFSET 0x04 4013 4014 /* need for now due to src/wl/ndis automerged to other branches. e.g. BISON */ 4015 #define WLC_WITH_XTLV_CNT 4016 4017 /* Number of xtlv info as required to calculate subcounter offsets */ 4018 #define WL_CNT_XTLV_ID_NUM 12 4019 #define WL_TLV_IOV_VER 1 4020 4021 /** 4022 * tlv IDs uniquely identifies counter component 4023 * packed into wl_cmd_t container 4024 */ 4025 enum wl_cnt_xtlv_id { 4026 WL_CNT_XTLV_SLICE_IDX = 0x1, /**< Slice index */ 4027 WL_CNT_XTLV_WLC = 0x100, /**< WLC layer counters */ 4028 WL_CNT_XTLV_WLC_RINIT_RSN = 0x101, /**< WLC layer reinitreason extension: LEGACY */ 4029 WL_CNT_XTLV_WLC_HE = 0x102, /* he counters */ 4030 WL_CNT_XTLV_WLC_SECVLN = 0x103, /* security vulnerabilities counters */ 4031 WL_CNT_XTLV_WLC_HE_OMI = 0x104, /* he omi counters */ 4032 WL_CNT_XTLV_WLC_RINIT_RSN_V2 = 0x105, /**< WLC layer reinitreason extension */ 4033 WL_CNT_XTLV_CNTV_LE10_UCODE = 0x200, /**< wl counter ver < 11 UCODE MACSTAT */ 4034 WL_CNT_XTLV_LT40_UCODE_V1 = 0x300, /**< corerev < 40 UCODE MACSTAT */ 4035 WL_CNT_XTLV_GE40_UCODE_V1 = 0x400, /**< corerev >= 40 UCODE MACSTAT */ 4036 WL_CNT_XTLV_GE64_UCODEX_V1 = 0x800, /* corerev >= 64 UCODEX MACSTAT */ 4037 WL_CNT_XTLV_GE80_UCODE_V1 = 0x900, /* corerev >= 80 UCODEX MACSTAT */ 4038 WL_CNT_XTLV_GE80_TXFUNFL_UCODE_V1 = 0x1000 /* corerev >= 80 UCODEX MACSTAT */ 4039 }; 4040 4041 /* tlv IDs uniquely identifies periodic state component */ 4042 enum wl_periodic_slice_state_xtlv_id { 4043 WL_STATE_COMPACT_COUNTERS = 0x1, 4044 WL_STATE_TXBF_COUNTERS = 0x2, 4045 WL_STATE_COMPACT_HE_COUNTERS = 0x3 4046 }; 4047 4048 /* Sub tlvs for chan_counters */ 4049 enum wl_periodic_chan_xtlv_id { 4050 WL_CHAN_GENERIC_COUNTERS = 0x1, 4051 WL_CHAN_PERIODIC_COUNTERS = 0x2 4052 }; 4053 4054 #ifdef WLC_CHAN_ECNTR_TEST 4055 #define WL_CHAN_PERIODIC_CNTRS_VER_1 1 4056 typedef struct wlc_chan_periodic_cntr 4057 { 4058 uint16 version; 4059 uint16 pad; 4060 uint32 rxstrt; 4061 } wlc_chan_periodic_cntr_t; 4062 #endif /* WLC_CHAN_ECNTR_TEST */ 4063 4064 #define WL_CHANCNTR_HDR_VER_1 1 4065 typedef struct wlc_chan_cntr_hdr_v1 4066 { 4067 uint16 version; 4068 uint16 pad; 4069 chanspec_t chanspec; /* Dont add any fields above this */ 4070 uint16 pad1; 4071 uint32 total_time; 4072 uint32 chan_entry_cnt; 4073 } wlc_chan_cntr_hdr_v1_t; 4074 4075 /* tlv IDs uniquely identifies periodic state component */ 4076 enum wl_periodic_if_state_xtlv_id { 4077 WL_STATE_IF_COMPACT_STATE = 0x1, 4078 WL_STATE_IF_ADPS_STATE = 0x02, 4079 WL_STATE_IF_ADPS_ENERGY_GAIN = 0x03 4080 }; 4081 4082 enum wl_periodic_tdls_if_state_xtlv_id { 4083 WL_STATE_IF_TDLS_STATE = 0x1 4084 }; 4085 4086 #define TDMTX_CNT_VERSION_V1 1 4087 #define TDMTX_CNT_VERSION_V2 2 4088 4089 /* structure holding tdm counters that interface to iovar */ 4090 typedef struct tdmtx_cnt_v1 { 4091 uint16 ver; 4092 uint16 length; /* length of this structure */ 4093 uint16 wlc_idx; /* index for wlc */ 4094 uint16 enabled; /* tdmtx is enabled on slice */ 4095 uint32 tdmtx_txa_on; /* TXA on requests */ 4096 uint32 tdmtx_txa_tmcnt; /* Total number of TXA timeout */ 4097 uint32 tdmtx_por_on; /* TXA POR requests */ 4098 uint32 tdmtx_txpuen; /* Path enable requests */ 4099 uint32 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 4100 uint32 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 4101 uint32 tdmtx_txdefer; /* Total number of times Tx was deferred on the slice */ 4102 uint32 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 4103 uint32 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 4104 uint32 tdmtx_txa_dur; /* Total time txa on */ 4105 uint32 tdmtx_txpri_dur; /* Total time TXPri */ 4106 uint32 tdmtx_txdefer_dur; /* Total time txdefer */ 4107 /* TDMTX input fields */ 4108 uint32 tdmtx_txpri; 4109 uint32 tdmtx_defer; 4110 uint32 tdmtx_threshold; 4111 uint32 tdmtx_rssi_threshold; 4112 uint32 tdmtx_txpwrboff; 4113 uint32 tdmtx_txpwrboff_dt; 4114 } tdmtx_cnt_v1_t; 4115 4116 typedef struct { 4117 uint16 ver; 4118 uint16 length; /* length of the data portion */ 4119 uint16 cnt; 4120 uint16 pad; /* pad to align to 32 bit */ 4121 uint8 data[]; /* array of tdmtx_cnt_v1_t */ 4122 } tdmtx_status_t; 4123 4124 /* structure holding counters that match exactly shm field sizes */ 4125 typedef struct tdmtx_cnt_shm_v1 { 4126 uint16 tdmtx_txa_on; /* TXA on requests */ 4127 uint16 tdmtx_tmcnt; /* TXA on requests */ 4128 uint16 tdmtx_por_on; /* TXA POR requests */ 4129 uint16 tdmtx_txpuen; /* Path enable requests */ 4130 uint16 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 4131 uint16 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 4132 uint16 tdmtx_txdefer; /* Total number of times Tx was defered by the slice */ 4133 uint16 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 4134 uint16 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 4135 uint16 tdmtx_txa_dur_l; /* Total time (low 16 bits) txa on */ 4136 uint16 tdmtx_txa_dur_h; /* Total time (low 16 bits) txa on */ 4137 uint16 tdmtx_txpri_dur_l; /* Total time (low 16 bits) TXPri */ 4138 uint16 tdmtx_txpri_dur_h; /* Total time (high 16 bits) TXPri */ 4139 uint16 tdmtx_txdefer_dur_l; /* Total time (low 16 bits) txdefer */ 4140 uint16 tdmtx_txdefer_dur_h; /* Total time (high 16 bits) txdefer */ 4141 } tdmtx_cnt_shm_v1_t; 4142 4143 /* structure holding tdm counters that interface to iovar for version 2 */ 4144 typedef struct tdmtx_cnt_v2 { 4145 uint16 ver; 4146 uint16 length; /* length of this structure */ 4147 uint16 wlc_idx; /* index for wlc */ 4148 uint16 enabled; /* tdmtx is enabled on slice */ 4149 uint32 tdmtx_txa_on; /* TXA on requests */ 4150 uint32 tdmtx_txa_tmcnt; /* Total number of TXA timeout */ 4151 uint32 tdmtx_porhi_on; /* TXA PORHI requests */ 4152 uint32 tdmtx_porlo_on; /* TXA PORLO requests */ 4153 uint32 tdmtx_txpuen; /* Path enable requests */ 4154 uint32 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 4155 uint32 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 4156 uint32 tdmtx_txdefer; /* Total number of times Tx was deferred on the slice */ 4157 uint32 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 4158 uint32 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 4159 uint32 tdmtx_txa_dur; /* Total time txa on */ 4160 uint32 tdmtx_txpri_dur; /* Total time TXPri */ 4161 uint32 tdmtx_txdefer_dur; /* Total time txdefer */ 4162 /* TDMTX input fields */ 4163 uint32 tdmtx_txpri; 4164 uint32 tdmtx_defer; 4165 uint32 tdmtx_threshold; 4166 uint32 tdmtx_rssi_threshold; 4167 uint32 tdmtx_txpwrboff; 4168 uint32 tdmtx_txpwrboff_dt; 4169 } tdmtx_cnt_v2_t; 4170 4171 /* structure holding counters that match exactly shm field sizes */ 4172 typedef struct tdmtx_cnt_shm_v2 { 4173 uint16 tdmtx_txa_on; /* TXA on requests */ 4174 uint16 tdmtx_tmcnt; /* TXA on requests */ 4175 uint16 tdmtx_porhi_on; /* TXA PORHI requests */ 4176 uint16 tdmtx_porlo_on; /* TXA PORLO requests */ 4177 uint16 tdmtx_txpuen; /* Path enable requests */ 4178 uint16 tdmtx_txpudis; /* Total number of times Tx path is muted on the slice */ 4179 uint16 tdmtx_txpri_on; /* Total number of times Tx priority was obtained by the slice */ 4180 uint16 tdmtx_txdefer; /* Total number of times Tx was defered by the slice */ 4181 uint16 tdmtx_txmute; /* Total number of times active Tx muted on the slice */ 4182 uint16 tdmtx_actpwrboff; /* Total number of times TX power is backed off by the slice */ 4183 uint16 tdmtx_txa_dur_l; /* Total time (low 16 bits) txa on */ 4184 uint16 tdmtx_txa_dur_h; /* Total time (low 16 bits) txa on */ 4185 uint16 tdmtx_txpri_dur_l; /* Total time (low 16 bits) TXPri */ 4186 uint16 tdmtx_txpri_dur_h; /* Total time (high 16 bits) TXPri */ 4187 uint16 tdmtx_txdefer_dur_l; /* Total time (low 16 bits) txdefer */ 4188 uint16 tdmtx_txdefer_dur_h; /* Total time (high 16 bits) txdefer */ 4189 } tdmtx_cnt_shm_v2_t; 4190 4191 typedef struct wl_tdmtx_ioc { 4192 uint16 id; /* ID of the sub-command */ 4193 uint16 len; /* total length of all data[] */ 4194 uint8 data[]; /* var len payload */ 4195 } wl_tdmtx_ioc_t; 4196 4197 /* 4198 * iovar subcommand ids 4199 */ 4200 enum { 4201 IOV_TDMTX_ENB = 1, 4202 IOV_TDMTX_STATUS = 2, 4203 IOV_TDMTX_TXPRI = 3, 4204 IOV_TDMTX_DEFER = 4, 4205 IOV_TDMTX_TXA = 5, 4206 IOV_TDMTX_CFG = 6, 4207 IOV_TDMTX_LAST 4208 }; 4209 4210 /* iovar structure for beacon simulator */ 4211 typedef struct wl_bcnsim_ioc { 4212 uint16 id; /* ID of the sub-command */ 4213 uint16 len; /* total length of all data[] */ 4214 uint8 data[]; /* var len payload */ 4215 } wl_bcnsim_ioc_t; 4216 4217 /* iovar subcmd ids */ 4218 enum { 4219 IOV_BCNSIM_ENB = 1, 4220 IOV_BCNSIM_ERRMAX = 2, 4221 IOV_BCNSIM_ERRDSTRB = 3, 4222 IOV_BCNSIM_DRIFT = 4, 4223 IOV_BCNSIM_RNDLYMAX = 5, 4224 IOV_BCNSIM_RNDDLY_DSTRB = 6, 4225 IOV_BCNSIM_CONSDLY = 7, 4226 IOV_BCNSIM_OMT_PROB = 8, 4227 IOV_BCNSIM_OMT_MIN_N = 9, 4228 IOV_BCNSIM_OMT_MAX_N = 10, 4229 IOV_BCNSIM_OMT_DSTRB = 11, 4230 IOV_BCNSIM_TSF_JUMP = 12, 4231 IOV_BCNSIM_PATTERN = 13, 4232 IOV_BCNSIM_STATUS = 14, 4233 IOV_BCNSIM_AUTH = 15, 4234 IOV_BCNSIM_RNDDLY_PROB = 16, 4235 IOV_BCNSIM_LAST 4236 }; 4237 4238 /* tlv id for beacon simulator */ 4239 enum wl_bcnsim_xtlv_id { 4240 WL_BCNSIM_XTLV_ENABLE = 0x1, 4241 WL_BCNSIM_XTLV_ERRMAX = 0x2, 4242 WL_BCNSIM_XTLV_ERRDSTRB = 0x3, 4243 WL_BCNSIM_XTLV_DRIFT = 0x4, 4244 WL_BCNSIM_XTLV_RNDLYMAX = 0x5, 4245 WL_BCNSIM_XTLV_RNDDLY_DSTRB = 0x6, 4246 WL_BCNSIM_XTLV_CONSDLY = 0x7, 4247 WL_BCNSIM_XTLV_OMT_PROB = 0x8, 4248 WL_BCNSIM_XTLV_OMT_MIN_N = 0x9, 4249 WL_BCNSIM_XTLV_OMT_MAX_N = 0xa, 4250 WL_BCNSIM_XTLV_OMT_DSTRB = 0xb, 4251 WL_BCNSIM_XTLV_TSF_JUMP = 0xc, 4252 WL_BCNSIM_XTLV_PATTERN = 0xd, 4253 WL_BCNSIM_XTLV_STATUS = 0xe, 4254 WL_BCNSIM_XTLV_AUTH = 0xf, 4255 WL_BCNSIM_XTLV_RNDDLY_PROB = 0x10 4256 }; 4257 4258 /* structure to store different pattern params */ 4259 typedef struct wlc_bcnsim_bcn_diff_v1 { 4260 uint16 version; 4261 uint16 dtim_cnt; 4262 uint32 tx_delta; 4263 uint32 ts_delta; 4264 } wlc_bcnsim_bcn_diff_v1_t; 4265 4266 /* structure to store/pass pattern */ 4267 typedef struct wlc_bcnsim_pattern_info_v1 { 4268 uint16 version; 4269 uint16 pattern_count; 4270 uint16 current_pos; 4271 wlc_bcnsim_bcn_diff_v1_t bcnsim_bcn_diff[]; 4272 } wlc_bcnsim_pattern_info_v1_t; 4273 4274 /* struct to store bcn sim status */ 4275 typedef struct bcnsim_status_v1 { 4276 uint16 ver; 4277 uint16 length; /* length of this structure */ 4278 uint32 rnd_delay_max; /* random delay */ 4279 int32 const_delay; /* cons delay */ 4280 int32 tsf_jump; /* change tsf */ 4281 int16 drift; /* add drift */ 4282 uint16 error_max; /* max error */ 4283 uint8 error_dstrb; /* error dstrb */ 4284 uint8 rnd_delay_dstrb; /* rnd delay distr */ 4285 uint8 rnd_delay_prob; /* random delay prob */ 4286 uint8 omit_prob; /* control omit prob */ 4287 uint8 omit_min_n; /* min omit */ 4288 uint8 omit_max_n; /* max omit */ 4289 uint8 omit_dstrb; /* omit dstrb % */ 4290 uint8 padding1; 4291 } bcnsim_status_v1_t; 4292 4293 /** 4294 * The number of variables in wl macstat cnt struct. 4295 * (wl_cnt_ge40mcst_v1_t, wl_cnt_lt40mcst_v1_t, wl_cnt_v_le10_mcst_t) 4296 */ 4297 #define WL_CNT_MCST_VAR_NUM 64 4298 /* sizeof(wl_cnt_ge40mcst_v1_t), sizeof(wl_cnt_lt40mcst_v1_t), and sizeof(wl_cnt_v_le10_mcst_t) */ 4299 #define WL_CNT_MCST_STRUCT_SZ ((uint32)sizeof(uint32) * WL_CNT_MCST_VAR_NUM) 4300 #define WL_CNT_REV80_MCST_STRUCT_SZ ((uint32)sizeof(wl_cnt_ge80mcst_v1_t)) 4301 #define WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_FIXED_SZ \ 4302 ((uint32)OFFSETOF(wl_cnt_ge80_txfunfl_v1_t, txfunfl)) 4303 #define WL_CNT_REV80_MCST_TXFUNFl_STRUCT_SZ(fcnt) \ 4304 (WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_FIXED_SZ + (fcnt * sizeof(uint32))) 4305 #define WL_CNT_REV80_MCST_TXFUNFlW_STRUCT_SZ (WL_CNT_REV80_MCST_TXFUNFl_STRUCT_SZ(NFIFO_EXT)) 4306 4307 #define WL_CNT_MCXST_STRUCT_SZ ((uint32)sizeof(wl_cnt_ge64mcxst_v1_t)) 4308 4309 #define WL_CNT_HE_STRUCT_SZ ((uint32)sizeof(wl_he_cnt_wlc_t)) 4310 4311 #define WL_CNT_SECVLN_STRUCT_SZ ((uint32)sizeof(wl_secvln_cnt_t)) 4312 4313 #define WL_CNT_HE_OMI_STRUCT_SZ ((uint32)sizeof(wl_he_omi_cnt_wlc_v1_t)) 4314 #define INVALID_CNT_VAL (uint32)(-1) 4315 4316 #define WL_XTLV_CNTBUF_MAX_SIZE ((uint32)(OFFSETOF(wl_cnt_info_t, data)) + \ 4317 (uint32)BCM_XTLV_HDR_SIZE + (uint32)sizeof(wl_cnt_wlc_t) + \ 4318 (uint32)BCM_XTLV_HDR_SIZE + WL_CNT_MCST_STRUCT_SZ + \ 4319 (uint32)BCM_XTLV_HDR_SIZE + WL_CNT_MCXST_STRUCT_SZ) 4320 4321 #define WL_CNTBUF_MAX_SIZE MAX(WL_XTLV_CNTBUF_MAX_SIZE, (uint32)sizeof(wl_cnt_ver_11_t)) 4322 4323 /** Top structure of counters IOVar buffer */ 4324 typedef struct { 4325 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 4326 uint16 datalen; /**< length of data including all paddings. */ 4327 uint8 data []; /**< variable length payload: 4328 * 1 or more bcm_xtlv_t type of tuples. 4329 * each tuple is padded to multiple of 4 bytes. 4330 * 'datalen' field of this structure includes all paddings. 4331 */ 4332 } wl_cnt_info_t; 4333 4334 /* Top structure of subcounters IOVar buffer 4335 * Whenever we make any change in this structure 4336 * WL_SUBCNTR_IOV_VER should be updated accordingly 4337 * The structure definition should remain consistant b/w 4338 * FW and wl/WLM app. 4339 */ 4340 typedef struct { 4341 uint16 version; /* Version of IOVAR structure. Used for backward 4342 * compatibility in future. Whenever we make any 4343 * changes to this structure then value of WL_SUBCNTR_IOV_VER 4344 * needs to be updated properly. 4345 */ 4346 uint16 length; /* length in bytes of this structure */ 4347 uint16 counters_version; /* see definition of WL_CNT_T_VERSION 4348 * wl app will send the version of counters 4349 * which is used to calculate the offset of counters. 4350 * It must match the version of counters FW is using 4351 * else FW will return error with his version of counters 4352 * set in this field. 4353 */ 4354 uint16 num_subcounters; /* Number of counter offset passed by wl app to FW. */ 4355 uint32 data[1]; /* variable length payload: 4356 * Offsets to the counters will be passed to FW 4357 * throught this data field. FW will return the value of counters 4358 * at the offsets passed by wl app in this fiels itself. 4359 */ 4360 } wl_subcnt_info_t; 4361 4362 /* Top structure of counters TLV version IOVar buffer 4363 * The structure definition should remain consistant b/w 4364 * FW and wl/WLM app. 4365 */ 4366 typedef struct { 4367 uint16 version; /* Version of IOVAR structure. Added for backward 4368 * compatibility feature. If any changes are done, 4369 * WL_TLV_IOV_VER need to be updated. 4370 */ 4371 uint16 length; /* total len in bytes of this structure + payload */ 4372 uint16 counters_version; /* See definition of WL_CNT_VERSION_XTLV 4373 * wl app will update counter tlv version to be used 4374 * so to calculate offset of supported TLVs. 4375 * If there is a mismatch in the version, FW will update an error 4376 */ 4377 uint16 num_tlv; /* Max number of TLV info passed by FW to WL app. 4378 * and vice-versa 4379 */ 4380 uint32 data[]; /* variable length payload: 4381 * This stores the tlv as supported by F/W to the wl app. 4382 * This table is required to compute subcounter offsets at WLapp end. 4383 */ 4384 } wl_cntr_tlv_info_t; 4385 4386 /** wlc layer counters */ 4387 typedef struct { 4388 /* transmit stat counters */ 4389 uint32 txframe; /**< tx data frames */ 4390 uint32 txbyte; /**< tx data bytes */ 4391 uint32 txretrans; /**< tx mac retransmits */ 4392 uint32 txerror; /**< tx data errors (derived: sum of others) */ 4393 uint32 txctl; /**< tx management frames */ 4394 uint32 txprshort; /**< tx short preamble frames */ 4395 uint32 txserr; /**< tx status errors */ 4396 uint32 txnobuf; /**< tx out of buffers errors */ 4397 uint32 txnoassoc; /**< tx discard because we're not associated */ 4398 uint32 txrunt; /**< tx runt frames */ 4399 uint32 txchit; /**< tx header cache hit (fastpath) */ 4400 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 4401 4402 /* transmit chip error counters */ 4403 uint32 txuflo; /**< tx fifo underflows */ 4404 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 4405 uint32 txphycrs; /**< PR8861/8963 counter */ 4406 4407 /* receive stat counters */ 4408 uint32 rxframe; /**< rx data frames */ 4409 uint32 rxbyte; /**< rx data bytes */ 4410 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 4411 uint32 rxctl; /**< rx management frames */ 4412 uint32 rxnobuf; /**< rx out of buffers errors */ 4413 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 4414 uint32 rxbadds; /**< rx bad DS errors */ 4415 uint32 rxbadcm; /**< rx bad control or management frames */ 4416 uint32 rxfragerr; /**< rx fragmentation errors */ 4417 uint32 rxrunt; /**< rx runt frames */ 4418 uint32 rxgiant; /**< rx giant frames */ 4419 uint32 rxnoscb; /**< rx no scb error */ 4420 uint32 rxbadproto; /**< rx invalid frames */ 4421 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 4422 uint32 rxbadda; /**< rx frames tossed for invalid da */ 4423 uint32 rxfilter; /**< rx frames filtered out */ 4424 4425 /* receive chip error counters */ 4426 uint32 rxoflo; /**< rx fifo overflow errors */ 4427 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 4428 4429 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 4430 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 4431 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 4432 4433 /* misc counters */ 4434 uint32 dmade; /**< tx/rx dma descriptor errors */ 4435 uint32 dmada; /**< tx/rx dma data errors */ 4436 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 4437 uint32 reset; /**< reset count */ 4438 uint32 tbtt; /**< cnts the TBTT int's */ 4439 uint32 txdmawar; /**< # occurrences of PR15420 workaround */ 4440 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 4441 4442 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 4443 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 4444 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 4445 uint32 txfail; /**< dot11FailedCount */ 4446 uint32 txretry; /**< dot11RetryCount */ 4447 uint32 txretrie; /**< dot11MultipleRetryCount */ 4448 uint32 rxdup; /**< dot11FrameduplicateCount */ 4449 uint32 txrts; /**< dot11RTSSuccessCount */ 4450 uint32 txnocts; /**< dot11RTSFailureCount */ 4451 uint32 txnoack; /**< dot11ACKFailureCount */ 4452 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 4453 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 4454 uint32 rxcrc; /**< dot11FCSErrorCount */ 4455 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 4456 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 4457 4458 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 4459 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 4460 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 4461 uint32 tkipreplay; /**< TKIPReplays */ 4462 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 4463 uint32 ccmpreplay; /**< CCMPReplays */ 4464 uint32 ccmpundec; /**< CCMPDecryptErrors */ 4465 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 4466 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 4467 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 4468 uint32 decsuccess; /**< DecryptSuccessCount */ 4469 uint32 tkipicverr; /**< TKIPICVErrorCount */ 4470 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 4471 4472 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 4473 uint32 psmwds; /**< Count PSM watchdogs */ 4474 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 4475 4476 /* MBSS counters, AP only */ 4477 uint32 prq_entries_handled; /**< PRQ entries read in */ 4478 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 4479 uint32 prq_bad_entries; /**< which could not be translated to info */ 4480 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 4481 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 4482 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 4483 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 4484 4485 /* per-rate receive stat counters */ 4486 uint32 rx1mbps; /**< packets rx at 1Mbps */ 4487 uint32 rx2mbps; /**< packets rx at 2Mbps */ 4488 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 4489 uint32 rx6mbps; /**< packets rx at 6Mbps */ 4490 uint32 rx9mbps; /**< packets rx at 9Mbps */ 4491 uint32 rx11mbps; /**< packets rx at 11Mbps */ 4492 uint32 rx12mbps; /**< packets rx at 12Mbps */ 4493 uint32 rx18mbps; /**< packets rx at 18Mbps */ 4494 uint32 rx24mbps; /**< packets rx at 24Mbps */ 4495 uint32 rx36mbps; /**< packets rx at 36Mbps */ 4496 uint32 rx48mbps; /**< packets rx at 48Mbps */ 4497 uint32 rx54mbps; /**< packets rx at 54Mbps */ 4498 uint32 rx108mbps; /**< packets rx at 108mbps */ 4499 uint32 rx162mbps; /**< packets rx at 162mbps */ 4500 uint32 rx216mbps; /**< packets rx at 216 mbps */ 4501 uint32 rx270mbps; /**< packets rx at 270 mbps */ 4502 uint32 rx324mbps; /**< packets rx at 324 mbps */ 4503 uint32 rx378mbps; /**< packets rx at 378 mbps */ 4504 uint32 rx432mbps; /**< packets rx at 432 mbps */ 4505 uint32 rx486mbps; /**< packets rx at 486 mbps */ 4506 uint32 rx540mbps; /**< packets rx at 540 mbps */ 4507 4508 uint32 rfdisable; /**< count of radio disables */ 4509 4510 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 4511 4512 uint32 txmpdu_sgi; /**< count for sgi transmit */ 4513 uint32 rxmpdu_sgi; /**< count for sgi received */ 4514 uint32 txmpdu_stbc; /**< count for stbc transmit */ 4515 uint32 rxmpdu_stbc; /**< count for stbc received */ 4516 4517 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 4518 4519 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 4520 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 4521 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 4522 uint32 tkipreplay_mcst; /**< TKIPReplays */ 4523 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 4524 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 4525 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 4526 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 4527 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 4528 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 4529 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 4530 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 4531 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 4532 4533 uint32 dma_hang; /**< count for dma hang */ 4534 uint32 reinit; /**< count for reinit */ 4535 4536 uint32 pstatxucast; /**< count of ucast frames xmitted on all psta assoc */ 4537 uint32 pstatxnoassoc; /**< count of txnoassoc frames xmitted on all psta assoc */ 4538 uint32 pstarxucast; /**< count of ucast frames received on all psta assoc */ 4539 uint32 pstarxbcmc; /**< count of bcmc frames received on all psta */ 4540 uint32 pstatxbcmc; /**< count of bcmc frames transmitted on all psta */ 4541 4542 uint32 cso_passthrough; /**< hw cso required but passthrough */ 4543 uint32 cso_normal; /**< hw cso hdr for normal process */ 4544 uint32 chained; /**< number of frames chained */ 4545 uint32 chainedsz1; /**< number of chain size 1 frames */ 4546 uint32 unchained; /**< number of frames not chained */ 4547 uint32 maxchainsz; /**< max chain size so far */ 4548 uint32 currchainsz; /**< current chain size */ 4549 uint32 pciereset; /**< Secondary Bus Reset issued by driver */ 4550 uint32 cfgrestore; /**< configspace restore by driver */ 4551 uint32 reinitreason[NREINITREASONCOUNT]; /**< reinitreason counters; 0: Unknown reason */ 4552 uint32 rxrtry; 4553 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 4554 4555 /* detailed control/management frames */ 4556 uint32 txbar; /**< Number of TX BAR */ 4557 uint32 rxbar; /**< Number of RX BAR */ 4558 uint32 txpspoll; /**< Number of TX PS-poll */ 4559 uint32 rxpspoll; /**< Number of RX PS-poll */ 4560 uint32 txnull; /**< Number of TX NULL_DATA */ 4561 uint32 rxnull; /**< Number of RX NULL_DATA */ 4562 uint32 txqosnull; /**< Number of TX NULL_QoSDATA */ 4563 uint32 rxqosnull; /**< Number of RX NULL_QoSDATA */ 4564 uint32 txassocreq; /**< Number of TX ASSOC request */ 4565 uint32 rxassocreq; /**< Number of RX ASSOC request */ 4566 uint32 txreassocreq; /**< Number of TX REASSOC request */ 4567 uint32 rxreassocreq; /**< Number of RX REASSOC request */ 4568 uint32 txdisassoc; /**< Number of TX DISASSOC */ 4569 uint32 rxdisassoc; /**< Number of RX DISASSOC */ 4570 uint32 txassocrsp; /**< Number of TX ASSOC response */ 4571 uint32 rxassocrsp; /**< Number of RX ASSOC response */ 4572 uint32 txreassocrsp; /**< Number of TX REASSOC response */ 4573 uint32 rxreassocrsp; /**< Number of RX REASSOC response */ 4574 uint32 txauth; /**< Number of TX AUTH */ 4575 uint32 rxauth; /**< Number of RX AUTH */ 4576 uint32 txdeauth; /**< Number of TX DEAUTH */ 4577 uint32 rxdeauth; /**< Number of RX DEAUTH */ 4578 uint32 txprobereq; /**< Number of TX probe request */ 4579 uint32 rxprobereq; /**< Number of RX probe request */ 4580 uint32 txprobersp; /**< Number of TX probe response */ 4581 uint32 rxprobersp; /**< Number of RX probe response */ 4582 uint32 txaction; /**< Number of TX action frame */ 4583 uint32 rxaction; /**< Number of RX action frame */ 4584 uint32 ampdu_wds; /**< Number of AMPDU watchdogs */ 4585 uint32 txlost; /**< Number of lost packets reported in txs */ 4586 uint32 txdatamcast; /**< Number of TX multicast data packets */ 4587 uint32 txdatabcast; /**< Number of TX broadcast data packets */ 4588 uint32 psmxwds; /**< Number of PSMx watchdogs */ 4589 uint32 rxback; 4590 uint32 txback; 4591 uint32 p2p_tbtt; /**< Number of P2P TBTT Events */ 4592 uint32 p2p_tbtt_miss; /**< Number of P2P TBTT Events Miss */ 4593 uint32 txqueue_start; 4594 uint32 txqueue_end; 4595 uint32 txbcast; /* Broadcast TransmittedFrameCount */ 4596 uint32 txdropped; /* tx dropped pkts */ 4597 uint32 rxbcast; /* BroadcastReceivedFrameCount */ 4598 uint32 rxdropped; /* rx dropped pkts (derived: sum of others) */ 4599 uint32 txq_end_assoccb; /* forced txqueue_end callback fired in assoc */ 4600 uint32 tx_toss_cnt; /* number of tx packets tossed */ 4601 uint32 rx_toss_cnt; /* number of rx packets tossed */ 4602 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 4603 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 4604 uint32 pmk_badlen_cnt; /* number of invalid pmk len */ 4605 uint32 txbar_notx; /* number of TX BAR not sent (maybe supressed or muted) */ 4606 uint32 txbar_noack; /* number of TX BAR sent, but not acknowledged by peer */ 4607 uint32 rxfrag_agedout; /**< # of aged out rx fragmentation */ 4608 uint32 pmkid_mismatch_cnt; /* number of EAPOL msg1 PMKID mismatch */ 4609 uint32 txaction_vndr_attempt; /* Number of VS AFs scheduled successfully for Tx */ 4610 uint32 txaction_vndr_fail; /* Number of VS AFs not sent or not acked */ 4611 uint32 rxnofrag; /* # of nobuf failure due to no pkt availability */ 4612 uint32 rxnocmplid; /* # of nobuf failure due to rxcmplid non-availability */ 4613 uint32 rxnohaddr; /* # of nobuf failure due to host address non-availability */ 4614 4615 /* Do not remove or rename in the middle of this struct. 4616 * All counter variables have to be of uint32. 4617 */ 4618 } wl_cnt_wlc_t; 4619 4620 /* he counters Version 1 */ 4621 #define HE_COUNTERS_V1 (1) 4622 typedef struct wl_he_cnt_wlc_v1 { 4623 uint32 he_rxtrig_myaid; 4624 uint32 he_rxtrig_rand; 4625 uint32 he_colormiss_cnt; 4626 uint32 he_txmampdu; 4627 uint32 he_txmtid_back; 4628 uint32 he_rxmtid_back; 4629 uint32 he_rxmsta_back; 4630 uint32 he_txfrag; 4631 uint32 he_rxdefrag; 4632 uint32 he_txtrig; 4633 uint32 he_rxtrig_basic; 4634 uint32 he_rxtrig_murts; 4635 uint32 he_rxtrig_bsrp; 4636 uint32 he_rxdlmu; 4637 uint32 he_physu_rx; 4638 uint32 he_phyru_rx; 4639 uint32 he_txtbppdu; 4640 } wl_he_cnt_wlc_v1_t; 4641 4642 /* he counters Version 2 */ 4643 #define HE_COUNTERS_V2 (2) 4644 typedef struct wl_he_cnt_wlc_v2 { 4645 uint16 version; 4646 uint16 len; 4647 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4648 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4649 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4650 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4651 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4652 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4653 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4654 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4655 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4656 uint32 he_txtrig; /**< transmission of trigger frames */ 4657 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4658 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4659 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4660 uint32 he_rxdlmu; /**< reception of DL MU PPDU */ 4661 uint32 he_physu_rx; /**< reception of SU frame */ 4662 uint32 he_phyru_rx; /**< reception of RU frame */ 4663 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4664 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4665 } wl_he_cnt_wlc_v2_t; 4666 4667 /* he counters Version 3 */ 4668 #define WL_RU_TYPE_MAX 6 4669 #define HE_COUNTERS_V3 (3) 4670 4671 typedef struct wl_he_cnt_wlc_v3 { 4672 uint16 version; 4673 uint16 len; 4674 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4675 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4676 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4677 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4678 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4679 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4680 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4681 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4682 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4683 uint32 he_txtrig; /**< transmission of trigger frames */ 4684 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4685 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4686 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4687 uint32 he_rxhemuppdu_cnt; /**< rxing HE MU PPDU */ 4688 uint32 he_physu_rx; /**< reception of SU frame */ 4689 uint32 he_phyru_rx; /**< reception of RU frame */ 4690 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4691 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4692 uint32 he_rxhesuppdu_cnt; /**< rxing SU PPDU */ 4693 uint32 he_rxhesureppdu_cnt; /**< rxing Range Extension(RE) SU PPDU */ 4694 uint32 he_null_zero_agg; /**< null AMPDU's transmitted in response to basic trigger 4695 * because of zero aggregation 4696 */ 4697 uint32 he_null_bsrp_rsp; /**< null AMPDU's txed in response to BSR poll */ 4698 uint32 he_null_fifo_empty; /**< null AMPDU's in response to basic trigger 4699 * because of no frames in fifo's 4700 */ 4701 uint32 he_myAID_cnt; 4702 uint32 he_rxtrig_bfm_cnt; 4703 uint32 he_rxtrig_mubar; 4704 uint32 rxheru[WL_RU_TYPE_MAX]; /**< HE of rx pkts */ 4705 uint32 txheru[WL_RU_TYPE_MAX]; 4706 uint32 he_mgmt_tbppdu; 4707 uint32 he_cs_req_tx_cancel; 4708 uint32 he_wrong_nss; 4709 uint32 he_trig_unsupp_rate; 4710 uint32 he_rxtrig_nfrp; 4711 uint32 he_rxtrig_bqrp; 4712 uint32 he_rxtrig_gcrmubar; 4713 } wl_he_cnt_wlc_v3_t; 4714 4715 /* he counters Version 4 */ 4716 #define HE_COUNTERS_V4 (4) 4717 typedef struct wl_he_cnt_wlc_v4 { 4718 uint16 version; 4719 uint16 len; 4720 uint32 he_rxtrig_myaid; /**< rxed valid trigger frame with myaid */ 4721 uint32 he_rxtrig_rand; /**< rxed valid trigger frame with random aid */ 4722 uint32 he_colormiss_cnt; /**< for bss color mismatch cases */ 4723 uint32 he_txmampdu; /**< for multi-TID AMPDU transmission */ 4724 uint32 he_txmtid_back; /**< for multi-TID BACK transmission */ 4725 uint32 he_rxmtid_back; /**< reception of multi-TID BACK */ 4726 uint32 he_rxmsta_back; /**< reception of multi-STA BACK */ 4727 uint32 he_txfrag; /**< transmission of Dynamic fragmented packets */ 4728 uint32 he_rxdefrag; /**< reception of dynamic fragmented packets */ 4729 uint32 he_txtrig; /**< transmission of trigger frames */ 4730 uint32 he_rxtrig_basic; /**< reception of basic trigger frame */ 4731 uint32 he_rxtrig_murts; /**< reception of MU-RTS trigger frame */ 4732 uint32 he_rxtrig_bsrp; /**< reception of BSR poll trigger frame */ 4733 uint32 he_rxtsrt_hemuppdu_cnt; /**< rxing HE MU PPDU */ 4734 uint32 he_physu_rx; /**< reception of SU frame */ 4735 uint32 he_phyru_rx; /**< reception of RU frame */ 4736 uint32 he_txtbppdu; /**< increments on transmission of every TB PPDU */ 4737 uint32 he_null_tbppdu; /**< null TB PPDU's sent as a response to basic trigger frame */ 4738 uint32 he_rxstrt_hesuppdu_cnt; /**< rxing SU PPDU */ 4739 uint32 he_rxstrt_hesureppdu_cnt; /**< rxing Range Extension(RE) SU PPDU */ 4740 uint32 he_null_zero_agg; /**< null AMPDU's transmitted in response to basic trigger 4741 * because of zero aggregation 4742 */ 4743 uint32 he_null_bsrp_rsp; /**< null AMPDU's txed in response to BSR poll */ 4744 uint32 he_null_fifo_empty; /**< null AMPDU's in response to basic trigger 4745 * because of no frames in fifo's 4746 */ 4747 uint32 he_myAID_cnt; 4748 uint32 he_rxtrig_bfm_cnt; 4749 uint32 he_rxtrig_mubar; 4750 uint32 rxheru[WL_RU_TYPE_MAX]; /**< HE of rx pkts */ 4751 uint32 txheru[WL_RU_TYPE_MAX]; 4752 uint32 he_mgmt_tbppdu; 4753 uint32 he_cs_req_tx_cancel; 4754 uint32 he_wrong_nss; 4755 uint32 he_trig_unsupp_rate; 4756 uint32 he_rxtrig_nfrp; 4757 uint32 he_rxtrig_bqrp; 4758 uint32 he_rxtrig_gcrmubar; 4759 uint32 he_rxtrig_basic_htpack; /**< triggers received with HTP ack policy */ 4760 uint32 he_rxtrig_ed_cncl; /**< count of cancelled packets 4761 * becasue of cs_req in trigger frame 4762 */ 4763 uint32 he_rxtrig_suppr_null_tbppdu; /**< count of null frame sent becasue of 4764 * suppression scenarios 4765 */ 4766 uint32 he_ulmu_disable; /**< number of UL MU disable scenario's handled in ucode */ 4767 uint32 he_ulmu_data_disable; /**<number of UL MU data disable scenarios 4768 * handled in ucode 4769 */ 4770 } wl_he_cnt_wlc_v4_t; 4771 4772 /* he counters Version 5 */ 4773 #define HE_COUNTERS_V5 (5) 4774 typedef struct wl_he_cnt_wlc_v5 { 4775 uint16 version; 4776 uint16 len; 4777 uint32 he_rxtrig_myaid; /* rxed valid trigger frame with myaid */ 4778 uint32 he_rxtrig_rand; /* rxed valid trigger frame with random aid */ 4779 uint32 he_colormiss_cnt; /* for bss color mismatch cases */ 4780 uint32 he_txmampdu; /* for multi-TID AMPDU transmission */ 4781 uint32 he_txmtid_back; /* for multi-TID BACK transmission */ 4782 uint32 he_rxmtid_back; /* reception of multi-TID BACK */ 4783 uint32 he_rxmsta_back; /* reception of multi-STA BACK */ 4784 uint32 he_txfrag; /* transmission of Dynamic fragmented packets */ 4785 uint32 he_rxdefrag; /* reception of dynamic fragmented packets */ 4786 uint32 he_txtrig; /* transmission of trigger frames */ 4787 uint32 he_rxtrig_basic; /* reception of basic trigger frame */ 4788 uint32 he_rxtrig_murts; /* reception of MU-RTS trigger frame */ 4789 uint32 he_rxtrig_bsrp; /* reception of BSR poll trigger frame */ 4790 uint32 he_rxtsrt_hemuppdu_cnt; /* rxing HE MU PPDU */ 4791 uint32 he_physu_rx; /* reception of SU frame */ 4792 uint32 he_phyru_rx; /* reception of RU frame */ 4793 uint32 he_txtbppdu; /* increments on transmission of every TB PPDU */ 4794 uint32 he_null_tbppdu; /* null TBPPDU's sent as a response to 4795 * basic trigger frame 4796 */ 4797 uint32 he_rxstrt_hesuppdu_cnt; /* rxing SU PPDU */ 4798 uint32 he_rxstrt_hesureppdu_cnt; /* rxing Range Extension(RE) SU PPDU */ 4799 uint32 he_null_zero_agg; /* nullAMPDU's transmitted in response to 4800 * basic trigger because of zero aggregation 4801 */ 4802 uint32 he_null_bsrp_rsp; /* null AMPDU's txed in response to BSR poll */ 4803 uint32 he_null_fifo_empty; /* null AMPDU's in response to basic trigger 4804 * because of no frames in fifo's 4805 */ 4806 uint32 he_rxtrig_bfm_cnt; 4807 uint32 he_rxtrig_mubar; 4808 uint32 rxheru[WL_RU_TYPE_MAX]; /* HE of rx pkts */ 4809 uint32 txheru[WL_RU_TYPE_MAX]; 4810 uint32 he_mgmt_tbppdu; 4811 uint32 he_cs_req_tx_cancel; 4812 uint32 he_wrong_nss; 4813 uint32 he_trig_unsupp_rate; 4814 uint32 he_rxtrig_nfrp; 4815 uint32 he_rxtrig_bqrp; 4816 uint32 he_rxtrig_gcrmubar; 4817 uint32 he_rxtrig_basic_htpack; /* triggers received with HTP ack policy */ 4818 uint32 he_rxtrig_suppr_null_tbppdu; /* count of null frame sent becasue of 4819 * suppression scenarios 4820 */ 4821 uint32 he_ulmu_disable; /* number of ULMU dis scenario's handled in ucode */ 4822 uint32 he_ulmu_data_disable; /* number of UL MU data disable scenarios 4823 * handled in ucode 4824 */ 4825 uint32 rxheru_2x996T; 4826 } wl_he_cnt_wlc_v5_t; 4827 4828 #ifndef HE_COUNTERS_VERSION_ENABLED 4829 #define HE_COUNTERS_VERSION (HE_COUNTERS_V1) 4830 typedef wl_he_cnt_wlc_v1_t wl_he_cnt_wlc_t; 4831 #endif /* HE_COUNTERS_VERSION_ENABLED */ 4832 4833 /* he omi counters Version 1 */ 4834 #define HE_OMI_COUNTERS_V1 (1) 4835 typedef struct wl_he_omi_cnt_wlc_v1 { 4836 uint16 version; 4837 uint16 len; 4838 uint32 he_omitx_sched; /* Count for total number of OMIs scheduled */ 4839 uint32 he_omitx_success; /* Count for OMI Tx success */ 4840 uint32 he_omitx_retries; /* Count for OMI retries as TxDone not set */ 4841 uint32 he_omitx_dur; /* Accumulated duration of OMI completion time */ 4842 uint32 he_omitx_ulmucfg; /* count for UL MU enable/disable change req */ 4843 uint32 he_omitx_ulmucfg_ack; /* count for UL MU enable/disable req txed successfully */ 4844 uint32 he_omitx_txnsts; /* count for Txnsts change req */ 4845 uint32 he_omitx_txnsts_ack; /* count for Txnsts change req txed successfully */ 4846 uint32 he_omitx_rxnss; /* count for Rxnss change req */ 4847 uint32 he_omitx_rxnss_ack; /* count for Rxnss change req txed successfully */ 4848 uint32 he_omitx_bw; /* count for BW change req */ 4849 uint32 he_omitx_bw_ack; /* count for BW change req txed successfully */ 4850 uint32 he_omitx_ersudis; /* count for ER SU enable/disable req */ 4851 uint32 he_omitx_ersudis_ack; /* count for ER SU enable/disable req txed successfully */ 4852 uint32 he_omitx_dlmursdrec; /* count for Resound recommendation change req */ 4853 uint32 he_omitx_dlmursdrec_ack; /* count for Resound recommendation req txed successfully */ 4854 } wl_he_omi_cnt_wlc_v1_t; 4855 4856 /* WL_IFSTATS_XTLV_WL_SLICE_TXBF */ 4857 /* beamforming counters version 1 */ 4858 #define TXBF_ECOUNTERS_V1 (1u) 4859 #define WL_TXBF_CNT_ARRAY_SZ (8u) 4860 typedef struct wl_txbf_ecounters_v1 { 4861 uint16 version; 4862 uint16 len; 4863 /* transmit beamforming stats */ 4864 uint16 txndpa; /* null data packet announcements */ 4865 uint16 txndp; /* null data packets */ 4866 uint16 txbfpoll; /* beamforming report polls */ 4867 uint16 txsf; /* subframes */ 4868 uint16 txcwrts; /* contention window rts */ 4869 uint16 txcwcts; /* contention window cts */ 4870 uint16 txbfm; 4871 /* receive beamforming stats */ 4872 uint16 rxndpa_u; /* unicast NDPAs */ 4873 uint16 rxndpa_m; /* multicast NDPAs */ 4874 uint16 rxbfpoll; /* unicast bf-polls */ 4875 uint16 bferpt; /* beamforming reports */ 4876 uint16 rxsf; 4877 uint16 rxcwrts; 4878 uint16 rxcwcts; 4879 uint16 rxtrig_bfpoll; 4880 uint16 unused_uint16; /* pad */ 4881 /* sounding stats - interval capture */ 4882 uint16 rxnontb_sound[WL_TXBF_CNT_ARRAY_SZ]; /* non-TB sounding for last 8 captures */ 4883 uint16 rxtb_sound[WL_TXBF_CNT_ARRAY_SZ]; /* TB sounding count for last 8 captures */ 4884 uint32 cap_dur_ms[WL_TXBF_CNT_ARRAY_SZ]; /* last 8 capture durations (in ms) */ 4885 uint32 cap_last_ts; /* timestamp of last sample capture */ 4886 } wl_txbf_ecounters_v1_t; 4887 4888 /* security vulnerabilities counters */ 4889 typedef struct { 4890 uint32 ie_unknown; /* number of unknown IEs */ 4891 uint32 ie_invalid_length; /* number of IEs with invalid length */ 4892 uint32 ie_invalid_data; /* number of IEs with invalid data */ 4893 uint32 ipv6_invalid_length; /* number of IPv6 packets with invalid payload length */ 4894 } wl_secvln_cnt_t; 4895 4896 /* Reinit reasons - do not put anything else other than reinit reasons here */ 4897 /* LEGACY STRUCTURE, DO NO MODIFY, SEE reinit_rsns_v1_t and further versions */ 4898 typedef struct { 4899 uint32 rsn[WL_REINIT_RC_LAST]; 4900 } reinit_rsns_t; 4901 4902 typedef struct { 4903 uint16 version; 4904 uint16 len; 4905 uint32 rsn[WL_REINIT_RC_LAST_V2 + 1u]; /* Note:WL_REINIT_RC_LAST_V2 is last value */ 4906 } reinit_rsns_v2_t; 4907 4908 /* MACXSTAT counters for ucodex (corerev >= 64) */ 4909 typedef struct { 4910 uint32 macxsusp; 4911 uint32 m2vmsg; 4912 uint32 v2mmsg; 4913 uint32 mboxout; 4914 uint32 musnd; 4915 uint32 sfb2v; 4916 } wl_cnt_ge64mcxst_v1_t; 4917 4918 /** MACSTAT counters for ucode (corerev >= 40) */ 4919 typedef struct { 4920 /* MAC counters: 32-bit version of d11.h's macstat_t */ 4921 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 4922 * Control Management (includes retransmissions) 4923 */ 4924 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 4925 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 4926 uint32 txackfrm; /**< number of ACK frames sent out */ 4927 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 4928 uint32 txbcnfrm; /**< beacons transmitted */ 4929 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 4930 uint32 txampdu; /**< number of AMPDUs transmitted */ 4931 uint32 txmpdu; /**< number of MPDUs transmitted */ 4932 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 4933 * or BCN) 4934 */ 4935 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 4936 * driver enqueued frames 4937 */ 4938 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 4939 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 4940 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 4941 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 4942 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 4943 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 4944 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 4945 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 4946 uint32 rxstrt; /**< Number of received frames with a good PLCP 4947 * (i.e. passing parity check) 4948 */ 4949 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 4950 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 4951 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 4952 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 4953 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 4954 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 4955 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 4956 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 4957 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 4958 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 4959 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 4960 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 4961 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 4962 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 4963 * (unlikely to see these) 4964 */ 4965 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 4966 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 4967 * other BSS (WDS FRAME) 4968 */ 4969 uint32 rxbeaconobss; /**< beacons received from other BSS */ 4970 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 4971 * expecting a response 4972 */ 4973 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 4974 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 4975 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 4976 uint32 rxf1ovfl; /**< number of receive fifo 1 overflows */ 4977 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 4978 uint32 missbcn_dbg; /**< number of beacon missed to receive */ 4979 uint32 pmqovfl; /**< number of PMQ overflows */ 4980 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 4981 * the PRQ fifo 4982 */ 4983 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 4984 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 4985 * not get ACK 4986 */ 4987 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 4988 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 4989 * fifo because a probe response could not be sent out within 4990 * the time limit defined in M_PRS_MAXTIME 4991 */ 4992 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 4993 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 4994 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 4995 uint32 rxback; /**< blockack rxcnt */ 4996 uint32 txback; /**< blockack txcnt */ 4997 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 4998 uint32 rxdrop20s; /**< drop secondary cnt */ 4999 uint32 rxtoolate; /**< receive too late */ 5000 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 5001 /* All counter variables have to be of uint32. */ 5002 } wl_cnt_ge40mcst_v1_t; 5003 5004 /** MACSTAT counters for ucode (corerev < 40) */ 5005 typedef struct { 5006 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5007 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5008 * Control Management (includes retransmissions) 5009 */ 5010 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5011 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5012 uint32 txackfrm; /**< number of ACK frames sent out */ 5013 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 5014 uint32 txbcnfrm; /**< beacons transmitted */ 5015 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5016 uint32 txampdu; /**< number of AMPDUs transmitted */ 5017 uint32 txmpdu; /**< number of MPDUs transmitted */ 5018 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5019 * or BCN) 5020 */ 5021 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5022 * driver enqueued frames 5023 */ 5024 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5025 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5026 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5027 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5028 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 5029 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5030 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5031 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5032 uint32 rxstrt; /**< Number of received frames with a good PLCP 5033 * (i.e. passing parity check) 5034 */ 5035 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 5036 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 5037 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 5038 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5039 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5040 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5041 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 5042 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 5043 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 5044 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5045 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5046 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 5047 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 5048 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 5049 * (unlikely to see these) 5050 */ 5051 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5052 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 5053 * other BSS (WDS FRAME) 5054 */ 5055 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5056 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 5057 * expecting a response 5058 */ 5059 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5060 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 5061 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 5062 uint32 dbgoff46; /**< BTCX protection failure count, 5063 * getting RX antenna in PHY DEBUG, 5064 * PR84273 timeout count 5065 */ 5066 uint32 dbgoff47; /**< BTCX preemption failure count, 5067 * getting RX antenna in PHY DEBUG, 5068 * PR84273 reset CCA count, 5069 * RATEENGDBG 5070 */ 5071 uint32 dbgoff48; /**< Used for counting txstatus queue overflow (corerev <= 4) */ 5072 uint32 pmqovfl; /**< number of PMQ overflows */ 5073 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 5074 * the PRQ fifo 5075 */ 5076 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5077 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5078 * not get ACK 5079 */ 5080 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5081 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 5082 * fifo because a probe response could not be sent out within 5083 * the time limit defined in M_PRS_MAXTIME 5084 */ 5085 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 5086 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 5087 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 5088 uint32 rxback; /**< blockack rxcnt */ 5089 uint32 txback; /**< blockack txcnt */ 5090 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5091 uint32 phywatch; /**< number of phywatchdog to kill any pending transmissions. 5092 * (PR 38187 corerev == 11) 5093 */ 5094 uint32 rxtoolate; /**< receive too late */ 5095 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 5096 /* All counter variables have to be of uint32. */ 5097 } wl_cnt_lt40mcst_v1_t; 5098 5099 /** MACSTAT counters for ucode (corerev >= 80) */ 5100 typedef struct { 5101 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5102 /* Start of PSM2HOST stats(72) block */ 5103 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5104 * Control Management (includes retransmissions) 5105 */ 5106 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5107 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5108 uint32 txackfrm; /**< number of ACK frames sent out */ 5109 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 5110 uint32 txbcnfrm; /**< beacons transmitted */ 5111 uint32 txampdu; /**< number of AMPDUs transmitted */ 5112 uint32 txmpdu; /**< number of MPDUs transmitted */ 5113 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5114 * or BCN) 5115 */ 5116 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5117 * driver enqueued frames 5118 */ 5119 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5120 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5121 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5122 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5123 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 5124 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5125 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5126 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5127 uint32 rxstrt; /**< Number of received frames with a good PLCP 5128 * (i.e. passing parity check) 5129 */ 5130 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 5131 uint32 rxmgucastmbss; /**< number of received mgmt frames with good FCS and matching RA */ 5132 uint32 rxctlucast; /**< number of received CNTRL frames with good FCS and matching RA */ 5133 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5134 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5135 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5136 uint32 rxdtocast; /**< number of received DATA frames (good FCS and not matching RA) */ 5137 uint32 rxmgocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 5138 uint32 rxctlocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 5139 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5140 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5141 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 5142 uint32 rxmgmcast; /**< number of RX Management multicast frames received by the MAC */ 5143 uint32 rxctlmcast; /**< number of RX Control multicast frames received by the MAC 5144 * (unlikely to see these) 5145 */ 5146 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5147 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 5148 * other BSS (WDS FRAME) 5149 */ 5150 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5151 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 5152 * expecting a response 5153 */ 5154 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5155 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 5156 uint32 missbcn_dbg; /**< number of beacon missed to receive */ 5157 uint32 pmqovfl; /**< number of PMQ overflows */ 5158 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 5159 * the PRQ fifo 5160 */ 5161 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5162 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5163 * not get ACK 5164 */ 5165 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5166 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 5167 * fifo because a probe response could not be sent out within 5168 * the time limit defined in M_PRS_MAXTIME 5169 */ 5170 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 5171 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 5172 uint32 txinrtstxop; /**< number of data frame transmissions during rts txop */ 5173 uint32 rxback; /**< blockack rxcnt */ 5174 uint32 txback; /**< blockack txcnt */ 5175 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5176 uint32 rxdrop20s; /**< drop secondary cnt */ 5177 uint32 rxtoolate; /**< receive too late */ 5178 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 5179 uint32 rxtrig_myaid; /* New counters added in corerev 80 */ 5180 uint32 rxtrig_rand; 5181 uint32 goodfcs; 5182 uint32 colormiss; 5183 uint32 txmampdu; 5184 uint32 rxmtidback; 5185 uint32 rxmstaback; 5186 uint32 txfrag; 5187 /* End of PSM2HOST stats block */ 5188 /* start of rxerror overflow counter(24) block which are modified/added in corerev 80 */ 5189 uint32 phyovfl; 5190 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 5191 uint32 rxf1ovfl; /**< number of receive fifo 1 overflows */ 5192 uint32 lenfovfl; 5193 uint32 weppeof; 5194 uint32 badplcp; 5195 uint32 msduthresh; 5196 uint32 strmeof; 5197 uint32 stsfifofull; 5198 uint32 stsfifoerr; 5199 uint32 PAD[6]; 5200 uint32 rxerr_stat; 5201 uint32 ctx_fifo_full; 5202 uint32 PAD0[9]; 5203 uint32 ctmode_ufc_cnt; 5204 uint32 PAD1[28]; /* PAD added for counter elements to be added soon */ 5205 } wl_cnt_ge80mcst_v1_t; 5206 5207 typedef struct { 5208 uint32 fifocount; 5209 uint32 txfunfl[]; 5210 } wl_cnt_ge80_txfunfl_v1_t; 5211 5212 /** MACSTAT counters for "wl counter" version <= 10 */ 5213 /* With ucode before its macstat cnts cleaned up */ 5214 typedef struct { 5215 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5216 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5217 * Control Management (includes retransmissions) 5218 */ 5219 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5220 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5221 uint32 txackfrm; /**< number of ACK frames sent out */ 5222 uint32 txdnlfrm; /**< number of Null-Data transmission generated from template */ 5223 uint32 txbcnfrm; /**< beacons transmitted */ 5224 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5225 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 5226 uint32 PAD0; /**< number of MPDUs transmitted */ 5227 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5228 * or BCN) 5229 */ 5230 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5231 * driver enqueued frames 5232 */ 5233 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5234 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5235 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5236 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5237 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 5238 * data/control/management 5239 */ 5240 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5241 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5242 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5243 uint32 rxstrt; /**< Number of received frames with a good PLCP 5244 * (i.e. passing parity check) 5245 */ 5246 uint32 rxdfrmucastmbss; /* number of received DATA frames with good FCS and matching RA */ 5247 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 5248 uint32 rxcfrmucast; /**< number of received CNTRL frames with good FCS and matching RA */ 5249 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5250 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5251 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5252 uint32 rxdfrmocast; /**< number of received DATA frames (good FCS and not matching RA) */ 5253 uint32 rxmfrmocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 5254 uint32 rxcfrmocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 5255 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5256 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5257 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 5258 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 5259 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 5260 * (unlikely to see these) 5261 */ 5262 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5263 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 5264 * other BSS (WDS FRAME) 5265 */ 5266 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5267 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 5268 * expecting a response 5269 */ 5270 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5271 uint32 PAD1; 5272 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 5273 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 5274 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 5275 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 5276 uint32 pmqovfl; /**< number of PMQ overflows */ 5277 uint32 rxcgprqfrm; /**< number of received Probe requests that made it into 5278 * the PRQ fifo 5279 */ 5280 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5281 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5282 * not get ACK 5283 */ 5284 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5285 uint32 prs_timeout; /**< number of probe requests that were dropped from the PRQ 5286 * fifo because a probe response could not be sent out within 5287 * the time limit defined in M_PRS_MAXTIME 5288 */ 5289 uint32 rxnack; /**< obsolete */ 5290 uint32 frmscons; /**< obsolete */ 5291 uint32 txnack; /**< obsolete */ 5292 uint32 rxback; /**< blockack rxcnt */ 5293 uint32 txback; /**< blockack txcnt */ 5294 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5295 uint32 rxdrop20s; /**< drop secondary cnt */ 5296 uint32 rxtoolate; /**< receive too late */ 5297 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 5298 /* All counter variables have to be of uint32. */ 5299 } wl_cnt_v_le10_mcst_t; 5300 5301 #define MAX_RX_FIFO 3 5302 #define WL_RXFIFO_CNT_VERSION 1 /* current version of wl_rxfifo_cnt_t */ 5303 typedef struct { 5304 /* Counters for frames received from rx fifos */ 5305 uint16 version; 5306 uint16 length; /* length of entire structure */ 5307 uint32 rxf_data[MAX_RX_FIFO]; /* data frames from rx fifo */ 5308 uint32 rxf_mgmtctl[MAX_RX_FIFO]; /* mgmt/ctl frames from rx fifo */ 5309 } wl_rxfifo_cnt_t; 5310 5311 typedef struct { 5312 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 5313 uint16 length; /**< length of entire structure */ 5314 5315 /* transmit stat counters */ 5316 uint32 txframe; /**< tx data frames */ 5317 uint32 txbyte; /**< tx data bytes */ 5318 uint32 txretrans; /**< tx mac retransmits */ 5319 uint32 txerror; /**< tx data errors (derived: sum of others) */ 5320 uint32 txctl; /**< tx management frames */ 5321 uint32 txprshort; /**< tx short preamble frames */ 5322 uint32 txserr; /**< tx status errors */ 5323 uint32 txnobuf; /**< tx out of buffers errors */ 5324 uint32 txnoassoc; /**< tx discard because we're not associated */ 5325 uint32 txrunt; /**< tx runt frames */ 5326 uint32 txchit; /**< tx header cache hit (fastpath) */ 5327 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 5328 5329 /* transmit chip error counters */ 5330 uint32 txuflo; /**< tx fifo underflows */ 5331 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 5332 uint32 txphycrs; /**< PR8861/8963 counter */ 5333 5334 /* receive stat counters */ 5335 uint32 rxframe; /**< rx data frames */ 5336 uint32 rxbyte; /**< rx data bytes */ 5337 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 5338 uint32 rxctl; /**< rx management frames */ 5339 uint32 rxnobuf; /**< rx out of buffers errors */ 5340 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 5341 uint32 rxbadds; /**< rx bad DS errors */ 5342 uint32 rxbadcm; /**< rx bad control or management frames */ 5343 uint32 rxfragerr; /**< rx fragmentation errors */ 5344 uint32 rxrunt; /**< rx runt frames */ 5345 uint32 rxgiant; /**< rx giant frames */ 5346 uint32 rxnoscb; /**< rx no scb error */ 5347 uint32 rxbadproto; /**< rx invalid frames */ 5348 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 5349 uint32 rxbadda; /**< rx frames tossed for invalid da */ 5350 uint32 rxfilter; /**< rx frames filtered out */ 5351 5352 /* receive chip error counters */ 5353 uint32 rxoflo; /**< rx fifo overflow errors */ 5354 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 5355 5356 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 5357 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 5358 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 5359 5360 /* misc counters */ 5361 uint32 dmade; /**< tx/rx dma descriptor errors */ 5362 uint32 dmada; /**< tx/rx dma data errors */ 5363 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 5364 uint32 reset; /**< reset count */ 5365 uint32 tbtt; /**< cnts the TBTT int's */ 5366 uint32 txdmawar; /**< # occurrences of PR15420 workaround */ 5367 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 5368 5369 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5370 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5371 * Control Management (includes retransmissions) 5372 */ 5373 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5374 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5375 uint32 txackfrm; /**< number of ACK frames sent out */ 5376 uint32 txdnlfrm; /**< Not used */ 5377 uint32 txbcnfrm; /**< beacons transmitted */ 5378 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5379 uint32 rxtoolate; /**< receive too late */ 5380 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 5381 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5382 * or BCN) 5383 */ 5384 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5385 * driver enqueued frames 5386 */ 5387 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5388 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5389 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 5390 * data/control/management 5391 */ 5392 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5393 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5394 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5395 uint32 rxstrt; /**< Number of received frames with a good PLCP 5396 * (i.e. passing parity check) 5397 */ 5398 uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ 5399 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 5400 uint32 rxcfrmucast; /**< number of received CNTRL frames with good FCS and matching RA */ 5401 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5402 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5403 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5404 uint32 rxdfrmocast; /**< number of received DATA frames (good FCS and not matching RA) */ 5405 uint32 rxmfrmocast; /**< number of received MGMT frames (good FCS and not matching RA) */ 5406 uint32 rxcfrmocast; /**< number of received CNTRL frame (good FCS and not matching RA) */ 5407 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5408 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5409 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 5410 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 5411 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 5412 * (unlikely to see these) 5413 */ 5414 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5415 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 5416 * other BSS (WDS FRAME) 5417 */ 5418 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5419 uint32 rxrsptmout; /**< Number of response timeouts for transmitted frames 5420 * expecting a response 5421 */ 5422 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5423 uint32 rxf0ovfl; /**< Number of receive fifo 0 overflows */ 5424 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 5425 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 5426 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 5427 uint32 pmqovfl; /**< Number of PMQ overflows */ 5428 uint32 rxcgprqfrm; /**< Number of received Probe requests that made it into 5429 * the PRQ fifo 5430 */ 5431 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5432 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5433 * not get ACK 5434 */ 5435 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5436 uint32 prs_timeout; /**< Number of probe requests that were dropped from the PRQ 5437 * fifo because a probe response could not be sent out within 5438 * the time limit defined in M_PRS_MAXTIME 5439 */ 5440 uint32 rxnack; /**< obsolete */ 5441 uint32 frmscons; /**< obsolete */ 5442 uint32 txnack; /**< obsolete */ 5443 uint32 rxback; /**< blockack rxcnt */ 5444 uint32 txback; /**< blockack txcnt */ 5445 5446 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 5447 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 5448 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 5449 uint32 txfail; /**< dot11FailedCount */ 5450 uint32 txretry; /**< dot11RetryCount */ 5451 uint32 txretrie; /**< dot11MultipleRetryCount */ 5452 uint32 rxdup; /**< dot11FrameduplicateCount */ 5453 uint32 txrts; /**< dot11RTSSuccessCount */ 5454 uint32 txnocts; /**< dot11RTSFailureCount */ 5455 uint32 txnoack; /**< dot11ACKFailureCount */ 5456 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 5457 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 5458 uint32 rxcrc; /**< dot11FCSErrorCount */ 5459 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 5460 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 5461 5462 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5463 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 5464 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 5465 uint32 tkipreplay; /**< TKIPReplays */ 5466 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 5467 uint32 ccmpreplay; /**< CCMPReplays */ 5468 uint32 ccmpundec; /**< CCMPDecryptErrors */ 5469 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 5470 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 5471 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 5472 uint32 decsuccess; /**< DecryptSuccessCount */ 5473 uint32 tkipicverr; /**< TKIPICVErrorCount */ 5474 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 5475 5476 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 5477 uint32 psmwds; /**< Count PSM watchdogs */ 5478 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 5479 5480 /* MBSS counters, AP only */ 5481 uint32 prq_entries_handled; /**< PRQ entries read in */ 5482 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 5483 uint32 prq_bad_entries; /**< which could not be translated to info */ 5484 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 5485 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 5486 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 5487 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 5488 5489 /* per-rate receive stat counters */ 5490 uint32 rx1mbps; /**< packets rx at 1Mbps */ 5491 uint32 rx2mbps; /**< packets rx at 2Mbps */ 5492 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 5493 uint32 rx6mbps; /**< packets rx at 6Mbps */ 5494 uint32 rx9mbps; /**< packets rx at 9Mbps */ 5495 uint32 rx11mbps; /**< packets rx at 11Mbps */ 5496 uint32 rx12mbps; /**< packets rx at 12Mbps */ 5497 uint32 rx18mbps; /**< packets rx at 18Mbps */ 5498 uint32 rx24mbps; /**< packets rx at 24Mbps */ 5499 uint32 rx36mbps; /**< packets rx at 36Mbps */ 5500 uint32 rx48mbps; /**< packets rx at 48Mbps */ 5501 uint32 rx54mbps; /**< packets rx at 54Mbps */ 5502 uint32 rx108mbps; /**< packets rx at 108mbps */ 5503 uint32 rx162mbps; /**< packets rx at 162mbps */ 5504 uint32 rx216mbps; /**< packets rx at 216 mbps */ 5505 uint32 rx270mbps; /**< packets rx at 270 mbps */ 5506 uint32 rx324mbps; /**< packets rx at 324 mbps */ 5507 uint32 rx378mbps; /**< packets rx at 378 mbps */ 5508 uint32 rx432mbps; /**< packets rx at 432 mbps */ 5509 uint32 rx486mbps; /**< packets rx at 486 mbps */ 5510 uint32 rx540mbps; /**< packets rx at 540 mbps */ 5511 5512 /* pkteng rx frame stats */ 5513 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 5514 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 5515 5516 uint32 rfdisable; /**< count of radio disables */ 5517 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 5518 uint32 bphy_badplcp; 5519 5520 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 5521 5522 uint32 txmpdu_sgi; /**< count for sgi transmit */ 5523 uint32 rxmpdu_sgi; /**< count for sgi received */ 5524 uint32 txmpdu_stbc; /**< count for stbc transmit */ 5525 uint32 rxmpdu_stbc; /**< count for stbc received */ 5526 5527 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 5528 5529 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5530 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 5531 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 5532 uint32 tkipreplay_mcst; /**< TKIPReplays */ 5533 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 5534 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 5535 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 5536 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 5537 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 5538 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 5539 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 5540 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 5541 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 5542 5543 uint32 dma_hang; /**< count for dma hang */ 5544 uint32 reinit; /**< count for reinit */ 5545 5546 uint32 pstatxucast; /**< count of ucast frames xmitted on all psta assoc */ 5547 uint32 pstatxnoassoc; /**< count of txnoassoc frames xmitted on all psta assoc */ 5548 uint32 pstarxucast; /**< count of ucast frames received on all psta assoc */ 5549 uint32 pstarxbcmc; /**< count of bcmc frames received on all psta */ 5550 uint32 pstatxbcmc; /**< count of bcmc frames transmitted on all psta */ 5551 5552 uint32 cso_passthrough; /**< hw cso required but passthrough */ 5553 uint32 cso_normal; /**< hw cso hdr for normal process */ 5554 uint32 chained; /**< number of frames chained */ 5555 uint32 chainedsz1; /**< number of chain size 1 frames */ 5556 uint32 unchained; /**< number of frames not chained */ 5557 uint32 maxchainsz; /**< max chain size so far */ 5558 uint32 currchainsz; /**< current chain size */ 5559 uint32 rxdrop20s; /**< drop secondary cnt */ 5560 uint32 pciereset; /**< Secondary Bus Reset issued by driver */ 5561 uint32 cfgrestore; /**< configspace restore by driver */ 5562 uint32 reinitreason[NREINITREASONCOUNT]; /**< reinitreason counters; 0: Unknown reason */ 5563 uint32 rxrtry; /**< num of received packets with retry bit on */ 5564 uint32 txmpdu; /**< macstat cnt only valid in ver 11. number of MPDUs txed. */ 5565 uint32 rxnodelim; /**< macstat cnt only valid in ver 11. 5566 * number of occasions that no valid delimiter is detected 5567 * by ampdu parser. 5568 */ 5569 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 5570 5571 /* detailed control/management frames */ 5572 uint32 txbar; /**< Number of TX BAR */ 5573 uint32 rxbar; /**< Number of RX BAR */ 5574 uint32 txpspoll; /**< Number of TX PS-poll */ 5575 uint32 rxpspoll; /**< Number of RX PS-poll */ 5576 uint32 txnull; /**< Number of TX NULL_DATA */ 5577 uint32 rxnull; /**< Number of RX NULL_DATA */ 5578 uint32 txqosnull; /**< Number of TX NULL_QoSDATA */ 5579 uint32 rxqosnull; /**< Number of RX NULL_QoSDATA */ 5580 uint32 txassocreq; /**< Number of TX ASSOC request */ 5581 uint32 rxassocreq; /**< Number of RX ASSOC request */ 5582 uint32 txreassocreq; /**< Number of TX REASSOC request */ 5583 uint32 rxreassocreq; /**< Number of RX REASSOC request */ 5584 uint32 txdisassoc; /**< Number of TX DISASSOC */ 5585 uint32 rxdisassoc; /**< Number of RX DISASSOC */ 5586 uint32 txassocrsp; /**< Number of TX ASSOC response */ 5587 uint32 rxassocrsp; /**< Number of RX ASSOC response */ 5588 uint32 txreassocrsp; /**< Number of TX REASSOC response */ 5589 uint32 rxreassocrsp; /**< Number of RX REASSOC response */ 5590 uint32 txauth; /**< Number of TX AUTH */ 5591 uint32 rxauth; /**< Number of RX AUTH */ 5592 uint32 txdeauth; /**< Number of TX DEAUTH */ 5593 uint32 rxdeauth; /**< Number of RX DEAUTH */ 5594 uint32 txprobereq; /**< Number of TX probe request */ 5595 uint32 rxprobereq; /**< Number of RX probe request */ 5596 uint32 txprobersp; /**< Number of TX probe response */ 5597 uint32 rxprobersp; /**< Number of RX probe response */ 5598 uint32 txaction; /**< Number of TX action frame */ 5599 uint32 rxaction; /**< Number of RX action frame */ 5600 uint32 ampdu_wds; /**< Number of AMPDU watchdogs */ 5601 uint32 txlost; /**< Number of lost packets reported in txs */ 5602 uint32 txdatamcast; /**< Number of TX multicast data packets */ 5603 uint32 txdatabcast; /**< Number of TX broadcast data packets */ 5604 uint32 txbcast; /* Broadcast TransmittedFrameCount */ 5605 uint32 txdropped; /* tx dropped pkts */ 5606 uint32 rxbcast; /* BroadcastReceivedFrameCount */ 5607 uint32 rxdropped; /* rx dropped pkts (derived: sum of others) */ 5608 5609 /* This structure is deprecated and used only for ver <= 11. 5610 * All counter variables have to be of uint32. 5611 */ 5612 } wl_cnt_ver_11_t; 5613 5614 typedef struct { 5615 uint16 version; /* see definition of WL_CNT_T_VERSION */ 5616 uint16 length; /* length of entire structure */ 5617 5618 /* transmit stat counters */ 5619 uint32 txframe; /* tx data frames */ 5620 uint32 txbyte; /* tx data bytes */ 5621 uint32 txretrans; /* tx mac retransmits */ 5622 uint32 txerror; /* tx data errors (derived: sum of others) */ 5623 uint32 txctl; /* tx management frames */ 5624 uint32 txprshort; /* tx short preamble frames */ 5625 uint32 txserr; /* tx status errors */ 5626 uint32 txnobuf; /* tx out of buffers errors */ 5627 uint32 txnoassoc; /* tx discard because we're not associated */ 5628 uint32 txrunt; /* tx runt frames */ 5629 uint32 txchit; /* tx header cache hit (fastpath) */ 5630 uint32 txcmiss; /* tx header cache miss (slowpath) */ 5631 5632 /* transmit chip error counters */ 5633 uint32 txuflo; /* tx fifo underflows */ 5634 uint32 txphyerr; /* tx phy errors (indicated in tx status) */ 5635 uint32 txphycrs; /* PR8861/8963 counter */ 5636 5637 /* receive stat counters */ 5638 uint32 rxframe; /* rx data frames */ 5639 uint32 rxbyte; /* rx data bytes */ 5640 uint32 rxerror; /* rx data errors (derived: sum of others) */ 5641 uint32 rxctl; /* rx management frames */ 5642 uint32 rxnobuf; /* rx out of buffers errors */ 5643 uint32 rxnondata; /* rx non data frames in the data channel errors */ 5644 uint32 rxbadds; /* rx bad DS errors */ 5645 uint32 rxbadcm; /* rx bad control or management frames */ 5646 uint32 rxfragerr; /* rx fragmentation errors */ 5647 uint32 rxrunt; /* rx runt frames */ 5648 uint32 rxgiant; /* rx giant frames */ 5649 uint32 rxnoscb; /* rx no scb error */ 5650 uint32 rxbadproto; /* rx invalid frames */ 5651 uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ 5652 uint32 rxbadda; /* rx frames tossed for invalid da */ 5653 uint32 rxfilter; /* rx frames filtered out */ 5654 5655 /* receive chip error counters */ 5656 uint32 rxoflo; /* rx fifo overflow errors */ 5657 uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ 5658 5659 uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ 5660 uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ 5661 uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ 5662 5663 /* misc counters */ 5664 uint32 dmade; /* tx/rx dma descriptor errors */ 5665 uint32 dmada; /* tx/rx dma data errors */ 5666 uint32 dmape; /* tx/rx dma descriptor protocol errors */ 5667 uint32 reset; /* reset count */ 5668 uint32 tbtt; /* cnts the TBTT int's */ 5669 uint32 txdmawar; /* # occurrences of PR15420 workaround */ 5670 uint32 pkt_callback_reg_fail; /* callbacks register failure */ 5671 5672 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5673 uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, 5674 * Control Management (includes retransmissions) 5675 */ 5676 uint32 txrtsfrm; /* number of RTS sent out by the MAC */ 5677 uint32 txctsfrm; /* number of CTS sent out by the MAC */ 5678 uint32 txackfrm; /* number of ACK frames sent out */ 5679 uint32 txdnlfrm; /* Not used */ 5680 uint32 txbcnfrm; /* beacons transmitted */ 5681 uint32 txfunfl[8]; /* per-fifo tx underflows */ 5682 uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS 5683 * or BCN) 5684 */ 5685 uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for 5686 * driver enqueued frames 5687 */ 5688 uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ 5689 uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ 5690 uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not 5691 * data/control/management 5692 */ 5693 uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ 5694 uint32 rxbadplcp; /* parity check of the PLCP header failed */ 5695 uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ 5696 uint32 rxstrt; /* Number of received frames with a good PLCP 5697 * (i.e. passing parity check) 5698 */ 5699 uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ 5700 uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ 5701 uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ 5702 uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ 5703 uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ 5704 uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ 5705 uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ 5706 uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ 5707 uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ 5708 uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ 5709 uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ 5710 uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ 5711 uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ 5712 uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC 5713 * (unlikely to see these) 5714 */ 5715 uint32 rxbeaconmbss; /* beacons received from member of BSS */ 5716 uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from 5717 * other BSS (WDS FRAME) 5718 */ 5719 uint32 rxbeaconobss; /* beacons received from other BSS */ 5720 uint32 rxrsptmout; /* Number of response timeouts for transmitted frames 5721 * expecting a response 5722 */ 5723 uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ 5724 uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ 5725 uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ 5726 uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ 5727 uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ 5728 uint32 pmqovfl; /* Number of PMQ overflows */ 5729 uint32 rxcgprqfrm; /* Number of received Probe requests that made it into 5730 * the PRQ fifo 5731 */ 5732 uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ 5733 uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did 5734 * not get ACK 5735 */ 5736 uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ 5737 uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ 5738 * fifo because a probe response could not be sent out within 5739 * the time limit defined in M_PRS_MAXTIME 5740 */ 5741 uint32 rxnack; /* obsolete */ 5742 uint32 frmscons; /* obsolete */ 5743 uint32 txnack; /* obsolete */ 5744 uint32 txglitch_nack; /* obsolete */ 5745 uint32 txburst; /* obsolete */ 5746 5747 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 5748 uint32 txfrag; /* dot11TransmittedFragmentCount */ 5749 uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ 5750 uint32 txfail; /* dot11FailedCount */ 5751 uint32 txretry; /* dot11RetryCount */ 5752 uint32 txretrie; /* dot11MultipleRetryCount */ 5753 uint32 rxdup; /* dot11FrameduplicateCount */ 5754 uint32 txrts; /* dot11RTSSuccessCount */ 5755 uint32 txnocts; /* dot11RTSFailureCount */ 5756 uint32 txnoack; /* dot11ACKFailureCount */ 5757 uint32 rxfrag; /* dot11ReceivedFragmentCount */ 5758 uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ 5759 uint32 rxcrc; /* dot11FCSErrorCount */ 5760 uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ 5761 uint32 rxundec; /* dot11WEPUndecryptableCount */ 5762 5763 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5764 uint32 tkipmicfaill; /* TKIPLocalMICFailures */ 5765 uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ 5766 uint32 tkipreplay; /* TKIPReplays */ 5767 uint32 ccmpfmterr; /* CCMPFormatErrors */ 5768 uint32 ccmpreplay; /* CCMPReplays */ 5769 uint32 ccmpundec; /* CCMPDecryptErrors */ 5770 uint32 fourwayfail; /* FourWayHandshakeFailures */ 5771 uint32 wepundec; /* dot11WEPUndecryptableCount */ 5772 uint32 wepicverr; /* dot11WEPICVErrorCount */ 5773 uint32 decsuccess; /* DecryptSuccessCount */ 5774 uint32 tkipicverr; /* TKIPICVErrorCount */ 5775 uint32 wepexcluded; /* dot11WEPExcludedCount */ 5776 5777 uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ 5778 uint32 psmwds; /* Count PSM watchdogs */ 5779 uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ 5780 5781 /* MBSS counters, AP only */ 5782 uint32 prq_entries_handled; /* PRQ entries read in */ 5783 uint32 prq_undirected_entries; /* which were bcast bss & ssid */ 5784 uint32 prq_bad_entries; /* which could not be translated to info */ 5785 uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ 5786 uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ 5787 uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ 5788 uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ 5789 5790 /* per-rate receive stat counters */ 5791 uint32 rx1mbps; /* packets rx at 1Mbps */ 5792 uint32 rx2mbps; /* packets rx at 2Mbps */ 5793 uint32 rx5mbps5; /* packets rx at 5.5Mbps */ 5794 uint32 rx6mbps; /* packets rx at 6Mbps */ 5795 uint32 rx9mbps; /* packets rx at 9Mbps */ 5796 uint32 rx11mbps; /* packets rx at 11Mbps */ 5797 uint32 rx12mbps; /* packets rx at 12Mbps */ 5798 uint32 rx18mbps; /* packets rx at 18Mbps */ 5799 uint32 rx24mbps; /* packets rx at 24Mbps */ 5800 uint32 rx36mbps; /* packets rx at 36Mbps */ 5801 uint32 rx48mbps; /* packets rx at 48Mbps */ 5802 uint32 rx54mbps; /* packets rx at 54Mbps */ 5803 uint32 rx108mbps; /* packets rx at 108mbps */ 5804 uint32 rx162mbps; /* packets rx at 162mbps */ 5805 uint32 rx216mbps; /* packets rx at 216 mbps */ 5806 uint32 rx270mbps; /* packets rx at 270 mbps */ 5807 uint32 rx324mbps; /* packets rx at 324 mbps */ 5808 uint32 rx378mbps; /* packets rx at 378 mbps */ 5809 uint32 rx432mbps; /* packets rx at 432 mbps */ 5810 uint32 rx486mbps; /* packets rx at 486 mbps */ 5811 uint32 rx540mbps; /* packets rx at 540 mbps */ 5812 5813 /* pkteng rx frame stats */ 5814 uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ 5815 uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ 5816 5817 uint32 rfdisable; /* count of radio disables */ 5818 uint32 bphy_rxcrsglitch; /* PHY count of bphy glitches */ 5819 5820 uint32 txexptime; /* Tx frames suppressed due to timer expiration */ 5821 5822 uint32 txmpdu_sgi; /* count for sgi transmit */ 5823 uint32 rxmpdu_sgi; /* count for sgi received */ 5824 uint32 txmpdu_stbc; /* count for stbc transmit */ 5825 uint32 rxmpdu_stbc; /* count for stbc received */ 5826 5827 uint32 rxundec_mcst; /* dot11WEPUndecryptableCount */ 5828 5829 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 5830 uint32 tkipmicfaill_mcst; /* TKIPLocalMICFailures */ 5831 uint32 tkipcntrmsr_mcst; /* TKIPCounterMeasuresInvoked */ 5832 uint32 tkipreplay_mcst; /* TKIPReplays */ 5833 uint32 ccmpfmterr_mcst; /* CCMPFormatErrors */ 5834 uint32 ccmpreplay_mcst; /* CCMPReplays */ 5835 uint32 ccmpundec_mcst; /* CCMPDecryptErrors */ 5836 uint32 fourwayfail_mcst; /* FourWayHandshakeFailures */ 5837 uint32 wepundec_mcst; /* dot11WEPUndecryptableCount */ 5838 uint32 wepicverr_mcst; /* dot11WEPICVErrorCount */ 5839 uint32 decsuccess_mcst; /* DecryptSuccessCount */ 5840 uint32 tkipicverr_mcst; /* TKIPICVErrorCount */ 5841 uint32 wepexcluded_mcst; /* dot11WEPExcludedCount */ 5842 5843 uint32 dma_hang; /* count for stbc received */ 5844 uint32 rxrtry; /* number of packets with retry bit set to 1 */ 5845 } wl_cnt_ver_7_t; 5846 5847 typedef struct { 5848 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 5849 uint16 length; /**< length of entire structure */ 5850 5851 /* transmit stat counters */ 5852 uint32 txframe; /**< tx data frames */ 5853 uint32 txbyte; /**< tx data bytes */ 5854 uint32 txretrans; /**< tx mac retransmits */ 5855 uint32 txerror; /**< tx data errors (derived: sum of others) */ 5856 uint32 txctl; /**< tx management frames */ 5857 uint32 txprshort; /**< tx short preamble frames */ 5858 uint32 txserr; /**< tx status errors */ 5859 uint32 txnobuf; /**< tx out of buffers errors */ 5860 uint32 txnoassoc; /**< tx discard because we're not associated */ 5861 uint32 txrunt; /**< tx runt frames */ 5862 uint32 txchit; /**< tx header cache hit (fastpath) */ 5863 uint32 txcmiss; /**< tx header cache miss (slowpath) */ 5864 5865 /* transmit chip error counters */ 5866 uint32 txuflo; /**< tx fifo underflows */ 5867 uint32 txphyerr; /**< tx phy errors (indicated in tx status) */ 5868 uint32 txphycrs; /**< PR8861/8963 counter */ 5869 5870 /* receive stat counters */ 5871 uint32 rxframe; /**< rx data frames */ 5872 uint32 rxbyte; /**< rx data bytes */ 5873 uint32 rxerror; /**< rx data errors (derived: sum of others) */ 5874 uint32 rxctl; /**< rx management frames */ 5875 uint32 rxnobuf; /**< rx out of buffers errors */ 5876 uint32 rxnondata; /**< rx non data frames in the data channel errors */ 5877 uint32 rxbadds; /**< rx bad DS errors */ 5878 uint32 rxbadcm; /**< rx bad control or management frames */ 5879 uint32 rxfragerr; /**< rx fragmentation errors */ 5880 uint32 rxrunt; /**< rx runt frames */ 5881 uint32 rxgiant; /**< rx giant frames */ 5882 uint32 rxnoscb; /**< rx no scb error */ 5883 uint32 rxbadproto; /**< rx invalid frames */ 5884 uint32 rxbadsrcmac; /**< rx frames with Invalid Src Mac */ 5885 uint32 rxbadda; /**< rx frames tossed for invalid da */ 5886 uint32 rxfilter; /**< rx frames filtered out */ 5887 5888 /* receive chip error counters */ 5889 uint32 rxoflo; /**< rx fifo overflow errors */ 5890 uint32 rxuflo[NFIFO]; /**< rx dma descriptor underflow errors */ 5891 5892 uint32 d11cnt_txrts_off; /**< d11cnt txrts value when reset d11cnt */ 5893 uint32 d11cnt_rxcrc_off; /**< d11cnt rxcrc value when reset d11cnt */ 5894 uint32 d11cnt_txnocts_off; /**< d11cnt txnocts value when reset d11cnt */ 5895 5896 /* misc counters */ 5897 uint32 dmade; /**< tx/rx dma descriptor errors */ 5898 uint32 dmada; /**< tx/rx dma data errors */ 5899 uint32 dmape; /**< tx/rx dma descriptor protocol errors */ 5900 uint32 reset; /**< reset count */ 5901 uint32 tbtt; /**< cnts the TBTT int's */ 5902 uint32 txdmawar; /**< # occurrences of PR15420 workaround */ 5903 uint32 pkt_callback_reg_fail; /**< callbacks register failure */ 5904 5905 /* MAC counters: 32-bit version of d11.h's macstat_t */ 5906 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 5907 * Control Management (includes retransmissions) 5908 */ 5909 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 5910 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 5911 uint32 txackfrm; /**< number of ACK frames sent out */ 5912 uint32 txdnlfrm; /**< Not used */ 5913 uint32 txbcnfrm; /**< beacons transmitted */ 5914 uint32 txfunfl[6]; /**< per-fifo tx underflows */ 5915 uint32 rxtoolate; /**< receive too late */ 5916 uint32 txfbw; /**< transmit at fallback bw (dynamic bw) */ 5917 uint32 txtplunfl; /**< Template underflows (mac was too slow to transmit ACK/CTS 5918 * or BCN) 5919 */ 5920 uint32 txphyerror; /**< Transmit phy error, type of error is reported in tx-status for 5921 * driver enqueued frames 5922 */ 5923 uint32 rxfrmtoolong; /**< Received frame longer than legal limit (2346 bytes) */ 5924 uint32 rxfrmtooshrt; /**< Received frame did not contain enough bytes for its frame type */ 5925 uint32 rxinvmachdr; /**< Either the protocol version != 0 or frame type not 5926 * data/control/management 5927 */ 5928 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 5929 uint32 rxbadplcp; /**< parity check of the PLCP header failed */ 5930 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 5931 uint32 rxstrt; /**< Number of received frames with a good PLCP 5932 * (i.e. passing parity check) 5933 */ 5934 uint32 rxdfrmucastmbss; /**< # of received DATA frames with good FCS and matching RA */ 5935 uint32 rxmfrmucastmbss; /**< # of received mgmt frames with good FCS and matching RA */ 5936 uint32 rxcfrmucast; /**< # of received CNTRL frames with good FCS and matching RA */ 5937 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 5938 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 5939 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 5940 uint32 rxdfrmocast; /**< # of received DATA frames (good FCS and not matching RA) */ 5941 uint32 rxmfrmocast; /**< # of received MGMT frames (good FCS and not matching RA) */ 5942 uint32 rxcfrmocast; /**< # of received CNTRL frame (good FCS and not matching RA) */ 5943 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 5944 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 5945 uint32 rxdfrmmcast; /**< number of RX Data multicast frames received by the MAC */ 5946 uint32 rxmfrmmcast; /**< number of RX Management multicast frames received by the MAC */ 5947 uint32 rxcfrmmcast; /**< number of RX Control multicast frames received by the MAC 5948 * (unlikely to see these) 5949 */ 5950 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 5951 uint32 rxdfrmucastobss; /**< number of unicast frames addressed to the MAC from 5952 * other BSS (WDS FRAME) 5953 */ 5954 uint32 rxbeaconobss; /**< beacons received from other BSS */ 5955 uint32 rxrsptmout; /**< Number of response timeouts for transmitted frames 5956 * expecting a response 5957 */ 5958 uint32 bcntxcancl; /**< transmit beacons canceled due to receipt of beacon (IBSS) */ 5959 uint32 rxf0ovfl; /**< Number of receive fifo 0 overflows */ 5960 uint32 rxf1ovfl; /**< Number of receive fifo 1 overflows (obsolete) */ 5961 uint32 rxf2ovfl; /**< Number of receive fifo 2 overflows (obsolete) */ 5962 uint32 txsfovfl; /**< Number of transmit status fifo overflows (obsolete) */ 5963 uint32 pmqovfl; /**< Number of PMQ overflows */ 5964 uint32 rxcgprqfrm; /**< Number of received Probe requests that made it into 5965 * the PRQ fifo 5966 */ 5967 uint32 rxcgprsqovfl; /**< Rx Probe Request Que overflow in the AP */ 5968 uint32 txcgprsfail; /**< Tx Probe Response Fail. AP sent probe response but did 5969 * not get ACK 5970 */ 5971 uint32 txcgprssuc; /**< Tx Probe Response Success (ACK was received) */ 5972 uint32 prs_timeout; /**< Number of probe requests that were dropped from the PRQ 5973 * fifo because a probe response could not be sent out within 5974 * the time limit defined in M_PRS_MAXTIME 5975 */ 5976 uint32 rxnack; /**< Number of NACKS received (Afterburner) */ 5977 uint32 frmscons; /**< Number of frames completed without transmission because of an 5978 * Afterburner re-queue 5979 */ 5980 uint32 txnack; /**< obsolete */ 5981 uint32 rxback; /**< blockack rxcnt */ 5982 uint32 txback; /**< blockack txcnt */ 5983 5984 /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ 5985 uint32 txfrag; /**< dot11TransmittedFragmentCount */ 5986 uint32 txmulti; /**< dot11MulticastTransmittedFrameCount */ 5987 uint32 txfail; /**< dot11FailedCount */ 5988 uint32 txretry; /**< dot11RetryCount */ 5989 uint32 txretrie; /**< dot11MultipleRetryCount */ 5990 uint32 rxdup; /**< dot11FrameduplicateCount */ 5991 uint32 txrts; /**< dot11RTSSuccessCount */ 5992 uint32 txnocts; /**< dot11RTSFailureCount */ 5993 uint32 txnoack; /**< dot11ACKFailureCount */ 5994 uint32 rxfrag; /**< dot11ReceivedFragmentCount */ 5995 uint32 rxmulti; /**< dot11MulticastReceivedFrameCount */ 5996 uint32 rxcrc; /**< dot11FCSErrorCount */ 5997 uint32 txfrmsnt; /**< dot11TransmittedFrameCount (bogus MIB?) */ 5998 uint32 rxundec; /**< dot11WEPUndecryptableCount */ 5999 6000 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 6001 uint32 tkipmicfaill; /**< TKIPLocalMICFailures */ 6002 uint32 tkipcntrmsr; /**< TKIPCounterMeasuresInvoked */ 6003 uint32 tkipreplay; /**< TKIPReplays */ 6004 uint32 ccmpfmterr; /**< CCMPFormatErrors */ 6005 uint32 ccmpreplay; /**< CCMPReplays */ 6006 uint32 ccmpundec; /**< CCMPDecryptErrors */ 6007 uint32 fourwayfail; /**< FourWayHandshakeFailures */ 6008 uint32 wepundec; /**< dot11WEPUndecryptableCount */ 6009 uint32 wepicverr; /**< dot11WEPICVErrorCount */ 6010 uint32 decsuccess; /**< DecryptSuccessCount */ 6011 uint32 tkipicverr; /**< TKIPICVErrorCount */ 6012 uint32 wepexcluded; /**< dot11WEPExcludedCount */ 6013 6014 uint32 rxundec_mcst; /**< dot11WEPUndecryptableCount */ 6015 6016 /* WPA2 counters (see rxundec for DecryptFailureCount) */ 6017 uint32 tkipmicfaill_mcst; /**< TKIPLocalMICFailures */ 6018 uint32 tkipcntrmsr_mcst; /**< TKIPCounterMeasuresInvoked */ 6019 uint32 tkipreplay_mcst; /**< TKIPReplays */ 6020 uint32 ccmpfmterr_mcst; /**< CCMPFormatErrors */ 6021 uint32 ccmpreplay_mcst; /**< CCMPReplays */ 6022 uint32 ccmpundec_mcst; /**< CCMPDecryptErrors */ 6023 uint32 fourwayfail_mcst; /**< FourWayHandshakeFailures */ 6024 uint32 wepundec_mcst; /**< dot11WEPUndecryptableCount */ 6025 uint32 wepicverr_mcst; /**< dot11WEPICVErrorCount */ 6026 uint32 decsuccess_mcst; /**< DecryptSuccessCount */ 6027 uint32 tkipicverr_mcst; /**< TKIPICVErrorCount */ 6028 uint32 wepexcluded_mcst; /**< dot11WEPExcludedCount */ 6029 6030 uint32 txchanrej; /**< Tx frames suppressed due to channel rejection */ 6031 uint32 txexptime; /**< Tx frames suppressed due to timer expiration */ 6032 uint32 psmwds; /**< Count PSM watchdogs */ 6033 uint32 phywatchdog; /**< Count Phy watchdogs (triggered by ucode) */ 6034 6035 /* MBSS counters, AP only */ 6036 uint32 prq_entries_handled; /**< PRQ entries read in */ 6037 uint32 prq_undirected_entries; /**< which were bcast bss & ssid */ 6038 uint32 prq_bad_entries; /**< which could not be translated to info */ 6039 uint32 atim_suppress_count; /**< TX suppressions on ATIM fifo */ 6040 uint32 bcn_template_not_ready; /**< Template marked in use on send bcn ... */ 6041 uint32 bcn_template_not_ready_done; /**< ...but "DMA done" interrupt rcvd */ 6042 uint32 late_tbtt_dpc; /**< TBTT DPC did not happen in time */ 6043 6044 /* per-rate receive stat counters */ 6045 uint32 rx1mbps; /**< packets rx at 1Mbps */ 6046 uint32 rx2mbps; /**< packets rx at 2Mbps */ 6047 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 6048 uint32 rx6mbps; /**< packets rx at 6Mbps */ 6049 uint32 rx9mbps; /**< packets rx at 9Mbps */ 6050 uint32 rx11mbps; /**< packets rx at 11Mbps */ 6051 uint32 rx12mbps; /**< packets rx at 12Mbps */ 6052 uint32 rx18mbps; /**< packets rx at 18Mbps */ 6053 uint32 rx24mbps; /**< packets rx at 24Mbps */ 6054 uint32 rx36mbps; /**< packets rx at 36Mbps */ 6055 uint32 rx48mbps; /**< packets rx at 48Mbps */ 6056 uint32 rx54mbps; /**< packets rx at 54Mbps */ 6057 uint32 rx108mbps; /**< packets rx at 108mbps */ 6058 uint32 rx162mbps; /**< packets rx at 162mbps */ 6059 uint32 rx216mbps; /**< packets rx at 216 mbps */ 6060 uint32 rx270mbps; /**< packets rx at 270 mbps */ 6061 uint32 rx324mbps; /**< packets rx at 324 mbps */ 6062 uint32 rx378mbps; /**< packets rx at 378 mbps */ 6063 uint32 rx432mbps; /**< packets rx at 432 mbps */ 6064 uint32 rx486mbps; /**< packets rx at 486 mbps */ 6065 uint32 rx540mbps; /**< packets rx at 540 mbps */ 6066 6067 /* pkteng rx frame stats */ 6068 uint32 pktengrxducast; /**< unicast frames rxed by the pkteng code */ 6069 uint32 pktengrxdmcast; /**< multicast frames rxed by the pkteng code */ 6070 6071 uint32 rfdisable; /**< count of radio disables */ 6072 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 6073 uint32 bphy_badplcp; 6074 6075 uint32 txmpdu_sgi; /**< count for sgi transmit */ 6076 uint32 rxmpdu_sgi; /**< count for sgi received */ 6077 uint32 txmpdu_stbc; /**< count for stbc transmit */ 6078 uint32 rxmpdu_stbc; /**< count for stbc received */ 6079 6080 uint32 rxdrop20s; /**< drop secondary cnt */ 6081 /* All counter variables have to be of uint32. */ 6082 } wl_cnt_ver_6_t; 6083 6084 #define WL_DELTA_STATS_T_VERSION 2 /**< current version of wl_delta_stats_t struct */ 6085 6086 typedef struct { 6087 uint16 version; /**< see definition of WL_DELTA_STATS_T_VERSION */ 6088 uint16 length; /**< length of entire structure */ 6089 6090 /* transmit stat counters */ 6091 uint32 txframe; /**< tx data frames */ 6092 uint32 txbyte; /**< tx data bytes */ 6093 uint32 txretrans; /**< tx mac retransmits */ 6094 uint32 txfail; /**< tx failures */ 6095 6096 /* receive stat counters */ 6097 uint32 rxframe; /**< rx data frames */ 6098 uint32 rxbyte; /**< rx data bytes */ 6099 6100 /* per-rate receive stat counters */ 6101 uint32 rx1mbps; /**< packets rx at 1Mbps */ 6102 uint32 rx2mbps; /**< packets rx at 2Mbps */ 6103 uint32 rx5mbps5; /**< packets rx at 5.5Mbps */ 6104 uint32 rx6mbps; /**< packets rx at 6Mbps */ 6105 uint32 rx9mbps; /**< packets rx at 9Mbps */ 6106 uint32 rx11mbps; /**< packets rx at 11Mbps */ 6107 uint32 rx12mbps; /**< packets rx at 12Mbps */ 6108 uint32 rx18mbps; /**< packets rx at 18Mbps */ 6109 uint32 rx24mbps; /**< packets rx at 24Mbps */ 6110 uint32 rx36mbps; /**< packets rx at 36Mbps */ 6111 uint32 rx48mbps; /**< packets rx at 48Mbps */ 6112 uint32 rx54mbps; /**< packets rx at 54Mbps */ 6113 uint32 rx108mbps; /**< packets rx at 108mbps */ 6114 uint32 rx162mbps; /**< packets rx at 162mbps */ 6115 uint32 rx216mbps; /**< packets rx at 216 mbps */ 6116 uint32 rx270mbps; /**< packets rx at 270 mbps */ 6117 uint32 rx324mbps; /**< packets rx at 324 mbps */ 6118 uint32 rx378mbps; /**< packets rx at 378 mbps */ 6119 uint32 rx432mbps; /**< packets rx at 432 mbps */ 6120 uint32 rx486mbps; /**< packets rx at 486 mbps */ 6121 uint32 rx540mbps; /**< packets rx at 540 mbps */ 6122 6123 /* phy stats */ 6124 uint32 rxbadplcp; 6125 uint32 rxcrsglitch; 6126 uint32 bphy_rxcrsglitch; 6127 uint32 bphy_badplcp; 6128 6129 uint32 slice_index; /**< Slice for which stats are reported */ 6130 6131 } wl_delta_stats_t; 6132 6133 /* Partial statistics counter report */ 6134 #define WL_CNT_CTL_MGT_FRAMES 0 6135 6136 typedef struct { 6137 uint16 type; 6138 uint16 len; 6139 6140 /* detailed control/management frames */ 6141 uint32 txnull; 6142 uint32 rxnull; 6143 uint32 txqosnull; 6144 uint32 rxqosnull; 6145 uint32 txassocreq; 6146 uint32 rxassocreq; 6147 uint32 txreassocreq; 6148 uint32 rxreassocreq; 6149 uint32 txdisassoc; 6150 uint32 rxdisassoc; 6151 uint32 txassocrsp; 6152 uint32 rxassocrsp; 6153 uint32 txreassocrsp; 6154 uint32 rxreassocrsp; 6155 uint32 txauth; 6156 uint32 rxauth; 6157 uint32 txdeauth; 6158 uint32 rxdeauth; 6159 uint32 txprobereq; 6160 uint32 rxprobereq; 6161 uint32 txprobersp; 6162 uint32 rxprobersp; 6163 uint32 txaction; 6164 uint32 rxaction; 6165 uint32 txrts; 6166 uint32 rxrts; 6167 uint32 txcts; 6168 uint32 rxcts; 6169 uint32 txack; 6170 uint32 rxack; 6171 uint32 txbar; 6172 uint32 rxbar; 6173 uint32 txback; 6174 uint32 rxback; 6175 uint32 txpspoll; 6176 uint32 rxpspoll; 6177 } wl_ctl_mgt_cnt_t; 6178 6179 typedef struct { 6180 uint32 packets; 6181 uint32 bytes; 6182 } wl_traffic_stats_t; 6183 6184 typedef struct { 6185 uint16 version; /**< see definition of WL_WME_CNT_VERSION */ 6186 uint16 length; /**< length of entire structure */ 6187 6188 wl_traffic_stats_t tx[AC_COUNT]; /**< Packets transmitted */ 6189 wl_traffic_stats_t tx_failed[AC_COUNT]; /**< Packets dropped or failed to transmit */ 6190 wl_traffic_stats_t rx[AC_COUNT]; /**< Packets received */ 6191 wl_traffic_stats_t rx_failed[AC_COUNT]; /**< Packets failed to receive */ 6192 6193 wl_traffic_stats_t forward[AC_COUNT]; /**< Packets forwarded by AP */ 6194 6195 wl_traffic_stats_t tx_expired[AC_COUNT]; /**< packets dropped due to lifetime expiry */ 6196 6197 } wl_wme_cnt_t; 6198 6199 struct wl_msglevel2 { 6200 uint32 low; 6201 uint32 high; 6202 }; 6203 6204 /* A versioned structure for setting and retrieving debug message levels. */ 6205 #define WL_MSGLEVEL_STRUCT_VERSION_1 1 6206 6207 typedef struct wl_msglevel_v1 { 6208 uint16 version; 6209 uint16 length; 6210 uint32 msglevel1; 6211 uint32 msglevel2; 6212 uint32 msglevel3; 6213 /* add another uint32 when full */ 6214 } wl_msglevel_v1_t; 6215 6216 #define WL_ICMP_IPV6_CFG_VERSION 1 6217 #define WL_ICMP_IPV6_CLEAR_ALL (1 << 0) 6218 6219 typedef struct wl_icmp_ipv6_cfg { 6220 uint16 version; 6221 uint16 length; 6222 uint16 fixed_length; 6223 uint16 flags; 6224 uint32 num_ipv6; 6225 /* num_ipv6 to follow */ 6226 struct ipv6_addr host_ipv6[]; 6227 } wl_icmp_ipv6_cfg_t; 6228 6229 #define WL_ICMP_CFG_IPV6_FIXED_LEN OFFSETOF(wl_icmp_ipv6_cfg_t, host_ipv6) 6230 #define WL_ICMP_CFG_IPV6_LEN(count) (WL_ICMP_CFG_IPV6_FIXED_LEN + \ 6231 ((count) * sizeof(struct ipv6_addr))) 6232 6233 typedef struct wl_mkeep_alive_pkt { 6234 uint16 version; /* Version for mkeep_alive */ 6235 uint16 length; /* length of fixed parameters in the structure */ 6236 uint32 period_msec; /* high bit on means immediate send */ 6237 uint16 len_bytes; 6238 uint8 keep_alive_id; /* 0 - 3 for N = 4 */ 6239 uint8 data[1]; 6240 } wl_mkeep_alive_pkt_t; 6241 6242 #define WL_MKEEP_ALIVE_VERSION 1 6243 #define WL_MKEEP_ALIVE_FIXED_LEN OFFSETOF(wl_mkeep_alive_pkt_t, data) 6244 /* 1/2 second precision since idle time is a seconds counter anyway */ 6245 #define WL_MKEEP_ALIVE_PRECISION 500 6246 #define WL_MKEEP_ALIVE_PERIOD_MASK 0x7FFFFFFF 6247 #define WL_MKEEP_ALIVE_IMMEDIATE 0x80000000 6248 6249 typedef struct wl_mkeep_alive_hist_info_v1 { 6250 uint32 first_pktsend_ts; /**< timestamp(ms): packet was sent */ 6251 uint32 first_txs_ts; /**< timestamp(ms): received the first txstatus */ 6252 uint32 last_retry_txs_ts; /**< timestamp(ms): received the last txstatus */ 6253 uint32 first_retry_ts; /**< timestamp(ms): resent the packet first time */ 6254 uint32 last_retry_ts; /**< timestamp(ms): resent the packet last time */ 6255 uint32 first_txs; /**< txstatus when dongle received first time */ 6256 uint32 last_retry_txs; /**< txstatus when dongle received last time */ 6257 uint32 retry_cnt; /**< number of retries for the packet */ 6258 } wl_mkeep_alive_hist_info_v1_t; 6259 6260 typedef struct wl_mkeep_alive_hist_req_v1 { 6261 uint16 version; /**< version of structure */ 6262 uint16 length; /**< length of this structure */ 6263 uint16 flags; /**< mkeepalive idx, operation codes */ 6264 uint16 count; /**< number of results */ 6265 uint16 max; /**< maximum number of history */ 6266 wl_mkeep_alive_hist_info_v1_t info[]; /**< struct array of length count */ 6267 } wl_mkeep_alive_hist_req_v1_t; 6268 6269 /* version of the mkeep_alive_hist IOVAR */ 6270 #define WL_MKEEP_ALIVE_HIST_REQ_VER_1 1u 6271 /* Fixed length of wl_mkeep_alive_hist_req_v1_t */ 6272 #define WL_MKEEP_ALIVE_HIST_REQ_FIXED_LEN_VER_1 OFFSETOF(wl_mkeep_alive_hist_req_v1_t, info) 6273 /* Keepalive ID */ 6274 #define WL_MKEEP_ALIVE_HIST_ID_MASK 0xFF00u /**< ID mask */ 6275 #define WL_MKEEP_ALIVE_HIST_ID_SHIFT 8u /**< Offset of keepalive ID */ 6276 /* OP Codes */ 6277 #define WL_MKEEP_ALIVE_HIST_OP_MASK 0x00FFu /**< OP code mask */ 6278 #define WL_MKEEP_ALIVE_HIST_RESET (0x1u << 0u) /**< Clear history of specified ID */ 6279 #define WL_MKEEP_ALIVE_HIST_RESET_ALL (0x1u << 1u) /**< Clear all history */ 6280 6281 /** TCP Keep-Alive conn struct */ 6282 typedef struct wl_mtcpkeep_alive_conn_pkt { 6283 struct ether_addr saddr; /**< src mac address */ 6284 struct ether_addr daddr; /**< dst mac address */ 6285 struct ipv4_addr sipaddr; /**< source IP addr */ 6286 struct ipv4_addr dipaddr; /**< dest IP addr */ 6287 uint16 sport; /**< src port */ 6288 uint16 dport; /**< dest port */ 6289 uint32 seq; /**< seq number */ 6290 uint32 ack; /**< ACK number */ 6291 uint16 tcpwin; /**< TCP window */ 6292 uint16 PAD; 6293 } wl_mtcpkeep_alive_conn_pkt_t; 6294 6295 /** TCP Keep-Alive interval struct */ 6296 typedef struct wl_mtcpkeep_alive_timers_pkt { 6297 uint16 interval; /**< interval timer */ 6298 uint16 retry_interval; /**< retry_interval timer */ 6299 uint16 retry_count; /**< retry_count */ 6300 } wl_mtcpkeep_alive_timers_pkt_t; 6301 6302 typedef struct wake_info { 6303 uint32 wake_reason; 6304 uint32 wake_info_len; /**< size of packet */ 6305 uint8 packet[]; 6306 } wake_info_t; 6307 6308 typedef struct wake_pkt { 6309 uint32 wake_pkt_len; /**< size of packet */ 6310 uint8 packet[]; 6311 } wake_pkt_t; 6312 6313 #define WL_MTCPKEEP_ALIVE_VERSION 1 6314 6315 /* #ifdef WLBA */ 6316 6317 #define WLC_BA_CNT_VERSION 1 /**< current version of wlc_ba_cnt_t */ 6318 6319 /** block ack related stats */ 6320 typedef struct wlc_ba_cnt { 6321 uint16 version; /**< WLC_BA_CNT_VERSION */ 6322 uint16 length; /**< length of entire structure */ 6323 6324 /* transmit stat counters */ 6325 uint32 txpdu; /**< pdus sent */ 6326 uint32 txsdu; /**< sdus sent */ 6327 uint32 txfc; /**< tx side flow controlled packets */ 6328 uint32 txfci; /**< tx side flow control initiated */ 6329 uint32 txretrans; /**< retransmitted pdus */ 6330 uint32 txbatimer; /**< ba resend due to timer */ 6331 uint32 txdrop; /**< dropped packets */ 6332 uint32 txaddbareq; /**< addba req sent */ 6333 uint32 txaddbaresp; /**< addba resp sent */ 6334 uint32 txdelba; /**< delba sent */ 6335 uint32 txba; /**< ba sent */ 6336 uint32 txbar; /**< bar sent */ 6337 uint32 txpad[4]; /**< future */ 6338 6339 /* receive side counters */ 6340 uint32 rxpdu; /**< pdus recd */ 6341 uint32 rxqed; /**< pdus buffered before sending up */ 6342 uint32 rxdup; /**< duplicate pdus */ 6343 uint32 rxnobuf; /**< pdus discarded due to no buf */ 6344 uint32 rxaddbareq; /**< addba req recd */ 6345 uint32 rxaddbaresp; /**< addba resp recd */ 6346 uint32 rxdelba; /**< delba recd */ 6347 uint32 rxba; /**< ba recd */ 6348 uint32 rxbar; /**< bar recd */ 6349 uint32 rxinvba; /**< invalid ba recd */ 6350 uint32 rxbaholes; /**< ba recd with holes */ 6351 uint32 rxunexp; /**< unexpected packets */ 6352 uint32 rxpad[4]; /**< future */ 6353 } wlc_ba_cnt_t; 6354 /* #endif WLBA */ 6355 6356 /** structure for per-tid ampdu control */ 6357 struct ampdu_tid_control { 6358 uint8 tid; /* tid */ 6359 uint8 enable; /* enable/disable */ 6360 }; 6361 6362 /** Support for ampdu_tx_ba_window_cfg */ 6363 #define WL_AMPDU_TX_BA_WINDOW_CFG_VER_1 1u 6364 #define WL_AMPDU_TX_BA_WINDOW_CFG_CUR_VER WL_AMPDU_TX_BA_WINDOW_CFG_VER_1 6365 6366 /* 16 bits Config (5 bits reserved) and Status (2 bits reserved) */ 6367 #define WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_IDX 0u 6368 #define WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_FSZ 9u 6369 6370 #define WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_IDX 9u 6371 #define WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_FSZ 2u 6372 6373 #define WL_AMPDU_TX_BA_WINDOW_CFG_STATE_IDX 11u 6374 #define WL_AMPDU_TX_BA_WINDOW_CFG_STATE_FSZ 3u 6375 6376 #define WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_MASK \ 6377 (MAXBITVAL(WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_FSZ) << \ 6378 WL_AMPDU_TX_BA_WINDOW_CFG_BA_WSIZE_IDX) 6379 6380 #define WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_MASK \ 6381 (MAXBITVAL(WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_FSZ) << \ 6382 WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_IDX) 6383 6384 #define WL_AMPDU_TX_BA_WINDOW_CFG_STATE_MASK \ 6385 (MAXBITVAL(WL_AMPDU_TX_BA_WINDOW_CFG_STATE_FSZ) << \ 6386 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_IDX) 6387 6388 /* code for config assoc_type */ 6389 enum { 6390 WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_AX = 0, 6391 WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_UNIVERSAL = 1, 6392 WL_AMPDU_TX_BA_WINDOW_CFG_ASSOC_TYPE_MAX = 2 6393 }; 6394 6395 /* ampdu_tx_ba_window_cfg states */ 6396 enum { 6397 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_OFF = 0, 6398 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_NEGOTIATING = 1, 6399 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_NEGOTIATED = 2, 6400 WL_AMPDU_TX_BA_WINDOW_CFG_STATE_MAX = 3 6401 }; 6402 6403 /** structure for per tid ampdu BA window configuration */ 6404 typedef struct wl_ampdu_tx_ba_window_cfg_v1 { 6405 uint16 version; 6406 uint16 length; /* length of the entire structure ver+len+payload. */ 6407 /* tid bitmap: 6408 * input (SET): select tid to configure. 6409 * output (GET): TID that is currently configured. 6410 */ 6411 uint8 tidbmp; 6412 uint8 flag; /* currently not used. Reserved. 32-bit alignment. */ 6413 uint16 PAD; 6414 6415 /* Per-tid configuration tuple (tx_ba_wsize, assoctype). Used for GET and SET. 6416 * bit0 - bit8: User configured TX BA window size. Range {0, max. FW supported}. 6417 * bit9 - bit10: User configured association type. 0: 11ax association, 1: universal. 6418 * bit11 - bit15: Reserved. 6419 */ 6420 uint16 config[NUMPRIO]; 6421 6422 /* Status of the per-tid configuration: GET only 6423 * bit0 - bit8: Resulted TX BA window size. 6424 * bit9 - bit10: Reserved. 6425 * bit11 - bit13: TX BA configuration state. 6426 * bit14 - bit15: Reserved. 6427 */ 6428 uint16 status[NUMPRIO]; 6429 } wl_ampdu_tx_ba_window_cfg_v1_t; 6430 6431 /** struct for ampdu tx/rx aggregation control */ 6432 struct ampdu_aggr { 6433 int8 aggr_override; /**< aggr overrided by dongle. Not to be set by host. */ 6434 uint16 conf_TID_bmap; /**< bitmap of TIDs to configure */ 6435 uint16 enab_TID_bmap; /**< enable/disable per TID */ 6436 }; 6437 6438 /** structure for identifying ea/tid for sending addba/delba */ 6439 struct ampdu_ea_tid { 6440 struct ether_addr ea; /**< Station address */ 6441 uint8 tid; /**< tid */ 6442 uint8 initiator; /**< 0 is recipient, 1 is originator */ 6443 }; 6444 6445 /** structure for identifying retry/tid for retry_limit_tid/rr_retry_limit_tid */ 6446 struct ampdu_retry_tid { 6447 uint8 tid; /**< tid */ 6448 uint8 retry; /**< retry value */ 6449 }; 6450 6451 #define BDD_FNAME_LEN 32 /**< Max length of friendly name */ 6452 typedef struct bdd_fname { 6453 uint8 len; /**< length of friendly name */ 6454 uchar name[BDD_FNAME_LEN]; /**< friendly name */ 6455 } bdd_fname_t; 6456 6457 /* structure for addts arguments */ 6458 /** For ioctls that take a list of TSPEC */ 6459 struct tslist { 6460 int32 count; /**< number of tspecs */ 6461 struct tsinfo_arg tsinfo[]; /**< variable length array of tsinfo */ 6462 }; 6463 6464 /* WLTDLS */ 6465 /**structure for tdls iovars */ 6466 typedef struct tdls_iovar { 6467 struct ether_addr ea; /**< Station address */ 6468 uint8 mode; /**< mode: depends on iovar */ 6469 uint8 PAD; 6470 chanspec_t chanspec; 6471 uint8 PAD[6]; 6472 } tdls_iovar_t; 6473 6474 #define TDLS_WFD_IE_SIZE 512 6475 /**structure for tdls wfd ie */ 6476 typedef struct tdls_wfd_ie_iovar { 6477 struct ether_addr ea; /**< Station address */ 6478 uint8 mode; 6479 uint8 PAD; 6480 uint16 length; 6481 uint8 data[TDLS_WFD_IE_SIZE]; 6482 } tdls_wfd_ie_iovar_t; 6483 /* #endif WLTDLS */ 6484 6485 /** structure for addts/delts arguments */ 6486 typedef struct tspec_arg { 6487 uint16 version; /**< see definition of TSPEC_ARG_VERSION */ 6488 uint16 length; /**< length of entire structure */ 6489 uint32 flag; /**< bit field */ 6490 /* TSPEC Arguments */ 6491 struct tsinfo_arg tsinfo; /**< TS Info bit field */ 6492 uint8 PAD; 6493 uint16 nom_msdu_size; /**< (Nominal or fixed) MSDU Size (bytes) */ 6494 uint16 max_msdu_size; /**< Maximum MSDU Size (bytes) */ 6495 uint32 min_srv_interval; /**< Minimum Service Interval (us) */ 6496 uint32 max_srv_interval; /**< Maximum Service Interval (us) */ 6497 uint32 inactivity_interval; /**< Inactivity Interval (us) */ 6498 uint32 suspension_interval; /**< Suspension Interval (us) */ 6499 uint32 srv_start_time; /**< Service Start Time (us) */ 6500 uint32 min_data_rate; /**< Minimum Data Rate (bps) */ 6501 uint32 mean_data_rate; /**< Mean Data Rate (bps) */ 6502 uint32 peak_data_rate; /**< Peak Data Rate (bps) */ 6503 uint32 max_burst_size; /**< Maximum Burst Size (bytes) */ 6504 uint32 delay_bound; /**< Delay Bound (us) */ 6505 uint32 min_phy_rate; /**< Minimum PHY Rate (bps) */ 6506 uint16 surplus_bw; /**< Surplus Bandwidth Allowance (range 1.0 to 8.0) */ 6507 uint16 medium_time; /**< Medium Time (32 us/s periods) */ 6508 uint8 dialog_token; /**< dialog token */ 6509 uint8 PAD[3]; 6510 } tspec_arg_t; 6511 6512 /** tspec arg for desired station */ 6513 typedef struct tspec_per_sta_arg { 6514 struct ether_addr ea; 6515 uint8 PAD[2]; 6516 struct tspec_arg ts; 6517 } tspec_per_sta_arg_t; 6518 6519 /** structure for max bandwidth for each access category */ 6520 typedef struct wme_max_bandwidth { 6521 uint32 ac[AC_COUNT]; /**< max bandwidth for each access category */ 6522 } wme_max_bandwidth_t; 6523 6524 #define WL_WME_MBW_PARAMS_IO_BYTES (sizeof(wme_max_bandwidth_t)) 6525 6526 /* current version of wl_tspec_arg_t struct */ 6527 #define TSPEC_ARG_VERSION 2 /**< current version of wl_tspec_arg_t struct */ 6528 #define TSPEC_ARG_LENGTH 55 /**< argument length from tsinfo to medium_time */ 6529 #define TSPEC_DEFAULT_DIALOG_TOKEN 42 /**< default dialog token */ 6530 #define TSPEC_DEFAULT_SBW_FACTOR 0x3000 /**< default surplus bw */ 6531 6532 #define WL_WOWL_KEEPALIVE_MAX_PACKET_SIZE 80 6533 #define WLC_WOWL_MAX_KEEPALIVE 2 6534 6535 /** Packet lifetime configuration per ac */ 6536 typedef struct wl_lifetime { 6537 uint32 ac; /**< access class */ 6538 uint32 lifetime; /**< Packet lifetime value in ms */ 6539 } wl_lifetime_t; 6540 6541 /** Management time configuration */ 6542 typedef struct wl_lifetime_mg { 6543 uint32 mgmt_bitmap; /**< Mgmt subtype */ 6544 uint32 lifetime; /**< Packet lifetime value in us */ 6545 } wl_lifetime_mg_t; 6546 6547 /* MAC Sample Capture related */ 6548 #define WL_MACCAPTR_DEFSTART_PTR 0xA00 6549 #define WL_MACCAPTR_DEFSTOP_PTR 0xA3F 6550 #define WL_MACCAPTR_DEFSZ 0x3F 6551 6552 #define WL_MACCAPTR_DEF_MASK 0xFFFFFFFF 6553 6554 typedef enum { 6555 WL_MACCAPT_TRIG = 0, 6556 WL_MACCAPT_STORE = 1, 6557 WL_MACCAPT_TRANS = 2, 6558 WL_MACCAPT_MATCH = 3 6559 } maccaptr_optn; 6560 6561 typedef enum { 6562 WL_MACCAPT_STRT = 1, 6563 WL_MACCAPT_STOP = 2, 6564 WL_MACCAPT_RST = 3 6565 } maccaptr_cmd_t; 6566 6567 /* MAC Sample Capture Set-up Paramters */ 6568 typedef struct wl_maccapture_params { 6569 uint8 gpio_sel; 6570 uint8 la_mode; /* TRUE: GPIO Out Enabled */ 6571 uint8 PAD[2]; 6572 uint32 start_ptr; /* Start address to store */ 6573 uint32 stop_ptr; /* Stop address to store */ 6574 uint8 optn_bmp; /* Options */ 6575 uint8 PAD[3]; 6576 /* Don't change the order after this nor 6577 * add anything in betw. Code uses offsets to populate 6578 * registers 6579 */ 6580 uint32 tr_mask; /* Trigger Mask */ 6581 uint32 tr_val; /* Trigger Value */ 6582 uint32 s_mask; /* Store Mode Mask */ 6583 uint32 x_mask; /* Trans. Mode Mask */ 6584 uint32 m_mask; /* Match Mode Mask */ 6585 uint32 m_val; /* Match Value */ 6586 maccaptr_cmd_t cmd; /* Start / Stop */ 6587 } wl_maccapture_params_t; 6588 6589 /** Channel Switch Announcement param */ 6590 typedef struct wl_chan_switch { 6591 uint8 mode; /**< value 0 or 1 */ 6592 uint8 count; /**< count # of beacons before switching */ 6593 chanspec_t chspec; /**< chanspec */ 6594 uint8 reg; /**< regulatory class */ 6595 uint8 frame_type; /**< csa frame type, unicast or broadcast */ 6596 } wl_chan_switch_t; 6597 6598 enum { 6599 PFN_LIST_ORDER, 6600 PFN_RSSI 6601 }; 6602 6603 enum { 6604 DISABLE, 6605 ENABLE 6606 }; 6607 6608 enum { 6609 OFF_ADAPT, 6610 SMART_ADAPT, 6611 STRICT_ADAPT, 6612 SLOW_ADAPT 6613 }; 6614 6615 #define SORT_CRITERIA_BIT 0 6616 #define AUTO_NET_SWITCH_BIT 1 6617 #define ENABLE_BKGRD_SCAN_BIT 2 6618 #define IMMEDIATE_SCAN_BIT 3 6619 #define AUTO_CONNECT_BIT 4 6620 #define ENABLE_BD_SCAN_BIT 5 6621 #define ENABLE_ADAPTSCAN_BIT 6 6622 #define IMMEDIATE_EVENT_BIT 8 6623 #define SUPPRESS_SSID_BIT 9 6624 #define ENABLE_NET_OFFLOAD_BIT 10 6625 /** report found/lost events for SSID and BSSID networks seperately */ 6626 #define REPORT_SEPERATELY_BIT 11 6627 6628 #define SORT_CRITERIA_MASK 0x0001 6629 #define AUTO_NET_SWITCH_MASK 0x0002 6630 #define ENABLE_BKGRD_SCAN_MASK 0x0004 6631 #define IMMEDIATE_SCAN_MASK 0x0008 6632 #define AUTO_CONNECT_MASK 0x0010 6633 6634 #define ENABLE_BD_SCAN_MASK 0x0020 6635 #define ENABLE_ADAPTSCAN_MASK 0x00c0 6636 #define IMMEDIATE_EVENT_MASK 0x0100 6637 #define SUPPRESS_SSID_MASK 0x0200 6638 #define ENABLE_NET_OFFLOAD_MASK 0x0400 6639 /** report found/lost events for SSID and BSSID networks seperately */ 6640 #define REPORT_SEPERATELY_MASK 0x0800 6641 6642 #define PFN_COMPLETE 1 6643 #define PFN_INCOMPLETE 0 6644 6645 #define DEFAULT_BESTN 2 6646 #define DEFAULT_MSCAN 0 6647 #define DEFAULT_REPEAT 10 6648 #define DEFAULT_EXP 2 6649 6650 #define PFN_PARTIAL_SCAN_BIT 0 6651 #define PFN_PARTIAL_SCAN_MASK 1 6652 6653 #define PFN_SWC_RSSI_WINDOW_MAX 8 6654 #define PFN_SWC_MAX_NUM_APS 16 6655 #define PFN_HOTLIST_MAX_NUM_APS 64 6656 6657 #define MAX_EPNO_HIDDEN_SSID 8 6658 #define MAX_WHITELIST_SSID 2 6659 6660 /* Version 1 and 2 for various scan results structures defined below */ 6661 #define PFN_SCANRESULTS_VERSION_V1 1u 6662 #define PFN_SCANRESULTS_VERSION_V2 2u 6663 #define PFN_SCANRESULTS_VERSION_V3 3u 6664 #define PFN_SCANRESULTS_VERSION_V4 4u 6665 6666 /** PFN network info structure */ 6667 typedef struct wl_pfn_subnet_info_v1 { 6668 struct ether_addr BSSID; 6669 uint8 channel; /**< channel number only */ 6670 uint8 SSID_len; 6671 uint8 SSID[32]; 6672 } wl_pfn_subnet_info_v1_t; 6673 6674 typedef struct wl_pfn_subnet_info_v2 { 6675 struct ether_addr BSSID; 6676 uint8 channel; /**< channel number only */ 6677 uint8 SSID_len; 6678 union { 6679 uint8 SSID[32]; 6680 uint16 index; 6681 } u; 6682 } wl_pfn_subnet_info_v2_t; 6683 6684 typedef struct wl_pfn_subnet_info_v3 { 6685 struct ether_addr BSSID; 6686 chanspec_t chanspec; /**< with 6G chanspec only */ 6687 uint8 SSID_len; 6688 uint8 PAD[3]; 6689 union { 6690 uint8 SSID[32]; 6691 uint16 index; 6692 } u; 6693 } wl_pfn_subnet_info_v3_t; 6694 6695 typedef struct wl_pfn_net_info_v1 { 6696 wl_pfn_subnet_info_v1_t pfnsubnet; 6697 int16 RSSI; /**< receive signal strength (in dBm) */ 6698 uint16 timestamp; /**< age in seconds */ 6699 } wl_pfn_net_info_v1_t; 6700 6701 typedef struct wl_pfn_net_info_v2 { 6702 wl_pfn_subnet_info_v2_t pfnsubnet; 6703 int16 RSSI; /**< receive signal strength (in dBm) */ 6704 uint16 timestamp; /**< age in seconds */ 6705 } wl_pfn_net_info_v2_t; 6706 6707 typedef struct wl_pfn_net_info_v3 { 6708 wl_pfn_subnet_info_v3_t pfnsubnet; 6709 int16 RSSI; /**< receive signal strength (in dBm) */ 6710 uint16 timestamp; /**< age in seconds */ 6711 } wl_pfn_net_info_v3_t; 6712 6713 /* Version 1 and 2 for various lbest scan results structures below */ 6714 #define PFN_LBEST_SCAN_RESULT_VERSION_V1 1 6715 #define PFN_LBEST_SCAN_RESULT_VERSION_V2 2 6716 #define PFN_LBEST_SCAN_RESULT_VERSION_V3 3 6717 6718 #define MAX_CHBKT_PER_RESULT 4 6719 6720 typedef struct wl_pfn_lnet_info_v1 { 6721 wl_pfn_subnet_info_v1_t pfnsubnet; /**< BSSID + channel + SSID len + SSID */ 6722 uint16 flags; /**< partial scan, etc */ 6723 int16 RSSI; /**< receive signal strength (in dBm) */ 6724 uint32 timestamp; /**< age in miliseconds */ 6725 uint16 rtt0; /**< estimated distance to this AP in centimeters */ 6726 uint16 rtt1; /**< standard deviation of the distance to this AP in centimeters */ 6727 } wl_pfn_lnet_info_v1_t; 6728 6729 typedef struct wl_pfn_lnet_info_v2 { 6730 wl_pfn_subnet_info_v2_t pfnsubnet; /**< BSSID + channel + SSID len + SSID */ 6731 uint16 flags; /**< partial scan, etc */ 6732 int16 RSSI; /**< receive signal strength (in dBm) */ 6733 uint32 timestamp; /**< age in miliseconds */ 6734 uint16 rtt0; /**< estimated distance to this AP in centimeters */ 6735 uint16 rtt1; /**< standard deviation of the distance to this AP in centimeters */ 6736 } wl_pfn_lnet_info_v2_t; 6737 6738 typedef struct wl_pfn_lnet_info_v3 { 6739 wl_pfn_subnet_info_v3_t pfnsubnet; /**< BSSID + channel + SSID len + SSID */ 6740 uint16 flags; /**< partial scan, etc */ 6741 int16 RSSI; /**< receive signal strength (in dBm) */ 6742 uint32 timestamp; /**< age in miliseconds */ 6743 uint16 rtt0; /**< estimated distance to this AP in centimeters */ 6744 uint16 rtt1; /**< standard deviation of the distance to this AP in centimeters */ 6745 } wl_pfn_lnet_info_v3_t; 6746 6747 typedef struct wl_pfn_lscanresults_v1 { 6748 uint32 version; 6749 uint32 status; 6750 uint32 count; 6751 wl_pfn_lnet_info_v1_t netinfo[1]; 6752 } wl_pfn_lscanresults_v1_t; 6753 6754 typedef struct wl_pfn_lscanresults_v2 { 6755 uint32 version; 6756 uint16 status; 6757 uint16 count; 6758 uint32 scan_ch_buckets[MAX_CHBKT_PER_RESULT]; 6759 wl_pfn_lnet_info_v2_t netinfo[1]; 6760 } wl_pfn_lscanresults_v2_t; 6761 6762 typedef struct wl_pfn_lscanresults_v3 { 6763 uint32 version; 6764 uint16 status; 6765 uint16 count; 6766 uint32 scan_ch_buckets[MAX_CHBKT_PER_RESULT]; 6767 wl_pfn_lnet_info_v3_t netinfo[1]; 6768 } wl_pfn_lscanresults_v3_t; 6769 6770 /**this is used to report on 1-* pfn scan results */ 6771 typedef struct wl_pfn_scanresults_v1 { 6772 uint32 version; 6773 uint32 status; 6774 uint32 count; 6775 wl_pfn_net_info_v1_t netinfo[1]; 6776 } wl_pfn_scanresults_v1_t; 6777 6778 typedef struct wl_pfn_scanresults_v2 { 6779 uint32 version; 6780 uint32 status; 6781 uint32 count; 6782 uint32 scan_ch_bucket; 6783 wl_pfn_net_info_v2_t netinfo[1]; 6784 } wl_pfn_scanresults_v2_t; 6785 6786 typedef struct wl_pfn_scanresults_v3 { 6787 uint32 version; 6788 uint32 status; 6789 uint32 count; 6790 uint32 scan_ch_bucket; 6791 wl_pfn_net_info_v3_t netinfo[1]; 6792 } wl_pfn_scanresults_v3_t; 6793 6794 #define WL_PFN_SCANRESULTS_SCAN_TYPE_HA 0u 6795 #define WL_PFN_SCANRESULTS_SCAN_TYPE_LP 1u 6796 6797 /* In version 4, the status field is split between status and flags from version 2. 6798 * This does not include changes from version 3. 6799 */ 6800 typedef struct wl_pfn_scanresults_v4 { 6801 uint32 version; 6802 uint16 status; 6803 uint16 flags; 6804 uint32 count; 6805 uint32 scan_ch_bucket; 6806 wl_pfn_net_info_v2_t netinfo[1]; 6807 } wl_pfn_scanresults_v4_t; 6808 6809 typedef struct wl_pfn_significant_net { 6810 uint16 flags; 6811 uint16 channel; 6812 struct ether_addr BSSID; 6813 int8 rssi[PFN_SWC_RSSI_WINDOW_MAX]; 6814 } wl_pfn_significant_net_t; 6815 6816 #define PFN_SWC_SCANRESULT_VERSION 1 6817 6818 typedef struct wl_pfn_swc_results { 6819 uint32 version; 6820 uint32 pkt_count; /**< No. of results in current frame */ 6821 uint32 total_count; /**< Total expected results */ 6822 wl_pfn_significant_net_t list[]; 6823 } wl_pfn_swc_results_t; 6824 typedef struct wl_pfn_net_info_bssid_v1 { 6825 struct ether_addr BSSID; 6826 uint8 channel; /**< channel number only */ 6827 int8 RSSI; /**< receive signal strength (in dBm) */ 6828 uint16 flags; /**< (e.g. partial scan, off channel) */ 6829 uint16 timestamp; /**< age in seconds */ 6830 } wl_pfn_net_info_bssid_v1_t; 6831 6832 typedef struct wl_pfn_scanhist_bssid_v1 { 6833 uint32 version; 6834 uint32 status; 6835 uint32 count; 6836 wl_pfn_net_info_bssid_v1_t netinfo[1]; 6837 } wl_pfn_scanhist_bssid_v1_t; 6838 6839 /* v2 for this struct is skiped to match with other struct v3 version */ 6840 typedef struct wl_pfn_net_info_bssid_v3 { 6841 struct ether_addr BSSID; 6842 chanspec_t chanspec; /**<with 6G chanspec only */ 6843 uint16 flags; /**< (e.g. partial scan, off channel) */ 6844 uint16 timestamp; /**< age in seconds */ 6845 int8 RSSI; /**< receive signal strength (in dBm) */ 6846 uint8 PAD[2]; 6847 } wl_pfn_net_info_bssid_v3_t; 6848 6849 typedef struct wl_pfn_scanhist_bssid_v3 { 6850 uint32 version; 6851 uint32 status; 6852 uint32 count; 6853 wl_pfn_net_info_bssid_v3_t netinfo[1]; 6854 } wl_pfn_scanhist_bssid_v3_t; 6855 6856 #ifndef WL_PFN_NET_INFO_BSSID_TYPEDEF_HAS_ALIAS 6857 typedef wl_pfn_net_info_bssid_v1_t wl_pfn_net_info_bssid_t; 6858 typedef wl_pfn_scanhist_bssid_v1_t wl_pfn_scanhist_bssid_t; 6859 #endif /* WL_PFN_NET_INFO_BSSID_TYPEDEF_HAS_ALIAS */ 6860 6861 /* Version 1 and 2 for various single scan result */ 6862 #define PFN_SCANRESULT_VERSION_V1 1 6863 #define PFN_SCANRESULT_VERSION_V2 2 6864 #define PFN_SCANRESULT_VERSION_V3 3 6865 6866 /* used to report exactly one scan result */ 6867 /* plus reports detailed scan info in bss_info */ 6868 typedef struct wl_pfn_scanresult_v1 { 6869 uint32 version; 6870 uint32 status; 6871 uint32 count; 6872 wl_pfn_net_info_v1_t netinfo; 6873 wl_bss_info_v109_t bss_info; 6874 } wl_pfn_scanresult_v1_t; 6875 6876 typedef struct wl_pfn_scanresult_v2 { 6877 uint32 version; 6878 uint32 status; 6879 uint32 count; 6880 wl_pfn_net_info_v2_t netinfo; 6881 wl_bss_info_v109_t bss_info; 6882 } wl_pfn_scanresult_v2_t; 6883 6884 typedef struct wl_pfn_scanresult_v2_1 { 6885 uint32 version; 6886 uint32 status; 6887 uint32 count; 6888 wl_pfn_net_info_v2_t netinfo; 6889 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 6890 } wl_pfn_scanresult_v2_1_t; 6891 6892 typedef struct wl_pfn_scanresult_v3_1 { 6893 uint32 version; 6894 uint32 status; 6895 uint32 count; 6896 wl_pfn_net_info_v3_t netinfo; 6897 uint8 bss_info[]; /* var length wl_bss_info_X structures */ 6898 } wl_pfn_scanresult_v3_1_t; 6899 6900 #define PFN_SCAN_ALLGONE_VERSION_V1 1u 6901 6902 typedef struct wl_pfn_scan_all_gone_event_v1 { 6903 uint16 version; 6904 uint16 length; 6905 uint16 flags; 6906 uint16 pad; 6907 } wl_pfn_scan_all_gone_event_v1_t; 6908 6909 #define WL_PFN_MAX_RAND_LIMIT 20u 6910 #define PFN_VERSION_V2 2u 6911 /**PFN data structure */ 6912 typedef struct wl_pfn_param_v2 { 6913 int32 version; /**< PNO parameters version */ 6914 int32 scan_freq; /**< Scan frequency */ 6915 int32 lost_network_timeout; /**< Timeout in sec. to declare 6916 * discovered network as lost 6917 */ 6918 int16 flags; /**< Bit field to control features 6919 * of PFN such as sort criteria auto 6920 * enable switch and background scan 6921 */ 6922 int16 rssi_margin; /**< Margin to avoid jitter for choosing a 6923 * PFN based on RSSI sort criteria 6924 */ 6925 uint8 bestn; /**< number of best networks in each scan */ 6926 uint8 mscan; /**< number of scans recorded */ 6927 uint8 repeat; /**< Minimum number of scan intervals 6928 *before scan frequency changes in adaptive scan 6929 */ 6930 uint8 exp; /**< Exponent of 2 for maximum scan interval */ 6931 int32 slow_freq; /**< slow scan period */ 6932 } wl_pfn_param_v2_t; 6933 6934 #define PFN_VERSION_V3 3u 6935 typedef struct wl_pfn_param_v3 { 6936 int16 version; /**< PNO parameters version */ 6937 int16 length; /* length of the structure */ 6938 int32 scan_freq; /**< Scan frequency */ 6939 int32 lost_network_timeout; /**< Timeout in sec. to declare 6940 * discovered network as lost 6941 */ 6942 int16 flags; /**< Bit field to control features 6943 * of PFN such as sort criteria auto 6944 * enable switch and background scan 6945 */ 6946 int16 rssi_margin; /**< Margin to avoid jitter for choosing a 6947 * PFN based on RSSI sort criteria 6948 */ 6949 uint8 bestn; /**< number of best networks in each scan */ 6950 uint8 mscan; /**< number of scans recorded */ 6951 uint8 repeat; /**< Minimum number of scan intervals 6952 *before scan frequency changes in adaptive scan 6953 */ 6954 uint8 exp; /**< Exponent of 2 for maximum scan interval */ 6955 int32 slow_freq; /**< slow scan period */ 6956 uint8 min_bound; /**< pfn scan period randomization - lower bound % */ 6957 uint8 max_bound; /**< pfn scan period randomization - upper bound % */ 6958 uint8 pfn_lp_scan_disable; /* add support to enable/disable scan-core scan for PNO */ 6959 uint8 PAD[1]; /**< Pad to 32-bit alignment */ 6960 } wl_pfn_param_v3_t; 6961 6962 #ifndef PFN_PARAM_HAS_ALIAS 6963 typedef wl_pfn_param_v2_t wl_pfn_param_t; 6964 #define PFN_VERSION PFN_VERSION_V2 6965 #endif 6966 6967 typedef struct wl_pfn_bssid { 6968 struct ether_addr macaddr; 6969 /* Bit4: suppress_lost, Bit3: suppress_found */ 6970 uint16 flags; 6971 } wl_pfn_bssid_t; 6972 typedef struct wl_pfn_significant_bssid { 6973 struct ether_addr macaddr; 6974 int8 rssi_low_threshold; 6975 int8 rssi_high_threshold; 6976 } wl_pfn_significant_bssid_t; 6977 #define WL_PFN_SUPPRESSFOUND_MASK 0x08 6978 #define WL_PFN_SUPPRESSLOST_MASK 0x10 6979 #define WL_PFN_SSID_IMPRECISE_MATCH 0x80 6980 #define WL_PFN_SSID_SAME_NETWORK 0x10000 6981 #define WL_PFN_SUPPRESS_AGING_MASK 0x20000 6982 #define WL_PFN_FLUSH_ALL_SSIDS 0x40000 6983 6984 #define WL_PFN_IOVAR_FLAG_MASK 0xFFFF00FF 6985 #define WL_PFN_RSSI_MASK 0xff00 6986 #define WL_PFN_RSSI_SHIFT 8 6987 6988 typedef struct wl_pfn_cfg { 6989 uint32 reporttype; 6990 int32 channel_num; 6991 uint16 channel_list[WL_NUMCHANNELS]; 6992 uint32 flags; 6993 } wl_pfn_cfg_t; 6994 6995 #define WL_PFN_SSID_CFG_VERSION 1 6996 #define WL_PFN_SSID_CFG_CLEAR 0x1 6997 6998 typedef struct wl_pfn_ssid_params { 6999 int8 min5G_rssi; /* minimum 5GHz RSSI for a BSSID to be considered */ 7000 int8 min2G_rssi; /* minimum 2.4GHz RSSI for a BSSID to be considered */ 7001 int16 init_score_max; /* The maximum score that a network can have before bonuses */ 7002 7003 int16 cur_bssid_bonus; /* Add to current bssid */ 7004 int16 same_ssid_bonus; /* score bonus for all networks with the same network flag */ 7005 int16 secure_bonus; /* score bonus for networks that are not open */ 7006 int16 band_5g_bonus; 7007 } wl_pfn_ssid_params_t; 7008 7009 typedef struct wl_ssid_ext_params { 7010 int8 min5G_rssi; /* minimum 5GHz RSSI for a BSSID to be considered */ 7011 int8 min2G_rssi; /* minimum 2.4GHz RSSI for a BSSID to be considered */ 7012 int16 init_score_max; /* The maximum score that a network can have before bonuses */ 7013 int16 cur_bssid_bonus; /* Add to current bssid */ 7014 int16 same_ssid_bonus; /* score bonus for all networks with the same network flag */ 7015 int16 secure_bonus; /* score bonus for networks that are not open */ 7016 int16 band_5g_bonus; 7017 } wl_ssid_ext_params_t; 7018 7019 typedef struct wl_pfn_ssid_cfg { 7020 uint16 version; 7021 uint16 flags; 7022 wl_ssid_ext_params_t params; 7023 } wl_pfn_ssid_cfg_t; 7024 7025 #define CH_BUCKET_REPORT_NONE 0 7026 #define CH_BUCKET_REPORT_SCAN_COMPLETE_ONLY 1 7027 #define CH_BUCKET_REPORT_FULL_RESULT 2 7028 #define CH_BUCKET_REPORT_SCAN_COMPLETE (CH_BUCKET_REPORT_SCAN_COMPLETE_ONLY | \ 7029 CH_BUCKET_REPORT_FULL_RESULT) 7030 #define CH_BUCKET_REPORT_REGULAR 0 7031 #define CH_BUCKET_GSCAN 4 7032 7033 typedef struct wl_pfn_gscan_ch_bucket_cfg { 7034 uint8 bucket_end_index; 7035 uint8 bucket_freq_multiple; 7036 uint8 flag; 7037 uint8 reserved; 7038 uint16 repeat; 7039 uint16 max_freq_multiple; 7040 } wl_pfn_gscan_ch_bucket_cfg_t; 7041 7042 typedef struct wl_pfn_capabilities { 7043 uint16 max_mscan; 7044 uint16 max_bestn; 7045 uint16 max_swc_bssid; 7046 uint16 max_hotlist_bssid; 7047 } wl_pfn_capabilities_t; 7048 7049 #define GSCAN_SEND_ALL_RESULTS_MASK (1 << 0) 7050 #define GSCAN_ALL_BUCKETS_IN_FIRST_SCAN_MASK (1 << 3) 7051 #define GSCAN_CFG_FLAGS_ONLY_MASK (1 << 7) 7052 #define WL_GSCAN_CFG_VERSION 1 7053 typedef struct wl_pfn_gscan_cfg { 7054 uint16 version; 7055 /** 7056 * BIT0 1 = send probes/beacons to HOST 7057 * BIT1 Reserved 7058 * BIT2 Reserved 7059 * Add any future flags here 7060 * BIT7 1 = no other useful cfg sent 7061 */ 7062 uint8 flags; 7063 /** Buffer filled threshold in % to generate an event */ 7064 uint8 buffer_threshold; 7065 /** 7066 * No. of BSSIDs with "change" to generate an evt 7067 * change - crosses rssi threshold/lost 7068 */ 7069 uint8 swc_nbssid_threshold; 7070 /* Max=8 (for now) Size of rssi cache buffer */ 7071 uint8 swc_rssi_window_size; 7072 uint8 count_of_channel_buckets; 7073 uint8 retry_threshold; 7074 uint16 lost_ap_window; 7075 wl_pfn_gscan_ch_bucket_cfg_t channel_bucket[1]; 7076 } wl_pfn_gscan_cfg_t; 7077 7078 #define WL_PFN_REPORT_ALLNET 0 7079 #define WL_PFN_REPORT_SSIDNET 1 7080 #define WL_PFN_REPORT_BSSIDNET 2 7081 7082 #define WL_PFN_CFG_FLAGS_PROHIBITED 0x00000001 /* Accept and use prohibited channels */ 7083 #define WL_PFN_CFG_FLAGS_RESERVED 0xfffffffe /**< Remaining reserved for future use */ 7084 7085 typedef struct wl_pfn { 7086 wlc_ssid_t ssid; /**< ssid name and its length */ 7087 int32 flags; /**< bit2: hidden */ 7088 int32 infra; /**< BSS Vs IBSS */ 7089 int32 auth; /**< Open Vs Closed */ 7090 int32 wpa_auth; /**< WPA type */ 7091 int32 wsec; /**< wsec value */ 7092 } wl_pfn_t; 7093 7094 typedef struct wl_pfn_list { 7095 uint32 version; 7096 uint32 enabled; 7097 uint32 count; 7098 wl_pfn_t pfn[1]; 7099 } wl_pfn_list_t; 7100 7101 #define PFN_SSID_EXT_VERSION 1 7102 7103 typedef struct wl_pfn_ext { 7104 uint8 flags; 7105 int8 rssi_thresh; /* RSSI threshold, track only if RSSI > threshold */ 7106 uint16 wpa_auth; /* Match the wpa auth type defined in wlioctl_defs.h */ 7107 uint8 ssid[DOT11_MAX_SSID_LEN]; 7108 uint8 ssid_len; 7109 uint8 pad; 7110 } wl_pfn_ext_t; 7111 typedef struct wl_pfn_ext_list { 7112 uint16 version; 7113 uint16 count; 7114 wl_pfn_ext_t pfn_ext[1]; 7115 } wl_pfn_ext_list_t; 7116 7117 #define WL_PFN_SSID_EXT_FOUND 0x1 7118 #define WL_PFN_SSID_EXT_LOST 0x2 7119 typedef struct wl_pfn_result_ssid { 7120 uint8 flags; 7121 int8 rssi; 7122 /* channel number */ 7123 uint16 channel; 7124 /* Assume idx in order of cfg */ 7125 uint32 index; 7126 } wl_pfn_result_ssid_crc32_t; 7127 7128 typedef struct wl_pfn_ssid_ext_result { 7129 uint16 version; 7130 uint16 count; 7131 wl_pfn_result_ssid_crc32_t net[1]; 7132 } wl_pfn_ssid_ext_result_t; 7133 7134 #define PFN_EXT_AUTH_CODE_OPEN 1 /* open */ 7135 #define PFN_EXT_AUTH_CODE_PSK 2 /* WPA_PSK or WPA2PSK */ 7136 #define PFN_EXT_AUTH_CODE_EAPOL 4 /* any EAPOL */ 7137 7138 #define WL_PFN_HIDDEN_BIT 2 7139 #define WL_PFN_HIDDEN_MASK 0x4 7140 7141 #ifndef BESTN_MAX 7142 #define BESTN_MAX 10 7143 #endif 7144 7145 #ifndef MSCAN_MAX 7146 #define MSCAN_MAX 32 7147 #endif 7148 7149 /* Dynamic scan configuration for motion profiles */ 7150 7151 #define WL_PFN_MPF_VERSION 1 7152 7153 /* Valid group IDs, may be expanded in the future */ 7154 #define WL_PFN_MPF_GROUP_SSID 0 7155 #define WL_PFN_MPF_GROUP_BSSID 1 7156 #define WL_PFN_MPF_MAX_GROUPS 2 7157 7158 /* Max number of MPF states supported in this time */ 7159 #define WL_PFN_MPF_STATES_MAX 4u 7160 #define WL_PFN_MPF_LP_CNT_MAX 7u 7161 7162 /* Flags for the mpf-specific stuff */ 7163 #define WL_PFN_MPF_ADAPT_ON_BIT 0u 7164 #define WL_PFN_MPF_ADAPTSCAN_BIT 1u 7165 #define WL_PFN_MPF_LP_SCAN_BIT 3u 7166 7167 #define WL_PFN_MPF_ADAPT_ON_MASK 0x0001 /* Bit 0 */ 7168 #define WL_PFN_MPF_ADAPTSCAN_MASK 0x0006 /* Bits [2:1] */ 7169 #define WL_PFN_MPF_LP_SCAN_CNT_MASK 0x0038 /* Bits [5:3] */ 7170 7171 /* Per-state timing values */ 7172 typedef struct wl_pfn_mpf_state_params { 7173 int32 scan_freq; /* Scan frequency (secs) */ 7174 int32 lost_network_timeout; /* Timeout to declare net lost (secs) */ 7175 int16 flags; /* Space for flags: ADAPT, LP_SCAN cnt etc */ 7176 uint8 exp; /* Exponent of 2 for max interval for SMART/STRICT_ADAPT */ 7177 uint8 repeat; /* Number of scans before changing adaptation level */ 7178 int32 slow_freq; /* Slow scan period for SLOW_ADAPT */ 7179 } wl_pfn_mpf_state_params_t; 7180 7181 typedef struct wl_pfn_mpf_param { 7182 uint16 version; /* Structure version */ 7183 uint16 groupid; /* Group ID: 0 (SSID), 1 (BSSID), other: reserved */ 7184 wl_pfn_mpf_state_params_t state[WL_PFN_MPF_STATES_MAX]; 7185 } wl_pfn_mpf_param_t; 7186 7187 /* Structure for setting pfn_override iovar */ 7188 typedef struct wl_pfn_override_param { 7189 uint16 version; /* Structure version */ 7190 uint16 start_offset; /* Seconds from now to apply new params */ 7191 uint16 duration; /* Seconds to keep new params applied */ 7192 uint16 reserved; 7193 wl_pfn_mpf_state_params_t override; 7194 } wl_pfn_override_param_t; 7195 #define WL_PFN_OVERRIDE_VERSION 1 7196 7197 /* 7198 * Definitions for base MPF configuration 7199 */ 7200 7201 #define WL_MPF_VERSION 1 7202 #define WL_MPF_MAX_BITS 3 7203 #define WL_MPF_MAX_STATES (1 << WL_MPF_MAX_BITS) 7204 7205 #define WL_MPF_STATE_NAME_MAX 12 7206 7207 typedef struct wl_mpf_val { 7208 uint16 val; /* Value of GPIO bits */ 7209 uint16 state; /* State identifier */ 7210 char name[WL_MPF_STATE_NAME_MAX]; /* Optional name */ 7211 } wl_mpf_val_t; 7212 7213 typedef struct wl_mpf_map { 7214 uint16 version; 7215 uint16 type; 7216 uint16 mask; /* Which GPIO bits to use */ 7217 uint8 count; /* Count of state/value mappings */ 7218 uint8 PAD; 7219 wl_mpf_val_t vals[WL_MPF_MAX_STATES]; 7220 } wl_mpf_map_t; 7221 7222 #define WL_MPF_STATE_AUTO (0xFFFF) /* (uint16)-1) */ 7223 7224 typedef struct wl_mpf_state { 7225 uint16 version; 7226 uint16 type; 7227 uint16 state; /* Get/Set */ 7228 uint8 force; /* 0 - auto (HW) state, 1 - forced state */ 7229 char name[WL_MPF_STATE_NAME_MAX]; /* Get/Set: Optional/actual name */ 7230 uint8 PAD; 7231 } wl_mpf_state_t; 7232 /* 7233 * WLFCTS definition 7234 */ 7235 typedef struct wl_txstatus_additional_info { 7236 uint32 rspec; 7237 uint32 enq_ts; 7238 uint32 last_ts; 7239 uint32 entry_ts; 7240 uint16 seq; 7241 uint8 rts_cnt; 7242 uint8 tx_cnt; 7243 } wl_txstatus_additional_info_t; 7244 7245 /** Service discovery */ 7246 typedef struct { 7247 uint8 transaction_id; /**< Transaction id */ 7248 uint8 protocol; /**< Service protocol type */ 7249 uint16 query_len; /**< Length of query */ 7250 uint16 response_len; /**< Length of response */ 7251 uint8 qrbuf[]; 7252 } wl_p2po_qr_t; 7253 7254 typedef struct { 7255 uint16 period; /**< extended listen period */ 7256 uint16 interval; /**< extended listen interval */ 7257 uint16 count; /* count to repeat */ 7258 uint16 pad; /* pad for 32bit align */ 7259 } wl_p2po_listen_t; 7260 7261 /** GAS state machine tunable parameters. Structure field values of 0 means use the default. */ 7262 typedef struct wl_gas_config { 7263 uint16 max_retransmit; /**< Max # of firmware/driver retransmits on no Ack 7264 * from peer (on top of the ucode retries). 7265 */ 7266 uint16 response_timeout; /**< Max time to wait for a GAS-level response 7267 * after sending a packet. 7268 */ 7269 uint16 max_comeback_delay; /**< Max GAS response comeback delay. 7270 * Exceeding this fails the GAS exchange. 7271 */ 7272 uint16 max_retries; /**< Max # of GAS state machine retries on failure 7273 * of a GAS frame exchange. 7274 */ 7275 } wl_gas_config_t; 7276 7277 /** P2P Find Offload parameters */ 7278 typedef struct wl_p2po_find_config { 7279 uint16 version; /**< Version of this struct */ 7280 uint16 length; /**< sizeof(wl_p2po_find_config_t) */ 7281 int32 search_home_time; /**< P2P search state home time when concurrent 7282 * connection exists. -1 for default. 7283 */ 7284 uint8 num_social_channels; 7285 /**< Number of social channels up to WL_P2P_SOCIAL_CHANNELS_MAX. 7286 * 0 means use default social channels. 7287 */ 7288 uint8 flags; 7289 uint16 social_channels[1]; /**< Variable length array of social channels */ 7290 } wl_p2po_find_config_t; 7291 #define WL_P2PO_FIND_CONFIG_VERSION 2 /**< value for version field */ 7292 7293 /** wl_p2po_find_config_t flags */ 7294 #define P2PO_FIND_FLAG_SCAN_ALL_APS 0x01 /**< Whether to scan for all APs in the p2po_find 7295 * periodic scans of all channels. 7296 * 0 means scan for only P2P devices. 7297 * 1 means scan for P2P devices plus non-P2P APs. 7298 */ 7299 7300 /** For adding a WFDS service to seek */ 7301 typedef struct { 7302 uint32 seek_hdl; /**< unique id chosen by host */ 7303 uint8 addr[6]; /**< Seek service from a specific device with this 7304 * MAC address, all 1's for any device. 7305 */ 7306 uint8 service_hash[P2P_WFDS_HASH_LEN]; 7307 uint8 service_name_len; 7308 uint8 service_name[MAX_WFDS_SEEK_SVC_NAME_LEN]; 7309 /**< Service name to seek, not null terminated */ 7310 uint8 service_info_req_len; 7311 uint8 service_info_req[1]; /**< Service info request, not null terminated. 7312 * Variable length specified by service_info_req_len. 7313 * Maximum length is MAX_WFDS_SEEK_SVC_INFO_LEN. 7314 */ 7315 } wl_p2po_wfds_seek_add_t; 7316 7317 /** For deleting a WFDS service to seek */ 7318 typedef struct { 7319 uint32 seek_hdl; /**< delete service specified by id */ 7320 } wl_p2po_wfds_seek_del_t; 7321 7322 /** For adding a WFDS service to advertise */ 7323 #include <packed_section_start.h> 7324 typedef BWL_PRE_PACKED_STRUCT struct { 7325 uint32 advertise_hdl; /**< unique id chosen by host */ 7326 uint8 service_hash[P2P_WFDS_HASH_LEN]; 7327 uint32 advertisement_id; 7328 uint16 service_config_method; 7329 uint8 service_name_len; 7330 uint8 service_name[MAX_WFDS_SVC_NAME_LEN]; 7331 /**< Service name , not null terminated */ 7332 uint8 service_status; 7333 uint16 service_info_len; 7334 uint8 service_info[1]; /**< Service info, not null terminated. 7335 * Variable length specified by service_info_len. 7336 * Maximum length is MAX_WFDS_ADV_SVC_INFO_LEN. 7337 */ 7338 } BWL_POST_PACKED_STRUCT wl_p2po_wfds_advertise_add_t; 7339 #include <packed_section_end.h> 7340 7341 /** For deleting a WFDS service to advertise */ 7342 typedef struct { 7343 uint32 advertise_hdl; /**< delete service specified by hdl */ 7344 } wl_p2po_wfds_advertise_del_t; 7345 7346 /** P2P Offload discovery mode for the p2po_state iovar */ 7347 typedef enum { 7348 WL_P2PO_DISC_STOP, 7349 WL_P2PO_DISC_LISTEN, 7350 WL_P2PO_DISC_DISCOVERY 7351 } disc_mode_t; 7352 7353 /* ANQP offload */ 7354 7355 #define ANQPO_MAX_QUERY_SIZE 256 7356 typedef struct { 7357 uint16 max_retransmit; /**< ~0 use default, max retransmit on no ACK from peer */ 7358 uint16 response_timeout; /**< ~0 use default, msec to wait for resp after tx packet */ 7359 uint16 max_comeback_delay; /**< ~0 use default, max comeback delay in resp else fail */ 7360 uint16 max_retries; /**< ~0 use default, max retries on failure */ 7361 uint16 query_len; /**< length of ANQP query */ 7362 uint8 query_data[1]; /**< ANQP encoded query (max ANQPO_MAX_QUERY_SIZE) */ 7363 } wl_anqpo_set_t; 7364 7365 #define WL_ANQPO_FLAGS_BSSID_WILDCARD 0x0001 7366 #define WL_ANQPO_PEER_LIST_VERSION_2 2 7367 typedef struct { 7368 uint16 channel; /**< channel of the peer */ 7369 struct ether_addr addr; /**< addr of the peer */ 7370 } wl_anqpo_peer_v1_t; 7371 typedef struct { 7372 uint16 channel; /**< channel of the peer */ 7373 struct ether_addr addr; /**< addr of the peer */ 7374 uint32 flags; /**< 0x01-Peer is MBO Capable */ 7375 } wl_anqpo_peer_v2_t; 7376 7377 #define WL_ANQPO_PEER_LIST_VERSION_3 3 7378 typedef struct { 7379 uint16 chanspec; /**< chanspec of the peer */ 7380 struct ether_addr addr; /**< addr of the peer */ 7381 uint32 flags; /**< 0x01-Peer is MBO Capable */ 7382 } wl_anqpo_peer_v3_t; 7383 7384 #define ANQPO_MAX_PEER_LIST 64 7385 typedef struct { 7386 uint16 count; /**< number of peers in list */ 7387 wl_anqpo_peer_v1_t peer[1]; /**< max ANQPO_MAX_PEER_LIST */ 7388 } wl_anqpo_peer_list_v1_t; 7389 7390 typedef struct { 7391 uint16 version; /**<VERSION */ 7392 uint16 length; /**< length of entire structure */ 7393 uint16 count; /**< number of peers in list */ 7394 wl_anqpo_peer_v2_t peer[1]; /**< max ANQPO_MAX_PEER_LIST */ 7395 } wl_anqpo_peer_list_v2_t; 7396 7397 typedef struct { 7398 uint16 version; /**< VERSION */ 7399 uint16 length; /**< length of entire structure */ 7400 uint16 count; /**< number of peers in list */ 7401 wl_anqpo_peer_v3_t peer[]; /**< max ANQPO_MAX_PEER_LIST */ 7402 } wl_anqpo_peer_list_v3_t; 7403 7404 #ifndef WL_ANQPO_PEER_LIST_TYPEDEF_HAS_ALIAS 7405 typedef wl_anqpo_peer_list_v1_t wl_anqpo_peer_list_t; 7406 typedef wl_anqpo_peer_v1_t wl_anqpo_peer_t; 7407 #endif /* WL_ANQPO_PEER_LIST_TYPEDEF_HAS_ALIAS */ 7408 7409 #define ANQPO_MAX_IGNORE_SSID 64 7410 typedef struct { 7411 uint8 is_clear; /**< set to clear list (not used on GET) */ 7412 uint8 PAD; 7413 uint16 count; /**< number of SSID in list */ 7414 wlc_ssid_t ssid[1]; /**< max ANQPO_MAX_IGNORE_SSID */ 7415 } wl_anqpo_ignore_ssid_list_t; 7416 7417 #define ANQPO_MAX_IGNORE_BSSID 64 7418 typedef struct { 7419 uint8 is_clear; /**< set to clear list (not used on GET) */ 7420 uint8 PAD; 7421 uint16 count; /**< number of addr in list */ 7422 struct ether_addr bssid[]; /**< max ANQPO_MAX_IGNORE_BSSID */ 7423 } wl_anqpo_ignore_bssid_list_t; 7424 7425 struct toe_ol_stats_t { 7426 /** Num of tx packets that don't need to be checksummed */ 7427 uint32 tx_summed; 7428 7429 /* Num of tx packets where checksum is filled by offload engine */ 7430 uint32 tx_iph_fill; 7431 uint32 tx_tcp_fill; 7432 uint32 tx_udp_fill; 7433 uint32 tx_icmp_fill; 7434 7435 /* Num of rx packets where toe finds out if checksum is good or bad */ 7436 uint32 rx_iph_good; 7437 uint32 rx_iph_bad; 7438 uint32 rx_tcp_good; 7439 uint32 rx_tcp_bad; 7440 uint32 rx_udp_good; 7441 uint32 rx_udp_bad; 7442 uint32 rx_icmp_good; 7443 uint32 rx_icmp_bad; 7444 7445 /* Num of tx packets in which csum error is injected */ 7446 uint32 tx_tcp_errinj; 7447 uint32 tx_udp_errinj; 7448 uint32 tx_icmp_errinj; 7449 7450 /* Num of rx packets in which csum error is injected */ 7451 uint32 rx_tcp_errinj; 7452 uint32 rx_udp_errinj; 7453 uint32 rx_icmp_errinj; 7454 }; 7455 7456 /** Arp offload statistic counts */ 7457 struct arp_ol_stats_t { 7458 uint32 host_ip_entries; /**< Host IP table addresses (more than one if multihomed) */ 7459 uint32 host_ip_overflow; /**< Host IP table additions skipped due to overflow */ 7460 7461 uint32 arp_table_entries; /**< ARP table entries */ 7462 uint32 arp_table_overflow; /**< ARP table additions skipped due to overflow */ 7463 7464 uint32 host_request; /**< ARP requests from host */ 7465 uint32 host_reply; /**< ARP replies from host */ 7466 uint32 host_service; /**< ARP requests from host serviced by ARP Agent */ 7467 7468 uint32 peer_request; /**< ARP requests received from network */ 7469 uint32 peer_request_drop; /**< ARP requests from network that were dropped */ 7470 uint32 peer_reply; /**< ARP replies received from network */ 7471 uint32 peer_reply_drop; /**< ARP replies from network that were dropped */ 7472 uint32 peer_service; /**< ARP request from host serviced by ARP Agent */ 7473 }; 7474 7475 /** NS offload statistic counts */ 7476 struct nd_ol_stats_t { 7477 uint32 host_ip_entries; /**< Host IP table addresses (more than one if multihomed) */ 7478 uint32 host_ip_overflow; /**< Host IP table additions skipped due to overflow */ 7479 uint32 peer_request; /**< NS requests received from network */ 7480 uint32 peer_request_drop; /**< NS requests from network that were dropped */ 7481 uint32 peer_reply_drop; /**< NA replies from network that were dropped */ 7482 uint32 peer_service; /**< NS request from host serviced by firmware */ 7483 }; 7484 7485 /* 7486 * Neighbor Discovery Offloading 7487 */ 7488 enum { 7489 WL_ND_IPV6_ADDR_TYPE_UNICAST = 0, 7490 WL_ND_IPV6_ADDR_TYPE_ANYCAST 7491 }; 7492 7493 typedef struct wl_nd_host_ip_addr { 7494 struct ipv6_addr ip_addr; /* host ip address */ 7495 uint8 type; /* type of address */ 7496 uint8 pad[3]; 7497 } wl_nd_host_ip_addr_t; 7498 7499 typedef struct wl_nd_host_ip_list { 7500 uint32 count; 7501 wl_nd_host_ip_addr_t host_ip[1]; 7502 } wl_nd_host_ip_list_t; 7503 7504 #define WL_ND_HOSTIP_IOV_VER 1 7505 7506 enum { 7507 WL_ND_HOSTIP_OP_VER = 0, /* get version */ 7508 WL_ND_HOSTIP_OP_ADD, /* add address */ 7509 WL_ND_HOSTIP_OP_DEL, /* delete specified address */ 7510 WL_ND_HOSTIP_OP_DEL_UC, /* delete all unicast address */ 7511 WL_ND_HOSTIP_OP_DEL_AC, /* delete all anycast address */ 7512 WL_ND_HOSTIP_OP_DEL_ALL, /* delete all addresses */ 7513 WL_ND_HOSTIP_OP_LIST, /* get list of host ip address */ 7514 WL_ND_HOSTIP_OP_MAX 7515 }; 7516 7517 typedef struct wl_nd_hostip { 7518 uint16 version; /* version of iovar buf */ 7519 uint16 op_type; /* operation type */ 7520 uint32 length; /* length of entire structure */ 7521 union { 7522 wl_nd_host_ip_addr_t host_ip; /* set param for add */ 7523 uint16 version; /* get return for ver */ 7524 } u; 7525 } wl_nd_hostip_t; 7526 7527 #define WL_ND_HOSTIP_FIXED_LEN OFFSETOF(wl_nd_hostip_t, u) 7528 #define WL_ND_HOSTIP_WITH_ADDR_LEN (WL_ND_HOSTIP_FIXED_LEN + sizeof(wl_nd_host_ip_addr_t)) 7529 7530 /* 7531 * Keep-alive packet offloading. 7532 */ 7533 7534 /** 7535 * NAT keep-alive packets format: specifies the re-transmission period, the packet 7536 * length, and packet contents. 7537 */ 7538 typedef struct wl_keep_alive_pkt { 7539 uint32 period_msec; /** Retransmission period (0 to disable packet re-transmits) */ 7540 uint16 len_bytes; /* Size of packet to transmit (0 to disable packet re-transmits) */ 7541 uint8 data[1]; /** Variable length packet to transmit. Contents should include 7542 * entire ethernet packet (enet header, IP header, UDP header, 7543 * and UDP payload) in network byte order. 7544 */ 7545 } wl_keep_alive_pkt_t; 7546 7547 #define WL_KEEP_ALIVE_FIXED_LEN OFFSETOF(wl_keep_alive_pkt_t, data) 7548 7549 #define MAX_RSSI_COUNT 8 7550 typedef struct rssi_struct { 7551 int8 val[MAX_RSSI_COUNT]; /**< rssi values in AFs */ 7552 int16 sum; /**< total rssi sum */ 7553 uint8 cnt; /**< number rssi samples */ 7554 uint8 idx; /**< next rssi location */ 7555 } rssi_struct_t; 7556 7557 #ifdef WLDFSP 7558 #define DFSP_EVT_OFFSET OFFSETOF(dfsp_event_data_t, ie) 7559 #define DFSP_EVT_FLAGS_AP_ASSOC (1 << 0) 7560 #define DFSP_EVT_FLAGS_AP_BCNMON (1 << 1) 7561 #define DFSP_EVT_FLAGS_PROXY_BCSA (1 << 2) 7562 #define DFSP_EVT_FLAGS_PROXY_UCSA (1 << 3) 7563 #define DFSP_EVT_FLAGS_PROXY_PCSA (1 << 4) 7564 7565 typedef struct dfsp_event_data { 7566 uint16 flags; /* indicate what triggers the event */ 7567 uint16 ie_len; 7568 uint8 ie[]; /* variable length */ 7569 } dfsp_event_data_t; 7570 7571 /* Proxy Channel Switch Announcement is a collection of IEs */ 7572 typedef struct dfsp_pcsa { 7573 dot11_ext_csa_ie_t ecsa; 7574 dot11_mesh_csp_ie_t mcsp; 7575 dot11_wide_bw_chan_switch_ie_t wbcs; 7576 } dfsp_pcsa_t; 7577 7578 /* DFS Proxy */ 7579 #define DFSP_CFG_VERSION 1 7580 #define DFSP_FLAGS_ENAB 0x1 7581 typedef struct dfsp_cfg { 7582 uint16 version; 7583 uint16 len; 7584 uint16 flags; /**< bit 1 to enable/disable the feature */ 7585 uint16 max_bcn_miss_dur; /**< maximum beacon miss duration before ceasing data tx */ 7586 uint8 mcsp_ttl; /**< remaining number of hops allowed for pcsa message */ 7587 uint8 bcsa_cnt; /**< repeat numbers of broadcast CSA */ 7588 chanspec_t mon_chan; /**< passive monitoring channel spec */ 7589 struct ether_addr mon_bssid; /**< broadcast means monitoring all */ 7590 uint16 max_bcn_miss_dur_af; /**< maximum beacon miss duration before ceasing AF tx */ 7591 } dfsp_cfg_t; 7592 7593 #define DFSP_UCSA_VERSION 1 7594 typedef struct dfsp_ucsa { 7595 uint16 version; 7596 uint16 len; 7597 struct ether_addr address; 7598 uint8 enable; 7599 uint8 retry_cnt; /**< just in case host needs to control the value */ 7600 } dfsp_ucsa_t; 7601 7602 typedef struct dfsp_ucsa_tbl { 7603 uint8 tbl_num; 7604 uint8 tbl[]; 7605 } dfsp_ucsa_tbl_t; 7606 7607 typedef struct dfsp_stats { 7608 uint32 dfsp_csainfra; 7609 uint32 dfsp_csabcnmon; 7610 uint32 dfsp_bcsarx; 7611 uint32 dfsp_ucsarx; 7612 uint32 dfsp_pcsarx; 7613 uint32 dfsp_bcsatx; 7614 uint32 dfsp_ucsatx; 7615 uint32 dfsp_pcsatx; 7616 uint32 dfsp_ucsatxfail; 7617 uint32 dfsp_evtnotif; 7618 uint32 dfsp_evtsuspect; 7619 uint32 dfsp_evtresume; 7620 } dfsp_stats_t; 7621 #endif /* WLDFSP */ 7622 7623 #ifdef WLAWDL 7624 #include <packed_section_start.h> 7625 typedef BWL_PRE_PACKED_STRUCT struct awdl_dfsp_params_tlv { 7626 uint8 type; 7627 uint16 len; 7628 uint8 ie[]; /* variable length */ 7629 } BWL_POST_PACKED_STRUCT awdl_dfsp_params_tlv_t; 7630 #include <packed_section_end.h> 7631 7632 #define AWDL_DFSP_BCN_TLV_VALUE_OFFSET OFFSETOF(awdl_dfsp_bcn_tlv_t, time_since_bcn) 7633 #include <packed_section_start.h> 7634 typedef BWL_PRE_PACKED_STRUCT struct awdl_dfsp_bcn_tlv { 7635 uint8 type; 7636 uint16 len; 7637 uint16 time_since_bcn; /* last time beacon seen in ms */ 7638 } BWL_POST_PACKED_STRUCT awdl_dfsp_bcn_tlv_t; 7639 #include <packed_section_end.h> 7640 7641 #if !defined(WLDFSP) 7642 #define AWDL_DFSP_EVT_OFFSET OFFSETOF(awdl_dfsp_event_data_t, ie) 7643 #define AWDL_DFSP_EVT_FLAGS_AP_ASSOC (1 << 0) 7644 #define AWDL_DFSP_EVT_FLAGS_AP_BCNMON (1 << 1) 7645 #define AWDL_DFSP_EVT_FLAGS_PROXY_BCSA (1 << 2) 7646 #define AWDL_DFSP_EVT_FLAGS_PROXY_UCSA (1 << 3) 7647 #define AWDL_DFSP_EVT_FLAGS_PROXY_PCSA (1 << 4) 7648 7649 typedef struct awdl_dfsp_event_data { 7650 uint16 flags; /* indicate what triggers the event */ 7651 uint16 ie_len; 7652 uint8 ie[]; /* variable length */ 7653 } awdl_dfsp_event_data_t; 7654 7655 typedef struct awdl_dfsp_stats { 7656 uint32 dfsp_csainfra; 7657 uint32 dfsp_csabcnmon; 7658 uint32 dfsp_bcsarx; 7659 uint32 dfsp_ucsarx; 7660 uint32 dfsp_pcsarx; 7661 uint32 dfsp_bcsatx; 7662 uint32 dfsp_ucsatx; 7663 uint32 dfsp_pcsatx; 7664 uint32 dfsp_ucsatxfail; 7665 uint32 dfsp_evtnotif; 7666 uint32 dfsp_evtsuspect; 7667 uint32 dfsp_evtresume; 7668 } awdl_dfsp_stats_t; 7669 7670 /* awdl peer as a DFS Proxy */ 7671 #define AWDL_DFSP_CFG_VERSION 1 7672 #define AWDL_DFSP_FLAGS_ENAB 0x1 7673 typedef struct awdl_dfsp_cfg { 7674 uint16 version; 7675 uint16 len; 7676 uint16 flags; /**< bit 1 to enable/disable the feature */ 7677 uint16 max_bcn_miss_dur; /**< maximum beacon miss duration before ceasing data tx */ 7678 uint8 mcsp_ttl; /**< remaining number of hops allowed for pcsa message */ 7679 uint8 bcsa_cnt; /**< repeat numbers of broadcast CSA */ 7680 chanspec_t mon_chan; /**< passive monitoring channel spec */ 7681 struct ether_addr mon_bssid; /**< broadcast means monitoring all */ 7682 uint16 max_bcn_miss_dur_af; /**< maximum beacon miss duration before ceasing AF tx */ 7683 } awdl_dfsp_cfg_t; 7684 7685 #define AWDL_DFSP_UCSA_VERSION 1 7686 typedef struct awdl_dfsp_ucsa { 7687 uint16 version; 7688 uint16 len; 7689 struct ether_addr address; 7690 uint8 enable; 7691 uint8 retry_cnt; /**< just in case host needs to control the value */ 7692 } awdl_dfsp_ucsa_t; 7693 7694 typedef struct awdl_dfsp_ucsa_tbl { 7695 uint8 tbl_num; 7696 uint8 tbl[]; 7697 } awdl_dfsp_ucsa_tbl_t; 7698 #endif /* defined(WLDFSP) */ 7699 7700 #if defined(WLDFSP) 7701 /* backward compatibility */ 7702 typedef dfsp_stats_t awdl_dfsp_stats_t; 7703 #define AWDL_DFSP_EVT_OFFSET DFSP_EVT_OFFSET 7704 #define AWDL_DFSP_EVT_FLAGS_AP_ASSOC DFSP_EVT_FLAGS_AP_ASSOC 7705 #define AWDL_DFSP_EVT_FLAGS_AP_BCNMON DFSP_EVT_FLAGS_AP_BCNMON 7706 #define AWDL_DFSP_EVT_FLAGS_PROXY_BCSA DFSP_EVT_FLAGS_PROXY_BCSA 7707 #define AWDL_DFSP_EVT_FLAGS_PROXY_UCSA DFSP_EVT_FLAGS_PROXY_UCSA 7708 #define AWDL_DFSP_EVT_FLAGS_PROXY_PCSA DFSP_EVT_FLAGS_PROXY_PCSA 7709 #define AWDL_DFSP_CFG_VERSION 1 7710 #define AWDL_DFSP_FLAGS_ENAB DFSP_FLAGS_ENAB 7711 typedef dfsp_cfg_t awdl_dfsp_cfg_t; 7712 #define AWDL_DFSP_UCSA_VERSION 1 7713 typedef dfsp_ucsa_t awdl_dfsp_ucsa_t; 7714 typedef dfsp_ucsa_tbl_t awdl_dfsp_ucsa_tbl_t; 7715 #endif /* !WLDFSP */ 7716 7717 /* AWDL additional capability indicator */ 7718 typedef uint32 awdl_cap_mask_t; 7719 7720 #define WLC_AWDL_CAP_SEC_PAYLOAD 0x1u 7721 #define WLC_AWDL_CAP_CCA_STATS 0x2u 7722 #define WLC_AWDL_CAP_VERSION 2u 7723 #define WLC_AWDL_CAP_BMAP_SIZE sizeof(awdl_cap_mask_t) 7724 7725 typedef struct awdl_cap_info { 7726 uint16 version; /* Cap structure version */ 7727 uint16 length; /* Length: Includes version 7728 + length + variable 7729 data - 1byte(uint8) 7730 */ 7731 uint8 awdl_cap[0]; /* Variable size data */ 7732 } awdl_cap_info_t; 7733 7734 typedef struct awdl_af_sec_payload { 7735 uint16 version; /* Version of this structure */ 7736 uint16 length; /* Length of this entire struct including payload */ 7737 uint16 pri_pload_bm; /* Primary payload bitmask */ 7738 uint16 sec_pload_bm; /* Secondary payload bitmask */ 7739 uint8 payload[]; /* Secondary Payload */ 7740 } awdl_af_sec_payload_t; 7741 7742 typedef struct awdl_config_params { 7743 uint32 version; 7744 uint8 awdl_chan; /**< awdl channel */ 7745 uint8 guard_time; /**< Guard Time */ 7746 uint16 aw_period; /**< AW interval period */ 7747 uint16 aw_cmn_length; /**< Radio on Time AW */ 7748 uint16 action_frame_period; /**< awdl action frame period */ 7749 uint16 awdl_pktlifetime; /**< max packet life time in msec for awdl action frames */ 7750 uint16 awdl_maxnomaster; /**< max master missing time */ 7751 uint16 awdl_extcount; /**< Max extended period count for traffic */ 7752 uint16 aw_ext_length; /**< AW ext period */ 7753 uint16 awdl_nmode; /**< Operation mode of awdl interface; * 0 - Legacy mode 7754 * 1 - 11n rate only * 2 - 11n + ampdu rx/tx 7755 */ 7756 struct ether_addr ea; /**< destination bcast/mcast address to which action frame 7757 * need to be sent 7758 */ 7759 } awdl_config_params_t; 7760 7761 typedef struct wl_awdl_action_frame { 7762 uint16 len_bytes; 7763 uint8 awdl_action_frame_data[1]; 7764 } wl_awdl_action_frame_t; 7765 7766 #define WL_AWDL_ACTION_FRAME_FIXED_LEN OFFSETOF(wl_awdl_action_frame_t, awdl_sync_frame) 7767 7768 typedef struct awdl_peer_node { 7769 uint32 type_state; /**< Master, slave , etc.. */ 7770 uint16 aw_counter; /**< avail window counter */ 7771 int8 rssi; /**< rssi last af was received at */ 7772 int8 last_rssi; /**< rssi in the last AF */ 7773 uint16 tx_counter; /**<count down timer to next AW */ 7774 uint16 tx_delay; /**< ts_hw - ts_fw */ 7775 uint16 period_tu; 7776 uint16 aw_period; /**< AW period - aw_cmn + ext * ext_len */ 7777 uint16 aw_cmn_length; /**< Common AW length */ 7778 uint16 aw_ext_length; /**< AW_EXT length */ 7779 uint32 self_metrics; /**< Election Metric */ 7780 uint32 top_master_metrics; /**< Top Master Metric */ 7781 struct ether_addr addr; 7782 struct ether_addr top_master; 7783 uint8 dist_top; /**< Distance from Top */ 7784 uint8 has_private_election_params; 7785 struct ether_addr private_top_master; 7786 uint32 private_top_master_metric; 7787 uint32 private_election_ID; 7788 uint8 private_distance_from_top; 7789 uint8 PAD[3]; 7790 } awdl_peer_node_t; 7791 7792 typedef struct awdl_peer_table { 7793 uint16 version; 7794 uint16 len; 7795 uint8 peer_nodes[1]; 7796 } awdl_peer_table_t; 7797 7798 /* structure for adding advertisers from host */ 7799 typedef struct awdl_peer_advet_add { 7800 uint16 aw_counter; /* avail window counter */ 7801 uint16 tx_counter; /* Down counter */ 7802 uint16 tx_delay; /* ts_hw - ts_fw */ 7803 uint16 period_tu; 7804 uint16 aw_cmn_length; 7805 uint16 aw_ext_length; 7806 uint16 aw_period; 7807 int8 rssi; /* RSSI value */ 7808 uint8 guard_time; 7809 uint8 presence_mode; 7810 uint8 age; /* age of this record */ 7811 uint8 dist_top; /* Distance from Top */ 7812 uint8 PAD; 7813 uint32 ms; /* time at which we received the AF */ 7814 uint32 self_metrics; /* election metric */ 7815 uint32 top_master_metrics; 7816 struct ether_addr top_master; /* Top Master address */ 7817 struct ether_addr addr; /* Peer address to be added */ 7818 } awdl_peer_advet_add_t; 7819 7820 typedef struct awdl_af_hdr { 7821 struct ether_addr dst_mac; 7822 uint8 action_hdr[4]; /**< Category + OUI[3] */ 7823 } awdl_af_hdr_t; 7824 7825 typedef struct awdl_oui { 7826 uint8 oui[3]; /**< default: 0x00 0x17 0xf2 */ 7827 uint8 oui_type; /**< AWDL: 0x08 */ 7828 } awdl_oui_t; 7829 7830 typedef struct awdl_hdr { 7831 uint8 type; /**< 0x08 AWDL */ 7832 uint8 version; 7833 uint8 sub_type; /**< Sub type */ 7834 uint8 rsvd; /**< Reserved */ 7835 uint32 phy_timestamp; /**< PHY Tx time */ 7836 uint32 fw_timestamp; /**< Target Tx time */ 7837 } awdl_hdr_t; 7838 7839 #ifndef AWDL_DEFAULT_MAX_PEERS 7840 #define AWDL_DEFAULT_MAX_PEERS 8 7841 #endif /* AWDL_DEFAULT_MAX_PEERS */ 7842 7843 /* AWDL AF flags for awdl_oob_af iovar */ 7844 #define AWDL_OOB_AF_FILL_TSF_PARAMS 0x00000001 7845 #define AWDL_OOB_AF_FILL_SYNC_PARAMS 0x00000002 7846 #define AWDL_OOB_AF_FILL_ELECT_PARAMS 0x00000004 7847 #define AWDL_OOB_AF_PARAMS_SIZE 38 7848 7849 #include <packed_section_start.h> 7850 typedef BWL_PRE_PACKED_STRUCT struct awdl_oob_af_params { 7851 struct ether_addr bssid; 7852 struct ether_addr dst_mac; 7853 uint32 channel; 7854 uint32 dwell_time; 7855 uint32 flags; 7856 uint32 pkt_lifetime; 7857 uint32 tx_rate; 7858 uint32 max_retries; /**< for unicast frames only */ 7859 uint16 payload_len; 7860 uint8 payload[1]; /**< complete AF payload */ 7861 } BWL_POST_PACKED_STRUCT awdl_oob_af_params_t; 7862 #include <packed_section_end.h> 7863 7864 #include <packed_section_start.h> 7865 typedef BWL_PRE_PACKED_STRUCT struct awdl_oob_af_params_async { 7866 uint32 tx_time; /**< tsf time to transmit, in usec */ 7867 uint16 tag; /**< packet tag */ 7868 struct ether_addr bssid; 7869 struct ether_addr dst_mac; 7870 uint32 channel; 7871 uint32 dwell_time; 7872 uint32 flags; 7873 uint32 pkt_lifetime; 7874 uint32 tx_rate; 7875 uint32 max_retries; /**< for unicast frames only */ 7876 uint16 payload_len; 7877 uint8 payload[1]; /**< complete AF payload */ 7878 } BWL_POST_PACKED_STRUCT awdl_oob_af_params_async_t; 7879 #include <packed_section_end.h> 7880 7881 #include <packed_section_start.h> 7882 typedef BWL_PRE_PACKED_STRUCT struct awdl_oob_af_params_auto { 7883 uint32 tx_chan_map; /**< bitmap for the channels in the chan seq to transmit the af */ 7884 uint32 tx_aws_offset; /**< time to transmit from the aw start, in usec */ 7885 struct ether_addr bssid; 7886 struct ether_addr dst_mac; 7887 uint32 channel; 7888 uint32 dwell_time; 7889 uint32 flags; 7890 uint32 pkt_lifetime; 7891 uint32 tx_rate; 7892 uint32 max_retries; /**< for unicast frames only */ 7893 uint16 payload_len; 7894 uint8 payload[1]; /**< complete AF payload */ 7895 } BWL_POST_PACKED_STRUCT awdl_oob_af_params_auto_t; 7896 #include <packed_section_end.h> 7897 7898 #include <packed_section_start.h> 7899 typedef BWL_PRE_PACKED_STRUCT struct awdl_sync_params { 7900 uint8 type; /**< Type */ 7901 uint16 param_len; /**< sync param length */ 7902 uint8 tx_chan; /**< tx channel */ 7903 uint16 tx_counter; /**< tx down counter */ 7904 uint8 master_chan; /**< master home channel */ 7905 uint8 guard_time; /**< Guard Time */ 7906 uint16 aw_period; /**< AW period */ 7907 uint16 action_frame_period; /**< awdl action frame period */ 7908 uint16 awdl_flags; /**< AWDL Flags */ 7909 uint16 aw_ext_length; /**< AW extention len */ 7910 uint16 aw_cmn_length; /**< AW common len */ 7911 uint16 aw_remaining; /**< Remaining AW length */ 7912 uint8 min_ext; /**< Minimum Extention count */ 7913 uint8 max_ext_multi; /**< Max multicast Extention count */ 7914 uint8 max_ext_uni; /**< Max unicast Extention count */ 7915 uint8 max_ext_af; /**< Max af Extention count */ 7916 struct ether_addr current_master; /**< Current Master mac addr */ 7917 uint8 presence_mode; /**< Presence mode */ 7918 uint8 reserved; 7919 uint16 aw_counter; /**< AW seq# */ 7920 uint16 ap_bcn_alignment_delta; /**< AP Beacon alignment delta */ 7921 } BWL_POST_PACKED_STRUCT awdl_sync_params_t; 7922 #include <packed_section_end.h> 7923 7924 #include <packed_section_start.h> 7925 typedef BWL_PRE_PACKED_STRUCT struct awdl_channel_sequence { 7926 uint8 aw_seq_len; /**< AW seq length */ 7927 uint8 aw_seq_enc; /**< AW seq encoding */ 7928 uint8 aw_seq_duplicate_cnt; /**< AW seq dupilcate count */ 7929 uint8 seq_step_cnt; /**< Seq spet count */ 7930 uint16 seq_fill_chan; /**< channel to fill in; 0xffff repeat current channel */ 7931 uint8 chan_sequence[1]; /**< Variable list of channel Sequence */ 7932 } BWL_POST_PACKED_STRUCT awdl_channel_sequence_t; 7933 #include <packed_section_end.h> 7934 #define WL_AWDL_CHAN_SEQ_FIXED_LEN OFFSETOF(awdl_channel_sequence_t, chan_sequence) 7935 7936 #include <packed_section_start.h> 7937 typedef BWL_PRE_PACKED_STRUCT struct awdl_election_info { 7938 uint8 election_flags; /**< Election Flags */ 7939 uint16 election_ID; /**< Election ID */ 7940 uint32 self_metrics; 7941 } BWL_POST_PACKED_STRUCT awdl_election_info_t; 7942 #include <packed_section_end.h> 7943 7944 /* This is the super set of the one above. Will retire that one once this one is established */ 7945 #include <packed_section_start.h> 7946 typedef BWL_PRE_PACKED_STRUCT struct awdl_election_tree_info { 7947 uint8 election_flags; /**< Election Flags */ 7948 uint16 election_ID; /**< Election ID */ 7949 uint32 self_metrics; 7950 int8 close_sync_rssi_thld; 7951 int8 master_rssi_boost; 7952 int8 edge_sync_rssi_thld; 7953 int8 close_range_rssi_thld; 7954 int8 mid_range_rssi_thld; 7955 uint8 max_higher_masters_close_range; 7956 uint8 max_higher_masters_mid_range; 7957 uint8 max_tree_depth; 7958 /* read only */ 7959 struct ether_addr top_master; /**< top Master mac addr */ 7960 uint32 top_master_self_metric; 7961 uint8 current_tree_depth; 7962 7963 uint8 edge_master_dwell_cnt; 7964 struct ether_addr private_top_master; /**< private top Master mac addr */ 7965 uint32 private_top_master_metric; 7966 uint32 private_election_ID; 7967 uint8 private_distance_from_top; 7968 } BWL_POST_PACKED_STRUCT awdl_election_tree_info_t; 7969 #include <packed_section_end.h> 7970 7971 #include <packed_section_start.h> 7972 typedef BWL_PRE_PACKED_STRUCT struct awdl_election_params_tlv { 7973 uint8 type; /**< Type */ 7974 uint16 param_len; /**< Election param length */ 7975 uint8 election_flags; /**< Election Flags */ 7976 uint16 election_ID; /**< Election ID */ 7977 uint8 dist_top; /**< Distance from Top */ 7978 uint8 rsvd; /**< Reserved */ 7979 struct ether_addr top_master; /**< Top Master mac addr */ 7980 uint32 top_master_metrics; 7981 uint32 self_metrics; 7982 uint8 pad[2]; /**< Padding */ 7983 } BWL_POST_PACKED_STRUCT awdl_election_params_tlv_t; 7984 #include <packed_section_end.h> 7985 7986 /* 7987 * Definition in DINGO 7988 */ 7989 typedef struct awdl_opmode_v2 { 7990 uint8 mode; /* 0 - Auto; 1 - Fixed; 2 - Forced */ 7991 uint8 role; /* 0 - slave; 1 - non-elect master; 2 - master */ 7992 uint16 bcast_tu; /* Bcasting period(TU) for non-elect master */ 7993 struct ether_addr master; /* Address of master to sync to */ 7994 uint16 cur_bcast_tu; /* Current Bcasting Period(TU) */ 7995 uint8 master_type; 7996 uint8 dist_top; 7997 uint16 cluster_id; 7998 uint32 tsf_offset_h; 7999 uint32 tsf_offset_l; 8000 } awdl_opmode_v2_t; 8001 8002 typedef struct awdl_payload { 8003 uint16 len; /**< Payload length */ 8004 uint8 payload[1]; /**< Payload */ 8005 } awdl_payload_t; 8006 8007 typedef struct awdl_long_payload { 8008 uint8 long_psf_period; /**< transmit every long_psf_perios AWs */ 8009 uint8 long_psf_tx_offset; /**< delay from aw_start */ 8010 uint16 len; /**< Payload length */ 8011 uint8 payload[1]; /**< Payload */ 8012 } awdl_long_payload_t; 8013 8014 /* Values for awdl_opmode_t.role */ 8015 #define AWDL_ROLE_SLAVE 0 8016 #define AWDL_ROLE_NE_MASTER 1 8017 #define AWDL_ROLE_MASTER 2 8018 8019 #define SYNC_ROLE(role) (role & 0x0f) 8020 8021 /* For NAN-AWDL concurrent master type */ 8022 /* 8023 SELF: self master, mac address can be NULL and mgmt interface mac is used 8024 AWDL: align to AWDL master, AWDL desired mac master address must be provided. 8025 NAN: align to NAN master, NAN target master mac address must be provided. 8026 BOTH: align to both NAN/AWDL master, both mac addresses must be provided. 8027 has to guarantee the NAN and AWDL master is in the same tree. 8028 */ 8029 #define SYNC_MASTER_SELF 1 8030 #define SYNC_MASTER_AWDL 2 8031 #define SYNC_MASTER_NAN 3 8032 #define SYNC_MASTER_BOTH 4 8033 8034 /* use uper 4-bit to be the SYNC_MASTER_TYPE */ 8035 #define SYNC_MASTER_TYPE(role) ((role & 0xf0) >> 4) 8036 8037 /* 8038 * Definitions on PHO, BIS, TRUNK & IGU branches 8039 */ 8040 typedef struct awdl_opmode_v1 { 8041 uint8 mode; /* 0 - Auto; 1 - Fixed */ 8042 uint8 role; /* 0 - slave; 1 - non-elect master; 2 - master */ 8043 uint16 bcast_tu; /* Bcasting period(TU) for non-elect master */ 8044 struct ether_addr master; /* Address of master to sync to */ 8045 uint16 cur_bcast_tu; /* Current Bcasting Period(TU) */ 8046 } awdl_opmode_v1_t; 8047 8048 typedef awdl_opmode_v1_t awdl_opmode_t; 8049 8050 typedef union awdl_opmode_un { 8051 awdl_opmode_v1_t opmode_v1; 8052 awdl_opmode_v2_t opmode_v2; 8053 } awdl_opmode_un_t; 8054 8055 typedef struct awdl_extcount { 8056 uint8 minExt; /**< Min extension count */ 8057 uint8 maxExtMulti; /**< Max extension count for mcast packets */ 8058 uint8 maxExtUni; /**< Max extension count for unicast packets */ 8059 uint8 maxAfExt; /**< Max extension count */ 8060 } awdl_extcount_t; 8061 8062 #define AWDL_OPMODE_AUTO 0 8063 #define AWDL_OPMODE_FIXED 1 8064 #define AWDL_OPMODE_FORCED 2 /* Fixed Mode with Forced_mode on */ 8065 8066 /** peer add/del operation */ 8067 typedef struct awdl_peer_op { 8068 uint8 version; 8069 uint8 opcode; /**< see opcode definition */ 8070 struct ether_addr addr; 8071 uint8 mode; 8072 /* add other fixed fields here and increase the version number */ 8073 /* 0 or more TLVs at the end */ 8074 } awdl_peer_op_t; 8075 8076 /** peer op table */ 8077 typedef struct awdl_peer_op_tbl { 8078 uint16 len; /**< length */ 8079 uint8 tbl[1]; /**< Peer table */ 8080 } awdl_peer_op_tbl_t; 8081 8082 #include <packed_section_start.h> 8083 typedef BWL_PRE_PACKED_STRUCT struct awdl_peer_op_node { 8084 struct ether_addr addr; 8085 uint32 flags; /**< Flags to indicate various states */ 8086 uint16 chanseq_len; 8087 uint8 chanseq[1]; 8088 } BWL_POST_PACKED_STRUCT awdl_peer_op_node_t; 8089 #include <packed_section_end.h> 8090 8091 /* awdl_peer_op_node_t flags */ 8092 #define AWDL_PEER_NODE_OP_FLAG_HT 0x01 8093 #define AWDL_PEER_NODE_OP_FLAG_AMPDU 0x02 8094 #define AWDL_PEER_NODE_OP_FLAG_PM 0x04 8095 #define AWDL_PEER_NODE_OP_FLAG_ABAND 0x08 8096 #define AWDL_PEER_NODE_OP_FLAG_QOS 0x10 8097 #define AWDL_PEER_NODE_OP_FLAG_AWDL 0x20 8098 #define AWDL_PEER_NODE_OP_FLAG_VHT 0x40 8099 #define AWDL_PEER_OP_CUR_VER 0 8100 8101 #define AWDL_STATS_VERSION_3 3 8102 #define AWDL_STATS_CURRENT_VERSION AWDL_STATS_VERSION_3 8103 8104 /** AWDL related statistics */ 8105 typedef struct awdl_stats_core_v3 { 8106 uint32 slotstart; /* AW slot_start */ 8107 uint32 slotend; /* AW slot_end */ 8108 uint32 slotskip; /* AW slot_skip */ 8109 uint32 slotstart_partial; /* AW slot resume */ 8110 uint32 slotend_partial; /* AW slot pre-empt */ 8111 uint32 psfstart; /* PSF slot_start */ 8112 uint32 psfend; /* PSF slot_end */ 8113 uint32 psfskip; /* PSF slot_skip */ 8114 uint32 psfreqfail; /* PSF timeslot register fail */ 8115 uint32 psfcnt; /* Number of PSFs */ 8116 uint32 micnt; /* Number of MI frames */ 8117 uint32 chansw; /* Total number of chan switches */ 8118 uint32 awrealignfail; /* No of awrealign failures */ 8119 uint32 datatx; 8120 uint32 datarx; 8121 uint32 txdrop; 8122 uint32 rxdrop; 8123 uint32 monrx; 8124 uint32 txsupr; 8125 uint32 rx80211; 8126 } awdl_stats_core_v3_t; 8127 8128 typedef struct awdl_stats_cmn_v3 { 8129 uint32 afrx; 8130 uint32 aftx; 8131 uint32 lostmaster; 8132 uint32 misalign; 8133 uint32 aws; 8134 uint32 aw_dur; 8135 uint32 debug; 8136 uint32 afrxdrop; 8137 uint32 awdrop; 8138 uint32 noawchansw; 8139 uint32 peeropdrop; 8140 uint16 chancal; /* Used as a counter to track AWDL slots < 60TU */ 8141 uint16 nopreawint; 8142 uint32 awdropchsw; 8143 uint32 nopreawchsw; 8144 uint32 nopreawprep; 8145 uint32 aws_misalign; 8146 uint32 txeval_fail; 8147 uint32 infra_reqrcq; 8148 uint32 awdl_reqtxq; 8149 uint32 psfchanswtchskip; /* # chan. sw skipped during PSF xmit */ 8150 uint32 psfstateupdskip; /* # of PM updates skipped */ 8151 uint32 infra_offchpsf; 8152 uint32 awdl_offchpsf; 8153 uint32 chseqreq; 8154 uint32 peerdelreq; 8155 uint32 awend; 8156 uint32 awrealign; /* No of AW realigns */ 8157 uint32 awchmismatch; /* Channel mismatch between expcted ch and scheduled ch */ 8158 } awdl_stats_cmn_v3_t; 8159 8160 typedef struct awdl_stats_v3 { 8161 uint16 version; 8162 uint16 length; 8163 awdl_stats_cmn_v3_t cmnstats; 8164 awdl_stats_core_v3_t corestats[MAX_NUM_D11CORES]; 8165 awdl_dfsp_stats_t dfspstats; 8166 } awdl_stats_v3_t; 8167 8168 typedef struct awdl_stats_v2 { 8169 uint32 afrx; 8170 uint32 aftx; 8171 uint32 datatx; 8172 uint32 datarx; 8173 uint32 txdrop; 8174 uint32 rxdrop; 8175 uint32 monrx; 8176 uint32 lostmaster; 8177 uint32 misalign; 8178 uint32 aws; 8179 uint32 aw_dur; 8180 uint32 debug; 8181 uint32 txsupr; 8182 uint32 afrxdrop; 8183 uint32 awdrop; 8184 uint32 noawchansw; 8185 uint32 rx80211; 8186 uint32 peeropdrop; 8187 uint16 chancal; 8188 uint16 nopreawint; 8189 uint32 awdropchsw; 8190 uint32 nopreawchsw; 8191 uint32 nopreawprep; 8192 uint32 aws_misalign; 8193 uint32 txeval_fail; 8194 uint32 infra_reqrcq; 8195 uint32 awdl_reqtxq; 8196 uint32 psfchanswtchskip; /* # chan. sw skipped during PSF xmit */ 8197 uint32 psfstateupdskip; /* # of PM updates skipped */ 8198 uint32 dfsp_csainfra; 8199 uint32 dfsp_csabcnmon; 8200 uint32 dfsp_bcsarx; 8201 uint32 dfsp_ucsarx; 8202 uint32 dfsp_pcsarx; 8203 uint32 dfsp_bcsatx; 8204 uint32 dfsp_ucsatx; 8205 uint32 dfsp_pcsatx; 8206 uint32 dfsp_ucsatxfail; 8207 uint32 dfsp_evtnotif; 8208 uint32 dfsp_evtsuspect; 8209 uint32 dfsp_evtresume; 8210 } awdl_stats_v2_t; 8211 8212 typedef struct awdl_stats_v1 { 8213 uint32 afrx; 8214 uint32 aftx; 8215 uint32 datatx; 8216 uint32 datarx; 8217 uint32 txdrop; 8218 uint32 rxdrop; 8219 uint32 monrx; 8220 uint32 lostmaster; 8221 uint32 misalign; 8222 uint32 aws; 8223 uint32 aw_dur; 8224 uint32 debug; 8225 uint32 txsupr; 8226 uint32 afrxdrop; 8227 uint32 awdrop; 8228 uint32 noawchansw; 8229 uint32 rx80211; 8230 uint32 peeropdrop; 8231 uint16 chancal; 8232 uint16 nopreawint; 8233 uint32 awdropchsw; 8234 uint32 nopreawchsw; 8235 uint32 nopreawprep; 8236 uint32 infra_offchpsf; 8237 uint32 awdl_offchpsf; 8238 uint32 pmnoack; 8239 uint32 scanreq; 8240 uint32 chseqreq; 8241 uint32 peerdelreq; 8242 uint32 aws_misalign; 8243 uint32 txeval_fail; 8244 uint32 infra_reqrcq; 8245 uint32 awdl_reqtxq; 8246 uint32 psfchanswtchskip; /* # chan. sw skipped during PSF xmit */ 8247 uint32 psfstateupdskip; /* # of PM updates skipped */ 8248 uint32 dfsp_csainfra; 8249 uint32 dfsp_csabcnmon; 8250 uint32 dfsp_bcsarx; 8251 uint32 dfsp_ucsarx; 8252 uint32 dfsp_pcsarx; 8253 uint32 dfsp_bcsatx; 8254 uint32 dfsp_ucsatx; 8255 uint32 dfsp_pcsatx; 8256 uint32 dfsp_ucsatxfail; 8257 uint32 dfsp_evtnotif; 8258 uint32 dfsp_evtsuspect; 8259 uint32 dfsp_evtresume; 8260 } awdl_stats_v1_t; 8261 8262 typedef struct awdl_uct_stats { 8263 uint32 aw_proc_in_aw_sched; 8264 uint32 aw_upd_in_pre_aw_proc; 8265 uint32 pre_aw_proc_in_aw_set; 8266 uint32 ignore_pre_aw_proc; 8267 uint32 miss_pre_aw_intr; 8268 uint32 aw_dur_zero; 8269 uint32 aw_sched; 8270 uint32 aw_proc; 8271 uint32 pre_aw_proc; 8272 uint32 not_init; 8273 uint32 null_awdl; 8274 } awdl_uct_stats_t; 8275 8276 /* peer opcode */ 8277 #define AWDL_PEER_OP_ADD 0 8278 #define AWDL_PEER_OP_DEL 1 8279 #define AWDL_PEER_OP_INFO 2 8280 #define AWDL_PEER_OP_UPD 3 8281 8282 /**AWDL Piggy backed scan */ 8283 typedef struct wl_awdl_pscan_params { 8284 wlc_ssid_t ssid; /**< default: {0, ""} */ 8285 struct ether_addr bssid; /**< default: bcast */ 8286 uint8 scan_type; /**< active or passive, 0 use default */ 8287 uint8 pad; /**< pad */ 8288 int32 nprobes; /**< -1 use default, number of probes per channel */ 8289 int32 aw_seq_num; /**< count AW sequence nunbers to be piggy backed for scan */ 8290 int32 nssid; /**< count of ssid in list */ 8291 int32 rsvd; /**< Reserved */ 8292 uint16 aw_counter_list[1]; /**< This is a list contains in following order 8293 * - List aw seq numbers 8294 * - List of SSID's 4 byte aligned. 8295 */ 8296 } wl_awdl_pscan_params_t; 8297 8298 typedef struct wl_pscan_params { 8299 uint32 version; 8300 uint16 action; /**< PSCAN action type: FW or Host initiated pscan or abort pscan */ 8301 uint16 sync_id; 8302 wl_awdl_pscan_params_t params; 8303 } wl_pscan_params_t; 8304 8305 #define WL_AWDL_PSCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_awdl_pscan_params_t, aw_counter_list)) 8306 #define WL_AWDL_MAX_NUM_AWSEQ 64 8307 #define AWDL_PSCAN_REQ_VERSION 1 8308 8309 /** awdl pscan action type values */ 8310 #define AWDL_HOST_PSCAN 0 /**< Host Initiated PSCAN */ 8311 #define AWDL_FW_PSCAN 1 /**< Firmware Initiated PSCAN */ 8312 #define AWDL_ABORT_PSCAN 2 /**< Abort any PSCAN */ 8313 8314 /* "aftxmode" iovar values */ 8315 #define AWDL_AFTXMODE_AUTO 0 /**< Send AF on AWDL channel best effort while outside AW */ 8316 8317 /* --- Deprecated ---- */ 8318 #define AWDL_AFTXMODE_INFRA 1 /**< Send AF on Infra channel while outside AW */ 8319 #define AWDL_AFTXMODE_CUR_CHAN 2 /**< Send AF on Current channel while outside AW */ 8320 /* --- Deprecated ---- */ 8321 8322 #define AWDL_AFTXMODE_SUPPRESS 3 /**< Suppress AF Tx */ 8323 #define AWDL_AFTXMODE_SYNC_PREAW 4 /**< Send AF on master channel/s always in pre AW time */ 8324 #define AWDL_AFTXMODE_LAST 4 /**< Last AWDL_AFTXMODE_XXX */ 8325 8326 typedef struct awdl_pw_opmode { 8327 struct ether_addr top_master; /**< Peer mac addr */ 8328 uint8 mode; /**< 0 - normal; 1 - fast mode */ 8329 } awdl_pw_opmode_t; 8330 8331 /** i/f request */ 8332 typedef struct wl_awdl_if2 { 8333 int32 cfg_idx; 8334 int32 up; 8335 struct ether_addr bssid; 8336 struct ether_addr if_addr; 8337 } wl_awdl_if2_t; 8338 8339 typedef struct _aw_start { 8340 uint8 role; 8341 struct ether_addr master; 8342 uint8 aw_seq_num; 8343 } aw_start_t; 8344 8345 typedef struct _aw_extension_start { 8346 uint8 aw_ext_num; 8347 } aw_extension_start_t; 8348 8349 typedef struct _awdl_peer_state { 8350 struct ether_addr peer; 8351 uint8 state; 8352 } awdl_peer_state_t; 8353 #define AWDL_PEER_STATE_OPEN 0 8354 #define AWDL_PEER_STATE_CLOSE 1 8355 8356 typedef struct _awdl_sync_state_changed { 8357 uint8 new_role; 8358 struct ether_addr master; 8359 } awdl_sync_state_changed_t; 8360 8361 typedef struct _awdl_sync_state { 8362 uint8 role; 8363 struct ether_addr master; 8364 uint8 PAD; 8365 uint32 continuous_election_enable; 8366 } awdl_sync_state_t; 8367 8368 typedef struct _awdl_aw_ap_alignment { 8369 uint32 enabled; 8370 int32 offset; 8371 uint32 align_on_dtim; 8372 } awdl_aw_ap_alignment_t; 8373 8374 typedef struct _awdl_peer_stats { 8375 uint32 version; 8376 struct ether_addr address; 8377 uint8 clear; 8378 int8 rssi; 8379 int8 avg_rssi; 8380 uint8 txRate; 8381 uint8 rxRate; 8382 uint8 PAD; 8383 uint32 numTx; 8384 uint32 numTxRetries; 8385 uint32 numTxFailures; 8386 } awdl_peer_stats_t; 8387 8388 #define MAX_NUM_AWDL_KEYS 4 8389 typedef struct _awdl_aes_key { 8390 uint32 version; 8391 int32 enable; 8392 struct ether_addr awdl_peer; 8393 uint8 keys[MAX_NUM_AWDL_KEYS][16]; 8394 uint8 PAD[2]; 8395 } awdl_aes_key_t; 8396 8397 /* AWDL CCA Stats */ 8398 8399 /* CCA Counters Delta @ Chan. boundary sent by FW to host */ 8400 8401 typedef struct wlc_awdl_cca_stats { 8402 chanspec_t chanspec; /* Chanspec when CCA stats were read */ 8403 uint16 pad; 8404 uint32 sample_dur; /* Duration in MS for which stats were sampled */ 8405 uint32 congest_ibss; /* Delta between IBSS - TxDUR */ 8406 uint32 congest_obss; /* Delta between OBSS - noctg */ 8407 uint32 interference; /* Delta between nopkt */ 8408 } wlc_awdl_cca_stats_t; 8409 8410 /* AWDL TLVs */ 8411 typedef enum wl_awdl_tlv { 8412 WL_AWDL_XTLV_CCA_STATS = 0x1u /* CCA Stats sent to host on chan. boundary */ 8413 } wl_awdl_tlv_t; 8414 8415 #include <packed_section_start.h> 8416 typedef BWL_PRE_PACKED_STRUCT struct awdl_scan_event_data { 8417 uint8 scan_usage; /**< Kind of scan in progress */ 8418 uint8 nscan_chans; /**< number of channels to be scanned */ 8419 uint8 ncached_chans; /**< number of cached channels */ 8420 uint8 flags; 8421 uint8 chan_list[1]; /**< List of cached channels followed by 8422 * channels to be scanned 8423 */ 8424 } BWL_POST_PACKED_STRUCT awdl_scan_event_data_t; 8425 8426 /* Flags */ 8427 /* bit-0 : Used to indicate if the flags/pad is valid 8428 * bit-1 : Slice-0 is blocked on scan. 8429 * bit-2 : Slice-1 is blocked on scan. 8430 * bit-7 : reserved 8431 */ 8432 8433 #define AWDL_SCAN_EVT_DATA_FLAGS_VALID (1<<0) 8434 #define AWDL_SCAN_EVT_DATA_FLAGS_SLICE0_BLOCKED (1<<1) 8435 #define AWDL_SCAN_EVT_DATA_FLAGS_SLICE1_BLOCKED (1<<2) 8436 8437 #include <packed_section_end.h> 8438 8439 /* 8440 * This structure will be supported only for pre-Koala builds. 8441 * From Koala onwards use local adv_struct_master_local_t structure 8442 * defined in wlc_awdl.c 8443 */ 8444 8445 #ifndef WLAWDL_USE_MASTER_LOCAL 8446 typedef struct adv_struct_norm { 8447 uint16 aw_counter; /**< avail window counter */ 8448 uint16 tx_counter; 8449 uint16 tx_delay; /**< ts_hw - ts_fw */ 8450 uint16 period_tu; 8451 uint16 aw_cmn_length; 8452 uint16 aw_ext_length; 8453 uint16 aw_period; 8454 uint16 chan_seq0; 8455 int8 rssi; /**< averaged RSSI value */ 8456 uint8 guard_time; 8457 uint8 presence_mode; 8458 uint8 age; /**< age of this record */ 8459 uint8 dist_top; /**< Distance from Top */ 8460 uint8 PAD[3]; 8461 uint32 ms; /**< time at which we received the AF */ 8462 uint32 self_metrics; /**< election metric */ 8463 uint32 top_master_metrics; 8464 struct ether_addr top_master; /**< Top Master address */ 8465 struct ether_addr addr; 8466 struct rssi_struct rssi_win; /**< RSSI values */ 8467 } adv_struct_norm_t; 8468 #endif /* WLAWDL_USE_MASTER_LOCAL */ 8469 8470 /* AWDL configuration/operation flags */ 8471 #define AWDL_CONFIG_NON_AWDL_INTERFACE_FLOW_CONTROL 0x00000001 8472 #define AWDL_CONFIG_AWDL_INTERFACE_UPDATE 0x00000002 8473 /* While scanning configure channel from chan seq */ 8474 #define AWDL_CONFIG_CHANNEL_HOP_FROM_CHAN_SEQ 0x00000004 8475 #define AWDL_CONFIG_TX_OFF_BEFORE_INFRA_BEACON 0x00000008 8476 #define AWDL_CONFIG_SUPP_PSFTX_PREAW 0x00000010 8477 #define AWDL_CONFIG_SUPP_PSFTX_NOACK 0x00000020 8478 #define AWDL_CONFIG_SUPP_PSFTX_CHANSW 0x00000040 8479 /* 8480 * awdl ranging 8481 * all the fields with multple bytes are in the little Endian order 8482 */ 8483 8484 /* Bit defines for global flags */ 8485 #define AWDL_RANGING_ENABLE (1<<0) /**< Global enable bit */ 8486 #define AWDL_RANGING_RESPOND (1<<1) /**< Enable responding to peer's range req */ 8487 #define AWDL_RANGING_RANGED (1<<2) /**< V2: Report to host if ranged as target */ 8488 8489 #include <packed_section_start.h> 8490 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_config { 8491 uint16 flags; 8492 uint8 sounding_count; /**< self initiated ranging: number of probes per peer */ 8493 uint8 reserved; 8494 struct ether_addr allow_mac; 8495 /**< peer initiated ranging: the allowed peer mac 8496 * address, a unicast (for one peer) or 8497 * a broadcast for all. Setting it to all zeros 8498 * means responding to none,same as not setting 8499 * the flag bit AWDL_RANGING_RESPOND 8500 */ 8501 } BWL_POST_PACKED_STRUCT awdl_ranging_config_t; 8502 #include <packed_section_end.h> 8503 8504 /* list of peers for self initiated ranging */ 8505 /* Bit defines for per peer flags */ 8506 #define AWDL_RANGING_REPORT (1<<0) /**< V2: Enable reporting range to target */ 8507 #define AWDL_SEQ_EN (1<<1) 8508 8509 #include <packed_section_start.h> 8510 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_peer { 8511 chanspec_t ranging_chanspec; /**< desired chanspec for this peer */ 8512 uint16 flags; /**< per peer flags, report or not */ 8513 struct ether_addr ea; /**< peer MAC address */ 8514 } BWL_POST_PACKED_STRUCT awdl_ranging_peer_t; 8515 #include <packed_section_end.h> 8516 8517 #include <packed_section_start.h> 8518 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_list { 8519 uint8 count; /**< number of MAC addresses */ 8520 uint8 num_peers_done; /**< host set to 0, when read, shows number of peers 8521 * completed, success or fail 8522 */ 8523 uint8 num_aws; /**< time period to do the ranging, specified in aws */ 8524 awdl_ranging_peer_t rp[1]; /**< variable length array of peers */ 8525 } BWL_POST_PACKED_STRUCT awdl_ranging_list_t; 8526 #include <packed_section_end.h> 8527 8528 /* ranging results, a list for self initiated ranging and one for peer initiated ranging */ 8529 /* There will be one structure for each peer */ 8530 #define AWDL_RANGING_STATUS_SUCCESS 1 8531 #define AWDL_RANGING_STATUS_FAIL 2 8532 #define AWDL_RANGING_STATUS_TIMEOUT 3 8533 #define AWDL_RANGING_STATUS_ABORT 4 /**< with partial results if sounding count > 0 */ 8534 #include <packed_section_start.h> 8535 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_result { 8536 uint8 status; /**< 1: Success, 2: Fail 3: Timeout 4: Aborted */ 8537 uint8 sounding_count; /**< number of measurements completed (0 = failure) */ 8538 struct ether_addr ea; /**< peer MAC address */ 8539 chanspec_t ranging_chanspec; /**< Chanspec where the ranging was done */ 8540 uint32 timestamp; /**< 32bits of the TSF timestamp ranging was completed at */ 8541 uint32 distance; /**< mean distance in meters expressed as Q4 number. 8542 * Only valid when sounding_count > 0. Examples: 8543 * 0x08 = 0.5m 8544 * 0x10 = 1m 8545 * 0x18 = 1.5m 8546 * set to 0xffffffff to indicate invalid number 8547 */ 8548 int32 rtt_var; /**< standard deviation in 10th of ns of RTTs measured. 8549 * Only valid when sounding_count > 0 8550 */ 8551 } BWL_POST_PACKED_STRUCT awdl_ranging_result_t; 8552 #include <packed_section_end.h> 8553 #define AWDL_RANGING_TYPE_HOST 1 8554 #define AWDL_RANGING_TYPE_PEER 2 8555 8556 #include <packed_section_start.h> 8557 typedef BWL_PRE_PACKED_STRUCT struct awdl_ranging_event_data { 8558 uint8 type; /**< 1: Result of host initiated ranging */ 8559 /* V2: 2: Result of peer initiated ranging */ 8560 uint8 reserved; 8561 uint8 success_count; /**< number of peers completed successfully */ 8562 uint8 count; /**< number of peers in the list */ 8563 awdl_ranging_result_t rr[1]; /**< variable array of ranging peers */ 8564 } BWL_POST_PACKED_STRUCT awdl_ranging_event_data_t; 8565 typedef BWL_PRE_PACKED_STRUCT struct awdl_ftm_ranging_config { 8566 uint16 flags; /* config flags */ 8567 uint8 num_aws; /* time period to do the ranging, specified in aws */ 8568 } BWL_POST_PACKED_STRUCT awdl_ftm_ranging_config_t; 8569 #include <packed_section_end.h> 8570 8571 /** awdl event config bit mask definitions */ 8572 #define AWDL_EVENT_AW_EXT 0x01 8573 #define AWDL_EVENT_RANGING 0x02 8574 #define AWDL_RANGING_MAX_PEERS 8 8575 #endif /* WLAWDL */ 8576 8577 /* 8578 * ptk_start: iovar to start 4-way handshake for secured ranging 8579 */ 8580 8581 /* ptk negotiation security type - determines negotiation parameters */ 8582 typedef enum { 8583 WL_PTK_START_SEC_TYPE_PMK = 1 8584 } wl_ptk_start_sec_type_t; 8585 8586 /* ptk negotiation role */ 8587 typedef enum { 8588 ROLE_NONE = 0x0, 8589 ROLE_AUTH = 0x1, 8590 ROLE_SUP = 0x2, 8591 ROLE_STATIC = 0x3, 8592 ROLE_INVALID = 0xff, 8593 WL_PTK_START_ROLE_NONE = ROLE_NONE, 8594 WL_PTK_START_ROLE_AUTH = ROLE_AUTH, 8595 WL_PTK_START_ROLE_SUP = ROLE_SUP, 8596 WL_PTK_START_ROLE_STATIC = ROLE_STATIC, 8597 WL_PTK_START_ROLE_INVALID = ROLE_INVALID 8598 } wl_ptk_start_role_t; 8599 8600 typedef struct wl_ptk_start_tlv { 8601 uint16 id; 8602 uint16 len; 8603 uint8 data[1]; 8604 } wl_ptk_start_tlv_t; 8605 8606 typedef enum { 8607 WL_PTK_START_TLV_PMK = 1 /* uint8[] */ 8608 } wl_ptk_start_tlv_type; 8609 8610 typedef enum { 8611 WL_PTK_START_FLAG_NO_DATA_PROT = 1, /* data frame protection disabled */ 8612 WL_PTK_START_FLAG_GEN_FTM_TPK = 2 /* Generate FTM Toast/Seq Protection Key */ 8613 } wl_ptk_start_flags_t; 8614 8615 typedef struct wl_ptk_start_iov { 8616 uint16 version; 8617 uint16 len; /* length of entire iov from version */ 8618 wl_ptk_start_flags_t flags; 8619 wl_ptk_start_sec_type_t sec_type; 8620 wl_ptk_start_role_t role; 8621 struct ether_addr peer_addr; 8622 uint16 pad; /* reserved/32 bit alignment */ 8623 wl_ptk_start_tlv_t tlvs[1]; 8624 } wl_ptk_start_iov_t; 8625 8626 /* 8627 * Dongle pattern matching filter. 8628 */ 8629 8630 #define MAX_WAKE_PACKET_CACHE_BYTES 128 /**< Maximum cached wake packet */ 8631 8632 #define MAX_WAKE_PACKET_BYTES (DOT11_A3_HDR_LEN + \ 8633 DOT11_QOS_LEN + \ 8634 sizeof(struct dot11_llc_snap_header) + \ 8635 ETHER_MAX_DATA) 8636 8637 typedef struct pm_wake_packet { 8638 uint32 status; /**< Is the wake reason a packet (if all the other field's valid) */ 8639 uint32 pattern_id; /**< Pattern ID that matched */ 8640 uint32 original_packet_size; 8641 uint32 saved_packet_size; 8642 uint8 packet[MAX_WAKE_PACKET_CACHE_BYTES]; 8643 } pm_wake_packet_t; 8644 8645 /* Packet filter types. Currently, only pattern matching is supported. */ 8646 typedef enum wl_pkt_filter_type { 8647 WL_PKT_FILTER_TYPE_PATTERN_MATCH=0, /**< Pattern matching filter */ 8648 WL_PKT_FILTER_TYPE_MAGIC_PATTERN_MATCH=1, /**< Magic packet match */ 8649 WL_PKT_FILTER_TYPE_PATTERN_LIST_MATCH=2, /**< A pattern list (match all to match filter) */ 8650 WL_PKT_FILTER_TYPE_ENCRYPTED_PATTERN_MATCH=3, /**< SECURE WOWL magic / net pattern match */ 8651 WL_PKT_FILTER_TYPE_APF_MATCH=4, /* Android packet filter match */ 8652 WL_PKT_FILTER_TYPE_PATTERN_MATCH_TIMEOUT=5, /* Pattern matching filter with timeout event */ 8653 WL_PKT_FILTER_TYPE_IMMEDIATE_PATTERN_MATCH=6, /* Immediately pattern matching filter */ 8654 WL_PKT_FILTYER_TYPE_MAX = 7, /* Pkt filter type MAX */ 8655 } wl_pkt_filter_type_t; 8656 8657 #define WL_PKT_FILTER_TYPE wl_pkt_filter_type_t /* backward compatibility; remove */ 8658 8659 /* String mapping for types that may be used by applications or debug */ 8660 #define WL_PKT_FILTER_TYPE_NAMES \ 8661 { "PATTERN", WL_PKT_FILTER_TYPE_PATTERN_MATCH }, \ 8662 { "MAGIC", WL_PKT_FILTER_TYPE_MAGIC_PATTERN_MATCH }, \ 8663 { "PATLIST", WL_PKT_FILTER_TYPE_PATTERN_LIST_MATCH }, \ 8664 { "SECURE WOWL", WL_PKT_FILTER_TYPE_ENCRYPTED_PATTERN_MATCH }, \ 8665 { "APF", WL_PKT_FILTER_TYPE_APF_MATCH }, \ 8666 { "PATTERN TIMEOUT", WL_PKT_FILTER_TYPE_PATTERN_MATCH_TIMEOUT }, \ 8667 { "IMMEDIATE", WL_PKT_FILTER_TYPE_IMMEDIATE_PATTERN_MATCH } 8668 8669 /** Secured WOWL packet was encrypted, need decrypted before check filter match */ 8670 typedef struct wl_pkt_decrypter { 8671 uint8* (*dec_cb)(void* dec_ctx, const void *sdu, int sending); 8672 void* dec_ctx; 8673 } wl_pkt_decrypter_t; 8674 8675 /** 8676 * Pattern matching filter. Specifies an offset within received packets to 8677 * start matching, the pattern to match, the size of the pattern, and a bitmask 8678 * that indicates which bits within the pattern should be matched. 8679 */ 8680 typedef struct wl_pkt_filter_pattern { 8681 uint32 offset; /**< Offset within received packet to start pattern matching. 8682 * Offset '0' is the first byte of the ethernet header. 8683 */ 8684 uint32 size_bytes; /**< Size of the pattern. Bitmask must be the same size. */ 8685 uint8 mask_and_pattern[]; /**< Variable length mask and pattern data. mask starts 8686 * at offset 0. Pattern immediately follows mask. for 8687 * secured pattern, put the descrypter pointer to the 8688 * beginning, mask and pattern postponed correspondingly 8689 */ 8690 } wl_pkt_filter_pattern_t; 8691 8692 /** A pattern list is a numerically specified list of modified pattern structures. */ 8693 typedef struct wl_pkt_filter_pattern_listel { 8694 uint16 rel_offs; /**< Offset to begin match (relative to 'base' below) */ 8695 uint16 base_offs; /**< Base for offset (defined below) */ 8696 uint16 size_bytes; /**< Size of mask/pattern */ 8697 uint16 match_flags; /**< Addition flags controlling the match */ 8698 uint8 mask_and_data[]; /**< Variable length mask followed by data, each size_bytes */ 8699 } wl_pkt_filter_pattern_listel_t; 8700 8701 typedef struct wl_pkt_filter_pattern_list { 8702 uint8 list_cnt; /**< Number of elements in the list */ 8703 uint8 PAD1[1]; /**< Reserved (possible version: reserved) */ 8704 uint16 totsize; /**< Total size of this pattern list (includes this struct) */ 8705 uint8 patterns[]; /**< Variable number of wl_pkt_filter_pattern_listel_t elements */ 8706 } wl_pkt_filter_pattern_list_t; 8707 8708 typedef struct wl_apf_program { 8709 uint16 version; 8710 uint16 instr_len; /* number of instruction blocks */ 8711 uint32 inst_ts; /* program installation timestamp */ 8712 uint8 instrs[]; /* variable length instructions */ 8713 } wl_apf_program_t; 8714 8715 typedef struct wl_pkt_filter_pattern_timeout { 8716 uint32 offset; /* Offset within received packet to start pattern matching. 8717 * Offset '0' is the first byte of the ethernet header. 8718 */ 8719 uint32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ 8720 uint32 timeout; /* Timeout(seconds) */ 8721 uint8 mask_and_pattern[]; /* Variable length mask and pattern data. 8722 * mask starts at offset 0. Pattern 8723 * immediately follows mask. 8724 */ 8725 } wl_pkt_filter_pattern_timeout_t; 8726 8727 /** IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ 8728 typedef struct wl_pkt_filter { 8729 uint32 id; /**< Unique filter id, specified by app. */ 8730 uint32 type; /**< Filter type (WL_PKT_FILTER_TYPE_xxx). */ 8731 uint32 negate_match; /**< Negate the result of filter matches */ 8732 union { /* Filter definitions */ 8733 wl_pkt_filter_pattern_t pattern; /**< Pattern matching filter */ 8734 wl_pkt_filter_pattern_list_t patlist; /**< List of patterns to match */ 8735 wl_apf_program_t apf_program; /* apf program */ 8736 wl_pkt_filter_pattern_timeout_t pattern_timeout; /* Pattern timeout event filter */ 8737 } u; 8738 /* Do NOT add structure members after the filter definitions, since they 8739 * may include variable length arrays. 8740 */ 8741 } wl_pkt_filter_t; 8742 8743 /** IOVAR "tcp_keep_set" parameter. Used to install tcp keep_alive stuff. */ 8744 typedef struct wl_tcp_keep_set { 8745 uint32 val1; 8746 uint32 val2; 8747 } wl_tcp_keep_set_t; 8748 8749 #define WL_PKT_FILTER_FIXED_LEN OFFSETOF(wl_pkt_filter_t, u) 8750 #define WL_PKT_FILTER_PATTERN_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_t, mask_and_pattern) 8751 #define WL_PKT_FILTER_PATTERN_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_list_t, patterns) 8752 #define WL_PKT_FILTER_PATTERN_LISTEL_FIXED_LEN \ 8753 OFFSETOF(wl_pkt_filter_pattern_listel_t, mask_and_data) 8754 #define WL_PKT_FILTER_PATTERN_TIMEOUT_FIXED_LEN \ 8755 OFFSETOF(wl_pkt_filter_pattern_timeout_t, mask_and_pattern) 8756 8757 #define WL_APF_INTERNAL_VERSION 1 8758 #define WL_APF_PROGRAM_MAX_SIZE (2 * 1024) 8759 #define WL_APF_PROGRAM_FIXED_LEN OFFSETOF(wl_apf_program_t, instrs) 8760 #define WL_APF_PROGRAM_LEN(apf_program) \ 8761 ((apf_program)->instr_len * sizeof((apf_program)->instrs[0])) 8762 #define WL_APF_PROGRAM_TOTAL_LEN(apf_program) \ 8763 (WL_APF_PROGRAM_FIXED_LEN + WL_APF_PROGRAM_LEN(apf_program)) 8764 8765 /** IOVAR "pkt_filter_enable" parameter. */ 8766 typedef struct wl_pkt_filter_enable { 8767 uint32 id; /**< Unique filter id */ 8768 uint32 enable; /**< Enable/disable bool */ 8769 } wl_pkt_filter_enable_t; 8770 8771 /** IOVAR "pkt_filter_list" parameter. Used to retrieve a list of installed filters. */ 8772 typedef struct wl_pkt_filter_list { 8773 uint32 num; /**< Number of installed packet filters */ 8774 uint8 filter[]; /**< Variable array of packet filters. */ 8775 } wl_pkt_filter_list_t; 8776 8777 #define WL_PKT_FILTER_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_list_t, filter) 8778 8779 /** IOVAR "pkt_filter_stats" parameter. Used to retrieve debug statistics. */ 8780 typedef struct wl_pkt_filter_stats { 8781 uint32 num_pkts_matched; /**< # filter matches for specified filter id */ 8782 uint32 num_pkts_forwarded; /**< # packets fwded from dongle to host for all filters */ 8783 uint32 num_pkts_discarded; /**< # packets discarded by dongle for all filters */ 8784 } wl_pkt_filter_stats_t; 8785 8786 /** IOVAR "pkt_filter_ports" parameter. Configure TCP/UDP port filters. */ 8787 typedef struct wl_pkt_filter_ports { 8788 uint8 version; /**< Be proper */ 8789 uint8 reserved; /**< Be really proper */ 8790 uint16 count; /**< Number of ports following */ 8791 /* End of fixed data */ 8792 uint16 ports[1]; /**< Placeholder for ports[<count>] */ 8793 } wl_pkt_filter_ports_t; 8794 8795 #define WL_PKT_FILTER_PORTS_FIXED_LEN OFFSETOF(wl_pkt_filter_ports_t, ports) 8796 8797 #define WL_PKT_FILTER_PORTS_VERSION 0 8798 #if defined(WL_PKT_FLTR_EXT) && !defined(WL_PKT_FLTR_EXT_DISABLED) 8799 #define WL_PKT_FILTER_PORTS_MAX 256 8800 #else 8801 #define WL_PKT_FILTER_PORTS_MAX 128 8802 #endif /* WL_PKT_FLTR_EXT && !WL_PKT_FLTR_EXT_DISABLED */ 8803 8804 #define RSN_REPLAY_LEN 8 8805 typedef struct _gtkrefresh { 8806 uint8 KCK[RSN_KCK_LENGTH]; 8807 uint8 KEK[RSN_KEK_LENGTH]; 8808 uint8 ReplayCounter[RSN_REPLAY_LEN]; 8809 } gtk_keyinfo_t, *pgtk_keyinfo_t; 8810 8811 /** Sequential Commands ioctl */ 8812 typedef struct wl_seq_cmd_ioctl { 8813 uint32 cmd; /**< common ioctl definition */ 8814 uint32 len; /**< length of user buffer */ 8815 } wl_seq_cmd_ioctl_t; 8816 8817 #define WL_SEQ_CMD_ALIGN_BYTES 4 8818 8819 /** 8820 * These are the set of get IOCTLs that should be allowed when using 8821 * IOCTL sequence commands. These are issued implicitly by wl.exe each time 8822 * it is invoked. We never want to buffer these, or else wl.exe will stop working. 8823 */ 8824 #define WL_SEQ_CMDS_GET_IOCTL_FILTER(cmd) \ 8825 (((cmd) == WLC_GET_MAGIC) || \ 8826 ((cmd) == WLC_GET_VERSION) || \ 8827 ((cmd) == WLC_GET_AP) || \ 8828 ((cmd) == WLC_GET_INSTANCE)) 8829 8830 #define MAX_PKTENG_SWEEP_STEPS 40 8831 typedef struct wl_pkteng { 8832 uint32 flags; 8833 uint32 delay; /**< Inter-packet delay */ 8834 uint32 nframes; /**< Number of frames */ 8835 uint32 length; /**< Packet length */ 8836 uint8 seqno; /**< Enable/disable sequence no. */ 8837 struct ether_addr dest; /**< Destination address */ 8838 struct ether_addr src; /**< Source address */ 8839 uint8 sweep_steps; /**< Number of sweep power */ 8840 uint8 est_pwr_cnt; /**< Number of packets to collect est. pwr */ 8841 uint8 PAD[1]; 8842 } wl_pkteng_t; 8843 8844 typedef struct wl_pkteng_est_pwr { 8845 uint32 ratespec; /* Ratespec of the packets */ 8846 uint8 est_pwr_required; /* Requested Number of packets to collect est power */ 8847 uint8 est_pwr_collected; /* Actual collected packets */ 8848 uint8 core_num; /* Total number of Tx cores */ 8849 uint8 PAD; 8850 int8 est_pwr[]; /* The est power buffer */ 8851 } wl_pkteng_est_pwr_t; 8852 8853 /* The wl_pkteng_est_pwr_t is encapsulated in a xtlv buffer with the following ID */ 8854 enum wl_pkgeng_estpwr_id { 8855 wl_pkteng_estpwr_data = 0u, 8856 wl_pkteng_estpwr_clear = 1u 8857 }; 8858 8859 /* IOVAR pkteng_sweep_counters response structure */ 8860 #define WL_PKTENG_SWEEP_COUNTERS_VERSION 1 8861 typedef struct wl_pkteng_sweep_ctrs { 8862 uint16 version; /**< Version - 1 */ 8863 uint16 size; /**< Complete Size including sweep_counters */ 8864 uint16 sweep_steps; /**< Number of steps */ 8865 uint16 PAD; 8866 uint16 sweep_counter[]; /**< Array of frame counters */ 8867 } wl_pkteng_sweep_ctrs_t; 8868 8869 /* IOVAR pkteng_rx_pkt response structure */ 8870 #define WL_PKTENG_RX_PKT_VERSION 1 8871 typedef struct wl_pkteng_rx_pkt { 8872 uint16 version; /**< Version - 1 */ 8873 uint16 size; /**< Complete Size including the packet */ 8874 uint8 payload[]; /**< Packet payload */ 8875 } wl_pkteng_rx_pkt_t; 8876 8877 #define WL_PKTENG_RU_FILL_VER_1 1u 8878 #define WL_PKTENG_RU_FILL_VER_2 2u 8879 #define WL_PKTENG_RU_FILL_VER_3 3u 8880 8881 // struct for ru packet engine 8882 typedef struct wl_pkteng_ru_v1 { 8883 uint16 version; /* ver is 1 */ 8884 uint16 length; /* size of complete structure */ 8885 uint8 bw; /* bandwidth info */ 8886 uint8 ru_alloc_val; /* ru allocation index number */ 8887 uint8 mcs_val; /* mcs allocated value */ 8888 uint8 nss_val; /* num of spatial streams */ 8889 uint32 num_bytes; /* approx num of bytes to calculate other required params */ 8890 uint8 cp_ltf_val ; /* GI and LTF symbol size */ 8891 uint8 he_ltf_symb ; /* num of HE-LTF symbols */ 8892 uint8 stbc; /* STBC support */ 8893 uint8 coding_val; /* BCC/LDPC coding support */ 8894 uint8 pe_category; /* PE duration 0/8/16usecs */ 8895 uint8 dcm; /* dual carrier modulation */ 8896 uint8 mumimo_ltfmode; /* ltf mode */ 8897 uint8 trig_tx; /* form and transmit the trigger frame */ 8898 uint8 trig_type; /* type of trigger frame */ 8899 uint8 trig_period; /* trigger tx periodicity TBD */ 8900 struct ether_addr dest; /* destination address for un-associated mode */ 8901 } wl_pkteng_ru_v1_t; 8902 8903 typedef struct wl_pkteng_ru_v2 { 8904 uint16 version; /* ver is 1 */ 8905 uint16 length; /* size of complete structure */ 8906 uint8 bw; /* bandwidth info */ 8907 uint8 ru_alloc_val; /* ru allocation index number */ 8908 uint8 mcs_val; /* mcs allocated value */ 8909 uint8 nss_val; /* num of spatial streams */ 8910 uint32 num_bytes; /* approx num of bytes to calculate other required params */ 8911 struct ether_addr dest; /* destination address for un-associated mode */ 8912 uint8 cp_ltf_val ; /* GI and LTF symbol size */ 8913 uint8 he_ltf_symb ; /* num of HE-LTF symbols */ 8914 uint8 stbc; /* STBC support */ 8915 uint8 coding_val; /* BCC/LDPC coding support */ 8916 uint8 pe_category; /* PE duration 0/8/16usecs */ 8917 uint8 dcm; /* dual carrier modulation */ 8918 uint8 mumimo_ltfmode; /* ltf mode */ 8919 uint8 trig_tx; /* form and transmit the trigger frame */ 8920 uint8 trig_type; /* type of trigger frame */ 8921 uint8 trig_period; /* trigger tx periodicity TBD */ 8922 uint8 tgt_rssi; /* target rssi value in encoded format */ 8923 uint8 pad[3]; /* 2 byte padding to make structure size a multiple of 32bits */ 8924 } wl_pkteng_ru_v2_t; 8925 8926 typedef struct wl_pkteng_ru_v3 { 8927 uint16 version; /* ver is 3 */ 8928 uint16 length; /* size of complete structure */ 8929 uint8 bw; /* bandwidth info */ 8930 uint8 ru_alloc_val; /* ru allocation index number */ 8931 uint8 mcs_val; /* mcs allocated value */ 8932 uint8 nss_val; /* num of spatial streams */ 8933 uint32 num_bytes; /* approx num of bytes to calculate other required params */ 8934 struct ether_addr dest; /* destination address for un-associated mode */ 8935 uint8 cp_ltf_val ; /* GI and LTF symbol size */ 8936 uint8 he_ltf_symb ; /* num of HE-LTF symbols */ 8937 uint8 stbc; /* STBC support */ 8938 uint8 coding_val; /* BCC/LDPC coding support */ 8939 uint8 pe_category; /* PE duration 0/8/16usecs */ 8940 uint8 dcm; /* dual carrier modulation */ 8941 uint8 mumimo_ltfmode; /* ltf mode */ 8942 uint8 trig_tx; /* form and transmit the trigger frame */ 8943 uint8 trig_type; /* type of trigger frame */ 8944 uint8 trig_period; /* trigger tx periodicity TBD */ 8945 uint8 tgt_rssi; /* target rssi value in encoded format */ 8946 uint8 sub_band; /* in 160MHz case, 80L, 80U */ 8947 uint8 pad[2]; /* 2 byte padding to make structure size a multiple of 32bits */ 8948 } wl_pkteng_ru_v3_t; 8949 8950 #ifndef WL_PKTENG_RU_VER 8951 /* App uses the latest version - source picks it up from wlc_types.h */ 8952 typedef wl_pkteng_ru_v3_t wl_pkteng_ru_fill_t; 8953 #endif 8954 8955 typedef struct wl_trig_frame_info { 8956 /* Structure versioning and structure length params */ 8957 uint16 version; 8958 uint16 length; 8959 /* Below params are the fields related to trigger frame contents */ 8960 /* Common Info Params Figure 9-52d - 11ax Draft 1.1 */ 8961 uint16 lsig_len; 8962 uint16 trigger_type; 8963 uint16 cascade_indication; 8964 uint16 cs_req; 8965 uint16 bw; 8966 uint16 cp_ltf_type; 8967 uint16 mu_mimo_ltf_mode; 8968 uint16 num_he_ltf_syms; 8969 uint16 stbc; 8970 uint16 ldpc_extra_symb; 8971 uint16 ap_tx_pwr; 8972 uint16 afactor; 8973 uint16 pe_disambiguity; 8974 uint16 spatial_resuse; 8975 uint16 doppler; 8976 uint16 he_siga_rsvd; 8977 uint16 cmn_info_rsvd; 8978 /* User Info Params Figure 9-52e - 11ax Draft 1.1 */ 8979 uint16 aid12; 8980 uint16 ru_alloc; 8981 uint16 coding_type; 8982 uint16 mcs; 8983 uint16 dcm; 8984 uint16 ss_alloc; 8985 uint16 tgt_rssi; 8986 uint16 usr_info_rsvd; 8987 } wl_trig_frame_info_t; 8988 8989 /* wl pkteng_stats related definitions */ 8990 #define WL_PKTENG_STATS_V1 (1) 8991 #define WL_PKTENG_STATS_V2 (2) 8992 8993 typedef struct wl_pkteng_stats_v1 { 8994 uint32 lostfrmcnt; /**< RX PER test: no of frames lost (skip seqno) */ 8995 int32 rssi; /**< RSSI */ 8996 int32 snr; /**< signal to noise ratio */ 8997 uint16 rxpktcnt[NUM_80211_RATES+1]; 8998 uint8 rssi_qdb; /**< qdB portion of the computed rssi */ 8999 uint8 version; 9000 } wl_pkteng_stats_v1_t; 9001 9002 typedef struct wl_pkteng_stats_v2 { 9003 uint32 lostfrmcnt; /**< RX PER test: no of frames lost (skip seqno) */ 9004 int32 rssi; /**< RSSI */ 9005 int32 snr; /**< signal to noise ratio */ 9006 uint16 rxpktcnt[NUM_80211_RATES+1]; 9007 uint8 rssi_qdb; /**< qdB portion of the computed rssi */ 9008 uint8 version; 9009 uint16 length; 9010 uint16 pad; 9011 int32 rssi_per_core[WL_RSSI_ANT_MAX]; 9012 int32 rssi_per_core_qdb[WL_RSSI_ANT_MAX]; 9013 } wl_pkteng_stats_v2_t; 9014 9015 #ifndef WL_PKTENG_STATS_TYPEDEF_HAS_ALIAS 9016 typedef wl_pkteng_stats_v1_t wl_pkteng_stats_t; 9017 #endif /* WL_PKTENG_STATS_TYPEDEF_HAS_ALIAS */ 9018 9019 typedef struct wl_txcal_params { 9020 wl_pkteng_t pkteng; 9021 uint8 gidx_start; 9022 int8 gidx_step; 9023 uint8 gidx_stop; 9024 uint8 PAD; 9025 } wl_txcal_params_t; 9026 9027 typedef struct wl_txcal_gainidx { 9028 uint8 num_actv_cores; 9029 uint8 gidx_start_percore[WL_STA_ANT_MAX]; 9030 uint8 gidx_stop_percore[WL_STA_ANT_MAX]; 9031 uint8 PAD[3]; 9032 } wl_txcal_gainidx_t; 9033 9034 typedef struct wl_txcal_params_v2 { 9035 wl_pkteng_t pkteng; 9036 int8 gidx_step; 9037 uint8 pwr_start[WL_STA_ANT_MAX]; 9038 uint8 pwr_stop[WL_STA_ANT_MAX]; 9039 uint8 init_start_idx; 9040 uint8 gidx_start_percore[WL_STA_ANT_MAX]; 9041 uint8 gidx_stop_percore[WL_STA_ANT_MAX]; 9042 uint16 version; 9043 } wl_txcal_params_v2_t; 9044 9045 typedef struct wl_txtone_idxsweep_params { 9046 int8 gidx_step; 9047 uint8 gidx_start_percore[WL_STA_ANT_MAX]; 9048 uint8 gidx_stop_percore[WL_STA_ANT_MAX]; 9049 uint32 dwell_time; 9050 } wl_txtone_idxsweep_params; 9051 9052 typedef wl_txcal_params_t wl_txcal_params_v1_t; 9053 9054 typedef struct wl_rssilog_params { 9055 uint8 enable; 9056 uint8 rssi_threshold; 9057 uint8 time_threshold; 9058 uint8 pad; 9059 } wl_rssilog_params_t; 9060 9061 typedef struct wl_sslpnphy_papd_debug_data { 9062 uint8 psat_pwr; 9063 uint8 psat_indx; 9064 uint8 final_idx; 9065 uint8 start_idx; 9066 int32 min_phase; 9067 int32 voltage; 9068 int8 temperature; 9069 uint8 PAD[3]; 9070 } wl_sslpnphy_papd_debug_data_t; 9071 typedef struct wl_sslpnphy_debug_data { 9072 int16 papdcompRe [64]; 9073 int16 papdcompIm [64]; 9074 } wl_sslpnphy_debug_data_t; 9075 typedef struct wl_sslpnphy_spbdump_data { 9076 uint16 tbl_length; 9077 int16 spbreal[256]; 9078 int16 spbimg[256]; 9079 } wl_sslpnphy_spbdump_data_t; 9080 typedef struct wl_sslpnphy_percal_debug_data { 9081 uint32 cur_idx; 9082 uint32 tx_drift; 9083 uint8 prev_cal_idx; 9084 uint8 PAD[3]; 9085 uint32 percal_ctr; 9086 int32 nxt_cal_idx; 9087 uint32 force_1idxcal; 9088 uint32 onedxacl_req; 9089 int32 last_cal_volt; 9090 int8 last_cal_temp; 9091 uint8 PAD[3]; 9092 uint32 vbat_ripple; 9093 uint32 exit_route; 9094 int32 volt_winner; 9095 } wl_sslpnphy_percal_debug_data_t; 9096 9097 typedef enum { 9098 wowl_pattern_type_bitmap = 0, 9099 wowl_pattern_type_arp, 9100 wowl_pattern_type_na 9101 } wowl_pattern_type_t; 9102 9103 typedef struct wl_wowl_pattern { 9104 uint32 masksize; /**< Size of the mask in #of bytes */ 9105 uint32 offset; /**< Pattern byte offset in packet */ 9106 uint32 patternoffset; /**< Offset of start of pattern in the structure */ 9107 uint32 patternsize; /**< Size of the pattern itself in #of bytes */ 9108 uint32 id; /**< id */ 9109 uint32 reasonsize; /**< Size of the wakeup reason code */ 9110 wowl_pattern_type_t type; /**< Type of pattern */ 9111 /* Mask follows the structure above */ 9112 /* Pattern follows the mask is at 'patternoffset' from the start */ 9113 } wl_wowl_pattern_t; 9114 9115 typedef struct wl_wowl_pattern_list { 9116 uint32 count; 9117 wl_wowl_pattern_t pattern[1]; 9118 } wl_wowl_pattern_list_t; 9119 9120 typedef struct wl_wowl_wakeind { 9121 uint8 pci_wakeind; /**< Whether PCI PMECSR PMEStatus bit was set */ 9122 uint32 ucode_wakeind; /**< What wakeup-event indication was set by ucode */ 9123 } wl_wowl_wakeind_t; 9124 9125 /** per AC rate control related data structure */ 9126 typedef struct wl_txrate_class { 9127 uint8 init_rate; 9128 uint8 min_rate; 9129 uint8 max_rate; 9130 } wl_txrate_class_t; 9131 9132 /** structure for Overlap BSS scan arguments */ 9133 typedef struct wl_obss_scan_arg { 9134 int16 passive_dwell; 9135 int16 active_dwell; 9136 int16 bss_widthscan_interval; 9137 int16 passive_total; 9138 int16 active_total; 9139 int16 chanwidth_transition_delay; 9140 int16 activity_threshold; 9141 } wl_obss_scan_arg_t; 9142 9143 #define WL_OBSS_SCAN_PARAM_LEN sizeof(wl_obss_scan_arg_t) 9144 9145 /** RSSI event notification configuration. */ 9146 typedef struct wl_rssi_event { 9147 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 9148 * one per specified period (0 to disable rate limit). 9149 */ 9150 uint8 num_rssi_levels; /**< Number of entries in rssi_levels[] below */ 9151 int8 rssi_levels[MAX_RSSI_LEVELS]; /**< Variable number of RSSI levels. An event 9152 * will be posted each time the RSSI of received 9153 * beacons/packets crosses a level. 9154 */ 9155 int8 pad[3]; 9156 } wl_rssi_event_t; 9157 9158 #define RSSI_MONITOR_VERSION 1 9159 #define RSSI_MONITOR_STOP (1 << 0) 9160 typedef struct wl_rssi_monitor_cfg { 9161 uint8 version; 9162 uint8 flags; 9163 int8 max_rssi; 9164 int8 min_rssi; 9165 } wl_rssi_monitor_cfg_t; 9166 9167 typedef struct wl_rssi_monitor_evt { 9168 uint8 version; 9169 int8 cur_rssi; 9170 uint16 pad; 9171 } wl_rssi_monitor_evt_t; 9172 9173 /* CCA based channel quality event configuration (ID values for both config and report) */ 9174 #define WL_CHAN_QUAL_CCA 0 9175 #define WL_CHAN_QUAL_NF 1 9176 #define WL_CHAN_QUAL_NF_LTE 2 9177 #define WL_CHAN_QUAL_TOTAL 3 /* The total IDs supported in both config and report */ 9178 /* Additional channel quality event support in report only (>= 0x100) 9179 * Notice that uint8 is used in configuration struct wl_chan_qual_metric_t, but uint16 is 9180 * used for report in struct cca_chan_qual_event_t. So the ID values beyond 8-bit are used 9181 * for reporting purpose only. 9182 */ 9183 #define WL_CHAN_QUAL_FULL_CCA (0x100u | WL_CHAN_QUAL_CCA) /* CCA: ibss vs. obss */ 9184 #define WL_CHAN_QUAL_FULLPM_CCA (0x200u | WL_CHAN_QUAL_CCA) /* CCA: me vs. notme, PM vs. !PM */ 9185 #define WL_CHAN_QUAL_FULLPM_CCA_OFDM_DESENSE (0x400u | WL_CHAN_QUAL_CCA) 9186 /* CCA: me vs. notme, PM vs. !PM with OFDM Desense */ 9187 9188 #define MAX_CHAN_QUAL_LEVELS 8 9189 9190 typedef struct wl_chan_qual_metric { 9191 uint8 id; /**< metric ID */ 9192 uint8 num_levels; /**< Number of entries in rssi_levels[] below */ 9193 uint16 flags; 9194 int16 htol[MAX_CHAN_QUAL_LEVELS]; /**< threshold level array: hi-to-lo */ 9195 int16 ltoh[MAX_CHAN_QUAL_LEVELS]; /**< threshold level array: lo-to-hi */ 9196 } wl_chan_qual_metric_t; 9197 9198 typedef struct wl_chan_qual_event { 9199 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 9200 * one per specified period (0 to disable rate limit). 9201 */ 9202 uint16 flags; 9203 uint16 num_metrics; 9204 wl_chan_qual_metric_t metric[WL_CHAN_QUAL_TOTAL]; /**< metric array */ 9205 } wl_chan_qual_event_t; 9206 typedef struct wl_action_obss_coex_req { 9207 uint8 info; 9208 uint8 num; 9209 uint8 ch_list[1]; 9210 } wl_action_obss_coex_req_t; 9211 9212 /** IOVar parameter block for small MAC address array with type indicator */ 9213 #define WL_IOV_MAC_PARAM_LEN 4 9214 9215 /** This value is hardcoded to be 16 and MUST match PKTQ_MAX_PREC value defined elsewhere */ 9216 #define WL_IOV_PKTQ_LOG_PRECS 16 9217 9218 #include <packed_section_start.h> 9219 typedef BWL_PRE_PACKED_STRUCT struct { 9220 uint32 num_addrs; 9221 uint8 addr_type[WL_IOV_MAC_PARAM_LEN]; 9222 struct ether_addr ea[WL_IOV_MAC_PARAM_LEN]; 9223 } BWL_POST_PACKED_STRUCT wl_iov_mac_params_t; 9224 #include <packed_section_end.h> 9225 9226 /** This is extra info that follows wl_iov_mac_params_t */ 9227 typedef struct { 9228 uint32 addr_info[WL_IOV_MAC_PARAM_LEN]; 9229 } wl_iov_mac_extra_params_t; 9230 9231 /** Combined structure */ 9232 typedef struct { 9233 wl_iov_mac_params_t params; 9234 wl_iov_mac_extra_params_t extra_params; 9235 } wl_iov_mac_full_params_t; 9236 9237 /** Parameter block for PKTQ_LOG statistics */ 9238 /* NOTE: this structure cannot change! It is exported to wlu as a binary format 9239 * A new format revision number must be created if the interface changes 9240 * The latest is v05; previous v01...v03 are no longer supported, v04 has 9241 * common base with v05 9242 */ 9243 #define PKTQ_LOG_COUNTERS_V4 \ 9244 /* packets requested to be stored */ \ 9245 uint32 requested; \ 9246 /* packets stored */ \ 9247 uint32 stored; \ 9248 /* packets saved, because a lowest priority queue has given away one packet */ \ 9249 uint32 saved; \ 9250 /* packets saved, because an older packet from the same queue has been dropped */ \ 9251 uint32 selfsaved; \ 9252 /* packets dropped, because pktq is full with higher precedence packets */ \ 9253 uint32 full_dropped; \ 9254 /* packets dropped because pktq per that precedence is full */ \ 9255 uint32 dropped; \ 9256 /* packets dropped, in order to save one from a queue of a highest priority */ \ 9257 uint32 sacrificed; \ 9258 /* packets droped because of hardware/transmission error */ \ 9259 uint32 busy; \ 9260 /* packets re-sent because they were not received */ \ 9261 uint32 retry; \ 9262 /* packets retried again (ps pretend) prior to moving power save mode */ \ 9263 uint32 ps_retry; \ 9264 /* suppressed packet count */ \ 9265 uint32 suppress; \ 9266 /* packets finally dropped after retry limit */ \ 9267 uint32 retry_drop; \ 9268 /* the high-water mark of the queue capacity for packets - goes to zero as queue fills */ \ 9269 uint32 max_avail; \ 9270 /* the high-water mark of the queue utilisation for packets - ('inverse' of max_avail) */ \ 9271 uint32 max_used; \ 9272 /* the maximum capacity of the queue */ \ 9273 uint32 queue_capacity; \ 9274 /* count of rts attempts that failed to receive cts */ \ 9275 uint32 rtsfail; \ 9276 /* count of packets sent (acked) successfully */ \ 9277 uint32 acked; \ 9278 /* running total of phy rate of packets sent successfully */ \ 9279 uint32 txrate_succ; \ 9280 /* running total of phy 'main' rate */ \ 9281 uint32 txrate_main; \ 9282 /* actual data transferred successfully */ \ 9283 uint32 throughput; \ 9284 /* time difference since last pktq_stats */ \ 9285 uint32 time_delta; 9286 9287 typedef struct { 9288 PKTQ_LOG_COUNTERS_V4 9289 } pktq_log_counters_v04_t; 9290 9291 /** v5 is the same as V4 with extra parameter */ 9292 typedef struct { 9293 PKTQ_LOG_COUNTERS_V4 9294 /** cumulative time to transmit */ 9295 uint32 airtime; 9296 } pktq_log_counters_v05_t; 9297 9298 typedef struct { 9299 uint8 num_prec[WL_IOV_MAC_PARAM_LEN]; 9300 pktq_log_counters_v04_t counters[WL_IOV_MAC_PARAM_LEN][WL_IOV_PKTQ_LOG_PRECS]; 9301 uint32 counter_info[WL_IOV_MAC_PARAM_LEN]; 9302 uint32 pspretend_time_delta[WL_IOV_MAC_PARAM_LEN]; 9303 char headings[]; 9304 } pktq_log_format_v04_t; 9305 9306 typedef struct { 9307 uint8 num_prec[WL_IOV_MAC_PARAM_LEN]; 9308 pktq_log_counters_v05_t counters[WL_IOV_MAC_PARAM_LEN][WL_IOV_PKTQ_LOG_PRECS]; 9309 uint32 counter_info[WL_IOV_MAC_PARAM_LEN]; 9310 uint32 pspretend_time_delta[WL_IOV_MAC_PARAM_LEN]; 9311 char headings[]; 9312 } pktq_log_format_v05_t; 9313 9314 typedef struct { 9315 uint32 version; 9316 wl_iov_mac_params_t params; 9317 union { 9318 pktq_log_format_v04_t v04; 9319 pktq_log_format_v05_t v05; 9320 } pktq_log; 9321 } wl_iov_pktq_log_t; 9322 9323 /* PKTQ_LOG_AUTO, PKTQ_LOG_DEF_PREC flags introduced in v05, they are ignored by v04 */ 9324 #define PKTQ_LOG_AUTO (1 << 31) 9325 #define PKTQ_LOG_DEF_PREC (1 << 30) 9326 9327 typedef struct wl_pfn_macaddr_cfg_0 { 9328 uint8 version; 9329 uint8 reserved; 9330 struct ether_addr macaddr; 9331 } wl_pfn_macaddr_cfg_0_t; 9332 #define LEGACY1_WL_PFN_MACADDR_CFG_VER 0 9333 #define WL_PFN_MAC_OUI_ONLY_MASK 1 9334 #define WL_PFN_SET_MAC_UNASSOC_MASK 2 9335 #define WL_PFN_RESTRICT_LA_MAC_MASK 4 9336 #define WL_PFN_MACADDR_FLAG_MASK 0x7 9337 /** To configure pfn_macaddr */ 9338 typedef struct wl_pfn_macaddr_cfg { 9339 uint8 version; 9340 uint8 flags; 9341 struct ether_addr macaddr; 9342 } wl_pfn_macaddr_cfg_t; 9343 #define WL_PFN_MACADDR_CFG_VER 1 9344 9345 /* 9346 * SCB_BS_DATA iovar definitions start. 9347 */ 9348 #define SCB_BS_DATA_STRUCT_VERSION 1 9349 9350 /** The actual counters maintained for each station */ 9351 typedef struct { 9352 /* The following counters are a subset of what pktq_stats provides per precedence. */ 9353 uint32 retry; /**< packets re-sent because they were not received */ 9354 uint32 retry_drop; /**< packets finally dropped after retry limit */ 9355 uint32 rtsfail; /**< count of rts attempts that failed to receive cts */ 9356 uint32 acked; /**< count of packets sent (acked) successfully */ 9357 uint32 txrate_succ; /**< running total of phy rate of packets sent successfully */ 9358 uint32 txrate_main; /**< running total of phy 'main' rate */ 9359 uint32 throughput; /**< actual data transferred successfully */ 9360 uint32 time_delta; /**< time difference since last pktq_stats */ 9361 uint32 airtime; /**< cumulative total medium access delay in useconds */ 9362 } iov_bs_data_counters_t; 9363 9364 /** The structure for individual station information. */ 9365 #include <packed_section_start.h> 9366 typedef BWL_PRE_PACKED_STRUCT struct { 9367 struct ether_addr station_address; /**< The station MAC address */ 9368 uint16 station_flags; /**< Bit mask of flags, for future use. */ 9369 iov_bs_data_counters_t station_counters; /**< The actual counter values */ 9370 } BWL_POST_PACKED_STRUCT iov_bs_data_record_t; 9371 #include <packed_section_end.h> 9372 9373 #include <packed_section_start.h> 9374 typedef BWL_PRE_PACKED_STRUCT struct { 9375 uint16 structure_version; /**< Structure version number (for wl/wlu matching) */ 9376 uint16 structure_count; /**< Number of iov_bs_data_record_t records following */ 9377 iov_bs_data_record_t structure_record[1]; /**< 0 - structure_count records */ 9378 } BWL_POST_PACKED_STRUCT iov_bs_data_struct_t; 9379 #include <packed_section_end.h> 9380 9381 /* Bitmask of options that can be passed in to the iovar. */ 9382 enum { 9383 SCB_BS_DATA_FLAG_NO_RESET = (1<<0) /**< Do not clear the counters after reading */ 9384 }; 9385 /* 9386 * SCB_BS_DATA iovar definitions end. 9387 */ 9388 9389 typedef struct wlc_extlog_cfg { 9390 int32 max_number; 9391 uint16 module; /**< bitmap */ 9392 uint8 level; 9393 uint8 flag; 9394 uint16 version; 9395 uint16 PAD; 9396 } wlc_extlog_cfg_t; 9397 9398 typedef struct log_record { 9399 uint32 time; 9400 uint16 module; 9401 uint16 id; 9402 uint8 level; 9403 uint8 sub_unit; 9404 uint8 seq_num; 9405 uint8 pad; 9406 int32 arg; 9407 char str[MAX_ARGSTR_LEN]; 9408 char PAD[4-MAX_ARGSTR_LEN%4]; 9409 } log_record_t; 9410 9411 typedef struct wlc_extlog_req { 9412 uint32 from_last; 9413 uint32 num; 9414 } wlc_extlog_req_t; 9415 9416 typedef struct wlc_extlog_results { 9417 uint16 version; 9418 uint16 record_len; 9419 uint32 num; 9420 log_record_t logs[1]; 9421 } wlc_extlog_results_t; 9422 9423 typedef struct log_idstr { 9424 uint16 id; 9425 uint16 flag; 9426 uint8 arg_type; 9427 const char *fmt_str; 9428 } log_idstr_t; 9429 9430 #define FMTSTRF_USER 1 9431 9432 /* flat ID definitions 9433 * New definitions HAVE TO BE ADDED at the end of the table. Otherwise, it will 9434 * affect backward compatibility with pre-existing apps 9435 */ 9436 typedef enum { 9437 FMTSTR_DRIVER_UP_ID = 0, 9438 FMTSTR_DRIVER_DOWN_ID = 1, 9439 FMTSTR_SUSPEND_MAC_FAIL_ID = 2, 9440 FMTSTR_NO_PROGRESS_ID = 3, 9441 FMTSTR_RFDISABLE_ID = 4, 9442 FMTSTR_REG_PRINT_ID = 5, 9443 FMTSTR_EXPTIME_ID = 6, 9444 FMTSTR_JOIN_START_ID = 7, 9445 FMTSTR_JOIN_COMPLETE_ID = 8, 9446 FMTSTR_NO_NETWORKS_ID = 9, 9447 FMTSTR_SECURITY_MISMATCH_ID = 10, 9448 FMTSTR_RATE_MISMATCH_ID = 11, 9449 FMTSTR_AP_PRUNED_ID = 12, 9450 FMTSTR_KEY_INSERTED_ID = 13, 9451 FMTSTR_DEAUTH_ID = 14, 9452 FMTSTR_DISASSOC_ID = 15, 9453 FMTSTR_LINK_UP_ID = 16, 9454 FMTSTR_LINK_DOWN_ID = 17, 9455 FMTSTR_RADIO_HW_OFF_ID = 18, 9456 FMTSTR_RADIO_HW_ON_ID = 19, 9457 FMTSTR_EVENT_DESC_ID = 20, 9458 FMTSTR_PNP_SET_POWER_ID = 21, 9459 FMTSTR_RADIO_SW_OFF_ID = 22, 9460 FMTSTR_RADIO_SW_ON_ID = 23, 9461 FMTSTR_PWD_MISMATCH_ID = 24, 9462 FMTSTR_FATAL_ERROR_ID = 25, 9463 FMTSTR_AUTH_FAIL_ID = 26, 9464 FMTSTR_ASSOC_FAIL_ID = 27, 9465 FMTSTR_IBSS_FAIL_ID = 28, 9466 FMTSTR_EXTAP_FAIL_ID = 29, 9467 FMTSTR_MAX_ID 9468 } log_fmtstr_id_t; 9469 9470 /** 11k Neighbor Report element (unversioned, deprecated) */ 9471 typedef struct nbr_element { 9472 uint8 id; 9473 uint8 len; 9474 struct ether_addr bssid; 9475 uint32 bssid_info; 9476 uint8 reg; 9477 uint8 channel; 9478 uint8 phytype; 9479 uint8 pad; 9480 } nbr_element_t; 9481 #define NBR_ADD_STATIC 0 9482 #define NBR_ADD_DYNAMIC 1 9483 9484 #define WL_RRM_NBR_RPT_VER 1 9485 9486 #define WL_NBR_RPT_FLAG_BSS_PREF_FROM_AP 0x01 9487 /** 11k Neighbor Report element */ 9488 typedef struct nbr_rpt_elem { 9489 uint8 version; 9490 uint8 id; 9491 uint8 len; 9492 uint8 pad; 9493 struct ether_addr bssid; 9494 uint8 pad_1[2]; 9495 uint32 bssid_info; 9496 uint8 reg; 9497 uint8 channel; 9498 uint8 phytype; 9499 uint8 addtype; /* static for manual add or dynamic if auto-learning of neighbors */ 9500 wlc_ssid_t ssid; 9501 chanspec_t chanspec; 9502 uint8 bss_trans_preference; 9503 uint8 flags; 9504 } nbr_rpt_elem_t; 9505 9506 typedef enum event_msgs_ext_command { 9507 EVENTMSGS_NONE = 0, 9508 EVENTMSGS_SET_BIT = 1, 9509 EVENTMSGS_RESET_BIT = 2, 9510 EVENTMSGS_SET_MASK = 3 9511 } event_msgs_ext_command_t; 9512 9513 #define EVENTMSGS_VER 1 9514 #define EVENTMSGS_EXT_STRUCT_SIZE ((uint)(sizeof(eventmsgs_ext_t) - 1)) 9515 9516 /* len- for SET it would be mask size from the application to the firmware */ 9517 /* for GET it would be actual firmware mask size */ 9518 /* maxgetsize - is only used for GET. indicate max mask size that the */ 9519 /* application can read from the firmware */ 9520 typedef struct eventmsgs_ext 9521 { 9522 uint8 ver; 9523 uint8 command; 9524 uint8 len; 9525 uint8 maxgetsize; 9526 uint8 mask[1]; 9527 } eventmsgs_ext_t; 9528 9529 #include <packed_section_start.h> 9530 typedef BWL_PRE_PACKED_STRUCT struct pcie_bus_tput_params { 9531 /** no of host dma descriptors programmed by the firmware before a commit */ 9532 uint16 max_dma_descriptors; 9533 9534 uint16 host_buf_len; /**< length of host buffer */ 9535 dmaaddr_t host_buf_addr; /**< physical address for bus_throughput_buf */ 9536 } BWL_POST_PACKED_STRUCT pcie_bus_tput_params_t; 9537 #include <packed_section_end.h> 9538 9539 typedef struct pcie_bus_tput_stats { 9540 uint16 time_taken; /**< no of secs the test is run */ 9541 uint16 nbytes_per_descriptor; /**< no of bytes of data dma ed per descriptor */ 9542 9543 /** no of desciptors for which dma is sucessfully completed within the test time */ 9544 uint32 count; 9545 } pcie_bus_tput_stats_t; 9546 9547 #define HOST_WAKEUP_DATA_VER 1 9548 #include <packed_section_start.h> 9549 /* Bus interface host wakeup data */ 9550 typedef BWL_PRE_PACKED_STRUCT struct wl_host_wakeup_data { 9551 uint16 ver; 9552 uint16 len; 9553 uchar data[1]; /* wakeup data */ 9554 } BWL_POST_PACKED_STRUCT wl_host_wakeup_data_t; 9555 #include <packed_section_end.h> 9556 9557 #define HOST_WAKEUP_DATA_VER_2 2 9558 #include <packed_section_start.h> 9559 /* Bus interface host wakeup data */ 9560 typedef BWL_PRE_PACKED_STRUCT struct wl_host_wakeup_data_v2 { 9561 uint16 ver; 9562 uint16 len; 9563 uint32 gpio_toggle_time; /* gpio toggle time in ms */ 9564 uchar data[1]; /* wakeup data */ 9565 } BWL_POST_PACKED_STRUCT wl_host_wakeup_data_v2_t; 9566 #include <packed_section_end.h> 9567 9568 typedef struct keepalives_max_idle { 9569 uint16 keepalive_count; /**< nmbr of keepalives per bss_max_idle period */ 9570 uint8 mkeepalive_index; /**< mkeepalive_index for keepalive frame to be used */ 9571 uint8 PAD; /**< to align next field */ 9572 uint16 max_interval; /**< seconds */ 9573 } keepalives_max_idle_t; 9574 9575 #define PM_IGNORE_BCMC_PROXY_ARP (1 << 0) 9576 #define PM_IGNORE_BCMC_ALL_DMS_ACCEPTED (1 << 1) 9577 9578 /* ##### HMAP section ##### */ 9579 #define PCIE_MAX_HMAP_WINDOWS 8 9580 #define PCIE_HMAPTEST_VERSION 2 9581 #define HMAPTEST_INVALID_OFFSET 0xFFFFFFFFu 9582 #define HMAPTEST_DEFAULT_WRITE_PATTERN 0xBABECAFEu 9583 #define HMAPTEST_ACCESS_ARM 0 9584 #define HMAPTEST_ACCESS_M2M 1 9585 #define HMAPTEST_ACCESS_D11 2 9586 #define HMAPTEST_ACCESS_NONE 3 9587 9588 typedef struct pcie_hmaptest { 9589 uint16 version; /* Version */ 9590 uint16 length; /* Length of entire structure */ 9591 uint32 xfer_len; 9592 uint32 accesstype; 9593 uint32 is_write; 9594 uint32 is_invalid; 9595 uint32 host_addr_hi; 9596 uint32 host_addr_lo; 9597 uint32 host_offset; 9598 uint32 value; /* 4 byte value to be filled in case of write access test */ 9599 uint32 delay; /* wait time in seconds before initiating access from dongle */ 9600 } pcie_hmaptest_t; 9601 9602 /* HMAP window register set */ 9603 typedef struct hmapwindow { 9604 uint32 baseaddr_lo; /* BaseAddrLower */ 9605 uint32 baseaddr_hi; /* BaseAddrUpper */ 9606 uint32 windowlength; /* Window Length */ 9607 } hmapwindow_t; 9608 9609 #define PCIE_HMAP_VERSION 1 9610 typedef struct pcie_hmap { 9611 uint16 version; /**< Version */ 9612 uint16 length; /**< Length of entire structure */ 9613 uint32 enable; /**< status of HMAP enabled/disabled */ 9614 uint32 nwindows; /* no. of HMAP windows enabled */ 9615 uint32 window_config; /* HMAP window_config register */ 9616 uint32 hmap_violationaddr_lo; /* violating address lo */ 9617 uint32 hmap_violationaddr_hi; /* violating addr hi */ 9618 uint32 hmap_violation_info; /* violation info */ 9619 hmapwindow_t hwindows[]; /* Multiple hwindows */ 9620 } pcie_hmap_t; 9621 9622 /* ##### Power Stats section ##### */ 9623 9624 #define WL_PWRSTATS_VERSION 2 9625 9626 /** Input structure for pwrstats IOVAR */ 9627 typedef struct wl_pwrstats_query { 9628 uint16 length; /**< Number of entries in type array. */ 9629 uint16 type[1]; /**< Types (tags) to retrieve. 9630 * Length 0 (no types) means get all. 9631 */ 9632 } wl_pwrstats_query_t; 9633 9634 /** This structure is for version 2; version 1 will be deprecated in by FW */ 9635 #include <packed_section_start.h> 9636 typedef BWL_PRE_PACKED_STRUCT struct wl_pwrstats { 9637 uint16 version; /**< Version = 2 is TLV format */ 9638 uint16 length; /**< Length of entire structure */ 9639 uint8 data[1]; /**< TLV data, a series of structures, 9640 * each starting with type and length. 9641 * 9642 * Padded as necessary so each section 9643 * starts on a 4-byte boundary. 9644 * 9645 * Both type and len are uint16, but the 9646 * upper nibble of length is reserved so 9647 * valid len values are 0-4095. 9648 */ 9649 } BWL_POST_PACKED_STRUCT wl_pwrstats_t; 9650 #include <packed_section_end.h> 9651 #define WL_PWR_STATS_HDRLEN OFFSETOF(wl_pwrstats_t, data) 9652 9653 /* Bits for wake reasons */ 9654 #define WLC_PMD_WAKE_SET 0x1u 9655 #define WLC_PMD_PM_AWAKE_BCN 0x2u 9656 /* BIT:3 is no longer being used */ 9657 #define WLC_PMD_SCAN_IN_PROGRESS 0x8u 9658 #define WLC_PMD_RM_IN_PROGRESS 0x10u 9659 #define WLC_PMD_AS_IN_PROGRESS 0x20u 9660 #define WLC_PMD_PM_PEND 0x40u 9661 #define WLC_PMD_PS_POLL 0x80u 9662 #define WLC_PMD_CHK_UNALIGN_TBTT 0x100u 9663 #define WLC_PMD_APSD_STA_UP 0x200u 9664 #define WLC_PMD_TX_PEND_WAR 0x400u /* obsolete, can be reused */ 9665 #define WLC_PMD_NAN_AWAKE 0x400u /* Reusing for NAN */ 9666 #define WLC_PMD_GPTIMER_STAY_AWAKE 0x800u 9667 9668 #ifdef WLAWDL 9669 #define WLC_PMD_AWDL_AWAKE 0x1000u 9670 #endif /* WLAWDL */ 9671 9672 #define WLC_PMD_PM2_RADIO_SOFF_PEND 0x2000u 9673 #define WLC_PMD_NON_PRIM_STA_UP 0x4000u 9674 #define WLC_PMD_AP_UP 0x8000u 9675 #define WLC_PMD_TX_IN_PROGRESS 0x10000u /* Dongle awake due to packet TX */ 9676 #define WLC_PMD_4WAYHS_IN_PROGRESS 0x20000u /* Dongle awake due to 4 way handshake */ 9677 #define WLC_PMD_PM_OVERRIDE 0x40000u /* Dongle awake due to PM override */ 9678 #define WLC_PMD_WAKE_OTHER 0x80000u 9679 9680 typedef struct wlc_pm_debug { 9681 uint32 timestamp; /**< timestamp in millisecond */ 9682 uint32 reason; /**< reason(s) for staying awake */ 9683 } wlc_pm_debug_t; 9684 9685 /** WL_PWRSTATS_TYPE_PM_AWAKE1 structures (for 6.25 firmware) */ 9686 #define WLC_STA_AWAKE_STATES_MAX_V1 30 9687 #define WLC_PMD_EVENT_MAX_V1 32 9688 /** Data sent as part of pwrstats IOVAR (and EXCESS_PM_WAKE event) */ 9689 #include <packed_section_start.h> 9690 typedef BWL_PRE_PACKED_STRUCT struct pm_awake_data_v1 { 9691 uint32 curr_time; /**< ms */ 9692 uint32 hw_macc; /**< HW maccontrol */ 9693 uint32 sw_macc; /**< SW maccontrol */ 9694 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 9695 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 9696 9697 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 9698 int32 last_drift; /**< Most recent TSF drift from beacon */ 9699 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 9700 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 9701 9702 uint32 avg_drift; /**< Avg TSF drift from beacon */ 9703 9704 /* Wake history tracking */ 9705 uint8 pmwake_idx; /**< for stepping through pm_state */ 9706 wlc_pm_debug_t pm_state[WLC_STA_AWAKE_STATES_MAX_V1]; /**< timestamped wake bits */ 9707 uint32 pmd_event_wake_dur[WLC_PMD_EVENT_MAX_V1]; /**< cumulative usecs per wake reason */ 9708 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 9709 } BWL_POST_PACKED_STRUCT pm_awake_data_v1_t; 9710 #include <packed_section_end.h> 9711 9712 #include <packed_section_start.h> 9713 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_pm_awake_stats_v1 { 9714 uint16 type; /**< WL_PWRSTATS_TYPE_PM_AWAKE */ 9715 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 9716 9717 pm_awake_data_v1_t awake_data; 9718 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 9719 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 9720 } BWL_POST_PACKED_STRUCT wl_pwr_pm_awake_stats_v1_t; 9721 #include <packed_section_end.h> 9722 9723 /** WL_PWRSTATS_TYPE_PM_AWAKE2 structures. Data sent as part of pwrstats IOVAR */ 9724 typedef struct pm_awake_data_v2 { 9725 uint32 curr_time; /**< ms */ 9726 uint32 hw_macc; /**< HW maccontrol */ 9727 uint32 sw_macc; /**< SW maccontrol */ 9728 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 9729 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 9730 9731 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 9732 int32 last_drift; /**< Most recent TSF drift from beacon */ 9733 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 9734 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 9735 9736 uint32 avg_drift; /**< Avg TSF drift from beacon */ 9737 9738 /* Wake history tracking */ 9739 9740 /* pmstate array (type wlc_pm_debug_t) start offset */ 9741 uint16 pm_state_offset; 9742 /** pmstate number of array entries */ 9743 uint16 pm_state_len; 9744 9745 /** array (type uint32) start offset */ 9746 uint16 pmd_event_wake_dur_offset; 9747 /** pmd_event_wake_dur number of array entries */ 9748 uint16 pmd_event_wake_dur_len; 9749 9750 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 9751 uint8 pmwake_idx; /**< for stepping through pm_state */ 9752 uint8 flags; /**< bit0: 1-sleep, 0- wake. bit1: 0-bit0 invlid, 1-bit0 valid */ 9753 uint8 pad[2]; 9754 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 9755 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 9756 } pm_awake_data_v2_t; 9757 9758 typedef struct wl_pwr_pm_awake_stats_v2 { 9759 uint16 type; /**< WL_PWRSTATS_TYPE_PM_AWAKE */ 9760 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 9761 9762 pm_awake_data_v2_t awake_data; 9763 } wl_pwr_pm_awake_stats_v2_t; 9764 9765 /* bit0: 1-sleep, 0- wake. bit1: 0-bit0 invlid, 1-bit0 valid */ 9766 #define WL_PWR_PM_AWAKE_STATS_WAKE 0x02 9767 #define WL_PWR_PM_AWAKE_STATS_ASLEEP 0x03 9768 #define WL_PWR_PM_AWAKE_STATS_WAKE_MASK 0x03 9769 9770 /* WL_PWRSTATS_TYPE_PM_AWAKE Version 2 structures taken from 4324/43342 */ 9771 /* These structures are only to be used with 4324/43342 devices */ 9772 9773 #define WL_STA_AWAKE_STATES_MAX_V2 30 9774 #define WL_PMD_EVENT_MAX_V2 32 9775 #define MAX_P2P_BSS_DTIM_PRD 4 9776 9777 /** WL_PWRSTATS_TYPE_PM_ACCUMUL structures. Data sent as part of pwrstats IOVAR */ 9778 typedef struct pm_accum_data_v1 { 9779 uint64 current_ts; 9780 uint64 pm_cnt; 9781 uint64 pm_dur; 9782 uint64 pm_last_entry_us; 9783 uint64 awake_cnt; 9784 uint64 awake_dur; 9785 uint64 awake_last_entry_us; 9786 } pm_accum_data_v1_t; 9787 9788 typedef struct wl_pwr_pm_accum_stats_v1 { 9789 uint16 type; /**< WL_PWRSTATS_TYPE_PM_ACCUMUL */ 9790 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 9791 uint8 PAD[4]; 9792 pm_accum_data_v1_t accum_data; 9793 } wl_pwr_pm_accum_stats_v1_t; 9794 9795 #include <packed_section_start.h> 9796 typedef BWL_PRE_PACKED_STRUCT struct ucode_dbg_v2 { 9797 uint32 macctrl; 9798 uint16 m_p2p_hps; 9799 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 9800 uint32 psmdebug[20]; 9801 uint32 phydebug[20]; 9802 uint32 psm_brc; 9803 uint32 ifsstat; 9804 } BWL_POST_PACKED_STRUCT ucode_dbg_v2_t; 9805 #include <packed_section_end.h> 9806 9807 #include <packed_section_start.h> 9808 typedef BWL_PRE_PACKED_STRUCT struct pmalert_awake_data_v2 { 9809 uint32 curr_time; /* ms */ 9810 uint32 hw_macc; /* HW maccontrol */ 9811 uint32 sw_macc; /* SW maccontrol */ 9812 uint32 pm_dur; /* Total sleep time in PM, msecs */ 9813 uint32 mpc_dur; /* Total sleep time in MPC, msecs */ 9814 9815 /* int32 drifts = remote - local; +ve drift => local-clk slow */ 9816 int32 last_drift; /* Most recent TSF drift from beacon */ 9817 int32 min_drift; /* Min TSF drift from beacon in magnitude */ 9818 int32 max_drift; /* Max TSF drift from beacon in magnitude */ 9819 9820 uint32 avg_drift; /* Avg TSF drift from beacon */ 9821 9822 /* Wake history tracking */ 9823 uint8 pmwake_idx; /* for stepping through pm_state */ 9824 wlc_pm_debug_t pm_state[WL_STA_AWAKE_STATES_MAX_V2]; /* timestamped wake bits */ 9825 uint32 pmd_event_wake_dur[WL_PMD_EVENT_MAX_V2]; /* cumulative usecs per wake reason */ 9826 uint32 drift_cnt; /* Count of drift readings over which avg_drift was computed */ 9827 uint32 start_event_dur[WL_PMD_EVENT_MAX_V2]; /* start event-duration */ 9828 ucode_dbg_v2_t ud; 9829 uint32 frts_time; /* Cumulative ms spent in frts since driver load */ 9830 uint32 frts_end_cnt; /* No of times frts ended since driver load */ 9831 } BWL_POST_PACKED_STRUCT pmalert_awake_data_v2_t; 9832 #include <packed_section_end.h> 9833 9834 #include <packed_section_start.h> 9835 typedef BWL_PRE_PACKED_STRUCT struct pm_alert_data_v2 { 9836 uint32 version; 9837 uint32 length; /* Length of entire structure */ 9838 uint32 reasons; /* reason(s) for pm_alert */ 9839 /* Following fields are present only for reasons 9840 * PM_DUR_EXCEEDED, MPC_DUR_EXCEEDED & CONST_AWAKE_DUR_EXCEEDED 9841 */ 9842 uint32 prev_stats_time; /* msecs */ 9843 uint32 prev_pm_dur; /* msecs */ 9844 uint32 prev_mpc_dur; /* msecs */ 9845 pmalert_awake_data_v2_t awake_data; 9846 } BWL_POST_PACKED_STRUCT pm_alert_data_v2_t; 9847 #include <packed_section_end.h> 9848 9849 #include <packed_section_start.h> 9850 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_pm_awake_status_v2 { 9851 uint16 type; /* WL_PWRSTATS_TYPE_PM_AWAKE */ 9852 uint16 len; /* Up to 4K-1, top 4 bits are reserved */ 9853 9854 pmalert_awake_data_v2_t awake_data; 9855 uint32 frts_time; /* Cumulative ms spent in frts since driver load */ 9856 uint32 frts_end_cnt; /* No of times frts ended since driver load */ 9857 } BWL_POST_PACKED_STRUCT wl_pwr_pm_awake_status_v2_t; 9858 #include <packed_section_end.h> 9859 9860 /* Below are latest definitions from PHO25178RC100_BRANCH_6_50 */ 9861 /* wl_pwr_pm_awake_stats_v1_t is used for WL_PWRSTATS_TYPE_PM_AWAKE */ 9862 /* Use regs from d11.h instead of raw addresses for */ 9863 /* (at least) the chip independent registers */ 9864 typedef struct ucode_dbg_ext { 9865 uint32 x120; 9866 uint32 x124; 9867 uint32 x154; 9868 uint32 x158; 9869 uint32 x15c; 9870 uint32 x180; 9871 uint32 x184; 9872 uint32 x188; 9873 uint32 x18c; 9874 uint32 x1a0; 9875 uint32 x1a8; 9876 uint32 x1e0; 9877 uint32 scr_x14; 9878 uint32 scr_x2b; 9879 uint32 scr_x2c; 9880 uint32 scr_x2d; 9881 uint32 scr_x2e; 9882 9883 uint16 x40a; 9884 uint16 x480; 9885 uint16 x490; 9886 uint16 x492; 9887 uint16 x4d8; 9888 uint16 x4b8; 9889 uint16 x4ba; 9890 uint16 x4bc; 9891 uint16 x4be; 9892 uint16 x500; 9893 uint16 x50e; 9894 uint16 x522; 9895 uint16 x546; 9896 uint16 x578; 9897 uint16 x602; 9898 uint16 x646; 9899 uint16 x648; 9900 uint16 x666; 9901 uint16 x670; 9902 uint16 x690; 9903 uint16 x692; 9904 uint16 x6a0; 9905 uint16 x6a2; 9906 uint16 x6a4; 9907 uint16 x6b2; 9908 uint16 x7c0; 9909 9910 uint16 shm_x20; 9911 uint16 shm_x4a; 9912 uint16 shm_x5e; 9913 uint16 shm_x5f; 9914 uint16 shm_xaab; 9915 uint16 shm_x74a; 9916 uint16 shm_x74b; 9917 uint16 shm_x74c; 9918 uint16 shm_x74e; 9919 uint16 shm_x756; 9920 uint16 shm_x75b; 9921 uint16 shm_x7b9; 9922 uint16 shm_x7d4; 9923 9924 uint16 shm_P2P_HPS; 9925 uint16 shm_P2P_intr[16]; 9926 uint16 shm_P2P_perbss[48]; 9927 } ucode_dbg_ext_t; 9928 9929 #include <packed_section_start.h> 9930 typedef BWL_PRE_PACKED_STRUCT struct pm_alert_data_v1 { 9931 uint32 version; 9932 uint32 length; /**< Length of entire structure */ 9933 uint32 reasons; /**< reason(s) for pm_alert */ 9934 /* Following fields are present only for reasons 9935 * PM_DUR_EXCEEDED, MPC_DUR_EXCEEDED & CONST_AWAKE_DUR_EXCEEDED 9936 */ 9937 uint32 prev_stats_time; /**< msecs */ 9938 uint32 prev_pm_dur; /**< msecs */ 9939 uint32 prev_mpc_dur; /**< msecs */ 9940 pm_awake_data_v1_t awake_data; 9941 uint32 start_event_dur[WLC_PMD_EVENT_MAX_V1]; /**< start event-duration */ 9942 ucode_dbg_v2_t ud; 9943 uint32 frts_time; /**< Cumulative ms spent in frts since driver load */ 9944 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 9945 ucode_dbg_ext_t ud_ext; 9946 uint32 prev_frts_dur; /**< ms */ 9947 } BWL_POST_PACKED_STRUCT pm_alert_data_v1_t; 9948 #include <packed_section_end.h> 9949 9950 /* End of 43342/4324 v2 structure definitions */ 9951 9952 /* Original bus structure is for HSIC */ 9953 9954 typedef struct bus_metrics { 9955 uint32 suspend_ct; /**< suspend count */ 9956 uint32 resume_ct; /**< resume count */ 9957 uint32 disconnect_ct; /**< disconnect count */ 9958 uint32 reconnect_ct; /**< reconnect count */ 9959 uint32 active_dur; /**< msecs in bus, usecs for user */ 9960 uint32 suspend_dur; /**< msecs in bus, usecs for user */ 9961 uint32 disconnect_dur; /**< msecs in bus, usecs for user */ 9962 } bus_metrics_t; 9963 9964 /** Bus interface info for USB/HSIC */ 9965 #include <packed_section_start.h> 9966 typedef BWL_PRE_PACKED_STRUCT struct wl_pwr_usb_hsic_stats { 9967 uint16 type; /**< WL_PWRSTATS_TYPE_USB_HSIC */ 9968 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 9969 9970 bus_metrics_t hsic; /**< stats from hsic bus driver */ 9971 } BWL_POST_PACKED_STRUCT wl_pwr_usb_hsic_stats_t; 9972 #include <packed_section_end.h> 9973 9974 /* PCIe Event counter tlv IDs */ 9975 enum pcie_cnt_xtlv_id { 9976 PCIE_CNT_XTLV_METRICS = 0x1, /**< PCIe Bus Metrics */ 9977 PCIE_CNT_XTLV_BUS_CNT = 0x2 /**< PCIe Bus counters */ 9978 }; 9979 9980 typedef struct pcie_bus_metrics { 9981 uint32 d3_suspend_ct; /**< suspend count */ 9982 uint32 d0_resume_ct; /**< resume count */ 9983 uint32 perst_assrt_ct; /**< PERST# assert count */ 9984 uint32 perst_deassrt_ct; /**< PERST# de-assert count */ 9985 uint32 active_dur; /**< msecs */ 9986 uint32 d3_suspend_dur; /**< msecs */ 9987 uint32 perst_dur; /**< msecs */ 9988 uint32 l0_cnt; /**< L0 entry count */ 9989 uint32 l0_usecs; /**< L0 duration in usecs */ 9990 uint32 l1_cnt; /**< L1 entry count */ 9991 uint32 l1_usecs; /**< L1 duration in usecs */ 9992 uint32 l1_1_cnt; /**< L1_1ss entry count */ 9993 uint32 l1_1_usecs; /**< L1_1ss duration in usecs */ 9994 uint32 l1_2_cnt; /**< L1_2ss entry count */ 9995 uint32 l1_2_usecs; /**< L1_2ss duration in usecs */ 9996 uint32 l2_cnt; /**< L2 entry count */ 9997 uint32 l2_usecs; /**< L2 duration in usecs */ 9998 uint32 timestamp; /**< Timestamp on when stats are collected */ 9999 uint32 num_h2d_doorbell; /**< # of doorbell interrupts - h2d */ 10000 uint32 num_d2h_doorbell; /**< # of doorbell interrupts - d2h */ 10001 uint32 num_submissions; /**< # of submissions */ 10002 uint32 num_completions; /**< # of completions */ 10003 uint32 num_rxcmplt; /**< # of rx completions */ 10004 uint32 num_rxcmplt_drbl; /**< of drbl interrupts for rx complt. */ 10005 uint32 num_txstatus; /**< # of tx completions */ 10006 uint32 num_txstatus_drbl; /**< of drbl interrupts for tx complt. */ 10007 uint32 deepsleep_count; /**< # of times chip went to deepsleep */ 10008 uint32 deepsleep_dur; /**< # of msecs chip was in deepsleep */ 10009 uint32 ltr_active_ct; /**< # of times chip went to LTR ACTIVE */ 10010 uint32 ltr_active_dur; /**< # of msecs chip was in LTR ACTIVE */ 10011 uint32 ltr_sleep_ct; /**< # of times chip went to LTR SLEEP */ 10012 uint32 ltr_sleep_dur; /**< # of msecs chip was in LTR SLEEP */ 10013 } pcie_bus_metrics_t; 10014 10015 typedef struct pcie_cnt { 10016 uint32 ltr_state; /**< Current LTR state */ 10017 uint32 l0_sr_cnt; /**< SR count during L0 */ 10018 uint32 l2l3_sr_cnt; /**< SR count during L2L3 */ 10019 uint32 d3_ack_sr_cnt; /**< srcount during last D3-ACK */ 10020 uint32 d3_sr_cnt; /**< SR count during D3 */ 10021 uint32 d3_info_start; /**< D3 INFORM received time */ 10022 uint32 d3_info_enter_cnt; /**< # of D3 INFORM received */ 10023 uint32 d3_cnt; /**< # of real D3 */ 10024 uint32 d3_ack_sent_cnt; /**< # of D3 ACK sent count */ 10025 uint32 d3_drop_cnt_event; /**< # of events dropped during D3 */ 10026 uint32 d2h_req_q_len; /**< # of Packet pending in D2H request queue */ 10027 uint32 hw_reason; /**< Last Host wake assert reason */ 10028 uint32 hw_assert_cnt; /**< # of times Host wake Asserted */ 10029 uint32 host_ready_cnt; /**< # of Host ready interrupts */ 10030 uint32 hw_assert_reason_0; /**< timestamp when hw_reason is TRAP */ 10031 uint32 hw_assert_reason_1; /**< timestamp when hw_reason is WL_EVENT */ 10032 uint32 hw_assert_reason_2; /**< timestamp when hw_reason is DATA */ 10033 uint32 hw_assert_reason_3; /**< timestamp when hw_reason is DELAYED_WAKE */ 10034 uint32 last_host_ready; /**< Timestamp of last Host ready */ 10035 bool hw_asserted; /**< Flag to indicate if Host wake is Asserted */ 10036 bool event_delivery_pend; /**< No resources to send event */ 10037 uint16 pad; /**< Word alignment for scripts */ 10038 } pcie_cnt_t; 10039 10040 /** Bus interface info for PCIE */ 10041 typedef struct wl_pwr_pcie_stats { 10042 uint16 type; /**< WL_PWRSTATS_TYPE_PCIE */ 10043 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10044 pcie_bus_metrics_t pcie; /**< stats from pcie bus driver */ 10045 } wl_pwr_pcie_stats_t; 10046 10047 /** Scan information history per category */ 10048 typedef struct scan_data { 10049 uint32 count; /**< Number of scans performed */ 10050 uint32 dur; /**< Total time (in us) used */ 10051 } scan_data_t; 10052 10053 typedef struct wl_pwr_scan_stats { 10054 uint16 type; /**< WL_PWRSTATS_TYPE_SCAN */ 10055 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10056 10057 /* Scan history */ 10058 scan_data_t user_scans; /**< User-requested scans: (i/e/p)scan */ 10059 scan_data_t assoc_scans; /**< Scans initiated by association requests */ 10060 scan_data_t roam_scans; /**< Scans initiated by the roam engine */ 10061 scan_data_t pno_scans[8]; /**< For future PNO bucketing (BSSID, SSID, etc) */ 10062 scan_data_t other_scans; /**< Scan engine usage not assigned to the above */ 10063 } wl_pwr_scan_stats_t; 10064 10065 typedef struct wl_pwr_connect_stats { 10066 uint16 type; /**< WL_PWRSTATS_TYPE_SCAN */ 10067 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10068 10069 /* Connection (Association + Key exchange) data */ 10070 uint32 count; /**< Number of connections performed */ 10071 uint32 dur; /**< Total time (in ms) used */ 10072 } wl_pwr_connect_stats_t; 10073 10074 typedef struct wl_pwr_phy_stats { 10075 uint16 type; /**< WL_PWRSTATS_TYPE_PHY */ 10076 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10077 uint32 tx_dur; /**< TX Active duration in us */ 10078 uint32 rx_dur; /**< RX Active duration in us */ 10079 } wl_pwr_phy_stats_t; 10080 10081 #ifdef WLAWDL 10082 typedef struct wl_pwr_awdl_stats { 10083 uint16 type; /**< WL_PWRSTATS_TYPE_AWDL */ 10084 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10085 uint32 tx_dur; /**< AWDL TX Active duration in usec */ 10086 uint32 rx_dur; /**< AWDL RX Active duration in usec */ 10087 uint32 aw_dur; /**< AWDL AW duration in msec */ 10088 uint32 awpscan_dur; /**< AWDL pscans dur in msec */ 10089 } wl_pwr_awdl_stats_t; 10090 #endif /* WLAWDL */ 10091 10092 typedef struct wl_mimo_meas_metrics_v1 { 10093 uint16 type; 10094 uint16 len; 10095 /* Total time(us) idle in MIMO RX chain configuration */ 10096 uint32 total_idle_time_mimo; 10097 /* Total time(us) idle in SISO RX chain configuration */ 10098 uint32 total_idle_time_siso; 10099 /* Total receive time (us) in SISO RX chain configuration */ 10100 uint32 total_rx_time_siso; 10101 /* Total receive time (us) in MIMO RX chain configuration */ 10102 uint32 total_rx_time_mimo; 10103 /* Total 1-chain transmit time(us) */ 10104 uint32 total_tx_time_1chain; 10105 /* Total 2-chain transmit time(us) */ 10106 uint32 total_tx_time_2chain; 10107 /* Total 3-chain transmit time(us) */ 10108 uint32 total_tx_time_3chain; 10109 } wl_mimo_meas_metrics_v1_t; 10110 10111 typedef struct wl_mimo_meas_metrics { 10112 uint16 type; 10113 uint16 len; 10114 /* Total time(us) idle in MIMO RX chain configuration */ 10115 uint32 total_idle_time_mimo; 10116 /* Total time(us) idle in SISO RX chain configuration */ 10117 uint32 total_idle_time_siso; 10118 /* Total receive time (us) in SISO RX chain configuration */ 10119 uint32 total_rx_time_siso; 10120 /* Total receive time (us) in MIMO RX chain configuration */ 10121 uint32 total_rx_time_mimo; 10122 /* Total 1-chain transmit time(us) */ 10123 uint32 total_tx_time_1chain; 10124 /* Total 2-chain transmit time(us) */ 10125 uint32 total_tx_time_2chain; 10126 /* Total 3-chain transmit time(us) */ 10127 uint32 total_tx_time_3chain; 10128 /* End of original, OCL fields start here */ 10129 /* Total time(us) idle in ocl mode */ 10130 uint32 total_idle_time_ocl; 10131 /* Total receive time (us) in ocl mode */ 10132 uint32 total_rx_time_ocl; 10133 /* End of OCL fields, internal adjustment fields here */ 10134 /* Total SIFS idle time in MIMO mode */ 10135 uint32 total_sifs_time_mimo; 10136 /* Total SIFS idle time in SISO mode */ 10137 uint32 total_sifs_time_siso; 10138 } wl_mimo_meas_metrics_t; 10139 10140 typedef struct wl_pwr_slice_index { 10141 uint16 type; /* WL_PWRSTATS_TYPE_SLICE_INDEX */ 10142 uint16 len; 10143 10144 uint32 slice_index; /* Slice index for which stats are meant for */ 10145 } wl_pwr_slice_index_t; 10146 10147 typedef struct wl_pwr_tsync_stats { 10148 uint16 type; /**< WL_PWRSTATS_TYPE_TSYNC */ 10149 uint16 len; 10150 uint32 avb_uptime; /**< AVB uptime in msec */ 10151 } wl_pwr_tsync_stats_t; 10152 10153 typedef struct wl_pwr_ops_stats { 10154 uint16 type; /* WL_PWRSTATS_TYPE_OPS_STATS */ 10155 uint16 len; /* total length includes fixed fields */ 10156 uint32 partial_ops_dur; /* Total time(in usec) partial ops duration */ 10157 uint32 full_ops_dur; /* Total time(in usec) full ops duration */ 10158 } wl_pwr_ops_stats_t; 10159 10160 typedef struct wl_pwr_bcntrim_stats { 10161 uint16 type; /* WL_PWRSTATS_TYPE_BCNTRIM_STATS */ 10162 uint16 len; /* total length includes fixed fields */ 10163 uint8 associated; /* STA is associated ? */ 10164 uint8 slice_idx; /* on which slice STA is associated */ 10165 uint16 pad; /* padding */ 10166 uint32 slice_beacon_seen; /* number of beacons seen on the Infra 10167 * interface on this slice 10168 */ 10169 uint32 slice_beacon_trimmed; /* number beacons actually trimmed on this slice */ 10170 uint32 total_beacon_seen; /* total number of beacons seen on the Infra interface */ 10171 uint32 total_beacon_trimmed; /* total beacons actually trimmed */ 10172 } wl_pwr_bcntrim_stats_t; 10173 10174 typedef struct wl_pwr_slice_index_band { 10175 uint16 type; /* WL_PWRSTATS_TYPE_SLICE_INDEX_BAND_INFO */ 10176 uint16 len; /* Total length includes fixed fields */ 10177 uint16 index; /* Slice Index */ 10178 int16 bandtype; /* Slice Bandtype */ 10179 } wl_pwr_slice_index_band_t; 10180 10181 typedef struct wl_pwr_psbw_stats { 10182 uint16 type; /* WL_PWRSTATS_TYPE_PSBW_STATS */ 10183 uint16 len; /* total length includes fixed fields */ 10184 uint8 slice_idx; /* on which slice STA is associated */ 10185 uint8 pad[3]; 10186 uint32 slice_enable_dur; /* time(ms) psbw remains enabled on this slice */ 10187 uint32 total_enable_dur; /* time(ms) psbw remains enabled total */ 10188 } wl_pwr_psbw_stats_t; 10189 10190 /* ##### End of Power Stats section ##### */ 10191 10192 /** IPV4 Arp offloads for ndis context */ 10193 #include <packed_section_start.h> 10194 BWL_PRE_PACKED_STRUCT struct hostip_id { 10195 struct ipv4_addr ipa; 10196 uint8 id; 10197 } BWL_POST_PACKED_STRUCT; 10198 #include <packed_section_end.h> 10199 10200 /* Return values */ 10201 #define ND_REPLY_PEER 0x1 /**< Reply was sent to service NS request from peer */ 10202 #define ND_REQ_SINK 0x2 /**< Input packet should be discarded */ 10203 #define ND_FORCE_FORWARD 0X3 /**< For the dongle to forward req to HOST */ 10204 10205 /** Neighbor Solicitation Response Offload IOVAR param */ 10206 #include <packed_section_start.h> 10207 typedef BWL_PRE_PACKED_STRUCT struct nd_param { 10208 struct ipv6_addr host_ip[2]; 10209 struct ipv6_addr solicit_ip; 10210 struct ipv6_addr remote_ip; 10211 uint8 host_mac[ETHER_ADDR_LEN]; 10212 uint32 offload_id; 10213 } BWL_POST_PACKED_STRUCT nd_param_t; 10214 #include <packed_section_end.h> 10215 10216 typedef struct wl_pfn_roam_thresh { 10217 uint32 pfn_alert_thresh; /**< time in ms */ 10218 uint32 roam_alert_thresh; /**< time in ms */ 10219 } wl_pfn_roam_thresh_t; 10220 10221 /* Reasons for wl_pmalert_t */ 10222 #define PM_DUR_EXCEEDED (1<<0) 10223 #define MPC_DUR_EXCEEDED (1<<1) 10224 #define ROAM_ALERT_THRESH_EXCEEDED (1<<2) 10225 #define PFN_ALERT_THRESH_EXCEEDED (1<<3) 10226 #define CONST_AWAKE_DUR_ALERT (1<<4) 10227 #define CONST_AWAKE_DUR_RECOVERY (1<<5) 10228 10229 #define MIN_PM_ALERT_LEN 9 10230 10231 /** Data sent in EXCESS_PM_WAKE event */ 10232 #define WL_PM_ALERT_VERSION 3 10233 10234 /** This structure is for version 3; version 2 will be deprecated in by FW */ 10235 #include <packed_section_start.h> 10236 typedef BWL_PRE_PACKED_STRUCT struct wl_pmalert { 10237 uint16 version; /**< Version = 3 is TLV format */ 10238 uint16 length; /**< Length of entire structure */ 10239 uint32 reasons; /**< reason(s) for pm_alert */ 10240 uint8 data[1]; /**< TLV data, a series of structures, 10241 * each starting with type and length. 10242 * 10243 * Padded as necessary so each section 10244 * starts on a 4-byte boundary. 10245 * 10246 * Both type and len are uint16, but the 10247 * upper nibble of length is reserved so 10248 * valid len values are 0-4095. 10249 */ 10250 } BWL_POST_PACKED_STRUCT wl_pmalert_t; 10251 #include <packed_section_end.h> 10252 10253 #define NUM_P2P_BSS_UCODE_DBG 3 10254 #define IDX_P2P_BSS_UCODE_DBG 12 10255 #define NUM_PSM_PHY_DBG 20 10256 10257 /* Type values for the data section */ 10258 #define WL_PMALERT_FIXED 0 /**< struct wl_pmalert_fixed_t, fixed fields */ 10259 #define WL_PMALERT_PMSTATE 1 /**< struct wl_pmalert_pmstate_t, variable */ 10260 #define WL_PMALERT_EVENT_DUR 2 /**< struct wl_pmalert_event_dur_t, variable */ 10261 #define WL_PMALERT_UCODE_DBG 3 /**< struct wl_pmalert_ucode_dbg_v1, variable */ 10262 #define WL_PMALERT_PS_ALLOWED_HIST 4 /**< struct wl_pmalert_ps_allowed_history, variable */ 10263 #define WL_PMALERT_EXT_UCODE_DBG 5 /**< struct wl_pmalert_ext_ucode_dbg_t, variable */ 10264 #define WL_PMALERT_EPM_START_EVENT_DUR 6 /**< struct wl_pmalert_event_dur_t, variable */ 10265 #define WL_PMALERT_UCODE_DBG_V2 7 /**< struct wl_pmalert_ucode_dbg_v2, variable */ 10266 #define WL_PMALERT_FIXED_SC 8 /**< struct wl_pmalert_fixed_sc_t, fixed fields */ 10267 #define WL_PMALERT_UCODE_DBG_SC 9 /**< struct wl_pmalert_ucode_dbg_v2, variable */ 10268 10269 typedef struct wl_pmalert_fixed { 10270 uint16 type; /**< WL_PMALERT_FIXED */ 10271 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10272 uint32 prev_stats_time; /**< msecs */ 10273 uint32 curr_time; /**< ms */ 10274 uint32 prev_pm_dur; /**< msecs */ 10275 uint32 pm_dur; /**< Total sleep time in PM, msecs */ 10276 uint32 prev_mpc_dur; /**< msecs */ 10277 uint32 mpc_dur; /**< Total sleep time in MPC, msecs */ 10278 uint32 hw_macc; /**< HW maccontrol */ 10279 uint32 sw_macc; /**< SW maccontrol */ 10280 10281 /* int32 drifts = remote - local; +ve drift -> local-clk slow */ 10282 int32 last_drift; /**< Most recent TSF drift from beacon */ 10283 int32 min_drift; /**< Min TSF drift from beacon in magnitude */ 10284 int32 max_drift; /**< Max TSF drift from beacon in magnitude */ 10285 10286 uint32 avg_drift; /**< Avg TSF drift from beacon */ 10287 uint32 drift_cnt; /**< Count of drift readings over which avg_drift was computed */ 10288 uint32 frts_time; /**< Cumulative ms spent in data frts since driver load */ 10289 uint32 frts_end_cnt; /**< No of times frts ended since driver load */ 10290 uint32 prev_frts_dur; /**< Data frts duration at start of pm-period */ 10291 uint32 cal_dur; /**< Cumulative ms spent in calibration */ 10292 uint32 prev_cal_dur; /**< cal duration at start of pm-period */ 10293 } wl_pmalert_fixed_t; 10294 10295 #define WL_PMALERT_SC_FLAG_SC_DOWN (1u << 0u) 10296 #define WL_PMALERT_SC_FLAG_SC_HIBERNATE (1u << 1u) 10297 10298 typedef struct wl_pmalert_fixed_sc { 10299 uint16 type; /* WL_PMALERT_FIXED_SC */ 10300 uint16 len; /* Up to 4K-1, top 4 bits are reserved */ 10301 uint32 flags; 10302 uint32 prev_stats_time; /* msecs */ 10303 uint32 curr_time; /* msecs */ 10304 uint32 prev_pm_dur; /* msecs */ 10305 uint32 pm_dur; /* Total sleep time in PM, msecs */ 10306 uint32 win_down_time; /* Total down time in the window in ms */ 10307 uint32 hw_macc; /* HW maccontrol */ 10308 uint32 sw_macc; /* SW maccontrol */ 10309 10310 /* int32 drifts = remote - local; +ve drift -> local-clk slow */ 10311 int32 last_drift; /* Most recent TSF drift from beacon */ 10312 int32 min_drift; /* Min TSF drift from beacon in magnitude */ 10313 int32 max_drift; /* Max TSF drift from beacon in magnitude */ 10314 uint32 avg_drift; /* Avg TSF drift from beacon */ 10315 uint32 drift_cnt; /* Count of drift readings over which avg_drift was computed */ 10316 10317 uint32 cal_dur; /* Cumulative ms spent in calibration */ 10318 uint32 prev_cal_dur; /* cal duration at start of pm-period */ 10319 } wl_pmalert_fixed_sc_t; 10320 10321 typedef struct wl_pmalert_pmstate { 10322 uint16 type; /**< WL_PMALERT_PMSTATE */ 10323 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10324 10325 uint8 pmwake_idx; /**< for stepping through pm_state */ 10326 uint8 pad[3]; 10327 /* Array of pmstate; len of array is based on tlv len */ 10328 wlc_pm_debug_t pmstate[1]; 10329 } wl_pmalert_pmstate_t; 10330 10331 typedef struct wl_pmalert_event_dur { 10332 uint16 type; /**< WL_PMALERT_EVENT_DUR */ 10333 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10334 10335 /* Array of event_dur, len of array is based on tlv len */ 10336 uint32 event_dur[1]; 10337 } wl_pmalert_event_dur_t; 10338 10339 #include <packed_section_start.h> 10340 BWL_PRE_PACKED_STRUCT struct wl_pmalert_ucode_dbg_v1 { 10341 uint16 type; /* WL_PMALERT_UCODE_DBG */ 10342 uint16 len; /* Up to 4K-1, top 4 bits are reserved */ 10343 uint32 macctrl; 10344 uint16 m_p2p_hps; 10345 uint32 psm_brc; 10346 uint32 ifsstat; 10347 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 10348 uint32 psmdebug[NUM_PSM_PHY_DBG]; 10349 uint32 phydebug[NUM_PSM_PHY_DBG]; 10350 uint16 M_P2P_BSS[NUM_P2P_BSS_UCODE_DBG][IDX_P2P_BSS_UCODE_DBG]; 10351 uint16 M_P2P_PRE_TBTT[NUM_P2P_BSS_UCODE_DBG]; 10352 10353 /* Following is valid only for corerevs<40 */ 10354 uint16 xmtfifordy; 10355 10356 /* Following 3 are valid only for 11ac corerevs (>=40) */ 10357 uint16 psm_maccommand; 10358 uint16 txe_status1; 10359 uint16 AQMFifoReady; 10360 } BWL_POST_PACKED_STRUCT; 10361 #include <packed_section_end.h> 10362 10363 #include <packed_section_start.h> 10364 BWL_PRE_PACKED_STRUCT struct wl_pmalert_ucode_dbg_v2 { 10365 uint16 type; /**< WL_PMALERT_UCODE_DBG_V2 */ 10366 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10367 uint32 macctrl; 10368 uint16 m_p2p_hps; 10369 uint32 psm_brc; 10370 uint32 ifsstat; 10371 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 10372 uint32 psmdebug[NUM_PSM_PHY_DBG]; 10373 uint32 phydebug[NUM_PSM_PHY_DBG]; 10374 uint16 M_P2P_BSS[NUM_P2P_BSS_UCODE_DBG][IDX_P2P_BSS_UCODE_DBG]; 10375 uint16 M_P2P_PRE_TBTT[NUM_P2P_BSS_UCODE_DBG]; 10376 10377 /* Following is valid only for corerevs<40 */ 10378 uint16 xmtfifordy; 10379 10380 /* Following 3 are valid only for 11ac corerevs (>=40) */ 10381 uint16 psm_maccommand; 10382 uint16 txe_status1; 10383 uint32 AQMFifoReady; 10384 } BWL_POST_PACKED_STRUCT; 10385 #include <packed_section_end.h> 10386 10387 #include <packed_section_start.h> 10388 BWL_PRE_PACKED_STRUCT struct wl_pmalert_ucode_dbg_sc_v1 { 10389 uint16 type; /**< WL_PMALERT_UCODE_DBG_SC */ 10390 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10391 /* ucode SHM and registers */ 10392 uint32 macctrl; 10393 uint16 m_p2p_hps; 10394 uint32 psm_brc; 10395 uint32 ifsstat; 10396 uint16 m_p2p_bss_dtim_prd[MAX_P2P_BSS_DTIM_PRD]; 10397 uint32 psmdebug[NUM_PSM_PHY_DBG]; 10398 uint32 phydebug[NUM_PSM_PHY_DBG]; 10399 uint16 M_P2P_BSS[NUM_P2P_BSS_UCODE_DBG][IDX_P2P_BSS_UCODE_DBG]; 10400 uint16 M_P2P_PRE_TBTT[NUM_P2P_BSS_UCODE_DBG]; 10401 uint16 psm_maccommand; 10402 } BWL_POST_PACKED_STRUCT; 10403 #include <packed_section_end.h> 10404 10405 typedef struct wlc_ps_debug { 10406 uint32 timestamp; /**< timestamp in millisecond */ 10407 uint32 ps_mask; /**< reason(s) for disallowing ps */ 10408 } wlc_ps_debug_t; 10409 10410 typedef struct wl_pmalert_ps_allowed_hist { 10411 uint16 type; /**< WL_PMALERT_PS_ALLOWED_HIST */ 10412 uint16 len; /**< Up to 4K-1, top 4 bits are reserved */ 10413 uint32 ps_allowed_start_idx; 10414 /* Array of ps_debug, len of array is based on tlv len */ 10415 wlc_ps_debug_t ps_debug[1]; 10416 } wl_pmalert_ps_allowed_hist_t; 10417 10418 /* Structures and constants used for "vndr_ie" IOVar interface */ 10419 #define VNDR_IE_CMD_LEN 4 /**< length of the set command string: 10420 * "add", "del" (+ NUL) 10421 */ 10422 10423 #define VNDR_IE_INFO_HDR_LEN (sizeof(uint32)) 10424 10425 #include <packed_section_start.h> 10426 typedef BWL_PRE_PACKED_STRUCT struct { 10427 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 10428 vndr_ie_t vndr_ie_data; /**< vendor IE data */ 10429 } BWL_POST_PACKED_STRUCT vndr_ie_info_t; 10430 #include <packed_section_end.h> 10431 10432 #include <packed_section_start.h> 10433 typedef BWL_PRE_PACKED_STRUCT struct { 10434 int32 iecount; /**< number of entries in the vndr_ie_list[] array */ 10435 vndr_ie_info_t vndr_ie_list[1]; /**< variable size list of vndr_ie_info_t structs */ 10436 } BWL_POST_PACKED_STRUCT vndr_ie_buf_t; 10437 #include <packed_section_end.h> 10438 10439 #include <packed_section_start.h> 10440 typedef BWL_PRE_PACKED_STRUCT struct { 10441 char cmd[VNDR_IE_CMD_LEN]; /**< vndr_ie IOVar set command : "add", "del" + NUL */ 10442 vndr_ie_buf_t vndr_ie_buffer; /**< buffer containing Vendor IE list information */ 10443 } BWL_POST_PACKED_STRUCT vndr_ie_setbuf_t; 10444 #include <packed_section_end.h> 10445 10446 /** tag_ID/length/value_buffer tuple */ 10447 #include <packed_section_start.h> 10448 typedef BWL_PRE_PACKED_STRUCT struct { 10449 uint8 id; 10450 uint8 len; 10451 uint8 data[1]; 10452 } BWL_POST_PACKED_STRUCT tlv_t; 10453 #include <packed_section_end.h> 10454 10455 #include <packed_section_start.h> 10456 typedef BWL_PRE_PACKED_STRUCT struct { 10457 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 10458 tlv_t ie_data; /**< IE data */ 10459 } BWL_POST_PACKED_STRUCT ie_info_t; 10460 #include <packed_section_end.h> 10461 10462 #include <packed_section_start.h> 10463 typedef BWL_PRE_PACKED_STRUCT struct { 10464 int32 iecount; /**< number of entries in the ie_list[] array */ 10465 ie_info_t ie_list[1]; /**< variable size list of ie_info_t structs */ 10466 } BWL_POST_PACKED_STRUCT ie_buf_t; 10467 #include <packed_section_end.h> 10468 10469 #include <packed_section_start.h> 10470 typedef BWL_PRE_PACKED_STRUCT struct { 10471 char cmd[VNDR_IE_CMD_LEN]; /**< ie IOVar set command : "add" + NUL */ 10472 ie_buf_t ie_buffer; /**< buffer containing IE list information */ 10473 } BWL_POST_PACKED_STRUCT ie_setbuf_t; 10474 #include <packed_section_end.h> 10475 10476 #include <packed_section_start.h> 10477 typedef BWL_PRE_PACKED_STRUCT struct { 10478 uint32 pktflag; /**< bitmask indicating which packet(s) contain this IE */ 10479 uint8 id; /**< IE type */ 10480 } BWL_POST_PACKED_STRUCT ie_getbuf_t; 10481 #include <packed_section_end.h> 10482 10483 /* structures used to define format of wps ie data from probe requests */ 10484 /* passed up to applications via iovar "prbreq_wpsie" */ 10485 typedef struct sta_prbreq_wps_ie_hdr { 10486 struct ether_addr staAddr; 10487 uint16 ieLen; 10488 } sta_prbreq_wps_ie_hdr_t; 10489 10490 #include <packed_section_start.h> 10491 typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_data { 10492 sta_prbreq_wps_ie_hdr_t hdr; 10493 uint8 ieData[1]; 10494 } BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_data_t; 10495 #include <packed_section_end.h> 10496 10497 #include <packed_section_start.h> 10498 typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_list { 10499 uint32 totLen; 10500 uint8 ieDataList[1]; 10501 } BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_list_t; 10502 #include <packed_section_end.h> 10503 10504 #include <packed_section_start.h> 10505 typedef BWL_PRE_PACKED_STRUCT struct { 10506 uint32 flags; 10507 chanspec_t chanspec; /**< txpwr report for this channel */ 10508 chanspec_t local_chanspec; /**< channel on which we are associated */ 10509 uint8 local_max; /**< local max according to the AP */ 10510 uint8 local_constraint; /**< local constraint according to the AP */ 10511 int8 antgain[2]; /**< Ant gain for each band - from SROM */ 10512 uint8 rf_cores; /**< count of RF Cores being reported */ 10513 uint8 est_Pout[4]; /**< Latest tx power out estimate per RF chain */ 10514 uint8 est_Pout_act[4]; /**< Latest tx power out estimate per RF chain w/o adjustment */ 10515 uint8 est_Pout_cck; /**< Latest CCK tx power out estimate */ 10516 uint8 tx_power_max[4]; /**< Maximum target power among all rates */ 10517 uint32 tx_power_max_rate_ind[4]; /**< Index of the rate with the max target power */ 10518 int8 sar; /**< SAR limit for display by wl executable */ 10519 int8 channel_bandwidth; /**< 20, 40 or 80 MHz bandwidth? */ 10520 uint8 version; /**< Version of the data format wlu <--> driver */ 10521 uint8 display_core; /**< Displayed curpower core */ 10522 int8 target_offsets[4]; /**< Target power offsets for current rate per core */ 10523 uint32 last_tx_ratespec; /**< Ratespec for last transmition */ 10524 uint32 user_target; /**< user limit */ 10525 uint32 ppr_len; /**< length of each ppr serialization buffer */ 10526 int8 SARLIMIT[MAX_STREAMS_SUPPORTED]; 10527 uint8 pprdata[1]; /**< ppr serialization buffer */ 10528 } BWL_POST_PACKED_STRUCT tx_pwr_rpt_t; 10529 10530 typedef BWL_PRE_PACKED_STRUCT struct { 10531 uint32 flags; 10532 chanspec_t chanspec; /**< txpwr report for this channel */ 10533 chanspec_t local_chanspec; /**< channel on which we are associated */ 10534 uint8 local_max; /**< local max according to the AP */ 10535 uint8 local_constraint; /**< local constraint according to the AP */ 10536 int8 pad[2]; /**< unused */ 10537 uint8 rf_cores; /**< count of RF Cores being reported */ 10538 uint8 est_Pout[4]; /**< Latest tx power out estimate per RF chain */ 10539 uint8 est_Pout_act[4]; /**< Latest tx power out estimate per RF chain w/o adjustment */ 10540 uint8 est_Pout_cck; /**< Latest CCK tx power out estimate */ 10541 uint8 tx_power_max[4]; /**< Maximum target power among all rates */ 10542 uint32 tx_power_max_rate_ind[4]; /**< Index of the rate with the max target power */ 10543 int8 sar; /**< SAR limit for display by wl executable */ 10544 int8 channel_bandwidth; /**< 20, 40 or 80 MHz bandwidth? */ 10545 uint8 version; /**< Version of the data format wlu <--> driver */ 10546 uint8 display_core; /**< Displayed curpower core */ 10547 int8 target_offsets[4]; /**< Target power offsets for current rate per core */ 10548 uint32 last_tx_ratespec; /**< Ratespec for last transmition */ 10549 uint32 user_target; /**< user limit */ 10550 uint32 ppr_len; /**< length of each ppr serialization buffer */ 10551 int8 SARLIMIT[MAX_STREAMS_SUPPORTED]; 10552 int8 antgain[3]; /**< Ant gain for each band - from SROM */ 10553 uint8 pprdata[1]; /**< ppr serialization buffer */ 10554 } BWL_POST_PACKED_STRUCT tx_pwr_rpt_v2_t; 10555 #include <packed_section_end.h> 10556 10557 typedef struct tx_pwr_ru_rate_info { 10558 uint16 version; 10559 uint16 ru_alloc; 10560 uint16 mcs; 10561 uint16 nss; 10562 uint16 num_he_ltf_syms; 10563 uint16 ldpc; 10564 uint16 gi; 10565 uint16 txmode; 10566 uint16 dcm; 10567 uint16 tx_chain; 10568 } tx_pwr_ru_rate_info_t; 10569 10570 #define TX_PWR_RU_RATE_INFO_VER 1 10571 10572 /* TLV ID for curpower report, ID < 63 is reserved for ppr module */ 10573 typedef enum tx_pwr_tlv_id { 10574 TX_PWR_RPT_RU_RATE_INFO_ID = 64 10575 } tx_pwr_tlv_id_t; 10576 10577 #include <packed_section_start.h> 10578 typedef BWL_PRE_PACKED_STRUCT struct { 10579 struct ipv4_addr ipv4_addr; 10580 struct ether_addr nexthop; 10581 } BWL_POST_PACKED_STRUCT ibss_route_entry_t; 10582 #include <packed_section_end.h> 10583 10584 #include <packed_section_start.h> 10585 typedef BWL_PRE_PACKED_STRUCT struct { 10586 uint32 num_entry; 10587 ibss_route_entry_t route_entry[1]; 10588 } BWL_POST_PACKED_STRUCT ibss_route_tbl_t; 10589 #include <packed_section_end.h> 10590 10591 #define MAX_IBSS_ROUTE_TBL_ENTRY 64 10592 10593 #define TXPWR_TARGET_VERSION 0 10594 #include <packed_section_start.h> 10595 typedef BWL_PRE_PACKED_STRUCT struct { 10596 int32 version; /**< version number */ 10597 chanspec_t chanspec; /**< txpwr report for this channel */ 10598 int8 txpwr[WL_STA_ANT_MAX]; /**< Max tx target power, in qdb */ 10599 uint8 rf_cores; /**< count of RF Cores being reported */ 10600 } BWL_POST_PACKED_STRUCT txpwr_target_max_t; 10601 #include <packed_section_end.h> 10602 10603 #define BSS_PEER_INFO_PARAM_CUR_VER 0 10604 /** Input structure for IOV_BSS_PEER_INFO */ 10605 #include <packed_section_start.h> 10606 typedef BWL_PRE_PACKED_STRUCT struct { 10607 uint16 version; 10608 struct ether_addr ea; /**< peer MAC address */ 10609 } BWL_POST_PACKED_STRUCT bss_peer_info_param_t; 10610 #include <packed_section_end.h> 10611 10612 #define BSS_PEER_INFO_CUR_VER 0 10613 10614 #include <packed_section_start.h> 10615 typedef BWL_PRE_PACKED_STRUCT struct { 10616 uint16 version; 10617 struct ether_addr ea; 10618 int32 rssi; 10619 uint32 tx_rate; /**< current tx rate */ 10620 uint32 rx_rate; /**< current rx rate */ 10621 wl_rateset_t rateset; /**< rateset in use */ 10622 uint32 age; /**< age in seconds */ 10623 } BWL_POST_PACKED_STRUCT bss_peer_info_t; 10624 #include <packed_section_end.h> 10625 10626 #define BSS_PEER_LIST_INFO_CUR_VER 0 10627 10628 #include <packed_section_start.h> 10629 typedef BWL_PRE_PACKED_STRUCT struct { 10630 uint16 version; 10631 uint16 bss_peer_info_len; /**< length of bss_peer_info_t */ 10632 uint32 count; /**< number of peer info */ 10633 bss_peer_info_t peer_info[1]; /**< peer info */ 10634 } BWL_POST_PACKED_STRUCT bss_peer_list_info_t; 10635 #include <packed_section_end.h> 10636 10637 #define BSS_PEER_LIST_INFO_FIXED_LEN OFFSETOF(bss_peer_list_info_t, peer_info) 10638 10639 #define AIBSS_BCN_FORCE_CONFIG_VER_0 0 10640 10641 /** structure used to configure AIBSS beacon force xmit */ 10642 #include <packed_section_start.h> 10643 typedef BWL_PRE_PACKED_STRUCT struct { 10644 uint16 version; 10645 uint16 len; 10646 uint32 initial_min_bcn_dur; /**< dur in ms to check a bcn in bcn_flood period */ 10647 uint32 min_bcn_dur; /**< dur in ms to check a bcn after bcn_flood period */ 10648 uint32 bcn_flood_dur; /**< Initial bcn xmit period in ms */ 10649 } BWL_POST_PACKED_STRUCT aibss_bcn_force_config_t; 10650 #include <packed_section_end.h> 10651 10652 #define AIBSS_TXFAIL_CONFIG_VER_0 0 10653 #define AIBSS_TXFAIL_CONFIG_VER_1 1 10654 #define AIBSS_TXFAIL_CONFIG_CUR_VER AIBSS_TXFAIL_CONFIG_VER_1 10655 10656 /** structure used to configure aibss tx fail event */ 10657 #include <packed_section_start.h> 10658 typedef BWL_PRE_PACKED_STRUCT struct { 10659 uint16 version; 10660 uint16 len; 10661 uint32 bcn_timeout; /**< dur in seconds to receive 1 bcn */ 10662 uint32 max_tx_retry; /**< no of consecutive no acks to send txfail event */ 10663 uint32 max_atim_failure; /**< no of consecutive atim failure */ 10664 } BWL_POST_PACKED_STRUCT aibss_txfail_config_t; 10665 #include <packed_section_end.h> 10666 10667 #include <packed_section_start.h> 10668 typedef BWL_PRE_PACKED_STRUCT struct wl_aibss_if { 10669 uint16 version; 10670 uint16 len; 10671 uint32 flags; 10672 struct ether_addr addr; 10673 chanspec_t chspec; 10674 } BWL_POST_PACKED_STRUCT wl_aibss_if_t; 10675 #include <packed_section_end.h> 10676 10677 #include <packed_section_start.h> 10678 typedef BWL_PRE_PACKED_STRUCT struct wlc_ipfo_route_entry { 10679 struct ipv4_addr ip_addr; 10680 struct ether_addr nexthop; 10681 } BWL_POST_PACKED_STRUCT wlc_ipfo_route_entry_t; 10682 #include <packed_section_end.h> 10683 10684 #include <packed_section_start.h> 10685 typedef BWL_PRE_PACKED_STRUCT struct wlc_ipfo_route_tbl { 10686 uint32 num_entry; 10687 wlc_ipfo_route_entry_t route_entry[1]; 10688 } BWL_POST_PACKED_STRUCT wlc_ipfo_route_tbl_t; 10689 #include <packed_section_end.h> 10690 10691 /* Version of wlc_btc_stats_t structure. 10692 * Increment whenever a change is made to wlc_btc_stats_t 10693 */ 10694 #define BTCX_STATS_VER_4 4 10695 typedef struct wlc_btc_stats_v4 { 10696 uint16 version; /* version number of struct */ 10697 uint16 valid; /* Size of this struct */ 10698 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 10699 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 10700 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 10701 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 10702 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 10703 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 10704 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 10705 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 10706 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 10707 uint16 bt_succ_pm_protect_cnt; /* successful PM protection */ 10708 uint16 bt_succ_cts_cnt; /* successful CTS2A protection */ 10709 uint16 bt_wlan_tx_preempt_cnt; /* WLAN TX Preemption */ 10710 uint16 bt_wlan_rx_preempt_cnt; /* WLAN RX Preemption */ 10711 uint16 bt_ap_tx_after_pm_cnt; /* AP TX even after PM protection */ 10712 uint16 bt_peraud_cumu_gnt_cnt; /* Grant cnt for periodic audio */ 10713 uint16 bt_peraud_cumu_deny_cnt; /* Deny cnt for periodic audio */ 10714 uint16 bt_a2dp_cumu_gnt_cnt; /* Grant cnt for A2DP */ 10715 uint16 bt_a2dp_cumu_deny_cnt; /* Deny cnt for A2DP */ 10716 uint16 bt_sniff_cumu_gnt_cnt; /* Grant cnt for Sniff */ 10717 uint16 bt_sniff_cumu_deny_cnt; /* Deny cnt for Sniff */ 10718 uint16 bt_dcsn_map; /* Accumulated decision bitmap once Ant grant */ 10719 uint16 bt_dcsn_cnt; /* Accumulated decision bitmap counters once Ant grant */ 10720 uint16 bt_a2dp_hiwat_cnt; /* Ant grant by a2dp high watermark */ 10721 uint16 bt_datadelay_cnt; /* Ant grant by acl/a2dp datadelay */ 10722 uint16 bt_crtpri_cnt; /* Ant grant by critical BT task */ 10723 uint16 bt_pri_cnt; /* Ant grant by high BT task */ 10724 uint16 a2dpbuf1cnt; /* Ant request with a2dp buffercnt 1 */ 10725 uint16 a2dpbuf2cnt; /* Ant request with a2dp buffercnt 2 */ 10726 uint16 a2dpbuf3cnt; /* Ant request with a2dp buffercnt 3 */ 10727 uint16 a2dpbuf4cnt; /* Ant request with a2dp buffercnt 4 */ 10728 uint16 a2dpbuf5cnt; /* Ant request with a2dp buffercnt 5 */ 10729 uint16 a2dpbuf6cnt; /* Ant request with a2dp buffercnt 6 */ 10730 uint16 a2dpbuf7cnt; /* Ant request with a2dp buffercnt 7 */ 10731 uint16 a2dpbuf8cnt; /* Ant request with a2dp buffercnt 8 */ 10732 uint16 antgrant_lt10ms; /* Ant grant duration cnt 0~10ms */ 10733 uint16 antgrant_lt30ms; /* Ant grant duration cnt 10~30ms */ 10734 uint16 antgrant_lt60ms; /* Ant grant duration cnt 30~60ms */ 10735 uint16 antgrant_ge60ms; /* Ant grant duration cnt 60~ms */ 10736 } wlc_btc_stats_v4_t; 10737 10738 #define BTCX_STATS_VER_3 3 10739 10740 typedef struct wlc_btc_stats_v3 { 10741 uint16 version; /* version number of struct */ 10742 uint16 valid; /* Size of this struct */ 10743 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 10744 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 10745 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 10746 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 10747 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 10748 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 10749 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 10750 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 10751 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 10752 uint16 rsvd; /* pad to align struct to 32bit bndry */ 10753 uint16 bt_succ_pm_protect_cnt; /* successful PM protection */ 10754 uint16 bt_succ_cts_cnt; /* successful CTS2A protection */ 10755 uint16 bt_wlan_tx_preempt_cnt; /* WLAN TX Preemption */ 10756 uint16 bt_wlan_rx_preempt_cnt; /* WLAN RX Preemption */ 10757 uint16 bt_ap_tx_after_pm_cnt; /* AP TX even after PM protection */ 10758 uint16 bt_peraud_cumu_gnt_cnt; /* Grant cnt for periodic audio */ 10759 uint16 bt_peraud_cumu_deny_cnt; /* Deny cnt for periodic audio */ 10760 uint16 bt_a2dp_cumu_gnt_cnt; /* Grant cnt for A2DP */ 10761 uint16 bt_a2dp_cumu_deny_cnt; /* Deny cnt for A2DP */ 10762 uint16 bt_sniff_cumu_gnt_cnt; /* Grant cnt for Sniff */ 10763 uint16 bt_sniff_cumu_deny_cnt; /* Deny cnt for Sniff */ 10764 uint8 pad; /* Padding */ 10765 uint8 slice_index; /* Slice to report */ 10766 } wlc_btc_stats_v3_t; 10767 10768 #define BTCX_STATS_VER_2 2 10769 10770 typedef struct wlc_btc_stats_v2 { 10771 uint16 version; /* version number of struct */ 10772 uint16 valid; /* Size of this struct */ 10773 uint32 stats_update_timestamp; /* tStamp when data is updated. */ 10774 uint32 btc_status; /* Hybrid/TDM indicator: Bit2:Hybrid, Bit1:TDM,Bit0:CoexEnabled */ 10775 uint32 bt_req_type_map; /* BT Antenna Req types since last stats sample */ 10776 uint32 bt_req_cnt; /* #BT antenna requests since last stats sampl */ 10777 uint32 bt_gnt_cnt; /* #BT antenna grants since last stats sample */ 10778 uint32 bt_gnt_dur; /* usec BT owns antenna since last stats sample */ 10779 uint16 bt_abort_cnt; /* #Times WL was preempted due to BT since WL up */ 10780 uint16 bt_rxf1ovfl_cnt; /* #Time PSNULL retry count exceeded since WL up */ 10781 uint16 bt_latency_cnt; /* #Time ucode high latency detected since WL up */ 10782 uint16 rsvd; /* pad to align struct to 32bit bndry */ 10783 } wlc_btc_stats_v2_t; 10784 10785 /* Durations for each bt task in millisecond */ 10786 #define WL_BTCX_DURSTATS_VER_1 (1u) 10787 typedef struct wlc_btcx_durstats_v1 { 10788 uint16 version; /* version number of struct */ 10789 uint16 valid; /* validity of this struct */ 10790 uint32 stats_update_timestamp; /* tStamp when data is updated */ 10791 uint16 bt_acl_dur; /* acl duration in ms */ 10792 uint16 bt_sco_dur; /* sco duration in ms */ 10793 uint16 bt_esco_dur; /* esco duration in ms */ 10794 uint16 bt_a2dp_dur; /* a2dp duration in ms */ 10795 uint16 bt_sniff_dur; /* sniff duration in ms */ 10796 uint16 bt_pscan_dur; /* page scan duration in ms */ 10797 uint16 bt_iscan_dur; /* inquiry scan duration in ms */ 10798 uint16 bt_page_dur; /* paging duration in ms */ 10799 uint16 bt_inquiry_dur; /* inquiry duration in ms */ 10800 uint16 bt_mss_dur; /* mss duration in ms */ 10801 uint16 bt_park_dur; /* park duration in ms */ 10802 uint16 bt_rssiscan_dur; /* rssiscan duration in ms */ 10803 uint16 bt_iscan_sco_dur; /* inquiry scan sco duration in ms */ 10804 uint16 bt_pscan_sco_dur; /* page scan sco duration in ms */ 10805 uint16 bt_tpoll_dur; /* tpoll duration in ms */ 10806 uint16 bt_sacq_dur; /* sacq duration in ms */ 10807 uint16 bt_sdata_dur; /* sdata duration in ms */ 10808 uint16 bt_rs_listen_dur; /* rs listen duration in ms */ 10809 uint16 bt_rs_burst_dur; /* rs brust duration in ms */ 10810 uint16 bt_ble_adv_dur; /* ble adv duration in ms */ 10811 uint16 bt_ble_scan_dur; /* ble scan duration in ms */ 10812 uint16 bt_ble_init_dur; /* ble init duration in ms */ 10813 uint16 bt_ble_conn_dur; /* ble connection duration in ms */ 10814 uint16 bt_task_lmp_dur; /* lmp duration in ms */ 10815 uint16 bt_esco_retran_dur; /* esco retransmission duration in ms */ 10816 uint16 bt_task26_dur; /* task26 duration in ms */ 10817 uint16 bt_task27_dur; /* task27 duration in ms */ 10818 uint16 bt_task28_dur; /* task28 duration in ms */ 10819 uint16 bt_task_pred_dur; /* prediction task duration in ms */ 10820 uint16 bt_multihid_dur; /* multihid duration in ms */ 10821 } wlc_btcx_durstats_v1_t; 10822 10823 #define WL_IPFO_ROUTE_TBL_FIXED_LEN 4 10824 #define WL_MAX_IPFO_ROUTE_TBL_ENTRY 64 10825 10826 /* Global ASSERT Logging */ 10827 #define ASSERTLOG_CUR_VER 0x0100 10828 #define MAX_ASSRTSTR_LEN 64 10829 10830 typedef struct assert_record { 10831 uint32 time; 10832 uint8 seq_num; 10833 int8 str[MAX_ASSRTSTR_LEN]; 10834 } assert_record_t; 10835 10836 typedef struct assertlog_results { 10837 uint16 version; 10838 uint16 record_len; 10839 uint32 num; 10840 assert_record_t logs[1]; 10841 } assertlog_results_t; 10842 10843 #define LOGRRC_FIX_LEN 8 10844 #define IOBUF_ALLOWED_NUM_OF_LOGREC(type, len) ((len - LOGRRC_FIX_LEN)/sizeof(type)) 10845 /* BCMWAPI_WAI */ 10846 #define IV_LEN 16 /* same as SMS4_WPI_PN_LEN */ 10847 struct wapi_sta_msg_t 10848 { 10849 uint16 msg_type; 10850 uint16 datalen; 10851 uint8 vap_mac[6]; 10852 uint8 reserve_data1[2]; 10853 uint8 sta_mac[6]; 10854 uint8 reserve_data2[2]; 10855 uint8 gsn[IV_LEN]; 10856 uint8 wie[TLV_BODY_LEN_MAX + TLV_HDR_LEN]; /* 257 */ 10857 uint8 pad[3]; /* padding for alignment */ 10858 }; 10859 /* #endif BCMWAPI_WAI */ 10860 /* chanim acs record */ 10861 typedef struct { 10862 uint8 valid; 10863 uint8 trigger; 10864 chanspec_t selected_chspc; 10865 int8 bgnoise; 10866 uint32 glitch_cnt; 10867 uint8 ccastats; 10868 uint8 chan_idle; 10869 uint32 timestamp; 10870 } chanim_acs_record_t; 10871 10872 typedef struct { 10873 chanim_acs_record_t acs_record[CHANIM_ACS_RECORD]; 10874 uint8 count; 10875 uint32 timestamp; 10876 } wl_acs_record_t; 10877 10878 #define WL_CHANIM_STATS_V2 2 10879 #define CCASTATS_V2_MAX 9 10880 typedef struct chanim_stats_v2 { 10881 uint32 glitchcnt; /**< normalized as per second count */ 10882 uint32 badplcp; /**< normalized as per second count */ 10883 uint8 ccastats[CCASTATS_V2_MAX]; /**< normalized as 0-255 */ 10884 int8 bgnoise; /**< background noise level (in dBm) */ 10885 chanspec_t chanspec; /**< ctrl chanspec of the interface */ 10886 uint32 timestamp; /**< time stamp at which the stats are collected */ 10887 uint32 bphy_glitchcnt; /**< normalized as per second count */ 10888 uint32 bphy_badplcp; /**< normalized as per second count */ 10889 uint8 chan_idle; /**< normalized as 0~255 */ 10890 uint8 PAD[3]; 10891 } chanim_stats_v2_t; 10892 10893 typedef struct chanim_stats { 10894 uint32 glitchcnt; /**< normalized as per second count */ 10895 uint32 badplcp; /**< normalized as per second count */ 10896 uint8 ccastats[CCASTATS_MAX]; /**< normalized as 0-255 */ 10897 int8 bgnoise; /**< background noise level (in dBm) */ 10898 uint8 pad_1[11 - CCASTATS_MAX]; 10899 chanspec_t chanspec; /**< ctrl chanspec of the interface */ 10900 uint8 pad_2[2]; 10901 uint32 timestamp; /**< time stamp at which the stats are collected */ 10902 uint32 bphy_glitchcnt; /**< normalized as per second count */ 10903 uint32 bphy_badplcp; /**< normalized as per second count */ 10904 uint8 chan_idle; /**< normalized as 0~255 */ 10905 uint8 PAD[3]; 10906 } chanim_stats_t; 10907 10908 #define WL_CHANIM_STATS_VERSION 3 10909 typedef struct { 10910 uint32 buflen; 10911 uint32 version; 10912 uint32 count; 10913 chanim_stats_t stats[1]; 10914 } wl_chanim_stats_t; 10915 10916 #define WL_SC_CHANIM_STATS_V1 1u 10917 /* sc chanim interface stats */ 10918 typedef struct sc_chanim_stats_v1 { 10919 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 10920 chanspec_t chanspec; 10921 uint16 PAD; 10922 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 10923 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 10924 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 10925 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 10926 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 10927 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 10928 uint32 sc_rx_btsc_rx_dur; /* BT sc and wlan SC rx is active, in ms */ 10929 } sc_chanim_stats_v1_t; 10930 10931 typedef struct { 10932 uint32 version; 10933 uint32 length; 10934 uint8 flags; /* flags: to print the stats, 10935 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 10936 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 10937 */ 10938 uint8 id; /* Module id, to know which module has sent the stats 10939 * SC_CHANIM_ID_SCAN ==> For SCAN 10940 * SC_CHANIM_ID_STA ==> For STA 10941 */ 10942 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 10943 * This value is number of channels supported in particular locale when 10944 * flags is WL_CHANIM_COUNT_ALL, one when flag is 10945 * WL_CHANIM_COUNT_ONE 10946 */ 10947 uint8 PAD; 10948 sc_chanim_stats_v1_t sc_stats[1]; 10949 } wl_chanim_sc_stats_v1_t; 10950 10951 /* WL_CHANIM_SC_STATS_FIXED_LEN: when we change size of any field above sc_stats, this macro 10952 * needs versioning. At present it uses offset of v1, which is same for all versions so far 10953 */ 10954 #define WL_CHANIM_SC_STATS_FIXED_LEN OFFSETOF(wl_chanim_sc_stats_v1_t, sc_stats) 10955 #define WL_CHANIM_STATS_FIXED_LEN OFFSETOF(wl_chanim_stats_t, stats) 10956 10957 #define WL_SC_CHANIM_STATS_V2 2u 10958 /* sc chanim interface stats */ 10959 typedef struct sc_chanim_stats_v2 { 10960 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 10961 chanspec_t chanspec; 10962 uint16 PAD; 10963 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 10964 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 10965 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 10966 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 10967 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 10968 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 10969 uint32 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 10970 uint32 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 10971 uint32 sc_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 10972 uint32 sc_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 10973 } sc_chanim_stats_v2_t; 10974 10975 typedef struct { 10976 uint32 version; 10977 uint32 length; 10978 uint8 flags; /* flags: to print the stats, 10979 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 10980 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 10981 */ 10982 uint8 id; /* Module id, to know which module has sent the stats 10983 * SC_CHANIM_ID_SCAN ==> For SCAN 10984 * SC_CHANIM_ID_STA ==> For STA 10985 */ 10986 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 10987 * This value is number of channels supported in particular locale when 10988 * flags is WL_CHANIM_COUNT_ALL, one when flag is 10989 * WL_CHANIM_COUNT_ONE 10990 */ 10991 uint8 PAD; 10992 sc_chanim_stats_v2_t sc_stats[1]; 10993 } wl_chanim_sc_stats_v2_t; 10994 10995 #define WL_SC_CHANIM_STATS_V3 3u 10996 /* sc chanim interface stats */ 10997 typedef struct sc_chanim_stats_v3 { 10998 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 10999 chanspec_t chanspec; 11000 uint16 PAD; 11001 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 11002 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11003 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11004 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11005 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11006 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11007 uint32 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11008 uint32 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11009 uint32 sc_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11010 uint32 sc_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11011 uint32 ac_btle_overlap_dur; /* wlaux was awake and btsc le scan overlapped, in ms */ 11012 uint32 ac_btpage_overlap_dur; /* wlaux was awake and btsc page scan overlapped, in ms */ 11013 } sc_chanim_stats_v3_t; 11014 11015 typedef struct { 11016 uint32 version; 11017 uint32 length; 11018 uint8 flags; /* flags: to print the stats, 11019 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 11020 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 11021 */ 11022 uint8 id; /* Module id, to know which module has sent the stats 11023 * SC_CHANIM_ID_SCAN ==> For SCAN 11024 * SC_CHANIM_ID_STA ==> For STA 11025 */ 11026 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 11027 * This value is number of channels supported in particular locale when 11028 * flags is WL_CHANIM_COUNT_ALL, one when flag is 11029 * WL_CHANIM_COUNT_ONE 11030 */ 11031 uint8 PAD; 11032 sc_chanim_stats_v3_t sc_stats[1]; 11033 } wl_chanim_sc_stats_v3_t; 11034 11035 #define WL_SC_CHANIM_STATS_V4 4u 11036 /* sc chanim interface stats */ 11037 typedef struct sc_chanim_stats_v4 { 11038 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 11039 chanspec_t chanspec; 11040 uint16 PAD; 11041 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 11042 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11043 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11044 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11045 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11046 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11047 uint32 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11048 uint32 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11049 uint32 ac_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11050 uint32 ac_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11051 uint32 ac_btle_overlap_dur; /* wlaux was awake and btsc le scan overlapped, in ms */ 11052 uint32 ac_btpage_overlap_dur; /* wlaux was awake and btsc page scan overlapped, in ms */ 11053 uint32 timestamp; /* Time when stats last updated */ 11054 } sc_chanim_stats_v4_t; 11055 11056 typedef struct { 11057 uint32 version; 11058 uint32 length; 11059 uint8 flags; /* flags: to print the stats, 11060 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 11061 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 11062 */ 11063 uint8 id; /* Module id, to know which module has sent the stats 11064 * SC_CHANIM_ID_SCAN ==> For SCAN 11065 * SC_CHANIM_ID_STA ==> For STA 11066 */ 11067 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 11068 * This value is number of channels supported in particular locale when 11069 * flags is WL_CHANIM_COUNT_ALL, one when flag is 11070 * WL_CHANIM_COUNT_ONE 11071 */ 11072 uint8 PAD; 11073 sc_chanim_stats_v4_t sc_stats[1]; 11074 } wl_chanim_sc_stats_v4_t; 11075 11076 #define WL_SC_CHANIM_STATS_V5 5u 11077 /* sc chanim interface stats */ 11078 typedef struct sc_chanim_stats_v5 { 11079 uint32 stats_ms; /* duraion for which stats are collected, in ms */ 11080 chanspec_t chanspec; 11081 uint16 sc_btrx_trans_cnt; /* BT RX transitions */ 11082 uint32 sc_only_rx_dur; /* rx only on sc, in ms */ 11083 uint32 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11084 uint32 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11085 uint32 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11086 uint32 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11087 uint32 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11088 uint32 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11089 uint32 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11090 uint32 ac_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11091 uint32 ac_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11092 uint32 ac_btle_overlap_dur; /* wlaux was awake and btsc le scan overlapped, in ms */ 11093 uint32 ac_btpage_overlap_dur; /* wlaux was awake and btsc page scan overlapped, in ms */ 11094 uint32 timestamp; /* Time when stats last updated */ 11095 } sc_chanim_stats_v5_t; 11096 11097 typedef struct { 11098 uint32 version; 11099 uint32 length; 11100 uint8 flags; /* flags: to print the stats, 11101 * WL_CHANIM_COUNT_ONE ==> Query stats for Home channel, 11102 * WL_CHANIM_COUNT_ALL ==> Query stats for all channels 11103 */ 11104 uint8 id; /* Module id, to know which module has sent the stats 11105 * SC_CHANIM_ID_SCAN ==> For SCAN 11106 * SC_CHANIM_ID_STA ==> For STA 11107 */ 11108 uint8 count; /* o/p: Count of channels for which stats needs to be displayed. 11109 * This value is number of channels supported in particular locale when 11110 * flags is WL_CHANIM_COUNT_ALL, one when flag is 11111 * WL_CHANIM_COUNT_ONE 11112 */ 11113 uint8 PAD; 11114 sc_chanim_stats_v5_t sc_stats[1]; 11115 } wl_chanim_sc_stats_v5_t; 11116 11117 /* sc_chanim periodic ecounters structs for WL_IFSTATS_XTLV_SC_CHANIM_PERIODIC_STATS 11118 * [similar to wl_chanim_sc_stats_vX_t, but constrained in size due to its known periodicity 11119 * of reporting] 11120 */ 11121 #define WLC_SC_CHANIM_PERIODIC_STATS_V2 (2u) 11122 #define WLC_SC_STATS_MAX_BANDS_V1 2u 11123 11124 typedef struct sc_chanim_stats_perband_periodic_v2 { 11125 uint8 pad[3]; 11126 uint8 band_id; /* band for which stats reported; 0:5G,1:2G */ 11127 uint16 sc_only_rx_dur; /* rx only on sc, in ms */ 11128 uint16 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11129 uint16 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11130 uint16 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11131 uint16 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11132 uint16 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11133 uint16 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11134 uint16 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11135 uint16 sc_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11136 uint16 sc_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11137 } sc_chanim_stats_perband_periodic_v2_t; 11138 11139 typedef struct wl_chanim_sc_periodic_stats_v2 { 11140 uint16 ver; 11141 uint16 len; 11142 uint8 pad[3]; 11143 uint8 count; /* number of sc_stats below */ 11144 /* per band accum stats */ 11145 sc_chanim_stats_perband_periodic_v2_t sc_stats[WLC_SC_STATS_MAX_BANDS_V1]; 11146 } wl_chanim_sc_periodic_stats_v2_t; 11147 11148 #define WLC_SC_CHANIM_PERIODIC_STATS_V3 (3u) 11149 11150 typedef struct sc_chanim_stats_perband_periodic_v3 { 11151 uint8 pad[3]; 11152 uint8 band_id; /* band for which stats reported; 0:5G,1:2G */ 11153 uint16 sc_only_rx_dur; /* rx only on sc, in ms */ 11154 uint16 sc_rx_mc_rx_dur; /* Rx on SC when MC is active, in ms */ 11155 uint16 sc_rx_ac_rx_dur; /* Rx on SC when AC is active, in ms */ 11156 uint16 sc_rx_mc_tx_dur; /* sc rx with MC tx, in ms */ 11157 uint16 sc_rx_ac_bt_tx_dur; /* sc rx with AC-BT tx, in ms */ 11158 uint16 sc_rx_bt_rx_dur; /* sc rx when BT Main is active, in ms */ 11159 uint16 sc_btle_overlap_dur; /* wlsc was awake and btsc le scan overlapped, in ms */ 11160 uint16 sc_btpage_overlap_dur; /* wlsc was awake and btsc page scan overlapped, in ms */ 11161 uint16 sc_btle_blnk_dur; /* wlauxtx blanked btsc le scan, in ms */ 11162 uint16 sc_btpage_blnk_dur; /* wlauxtx blanked btsc page scan, in ms */ 11163 uint16 ac_btle_overlap_dur; /* wlaux was awake and btsc le scan overlapped, in ms */ 11164 uint16 ac_btpage_overlap_dur; /* wlaux was awake and btsc page scan overlapped, in ms */ 11165 } sc_chanim_stats_perband_periodic_v3_t; 11166 11167 typedef struct wl_chanim_sc_periodic_stats_v3 { 11168 uint16 ver; 11169 uint16 len; 11170 uint8 pad[3]; 11171 uint8 count; /* number of sc_stats below */ 11172 /* per band accum stats */ 11173 sc_chanim_stats_perband_periodic_v3_t sc_stats[WLC_SC_STATS_MAX_BANDS_V1]; 11174 } wl_chanim_sc_periodic_stats_v3_t; 11175 11176 /** Noise measurement metrics. */ 11177 #define NOISE_MEASURE_KNOISE 0x1 11178 11179 /** scb probe parameter */ 11180 typedef struct { 11181 uint32 scb_timeout; 11182 uint32 scb_activity_time; 11183 uint32 scb_max_probe; 11184 } wl_scb_probe_t; 11185 11186 /* structure/defines for selective mgmt frame (smf) stats support */ 11187 11188 #define SMFS_VERSION 1 11189 /** selected mgmt frame (smf) stats element */ 11190 typedef struct wl_smfs_elem { 11191 uint32 count; 11192 uint16 code; /**< SC or RC code */ 11193 uint8 PAD[2]; 11194 } wl_smfs_elem_t; 11195 11196 typedef struct wl_smf_stats { 11197 uint32 version; 11198 uint16 length; /**< reserved for future usage */ 11199 uint8 type; 11200 uint8 codetype; 11201 uint32 ignored_cnt; 11202 uint32 malformed_cnt; 11203 uint32 count_total; /**< count included the interested group */ 11204 wl_smfs_elem_t elem[1]; 11205 } wl_smf_stats_t; 11206 11207 #define WL_SMFSTATS_FIXED_LEN OFFSETOF(wl_smf_stats_t, elem); 11208 11209 enum { 11210 SMFS_CODETYPE_SC, 11211 SMFS_CODETYPE_RC 11212 }; 11213 11214 typedef enum smfs_type { 11215 SMFS_TYPE_AUTH, 11216 SMFS_TYPE_ASSOC, 11217 SMFS_TYPE_REASSOC, 11218 SMFS_TYPE_DISASSOC_TX, 11219 SMFS_TYPE_DISASSOC_RX, 11220 SMFS_TYPE_DEAUTH_TX, 11221 SMFS_TYPE_DEAUTH_RX, 11222 SMFS_TYPE_MAX 11223 } smfs_type_t; 11224 11225 /* #ifdef PHYMON */ 11226 11227 #define PHYMON_VERSION 1 11228 11229 typedef struct wl_phycal_core_state { 11230 /* Tx IQ/LO calibration coeffs */ 11231 int16 tx_iqlocal_a; 11232 int16 tx_iqlocal_b; 11233 int8 tx_iqlocal_ci; 11234 int8 tx_iqlocal_cq; 11235 int8 tx_iqlocal_di; 11236 int8 tx_iqlocal_dq; 11237 int8 tx_iqlocal_ei; 11238 int8 tx_iqlocal_eq; 11239 int8 tx_iqlocal_fi; 11240 int8 tx_iqlocal_fq; 11241 11242 /** Rx IQ calibration coeffs */ 11243 int16 rx_iqcal_a; 11244 int16 rx_iqcal_b; 11245 11246 uint8 tx_iqlocal_pwridx; /**< Tx Power Index for Tx IQ/LO calibration */ 11247 uint8 PAD[3]; 11248 uint32 papd_epsilon_table[64]; /**< PAPD epsilon table */ 11249 int16 papd_epsilon_offset; /**< PAPD epsilon offset */ 11250 uint8 curr_tx_pwrindex; /**< Tx power index */ 11251 int8 idle_tssi; /**< Idle TSSI */ 11252 int8 est_tx_pwr; /**< Estimated Tx Power (dB) */ 11253 int8 est_rx_pwr; /**< Estimated Rx Power (dB) from RSSI */ 11254 uint16 rx_gaininfo; /**< Rx gain applied on last Rx pkt */ 11255 uint16 init_gaincode; /**< initgain required for ACI */ 11256 int8 estirr_tx; 11257 int8 estirr_rx; 11258 } wl_phycal_core_state_t; 11259 11260 typedef struct wl_phycal_state { 11261 int32 version; 11262 int8 num_phy_cores; /**< number of cores */ 11263 int8 curr_temperature; /**< on-chip temperature sensor reading */ 11264 chanspec_t chspec; /**< channspec for this state */ 11265 uint8 aci_state; /**< ACI state: ON/OFF */ 11266 uint8 PAD; 11267 uint16 crsminpower; /**< crsminpower required for ACI */ 11268 uint16 crsminpowerl; /**< crsminpowerl required for ACI */ 11269 uint16 crsminpoweru; /**< crsminpoweru required for ACI */ 11270 wl_phycal_core_state_t phycal_core[1]; 11271 } wl_phycal_state_t; 11272 11273 #define WL_PHYCAL_STAT_FIXED_LEN OFFSETOF(wl_phycal_state_t, phycal_core) 11274 /* endif PHYMON */ 11275 11276 /** discovery state */ 11277 typedef struct wl_p2p_disc_st { 11278 uint8 state; /**< see state */ 11279 uint8 PAD; 11280 chanspec_t chspec; /**< valid in listen state */ 11281 uint16 dwell; /**< valid in listen state, in ms */ 11282 } wl_p2p_disc_st_t; 11283 11284 /** scan request */ 11285 typedef struct wl_p2p_scan { 11286 uint8 type; /**< 'S' for WLC_SCAN, 'E' for "escan" */ 11287 uint8 reserved[3]; 11288 /* scan or escan parms... */ 11289 } wl_p2p_scan_t; 11290 11291 /** i/f request */ 11292 typedef struct wl_p2p_if { 11293 struct ether_addr addr; 11294 uint8 type; /**< see i/f type */ 11295 uint8 PAD; 11296 chanspec_t chspec; /**< for p2p_ifadd GO */ 11297 } wl_p2p_if_t; 11298 11299 /** i/f query */ 11300 typedef struct wl_p2p_ifq { 11301 uint32 bsscfgidx; 11302 char ifname[BCM_MSG_IFNAME_MAX]; 11303 } wl_p2p_ifq_t; 11304 11305 /** OppPS & CTWindow */ 11306 typedef struct wl_p2p_ops { 11307 uint8 ops; /**< 0: disable 1: enable */ 11308 uint8 ctw; /**< >= 10 */ 11309 } wl_p2p_ops_t; 11310 11311 /** absence and presence request */ 11312 typedef struct wl_p2p_sched_desc { 11313 uint32 start; 11314 uint32 interval; 11315 uint32 duration; 11316 uint32 count; /**< see count */ 11317 } wl_p2p_sched_desc_t; 11318 11319 typedef struct wl_p2p_sched { 11320 uint8 type; /**< see schedule type */ 11321 uint8 action; /**< see schedule action */ 11322 uint8 option; /**< see schedule option */ 11323 uint8 PAD; 11324 wl_p2p_sched_desc_t desc[1]; 11325 } wl_p2p_sched_t; 11326 11327 typedef struct wl_p2p_wfds_hash { 11328 uint32 advt_id; 11329 uint16 nw_cfg_method; 11330 uint8 wfds_hash[6]; 11331 uint8 name_len; 11332 uint8 service_name[MAX_WFDS_SVC_NAME_LEN]; 11333 uint8 PAD[3]; 11334 } wl_p2p_wfds_hash_t; 11335 11336 typedef struct wl_p2p_config_params { 11337 uint16 enable; /**< 0: disable 1: enable */ 11338 uint16 chanspec; /* GO chanspec */ 11339 wlc_ssid_t ssid; /* SSID */ 11340 } wl_p2p_config_params_t; 11341 11342 typedef struct wl_bcmdcs_data { 11343 uint32 reason; 11344 chanspec_t chspec; 11345 uint8 PAD[2]; 11346 } wl_bcmdcs_data_t; 11347 /* ifdef EXT_STA */ 11348 /** 11349 * Format of IHV data passed to OID_DOT11_NIC_SPECIFIC_EXTENSION. 11350 */ 11351 typedef struct _IHV_NIC_SPECIFIC_EXTENSION { 11352 uint8 oui[4]; /**< vendor specific OUI value */ 11353 uint32 event; /**< event code */ 11354 uint8 ihvData[1]; /**< ihv data */ 11355 } IHV_NIC_SPECIFIC_EXTENSION, *PIHV_NIC_SPECIFIC_EXTENSION; 11356 #define IHV_NIC_SPECIFIC_EXTENTION_HEADER OFFSETOF(IHV_NIC_SPECIFIC_EXTENSION, ihvData[0]) 11357 /* EXT_STA */ 11358 /** NAT configuration */ 11359 typedef struct { 11360 uint32 ipaddr; /**< interface ip address */ 11361 uint32 ipaddr_mask; /**< interface ip address mask */ 11362 uint32 ipaddr_gateway; /**< gateway ip address */ 11363 uint8 mac_gateway[6]; /**< gateway mac address */ 11364 uint8 PAD[2]; 11365 uint32 ipaddr_dns; /**< DNS server ip address, valid only for public if */ 11366 uint8 mac_dns[6]; /**< DNS server mac address, valid only for public if */ 11367 uint8 GUID[38]; /**< interface GUID */ 11368 } nat_if_info_t; 11369 11370 typedef struct { 11371 uint32 op; /**< operation code */ 11372 uint8 pub_if; /**< set for public if, clear for private if */ 11373 uint8 PAD[3]; 11374 nat_if_info_t if_info; /**< interface info */ 11375 } nat_cfg_t; 11376 11377 typedef struct { 11378 int32 state; /**< NAT state returned */ 11379 } nat_state_t; 11380 11381 typedef struct flush_txfifo { 11382 uint32 txfifobmp; 11383 uint32 hwtxfifoflush; 11384 struct ether_addr ea; 11385 uint8 PAD[2]; 11386 } flush_txfifo_t; 11387 11388 enum { 11389 SPATIAL_MODE_2G_IDX = 0, 11390 SPATIAL_MODE_5G_LOW_IDX, 11391 SPATIAL_MODE_5G_MID_IDX, 11392 SPATIAL_MODE_5G_HIGH_IDX, 11393 SPATIAL_MODE_5G_UPPER_IDX, 11394 SPATIAL_MODE_MAX_IDX 11395 }; 11396 11397 #define WLC_TXCORE_MAX 4 /**< max number of txcore supports */ 11398 #define WLC_TXCORE_MAX_OLD 2 /**< backward compatibilty for TXCAL */ 11399 #define WLC_SUBBAND_MAX 4 /**< max number of sub-band supports */ 11400 typedef struct { 11401 uint8 band2g[WLC_TXCORE_MAX]; 11402 uint8 band5g[WLC_SUBBAND_MAX][WLC_TXCORE_MAX]; 11403 } sar_limit_t; 11404 11405 #define MAX_NUM_TXCAL_MEAS 128 11406 #define MAX_NUM_PWR_STEP 40 11407 #define TXCAL_IOVAR_VERSION 0x1 11408 11409 #define TXCAL_GAINSWEEP_VER (TXCAL_GAINSWEEP_VERSION_V2) 11410 #define TXCAL_GAINSWEEP_VERSION_V2 2 11411 11412 /* Below macro defines the latest txcal iovar version updated */ 11413 /* This macro also reflects in the 'txcal_ver' iovar */ 11414 #define TXCAL_IOVAR_LATEST TXCAL_GAINSWEEP_VER 11415 11416 /* below are used for bphy/ofdm separated LSC */ 11417 #define TXCAL_PWR_BPHY 0 11418 #define TXCAL_PWR_OFDM 1 11419 11420 typedef struct wl_txcal_meas_percore { 11421 uint16 tssi[MAX_NUM_TXCAL_MEAS]; 11422 int16 pwr[MAX_NUM_TXCAL_MEAS]; 11423 } wl_txcal_meas_percore_t; 11424 11425 typedef struct wl_txcal_meas_ncore { 11426 uint16 version; 11427 uint8 valid_cnt; 11428 uint8 num_core; 11429 wl_txcal_meas_percore_t txcal_percore[1]; 11430 } wl_txcal_meas_ncore_t; 11431 11432 typedef struct wl_txcal_power_tssi_percore { 11433 int16 tempsense; 11434 int16 pwr_start; 11435 uint8 pwr_start_idx; 11436 uint8 num_entries; 11437 uint16 pad; 11438 uint8 tssi[MAX_NUM_PWR_STEP]; 11439 } wl_txcal_power_tssi_percore_t; 11440 11441 typedef struct wl_txcal_power_tssi_ncore { 11442 uint16 version; 11443 uint8 set_core; 11444 uint8 channel; 11445 uint8 num_core; 11446 uint8 gen_tbl; 11447 uint8 ofdm; 11448 uint8 pad; 11449 wl_txcal_power_tssi_percore_t tssi_percore[WLC_TXCORE_MAX]; 11450 } wl_txcal_power_tssi_ncore_t; 11451 11452 typedef struct wl_txcal_meas { 11453 uint16 tssi[WLC_TXCORE_MAX][MAX_NUM_TXCAL_MEAS]; 11454 int16 pwr[WLC_TXCORE_MAX][MAX_NUM_TXCAL_MEAS]; 11455 uint8 valid_cnt; 11456 uint8 PAD; 11457 } wl_txcal_meas_t; 11458 11459 typedef struct wl_txcal_meas_old { 11460 uint16 tssi[WLC_TXCORE_MAX_OLD][MAX_NUM_TXCAL_MEAS]; 11461 int16 pwr[WLC_TXCORE_MAX_OLD][MAX_NUM_TXCAL_MEAS]; 11462 uint8 valid_cnt; 11463 uint8 PAD; 11464 } wl_txcal_meas_old_t; 11465 11466 typedef struct wl_txcal_power_tssi { 11467 uint8 set_core; 11468 uint8 channel; 11469 int16 tempsense[WLC_TXCORE_MAX]; 11470 int16 pwr_start[WLC_TXCORE_MAX]; 11471 uint8 pwr_start_idx[WLC_TXCORE_MAX]; 11472 uint8 num_entries[WLC_TXCORE_MAX]; 11473 uint8 tssi[WLC_TXCORE_MAX][MAX_NUM_PWR_STEP]; 11474 uint8 gen_tbl; 11475 uint8 ofdm; 11476 } wl_txcal_power_tssi_t; 11477 11478 typedef struct wl_txcal_power_tssi_old { 11479 uint8 set_core; 11480 uint8 channel; 11481 int16 tempsense[WLC_TXCORE_MAX_OLD]; 11482 int16 pwr_start[WLC_TXCORE_MAX_OLD]; 11483 uint8 pwr_start_idx[WLC_TXCORE_MAX_OLD]; 11484 uint8 num_entries[WLC_TXCORE_MAX_OLD]; 11485 uint8 tssi[WLC_TXCORE_MAX_OLD][MAX_NUM_PWR_STEP]; 11486 uint8 gen_tbl; 11487 uint8 ofdm; 11488 } wl_txcal_power_tssi_old_t; 11489 11490 typedef struct wl_olpc_pwr { 11491 uint16 version; 11492 uint8 core; 11493 uint8 channel; 11494 int16 tempsense; 11495 uint8 olpc_idx; 11496 uint8 ofdm; 11497 } wl_olpc_pwr_t; 11498 11499 typedef struct wl_rfem_temp_vdet_temp { 11500 uint8 vdet_fem_t1; 11501 int8 rfem_temp_t1; 11502 uint8 vdet_fem_t2; 11503 int8 rfem_temp_t2; 11504 } wl_rfem_temp_vdet_temp_t; 11505 11506 typedef struct wl_rfem_temp_vin_tssi { 11507 uint16 vin_chip_v1; 11508 int16 tssi_chip_v1; 11509 uint16 vin_chip_v2; 11510 int16 tssi_chip_v2; 11511 } wl_rfem_temp_vin_tssi_t; 11512 11513 typedef struct wl_txcal_tempsense { 11514 uint16 version; 11515 uint8 valid_cnt; 11516 uint8 core; 11517 int16 ref_temperature; 11518 int16 meas_temperature; 11519 wl_rfem_temp_vdet_temp_t vdet_temp; 11520 wl_rfem_temp_vin_tssi_t vin_tssi; 11521 } wl_txcal_tempsense_t; 11522 11523 /** IOVAR "mempool" parameter. Used to retrieve a list of memory pool statistics. */ 11524 typedef struct wl_mempool_stats { 11525 int32 num; /**< Number of memory pools */ 11526 bcm_mp_stats_t s[1]; /**< Variable array of memory pool stats. */ 11527 } wl_mempool_stats_t; 11528 11529 typedef struct { 11530 uint32 ipaddr; 11531 uint32 ipaddr_netmask; 11532 uint32 ipaddr_gateway; 11533 } nwoe_ifconfig_t; 11534 11535 /* Both powersel_params and lpc_params are used by IOVAR lpc_params. 11536 * The powersel_params is replaced by lpc_params in later WLC versions. 11537 */ 11538 typedef struct powersel_params { 11539 /* LPC Params exposed via IOVAR */ 11540 int32 tp_ratio_thresh; /**< Throughput ratio threshold */ 11541 uint8 rate_stab_thresh; /**< Thresh for rate stability based on nupd */ 11542 uint8 pwr_stab_thresh; /**< Number of successes before power step down */ 11543 uint8 pwr_sel_exp_time; /**< Time lapse for expiry of database */ 11544 uint8 PAD; 11545 } powersel_params_t; 11546 11547 #define WL_LPC_PARAMS_VER_2 2 11548 #define WL_LPC_PARAMS_CURRENT_VERSION WL_LPC_PARAMS_VER_2 11549 11550 typedef struct lpc_params { 11551 uint16 version; 11552 uint16 length; 11553 /* LPC Params exposed via IOVAR */ 11554 uint8 rate_stab_thresh; /**< Thresh for rate stability based on nupd */ 11555 uint8 pwr_stab_thresh; /**< Number of successes before power step down */ 11556 uint8 lpc_exp_time; /**< Time lapse for expiry of database */ 11557 uint8 pwrup_slow_step; /**< Step size for slow step up */ 11558 uint8 pwrup_fast_step; /**< Step size for fast step up */ 11559 uint8 pwrdn_slow_step; /**< Step size for slow step down */ 11560 } lpc_params_t; 11561 11562 /* tx pkt delay statistics */ 11563 #define SCB_RETRY_SHORT_DEF 7 /**< Default Short retry Limit */ 11564 #define WLPKTDLY_HIST_NBINS 16 /**< number of bins used in the Delay histogram */ 11565 11566 /** structure to store per-AC delay statistics */ 11567 typedef struct scb_delay_stats { 11568 uint32 txmpdu_lost; /**< number of MPDUs lost */ 11569 uint32 txmpdu_cnt[SCB_RETRY_SHORT_DEF]; /**< retry times histogram */ 11570 uint32 delay_sum[SCB_RETRY_SHORT_DEF]; /**< cumulative packet latency */ 11571 uint32 delay_min; /**< minimum packet latency observed */ 11572 uint32 delay_max; /**< maximum packet latency observed */ 11573 uint32 delay_avg; /**< packet latency average */ 11574 uint32 delay_hist[WLPKTDLY_HIST_NBINS]; /**< delay histogram */ 11575 uint32 delay_count; /**< minimum number of time period units before 11576 consequent packet delay events can be generated 11577 */ 11578 uint32 prev_txmpdu_cnt; /**< Previous value of txmpdu_cnt[] during last iteration */ 11579 uint32 prev_delay_sum; /**< Previous value of delay_sum[] during last iteration */ 11580 } scb_delay_stats_t; 11581 11582 /** structure for txdelay event */ 11583 typedef struct txdelay_event { 11584 uint8 status; 11585 uint8 PAD[3]; 11586 int32 rssi; 11587 chanim_stats_t chanim_stats; 11588 scb_delay_stats_t delay_stats[AC_COUNT]; 11589 } txdelay_event_t; 11590 11591 /** structure for txdelay parameters */ 11592 typedef struct txdelay_params { 11593 uint16 ratio; /**< Avg Txdelay Delta */ 11594 uint8 cnt; /**< Sample cnt */ 11595 uint8 period; /**< Sample period */ 11596 uint8 tune; /**< Debug */ 11597 uint8 PAD; 11598 } txdelay_params_t; 11599 #define MAX_TXDELAY_STATS_SCBS 6 11600 #define TXDELAY_STATS_VERSION 1 11601 11602 enum { 11603 TXDELAY_STATS_PARTIAL_RESULT = 0, 11604 TXDELAY_STATS_FULL_RESULT = 1 11605 }; 11606 11607 typedef struct scb_total_delay_stats { 11608 struct ether_addr ea; 11609 uint8 pad[2]; 11610 scb_delay_stats_t dlystats[AC_COUNT]; 11611 } scb_total_delay_stats_t; 11612 11613 typedef struct txdelay_stats { 11614 uint32 version; 11615 uint32 full_result; /* 0:Partial, 1:full */ 11616 uint32 scb_cnt; /* in:requested, out:returned */ 11617 scb_total_delay_stats_t scb_delay_stats[1]; 11618 } txdelay_stats_t; 11619 11620 #define WL_TXDELAY_STATS_FIXED_SIZE \ 11621 (sizeof(txdelay_stats_t)+(MAX_TXDELAY_STATS_SCBS-1)*sizeof(scb_total_delay_stats_t)) 11622 enum { 11623 WNM_SERVICE_DMS = 1, 11624 WNM_SERVICE_FMS = 2, 11625 WNM_SERVICE_TFS = 3 11626 }; 11627 11628 /** Definitions for WNM/NPS TCLAS */ 11629 typedef struct wl_tclas { 11630 uint8 user_priority; 11631 uint8 fc_len; 11632 dot11_tclas_fc_t fc; 11633 } wl_tclas_t; 11634 11635 #define WL_TCLAS_FIXED_SIZE OFFSETOF(wl_tclas_t, fc) 11636 11637 typedef struct wl_tclas_list { 11638 uint32 num; 11639 wl_tclas_t tclas[]; 11640 } wl_tclas_list_t; 11641 11642 /** Definitions for WNM/NPS Traffic Filter Service */ 11643 typedef struct wl_tfs_req { 11644 uint8 tfs_id; 11645 uint8 tfs_actcode; 11646 uint8 tfs_subelem_id; 11647 uint8 send; 11648 } wl_tfs_req_t; 11649 11650 typedef struct wl_tfs_filter { 11651 uint8 status; /**< Status returned by the AP */ 11652 uint8 tclas_proc; /**< TCLAS processing value (0:and, 1:or) */ 11653 uint8 tclas_cnt; /**< count of all wl_tclas_t in tclas array */ 11654 uint8 tclas[1]; /**< VLA of wl_tclas_t */ 11655 } wl_tfs_filter_t; 11656 #define WL_TFS_FILTER_FIXED_SIZE OFFSETOF(wl_tfs_filter_t, tclas) 11657 11658 typedef struct wl_tfs_fset { 11659 struct ether_addr ea; /**< Address of AP/STA involved with this filter set */ 11660 uint8 tfs_id; /**< TFS ID field chosen by STA host */ 11661 uint8 status; /**< Internal status TFS_STATUS_xxx */ 11662 uint8 actcode; /**< Action code DOT11_TFS_ACTCODE_xxx */ 11663 uint8 token; /**< Token used in last request frame */ 11664 uint8 notify; /**< Notify frame sent/received because of this set */ 11665 uint8 filter_cnt; /**< count of all wl_tfs_filter_t in filter array */ 11666 uint8 filter[1]; /**< VLA of wl_tfs_filter_t */ 11667 } wl_tfs_fset_t; 11668 #define WL_TFS_FSET_FIXED_SIZE OFFSETOF(wl_tfs_fset_t, filter) 11669 11670 enum { 11671 TFS_STATUS_DISABLED = 0, /**< TFS filter set disabled by user */ 11672 TFS_STATUS_DISABLING = 1, /**< Empty request just sent to AP */ 11673 TFS_STATUS_VALIDATED = 2, /**< Filter set validated by AP (but maybe not enabled!) */ 11674 TFS_STATUS_VALIDATING = 3, /**< Filter set just sent to AP */ 11675 TFS_STATUS_NOT_ASSOC = 4, /**< STA not associated */ 11676 TFS_STATUS_NOT_SUPPORT = 5, /**< TFS not supported by AP */ 11677 TFS_STATUS_DENIED = 6, /**< Filter set refused by AP (=> all sets are disabled!) */ 11678 }; 11679 11680 typedef struct wl_tfs_status { 11681 uint8 fset_cnt; /**< count of all wl_tfs_fset_t in fset array */ 11682 wl_tfs_fset_t fset[1]; /**< VLA of wl_tfs_fset_t */ 11683 } wl_tfs_status_t; 11684 11685 typedef struct wl_tfs_set { 11686 uint8 send; /**< Immediatly register registered sets on AP side */ 11687 uint8 tfs_id; /**< ID of a specific set (existing or new), or nul for all */ 11688 uint8 actcode; /**< Action code for this filter set */ 11689 uint8 tclas_proc; /**< TCLAS processing operator for this filter set */ 11690 } wl_tfs_set_t; 11691 11692 typedef struct wl_tfs_term { 11693 uint8 del; /**< Delete internal set once confirmation received */ 11694 uint8 tfs_id; /**< ID of a specific set (existing), or nul for all */ 11695 } wl_tfs_term_t; 11696 11697 #define DMS_DEP_PROXY_ARP (1 << 0) 11698 11699 /* Definitions for WNM/NPS Directed Multicast Service */ 11700 enum { 11701 DMS_STATUS_DISABLED = 0, /**< DMS desc disabled by user */ 11702 DMS_STATUS_ACCEPTED = 1, /**< Request accepted by AP */ 11703 DMS_STATUS_NOT_ASSOC = 2, /**< STA not associated */ 11704 DMS_STATUS_NOT_SUPPORT = 3, /**< DMS not supported by AP */ 11705 DMS_STATUS_DENIED = 4, /**< Request denied by AP */ 11706 DMS_STATUS_TERM = 5, /**< Request terminated by AP */ 11707 DMS_STATUS_REMOVING = 6, /**< Remove request just sent */ 11708 DMS_STATUS_ADDING = 7, /**< Add request just sent */ 11709 DMS_STATUS_ERROR = 8, /**< Non compliant AP behvior */ 11710 DMS_STATUS_IN_PROGRESS = 9, /**< Request just sent */ 11711 DMS_STATUS_REQ_MISMATCH = 10, /**< Conditions for sending DMS req not met */ 11712 DMS_STATUS_TIMEOUT = 11 /**< Request Time out */ 11713 }; 11714 11715 typedef struct wl_dms_desc { 11716 uint8 user_id; 11717 uint8 status; 11718 uint8 token; 11719 uint8 dms_id; 11720 uint8 tclas_proc; 11721 uint8 mac_len; /**< length of all ether_addr in data array, 0 if STA */ 11722 uint8 tclas_len; /**< length of all wl_tclas_t in data array */ 11723 uint8 data[1]; /**< VLA of 'ether_addr' and 'wl_tclas_t' (in this order ) */ 11724 } wl_dms_desc_t; 11725 11726 #define WL_DMS_DESC_FIXED_SIZE OFFSETOF(wl_dms_desc_t, data) 11727 11728 typedef struct wl_dms_status { 11729 uint32 cnt; 11730 wl_dms_desc_t desc[1]; 11731 } wl_dms_status_t; 11732 11733 typedef struct wl_dms_set { 11734 uint8 send; 11735 uint8 user_id; 11736 uint8 tclas_proc; 11737 } wl_dms_set_t; 11738 11739 typedef struct wl_dms_term { 11740 uint8 del; 11741 uint8 user_id; 11742 } wl_dms_term_t; 11743 11744 typedef struct wl_service_term { 11745 uint8 service; 11746 union { 11747 wl_dms_term_t dms; 11748 } u; 11749 } wl_service_term_t; 11750 11751 /** Definitions for WNM/NPS BSS Transistion */ 11752 #define WL_BSSTRANS_QUERY_VERSION_1 1 11753 typedef struct wl_bsstrans_query { 11754 uint16 version; /* structure version */ 11755 uint16 pad0; /* padding for 4-byte allignment */ 11756 wlc_ssid_t ssid; /* SSID of NBR elem to be queried for */ 11757 uint8 reason; /* Reason code of the BTQ */ 11758 uint8 pad1[3]; /* padding for 4-byte allignment */ 11759 } wl_bsstrans_query_t; 11760 11761 #define BTM_QUERY_NBR_COUNT_MAX 16 11762 11763 #define WL_BTQ_NBR_LIST_VERSION_1 1 11764 typedef struct wl_btq_nbr_list { 11765 uint16 version; /* structure version */ 11766 uint8 count; /* No. of BTQ NBRs returned */ 11767 uint8 pad; /* padding for 4-byte allignment */ 11768 nbr_rpt_elem_t btq_nbt_elem[]; /* BTQ NBR elem in a BTQ NBR list */ 11769 } wl_btq_nbr_list_t; 11770 11771 typedef struct wl_bsstrans_req { 11772 uint16 tbtt; /**< time of BSS to end of life, in unit of TBTT */ 11773 uint16 dur; /**< time of BSS to keep off, in unit of minute */ 11774 uint8 reqmode; /**< request mode of BSS transition request */ 11775 uint8 unicast; /**< request by unicast or by broadcast */ 11776 } wl_bsstrans_req_t; 11777 11778 enum { 11779 BSSTRANS_RESP_AUTO = 0, /**< Currently equivalent to ENABLE */ 11780 BSSTRANS_RESP_DISABLE = 1, /**< Never answer BSS Trans Req frames */ 11781 BSSTRANS_RESP_ENABLE = 2, /**< Always answer Req frames with preset data */ 11782 BSSTRANS_RESP_WAIT = 3, /**< Send ind, wait and/or send preset data (NOT IMPL) */ 11783 BSSTRANS_RESP_IMMEDIATE = 4 /**< After an ind, set data and send resp (NOT IMPL) */ 11784 }; 11785 11786 typedef struct wl_bsstrans_resp { 11787 uint8 policy; 11788 uint8 status; 11789 uint8 delay; 11790 struct ether_addr target; 11791 } wl_bsstrans_resp_t; 11792 11793 /* "wnm_bsstrans_policy" argument programs behavior after BSSTRANS Req reception. 11794 * BSS-Transition feature is used by multiple programs such as NPS-PF, VE-PF, 11795 * Band-steering, Hotspot 2.0 and customer requirements. Each PF and its test plan 11796 * mandates different behavior on receiving BSS-transition request. To accomodate 11797 * such divergent behaviors these policies have been created. 11798 */ 11799 typedef enum { 11800 WL_BSSTRANS_POLICY_ROAM_ALWAYS = 0, /**< Roam (or disassociate) in all cases */ 11801 WL_BSSTRANS_POLICY_ROAM_IF_MODE = 1, /**< Roam only if requested by Request Mode field */ 11802 WL_BSSTRANS_POLICY_ROAM_IF_PREF = 2, /**< Roam only if Preferred BSS provided */ 11803 WL_BSSTRANS_POLICY_WAIT = 3, /**< Wait for deauth and send Accepted status */ 11804 WL_BSSTRANS_POLICY_PRODUCT = 4, /**< Policy for real product use cases (Olympic) */ 11805 WL_BSSTRANS_POLICY_PRODUCT_WBTEXT = 5, /**< Policy for real product use cases (SS) */ 11806 WL_BSSTRANS_POLICY_MBO = 6, /**< Policy for MBO certification */ 11807 WL_BSSTRANS_POLICY_MAX = 7 11808 } wnm_bsstrans_policy_type_t; 11809 11810 /** Definitions for WNM/NPS TIM Broadcast */ 11811 typedef struct wl_timbc_offset { 11812 int16 offset; /**< offset in us */ 11813 uint16 fix_intv; /**< override interval sent from STA */ 11814 uint16 rate_override; /**< use rate override to send high rate TIM broadcast frame */ 11815 uint8 tsf_present; /**< show timestamp in TIM broadcast frame */ 11816 uint8 PAD; 11817 } wl_timbc_offset_t; 11818 11819 typedef struct wl_timbc_set { 11820 uint8 interval; /**< Interval in DTIM wished or required. */ 11821 uint8 flags; /**< Bitfield described below */ 11822 uint16 rate_min; /**< Minimum rate required for High/Low TIM frames. Optionnal */ 11823 uint16 rate_max; /**< Maximum rate required for High/Low TIM frames. Optionnal */ 11824 } wl_timbc_set_t; 11825 11826 enum { 11827 WL_TIMBC_SET_TSF_REQUIRED = 1, /**< Enable TIMBC only if TSF in TIM frames */ 11828 WL_TIMBC_SET_NO_OVERRIDE = 2, /**< ... if AP does not override interval */ 11829 WL_TIMBC_SET_PROXY_ARP = 4, /**< ... if AP support Proxy ARP */ 11830 WL_TIMBC_SET_DMS_ACCEPTED = 8 /**< ... if all DMS desc have been accepted */ 11831 }; 11832 11833 typedef struct wl_timbc_status { 11834 uint8 status_sta; /**< Status from internal state machine (check below) */ 11835 uint8 status_ap; /**< From AP response frame (check 8.4.2.86 from 802.11) */ 11836 uint8 interval; 11837 uint8 pad; 11838 int32 offset; 11839 uint16 rate_high; 11840 uint16 rate_low; 11841 } wl_timbc_status_t; 11842 11843 enum { 11844 WL_TIMBC_STATUS_DISABLE = 0, /**< TIMBC disabled by user */ 11845 WL_TIMBC_STATUS_REQ_MISMATCH = 1, /**< AP settings do no match user requirements */ 11846 WL_TIMBC_STATUS_NOT_ASSOC = 2, /**< STA not associated */ 11847 WL_TIMBC_STATUS_NOT_SUPPORT = 3, /**< TIMBC not supported by AP */ 11848 WL_TIMBC_STATUS_DENIED = 4, /**< Req to disable TIMBC sent to AP */ 11849 WL_TIMBC_STATUS_ENABLE = 5 /**< TIMBC enabled */ 11850 }; 11851 11852 /** Definitions for PM2 Dynamic Fast Return To Sleep */ 11853 typedef struct wl_pm2_sleep_ret_ext { 11854 uint8 logic; /**< DFRTS logic: see WL_DFRTS_LOGIC_* below */ 11855 uint8 PAD; 11856 uint16 low_ms; /**< Low FRTS timeout */ 11857 uint16 high_ms; /**< High FRTS timeout */ 11858 uint16 rx_pkts_threshold; /**< switching threshold: # rx pkts */ 11859 uint16 tx_pkts_threshold; /**< switching threshold: # tx pkts */ 11860 uint16 txrx_pkts_threshold; /**< switching threshold: # (tx+rx) pkts */ 11861 uint32 rx_bytes_threshold; /**< switching threshold: # rx bytes */ 11862 uint32 tx_bytes_threshold; /**< switching threshold: # tx bytes */ 11863 uint32 txrx_bytes_threshold; /**< switching threshold: # (tx+rx) bytes */ 11864 } wl_pm2_sleep_ret_ext_t; 11865 11866 #define WL_DFRTS_LOGIC_OFF 0 /**< Feature is disabled */ 11867 #define WL_DFRTS_LOGIC_OR 1 /**< OR all non-zero threshold conditions */ 11868 #define WL_DFRTS_LOGIC_AND 2 /**< AND all non-zero threshold conditions */ 11869 11870 /* Values for the passive_on_restricted_mode iovar. When set to non-zero, this iovar 11871 * disables automatic conversions of a channel from passively scanned to 11872 * actively scanned. These values only have an effect for country codes such 11873 * as XZ where some 5 GHz channels are defined to be passively scanned. 11874 */ 11875 #define WL_PASSACTCONV_DISABLE_NONE 0 /**< Enable permanent and temporary conversions */ 11876 #define WL_PASSACTCONV_DISABLE_ALL 1 /**< Disable permanent and temporary conversions */ 11877 #define WL_PASSACTCONV_DISABLE_PERM 2 /**< Disable only permanent conversions */ 11878 11879 /* Definitions for Reliable Multicast */ 11880 #define WL_RMC_CNT_VERSION 1 11881 #define WL_RMC_TR_VERSION 1 11882 #define WL_RMC_MAX_CLIENT 32 11883 #define WL_RMC_FLAG_INBLACKLIST 1 11884 #define WL_RMC_FLAG_ACTIVEACKER 2 11885 #define WL_RMC_FLAG_RELMCAST 4 11886 #define WL_RMC_MAX_TABLE_ENTRY 4 11887 11888 #define WL_RMC_VER 1 11889 #define WL_RMC_INDEX_ACK_ALL 255 11890 #define WL_RMC_NUM_OF_MC_STREAMS 4 11891 #define WL_RMC_MAX_TRS_PER_GROUP 1 11892 #define WL_RMC_MAX_TRS_IN_ACKALL 1 11893 #define WL_RMC_ACK_MCAST0 0x02 11894 #define WL_RMC_ACK_MCAST_ALL 0x01 11895 #define WL_RMC_ACTF_TIME_MIN 300 /**< time in ms */ 11896 #define WL_RMC_ACTF_TIME_MAX 20000 /**< time in ms */ 11897 #define WL_RMC_MAX_NUM_TRS 32 /**< maximun transmitters allowed */ 11898 #define WL_RMC_ARTMO_MIN 350 /**< time in ms */ 11899 #define WL_RMC_ARTMO_MAX 40000 /**< time in ms */ 11900 11901 /* RMC events in action frames */ 11902 enum rmc_opcodes { 11903 RELMCAST_ENTRY_OP_DISABLE = 0, /**< Disable multi-cast group */ 11904 RELMCAST_ENTRY_OP_DELETE = 1, /**< Delete multi-cast group */ 11905 RELMCAST_ENTRY_OP_ENABLE = 2, /**< Enable multi-cast group */ 11906 RELMCAST_ENTRY_OP_ACK_ALL = 3 /**< Enable ACK ALL bit in AMT */ 11907 }; 11908 11909 /* RMC operational modes */ 11910 enum rmc_modes { 11911 WL_RMC_MODE_RECEIVER = 0, /**< Receiver mode by default */ 11912 WL_RMC_MODE_TRANSMITTER = 1, /**< Transmitter mode using wl ackreq */ 11913 WL_RMC_MODE_INITIATOR = 2 /**< Initiator mode using wl ackreq */ 11914 }; 11915 11916 /** Each RMC mcast client info */ 11917 typedef struct wl_relmcast_client { 11918 uint8 flag; /**< status of client such as AR, R, or blacklisted */ 11919 uint8 PAD; 11920 int16 rssi; /**< rssi value of RMC client */ 11921 struct ether_addr addr; /**< mac address of RMC client */ 11922 } wl_relmcast_client_t; 11923 11924 /** RMC Counters */ 11925 typedef struct wl_rmc_cnts { 11926 uint16 version; /**< see definition of WL_CNT_T_VERSION */ 11927 uint16 length; /**< length of entire structure */ 11928 uint16 dupcnt; /**< counter for duplicate rmc MPDU */ 11929 uint16 ackreq_err; /**< counter for wl ackreq error */ 11930 uint16 af_tx_err; /**< error count for action frame transmit */ 11931 uint16 null_tx_err; /**< error count for rmc null frame transmit */ 11932 uint16 af_unicast_tx_err; /**< error count for rmc unicast frame transmit */ 11933 uint16 mc_no_amt_slot; /**< No mcast AMT entry available */ 11934 /* Unused. Keep for rom compatibility */ 11935 uint16 mc_no_glb_slot; /**< No mcast entry available in global table */ 11936 uint16 mc_not_mirrored; /**< mcast group is not mirrored */ 11937 uint16 mc_existing_tr; /**< mcast group is already taken by transmitter */ 11938 uint16 mc_exist_in_amt; /**< mcast group is already programmed in amt */ 11939 /* Unused. Keep for rom compatibility */ 11940 uint16 mc_not_exist_in_gbl; /**< mcast group is not in global table */ 11941 uint16 mc_not_exist_in_amt; /**< mcast group is not in AMT table */ 11942 uint16 mc_utilized; /**< mcast addressed is already taken */ 11943 uint16 mc_taken_other_tr; /**< multi-cast addressed is already taken */ 11944 uint32 rmc_rx_frames_mac; /**< no of mc frames received from mac */ 11945 uint32 rmc_tx_frames_mac; /**< no of mc frames transmitted to mac */ 11946 uint32 mc_null_ar_cnt; /**< no. of times NULL AR is received */ 11947 uint32 mc_ar_role_selected; /**< no. of times took AR role */ 11948 uint32 mc_ar_role_deleted; /**< no. of times AR role cancelled */ 11949 uint32 mc_noacktimer_expired; /**< no. of times noack timer expired */ 11950 uint16 mc_no_wl_clk; /**< no wl clk detected when trying to access amt */ 11951 uint16 mc_tr_cnt_exceeded; /**< No of transmitters in the network exceeded */ 11952 } wl_rmc_cnts_t; 11953 11954 /** RMC Status */ 11955 typedef struct wl_relmcast_st { 11956 uint8 ver; /**< version of RMC */ 11957 uint8 num; /**< number of clients detected by transmitter */ 11958 wl_relmcast_client_t clients[WL_RMC_MAX_CLIENT]; 11959 uint16 err; /**< error status (used in infra) */ 11960 uint16 actf_time; /**< action frame time period */ 11961 } wl_relmcast_status_t; 11962 11963 /** Entry for each STA/node */ 11964 typedef struct wl_rmc_entry { 11965 /* operation on multi-cast entry such add, 11966 * delete, ack-all 11967 */ 11968 int8 flag; 11969 struct ether_addr addr; /**< multi-cast group mac address */ 11970 } wl_rmc_entry_t; 11971 11972 /** RMC table */ 11973 typedef struct wl_rmc_entry_table { 11974 uint8 index; /**< index to a particular mac entry in table */ 11975 uint8 opcode; /**< opcodes or operation on entry */ 11976 wl_rmc_entry_t entry[WL_RMC_MAX_TABLE_ENTRY]; 11977 } wl_rmc_entry_table_t; 11978 11979 typedef struct wl_rmc_trans_elem { 11980 struct ether_addr tr_mac; /**< transmitter mac */ 11981 struct ether_addr ar_mac; /**< ar mac */ 11982 uint16 artmo; /**< AR timeout */ 11983 uint8 amt_idx; /**< amt table entry */ 11984 uint8 PAD; 11985 uint16 flag; /**< entry will be acked, not acked, programmed, full etc */ 11986 } wl_rmc_trans_elem_t; 11987 11988 /** RMC transmitters */ 11989 typedef struct wl_rmc_trans_in_network { 11990 uint8 ver; /**< version of RMC */ 11991 uint8 num_tr; /**< number of transmitters in the network */ 11992 wl_rmc_trans_elem_t trs[WL_RMC_MAX_NUM_TRS]; 11993 } wl_rmc_trans_in_network_t; 11994 11995 /** To update vendor specific ie for RMC */ 11996 typedef struct wl_rmc_vsie { 11997 uint8 oui[DOT11_OUI_LEN]; 11998 uint8 PAD; 11999 uint16 payload; /**< IE Data Payload */ 12000 } wl_rmc_vsie_t; 12001 12002 /* structures & defines for proximity detection */ 12003 enum proxd_method { 12004 PROXD_UNDEFINED_METHOD = 0, 12005 PROXD_RSSI_METHOD = 1, 12006 PROXD_TOF_METHOD = 2 12007 }; 12008 12009 /* structures for proximity detection device role */ 12010 #define WL_PROXD_MODE_DISABLE 0 12011 #define WL_PROXD_MODE_NEUTRAL 1 12012 #define WL_PROXD_MODE_INITIATOR 2 12013 #define WL_PROXD_MODE_TARGET 3 12014 12015 #define WL_PROXD_ACTION_STOP 0 12016 #define WL_PROXD_ACTION_START 1 12017 12018 #define WL_PROXD_FLAG_TARGET_REPORT 0x1 12019 #define WL_PROXD_FLAG_REPORT_FAILURE 0x2 12020 #define WL_PROXD_FLAG_INITIATOR_REPORT 0x4 12021 #define WL_PROXD_FLAG_NOCHANSWT 0x8 12022 #define WL_PROXD_FLAG_NETRUAL 0x10 12023 #define WL_PROXD_FLAG_INITIATOR_RPTRTT 0x20 12024 #define WL_PROXD_FLAG_ONEWAY 0x40 12025 #define WL_PROXD_FLAG_SEQ_EN 0x80 12026 12027 #define WL_PROXD_SETFLAG_K 0x1 12028 #define WL_PROXD_SETFLAG_N 0x2 12029 #define WL_PROXD_SETFLAG_S 0x4 12030 12031 #define WL_PROXD_SETFLAG_K 0x1 12032 #define WL_PROXD_SETFLAG_N 0x2 12033 #define WL_PROXD_SETFLAG_S 0x4 12034 12035 #define WL_PROXD_RANDOM_WAKEUP 0x8000 12036 #define WL_PROXD_MAXREPORT 8 12037 12038 typedef struct wl_proxd_iovar { 12039 uint16 method; /**< Proximity Detection method */ 12040 uint16 mode; /**< Mode (neutral, initiator, target) */ 12041 } wl_proxd_iovar_t; 12042 12043 /* 12044 * structures for proximity detection parameters 12045 * consists of two parts, common and method specific params 12046 * common params should be placed at the beginning 12047 */ 12048 12049 typedef struct wl_proxd_params_common { 12050 chanspec_t chanspec; /**< channel spec */ 12051 int16 tx_power; /**< tx power of Proximity Detection(PD) frames (in dBm) */ 12052 uint16 tx_rate; /**< tx rate of PD rames (in 500kbps units) */ 12053 uint16 timeout; /**< timeout value */ 12054 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 12055 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 12056 } wl_proxd_params_common_t; 12057 12058 typedef struct wl_proxd_params_rssi_method { 12059 chanspec_t chanspec; /**< chanspec for home channel */ 12060 int16 tx_power; /**< tx power of Proximity Detection frames (in dBm) */ 12061 uint16 tx_rate; /**< tx rate of PD frames, 500kbps units */ 12062 uint16 timeout; /**< state machine wait timeout of the frames (in ms) */ 12063 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 12064 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 12065 /* method specific ones go after this line */ 12066 int16 rssi_thresh; /**< RSSI threshold (in dBm) */ 12067 uint16 maxconvergtmo; /**< max wait converge timeout (in ms) */ 12068 } wl_proxd_params_rssi_method_t; 12069 12070 #define Q1_NS 25 /**< Q1 time units */ 12071 12072 /* Number of bandwidth that the TOF can support */ 12073 #define TOF_BW_NUM 3 12074 /* Number of total index including seq tx/rx idx */ 12075 #define TOF_BW_SEQ_NUM 5 12076 12077 enum tof_bw_index { 12078 TOF_BW_20MHZ_INDEX = 0, 12079 TOF_BW_40MHZ_INDEX = 1, 12080 TOF_BW_80MHZ_INDEX = 2, 12081 TOF_BW_SEQTX_INDEX = 3, 12082 TOF_BW_SEQRX_INDEX = 4 12083 }; 12084 12085 /* 12086 * Version 2 of above bw defines 12087 * and enum tof_bw_index, 12088 * with advent of 160 MHz 12089 */ 12090 #define TOF_BW_NUM_V2 4u 12091 #define TOF_BW_SEQ_NUM_V2 6u 12092 12093 enum tof_bw_index_v2 { 12094 TOF_BW_20MHZ_INDEX_V2 = 0, 12095 TOF_BW_40MHZ_INDEX_V2 = 1, 12096 TOF_BW_80MHZ_INDEX_V2 = 2, 12097 TOF_BW_160MHZ_INDEX_V2 = 3, 12098 TOF_BW_SEQTX_INDEX_V2 = 4, 12099 TOF_BW_SEQRX_INDEX_V2 = 5 12100 }; 12101 12102 #define BANDWIDTH_BASE 20 /**< base value of bandwidth */ 12103 #define TOF_BW_20MHZ (BANDWIDTH_BASE << TOF_BW_20MHZ_INDEX_V2) 12104 #define TOF_BW_40MHZ (BANDWIDTH_BASE << TOF_BW_40MHZ_INDEX_V2) 12105 #define TOF_BW_80MHZ (BANDWIDTH_BASE << TOF_BW_80MHZ_INDEX_V2) 12106 #define TOF_BW_160MHZ (BANDWIDTH_BASE << TOF_BW_160MHZ_INDEX_V2) 12107 12108 #define TOF_BW_10MHZ 10 12109 12110 #define NFFT_BASE 64 /**< base size of fft */ 12111 #define TOF_NFFT_20MHZ (NFFT_BASE << TOF_BW_20MHZ_INDEX_V2) 12112 #define TOF_NFFT_40MHZ (NFFT_BASE << TOF_BW_40MHZ_INDEX_V2) 12113 #define TOF_NFFT_80MHZ (NFFT_BASE << TOF_BW_80MHZ_INDEX_V2) 12114 #define TOF_NFFT_160MHZ (NFFT_BASE << TOF_BW_160MHZ_INDEX_V2) 12115 12116 typedef struct wl_proxd_params_tof_method { 12117 chanspec_t chanspec; /**< chanspec for home channel */ 12118 int16 tx_power; /**< tx power of Proximity Detection(PD) frames (in dBm) */ 12119 uint16 tx_rate; /**< tx rate of PD rames (in 500kbps units) */ 12120 uint16 timeout; /**< state machine wait timeout of the frames (in ms) */ 12121 uint16 interval; /**< interval between neighbor finding attempts (in TU) */ 12122 uint16 duration; /**< duration of neighbor finding attempts (in ms) */ 12123 /* specific for the method go after this line */ 12124 struct ether_addr tgt_mac; /**< target mac addr for TOF method */ 12125 uint16 ftm_cnt; /**< number of the frames txed by initiator */ 12126 uint16 retry_cnt; /**< number of retransmit attampts for ftm frames */ 12127 int16 vht_rate; /**< ht or vht rate */ 12128 /* add more params required for other methods can be added here */ 12129 } wl_proxd_params_tof_method_t; 12130 12131 typedef struct wl_proxd_seq_config 12132 { 12133 int16 N_tx_log2; 12134 int16 N_rx_log2; 12135 int16 N_tx_scale; 12136 int16 N_rx_scale; 12137 int16 w_len; 12138 int16 w_offset; 12139 } wl_proxd_seq_config_t; 12140 12141 #define WL_PROXD_TUNE_VERSION_1 1 12142 #define WL_PROXD_TUNE_VERSION_2 2 12143 #include <packed_section_start.h> 12144 /* For legacy ranging target (e.g. 43430, 43342) */ 12145 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_params_tof_tune_v1 { 12146 uint32 version; 12147 uint32 Ki; /**< h/w delay K factor for initiator */ 12148 uint32 Kt; /**< h/w delay K factor for target */ 12149 int16 vhtack; /**< enable/disable VHT ACK */ 12150 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12151 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 12152 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 12153 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 12154 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 12155 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 12156 uint16 rsv_media; /**< reserve media value for TOF */ 12157 uint32 flags; /**< flags */ 12158 uint8 core; /**< core to use for tx */ 12159 uint8 setflags; /* set flags of K, N. S values */ 12160 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12161 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 12162 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 12163 uint8 seq_en; /**< enable ranging sequence */ 12164 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 12165 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 12166 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 12167 wl_proxd_seq_config_t seq_5g20; 12168 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 12169 uint16 bitflip_thresh; /* bitflip threshold */ 12170 uint16 snr_thresh; /* SNR threshold */ 12171 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 12172 uint32 acs_gdv_thresh; 12173 int8 acs_rssi_thresh; 12174 uint8 smooth_win_en; 12175 int32 emu_delay; 12176 } BWL_POST_PACKED_STRUCT wl_proxd_params_tof_tune_v1_t; 12177 #include <packed_section_end.h> 12178 12179 #include <packed_section_start.h> 12180 /* For legacy ranging initiator (including 4364) */ 12181 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_params_tof_tune_v2 { 12182 uint32 version; 12183 uint32 Ki; /**< h/w delay K factor for initiator */ 12184 uint32 Kt; /**< h/w delay K factor for target */ 12185 int16 vhtack; /**< enable/disable VHT ACK */ 12186 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12187 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 12188 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 12189 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 12190 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 12191 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 12192 uint16 rsv_media; /**< reserve media value for TOF */ 12193 uint32 flags; /**< flags */ 12194 uint8 core; /**< core to use for tx */ 12195 uint8 setflags; /* set flags of K, N. S values */ 12196 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12197 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 12198 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 12199 uint8 seq_en; /**< enable ranging sequence */ 12200 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 12201 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 12202 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 12203 wl_proxd_seq_config_t seq_5g20; 12204 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 12205 uint16 bitflip_thresh; /* bitflip threshold */ 12206 uint16 snr_thresh; /* SNR threshold */ 12207 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 12208 uint32 acs_gdv_thresh; 12209 int8 acs_rssi_thresh; 12210 uint8 smooth_win_en; 12211 int32 acs_gdmm_thresh; 12212 int8 acs_delta_rssi_thresh; 12213 int32 emu_delay; 12214 uint8 core_mask; /* core mask selection */ 12215 } BWL_POST_PACKED_STRUCT wl_proxd_params_tof_tune_v2_t; 12216 #include <packed_section_end.h> 12217 12218 #define WL_PROXD_TUNE_VERSION_3 3 12219 /* Future ranging support */ 12220 typedef struct wl_proxd_params_tof_tune_v3 { 12221 uint16 version; 12222 uint16 len; 12223 uint32 Ki; /**< h/w delay K factor for initiator */ 12224 uint32 Kt; /**< h/w delay K factor for target */ 12225 int16 vhtack; /**< enable/disable VHT ACK */ 12226 uint16 PAD; 12227 int16 N_log2[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12228 uint16 PAD; 12229 int16 w_offset[TOF_BW_NUM]; /**< offset of threshold crossing window(per BW) */ 12230 uint16 PAD; 12231 int16 w_len[TOF_BW_NUM]; /**< length of threshold crossing window(per BW) */ 12232 uint16 PAD; 12233 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 12234 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 12235 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 12236 uint8 PAD[3]; 12237 uint16 rsv_media; /**< reserve media value for TOF */ 12238 uint16 PAD; 12239 uint32 flags; /**< flags */ 12240 uint8 core; /**< core to use for tx */ 12241 uint8 setflags; /* set flags of K, N. S values */ 12242 uint16 PAD; 12243 int16 N_scale[TOF_BW_SEQ_NUM]; /**< simple threshold crossing */ 12244 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 12245 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 12246 uint8 seq_en; /**< enable ranging sequence */ 12247 uint8 PAD[3]; 12248 uint8 ftm_cnt[TOF_BW_SEQ_NUM]; /**< number of ftm frames based on bandwidth */ 12249 uint8 PAD[3]; 12250 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 12251 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 12252 wl_proxd_seq_config_t seq_5g20; 12253 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 12254 uint16 bitflip_thresh; /* bitflip threshold */ 12255 uint16 snr_thresh; /* SNR threshold */ 12256 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 12257 uint8 PAD[3]; 12258 uint32 acs_gdv_thresh; 12259 int8 acs_rssi_thresh; 12260 uint8 smooth_win_en; 12261 uint16 PAD; 12262 int32 acs_gdmm_thresh; 12263 int8 acs_delta_rssi_thresh; 12264 uint8 PAD[3]; 12265 int32 emu_delay; 12266 uint8 core_mask; /* core mask selection */ 12267 uint8 PAD[3]; 12268 } wl_proxd_params_tof_tune_v3_t; 12269 12270 /* 12271 * tof tune with 160 MHz support 12272 */ 12273 #define WL_PROXD_TUNE_VERSION_4 4u 12274 typedef struct wl_proxd_params_tof_tune_v4 { 12275 uint16 version; 12276 uint16 len; 12277 uint8 core; /**< core to use for tx */ 12278 uint8 setflags; /* set flags of K, N. S values */ 12279 uint8 totalfrmcnt; /**< total count of transfered measurement frames */ 12280 uint8 sw_adj; /**< enable sw assisted timestamp adjustment */ 12281 uint8 hw_adj; /**< enable hw assisted timestamp adjustment */ 12282 uint8 seq_en; /**< enable ranging sequence */ 12283 uint8 smooth_win_en; 12284 uint8 core_mask; /* core mask selection */ 12285 int8 recv_2g_thresh; /* 2g recieve sensitivity threshold */ 12286 int8 acs_rssi_thresh; 12287 int8 acs_delta_rssi_thresh; 12288 uint8 ftm_cnt[TOF_BW_SEQ_NUM_V2]; /**< no. of ftm frames based on bw */ 12289 uint8 PAD[3]; /* Use this for any int8/16 uint8/16 ext in future */ 12290 uint16 rsv_media; /**< reserve media value for TOF */ 12291 uint16 bitflip_thresh; /* bitflip threshold */ 12292 uint16 snr_thresh; /* SNR threshold */ 12293 int16 vhtack; /**< enable/disable VHT ACK */ 12294 int16 N_log2_2g; /**< simple threshold crossing for 2g channel */ 12295 int16 N_scale_2g; /**< simple threshold crossing for 2g channel */ 12296 int16 N_log2[TOF_BW_SEQ_NUM_V2]; /**< simple threshold crossing */ 12297 int16 w_offset[TOF_BW_NUM_V2]; /**< offset of thresh crossing window(per BW) */ 12298 int16 w_len[TOF_BW_NUM_V2]; /**< length of thresh crossing window(per BW) */ 12299 int16 N_scale[TOF_BW_SEQ_NUM_V2]; /**< simple threshold crossing */ 12300 uint32 Ki; /**< h/w delay K factor for initiator */ 12301 uint32 Kt; /**< h/w delay K factor for target */ 12302 uint32 flags; /**< flags */ 12303 uint32 acs_gdv_thresh; 12304 int32 maxDT; /**< max time difference of T4/T1 or T3/T2 */ 12305 int32 minDT; /**< min time difference of T4/T1 or T3/T2 */ 12306 int32 acs_gdmm_thresh; 12307 int32 emu_delay; 12308 wl_proxd_seq_config_t seq_5g20; /* Thresh crossing params for 2G Sequence */ 12309 wl_proxd_seq_config_t seq_2g20; /* Thresh crossing params for 2G Sequence */ 12310 } wl_proxd_params_tof_tune_v4_t; 12311 12312 typedef struct wl_proxd_params_iovar { 12313 uint16 method; /**< Proximity Detection method */ 12314 uint8 PAD[2]; 12315 union { 12316 /* common params for pdsvc */ 12317 wl_proxd_params_common_t cmn_params; /**< common parameters */ 12318 /* method specific */ 12319 wl_proxd_params_rssi_method_t rssi_params; /**< RSSI method parameters */ 12320 wl_proxd_params_tof_method_t tof_params; /**< TOF method parameters */ 12321 /* tune parameters */ 12322 wl_proxd_params_tof_tune_v3_t tof_tune; /**< TOF tune parameters */ 12323 } u; /**< Method specific optional parameters */ 12324 } wl_proxd_params_iovar_t; 12325 12326 /* 12327 * proxd param iov with 160 MHz support 12328 */ 12329 #define WL_PROXD_IOVAR_VERSION_2 2u 12330 typedef struct wl_proxd_params_iovar_v2 { 12331 uint16 version; 12332 uint16 len; 12333 uint16 method; /**< Proximity Detection method */ 12334 uint16 PAD; 12335 union { 12336 /* common params for pdsvc */ 12337 wl_proxd_params_common_t cmn_params; /**< common parameters */ 12338 /* method specific */ 12339 wl_proxd_params_rssi_method_t rssi_params; /**< RSSI method parameters */ 12340 wl_proxd_params_tof_method_t tof_params; /**< TOF method parameters */ 12341 /* tune parameters */ 12342 wl_proxd_params_tof_tune_v4_t tof_tune; /**< TOF tune parameters */ 12343 } u; /**< Method specific optional parameters */ 12344 uint8 tlv_params[]; /* xtlvs for variable ext params */ 12345 } wl_proxd_params_iovar_v2_t; 12346 12347 #define PROXD_COLLECT_GET_STATUS 0 12348 #define PROXD_COLLECT_SET_STATUS 1 12349 #define PROXD_COLLECT_QUERY_HEADER 2 12350 #define PROXD_COLLECT_QUERY_DATA 3 12351 #define PROXD_COLLECT_QUERY_DEBUG 4 12352 #define PROXD_COLLECT_REMOTE_REQUEST 5 12353 #define PROXD_COLLECT_DONE 6 12354 12355 typedef enum { 12356 WL_PROXD_COLLECT_METHOD_TYPE_DISABLE = 0x0, 12357 WL_PROXD_COLLECT_METHOD_TYPE_IOVAR = 0x1, 12358 WL_PROXD_COLLECT_METHOD_TYPE_EVENT = 0x2, 12359 WL_PROXD_COLLECT_METHOD_TYPE_EVENT_LOG = 0x4 12360 } wl_proxd_collect_method_type_t; 12361 12362 typedef uint16 wl_proxd_collect_method_t; /* query status: method to send proxd collect */ 12363 12364 #include <packed_section_start.h> 12365 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_query { 12366 uint32 method; /**< method */ 12367 uint8 request; /**< Query request. */ 12368 uint8 status; /**< bitmask 0 -- disable, 0x1 -- enable collection, */ 12369 /* 0x2 -- Use generic event, 0x4 -- use event log */ 12370 uint16 index; /**< The current frame index [0 to total_frames - 1]. */ 12371 uint16 mode; /**< Initiator or Target */ 12372 uint8 busy; /**< tof sm is busy */ 12373 uint8 remote; /**< Remote collect data */ 12374 } BWL_POST_PACKED_STRUCT wl_proxd_collect_query_t; 12375 #include <packed_section_end.h> 12376 12377 #include <packed_section_start.h> 12378 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_header { 12379 uint16 total_frames; /**< The total frames for this collect. */ 12380 uint16 nfft; /**< nfft value */ 12381 uint16 bandwidth; /**< bandwidth */ 12382 uint16 channel; /**< channel number */ 12383 uint32 chanspec; /**< channel spec */ 12384 uint32 fpfactor; /**< avb timer value factor */ 12385 uint16 fpfactor_shift; /**< avb timer value shift bits */ 12386 int32 distance; /**< distance calculated by fw */ 12387 uint32 meanrtt; /**< mean of RTTs */ 12388 uint32 modertt; /**< mode of RTTs */ 12389 uint32 medianrtt; /**< median of RTTs */ 12390 uint32 sdrtt; /**< standard deviation of RTTs */ 12391 uint32 clkdivisor; /**< clock divisor */ 12392 uint16 chipnum; /**< chip type */ 12393 uint8 chiprev; /**< chip revision */ 12394 uint8 phyver; /**< phy version */ 12395 struct ether_addr localMacAddr; /**< local mac address */ 12396 struct ether_addr remoteMacAddr; /**< remote mac address */ 12397 wl_proxd_params_tof_tune_v3_t params; 12398 } BWL_POST_PACKED_STRUCT wl_proxd_collect_header_t; 12399 #include <packed_section_end.h> 12400 12401 /* 12402 * proxd collect header with 160 MHz support 12403 */ 12404 #define WL_PROXD_COLLECT_HEADER_VERSION_2 2u 12405 typedef struct wl_proxd_collect_header_v2 { 12406 uint16 version; 12407 uint16 len; 12408 uint8 chiprev; /**< chip revision */ 12409 uint8 phyver; /**< phy version */ 12410 uint8 PAD[2]; /* Use this for any int8/16 uint8/16 ext in future */ 12411 uint16 total_frames; /**< The total frames for this collect. */ 12412 uint16 nfft; /**< nfft value */ 12413 uint16 bandwidth; /**< bandwidth */ 12414 uint16 channel; /**< channel number */ 12415 uint16 fpfactor_shift; /**< avb timer value shift bits */ 12416 uint16 chipnum; /**< chip type */ 12417 uint32 chanspec; /**< channel spec */ 12418 uint32 fpfactor; /**< avb timer value factor */ 12419 uint32 meanrtt; /**< mean of RTTs */ 12420 uint32 modertt; /**< mode of RTTs */ 12421 uint32 medianrtt; /**< median of RTTs */ 12422 uint32 sdrtt; /**< standard deviation of RTTs */ 12423 uint32 clkdivisor; /**< clock divisor */ 12424 int32 distance; /**< distance calculated by fw */ 12425 struct ether_addr localMacAddr; /**< local mac address */ 12426 uint16 PAD; /* Use this for any int8/16 uint8/16 ext in future */ 12427 struct ether_addr remoteMacAddr; /**< remote mac address */ 12428 uint16 PAD; /* Use this for any int8/16 uint8/16 ext in future */ 12429 wl_proxd_params_tof_tune_v4_t params; /* TOF tune params */ 12430 uint8 tlv_params[]; /* xtlvs for variable ext params */ 12431 } wl_proxd_collect_header_v2_t; 12432 12433 /* ifdef WL_NAN */ 12434 /* ********************** NAN wl interface struct types and defs ******************** */ 12435 /* 12436 * Uses new common IOVAR batch processing mechanism 12437 */ 12438 12439 /* 12440 * NAN config control 12441 * Bits 0 - 23 can be set by host 12442 * Bits 24 - 31 - Internal use for firmware, host cannot set it 12443 */ 12444 12445 /* 12446 * Bit 0 : If set to 1, means event uses nan bsscfg, 12447 * otherwise uses infra bsscfg. Default is using infra bsscfg 12448 */ 12449 #define WL_NAN_CTRL_ROUTE_EVENT_VIA_NAN_BSSCFG 0x000001 12450 /* If set, discovery beacons are transmitted on 2G band */ 12451 #define WL_NAN_CTRL_DISC_BEACON_TX_2G 0x000002 12452 /* If set, sync beacons are transmitted on 2G band */ 12453 #define WL_NAN_CTRL_SYNC_BEACON_TX_2G 0x000004 12454 /* If set, discovery beacons are transmitted on 5G band */ 12455 #define WL_NAN_CTRL_DISC_BEACON_TX_5G 0x000008 12456 /* If set, sync beacons are transmitted on 5G band */ 12457 #define WL_NAN_CTRL_SYNC_BEACON_TX_5G 0x000010 12458 /* If set, auto datapath responses will be sent by FW */ 12459 #define WL_NAN_CTRL_AUTO_DPRESP 0x000020 12460 /* If set, auto datapath confirms will be sent by FW */ 12461 #define WL_NAN_CTRL_AUTO_DPCONF 0x000040 12462 /* If set, auto schedule responses will be sent by FW */ 12463 #define WL_NAN_CTRL_AUTO_SCHEDRESP 0x000080 12464 /* If set, auto schedule confirms will be sent by FW */ 12465 #define WL_NAN_CTRL_AUTO_SCHEDCONF 0x000100 12466 /* If set, proprietary rates are supported by FW */ 12467 #define WL_NAN_CTRL_PROP_RATE 0x000200 12468 /* If set, service awake_dw overrides global dev awake_dw */ 12469 #define WL_NAN_CTRL_SVC_OVERRIDE_DEV_AWAKE_DW 0x000400 12470 /* If set, merge scan will be disabled */ 12471 #define WL_NAN_CTRL_SCAN_DISABLE 0x000800 12472 /* If set, power save will be disabled */ 12473 #define WL_NAN_CTRL_POWER_SAVE_DISABLE 0x001000 12474 /* If set, device will merge to configured CID only */ 12475 #define WL_NAN_CTRL_MERGE_CONF_CID_ONLY 0x002000 12476 /* If set, 5g core will be brought down in single band NAN */ 12477 #define WL_NAN_CTRL_5G_SLICE_POWER_OPT 0x004000 12478 #define WL_NAN_CTRL_DUMP_HEAP 0x008000 12479 /* If set, host generates and assign ndp id for ndp sessions */ 12480 #define WL_NAN_CTRL_HOST_GEN_NDPID 0x010000 12481 /* If set, nan ndp inactivity watchdog will be activated */ 12482 #define WL_NAN_CTRL_DELETE_INACTIVE_PEERS 0x020000 12483 /* If set, nan assoc coex will be activated */ 12484 #define WL_NAN_CTRL_INFRA_ASSOC_COEX 0x040000 12485 /* If set, dam will accept all NDP/RNG request from the peer including counter */ 12486 #define WL_NAN_CTRL_DAM_ACCEPT_ALL 0x080000 12487 /* If set, nan mac ignores role for tx discovery beacon for periodic config */ 12488 #define WL_NAN_CTRL_FASTDISC_IGNO_ROLE 0x100000 12489 /* If set, include NA in NAN beacons (disc beacons for now) */ 12490 #define WL_NAN_CTRL_INCL_NA_IN_BCNS 0x200000 12491 /* If set, host assist will be enabled */ 12492 #define WL_NAN_CTRL_HOST_ASSIST 0x400000 12493 /* If set, host configures NDI associated with the service */ 12494 #define WL_NAN_CTRL_HOST_CFG_SVC_NDI 0x800000 12495 12496 /* Value when all host-configurable bits set */ 12497 #define WL_NAN_CTRL_MAX_MASK 0xFFFFFF 12498 #define WL_NAN_CFG_CTRL_FW_BITS 8 12499 12500 /* Last 8-bits are firmware controlled bits. 12501 * Bit 31: 12502 * If set - indicates that NAN initialization is successful 12503 * Bit 30: 12504 * If set - indicates that NAN MAC cfg creation is successful 12505 * 12506 * NOTE: These are only ready-only bits for host. 12507 * All sets to these bits from host are masked off 12508 */ 12509 #define WL_NAN_PROTO_INIT_DONE (1u << 31u) 12510 #define WL_NAN_CFG_CREATE_DONE (1u << 30u) 12511 12512 #define WL_NAN_GET_PROTO_INIT_STATUS(x) \ 12513 (((x) & WL_NAN_PROTO_INIT_DONE) ? TRUE:FALSE) 12514 #define WL_NAN_CLEAR_PROTO_INIT_STATUS(x) \ 12515 ((x) &= ~WL_NAN_PROTO_INIT_DONE) 12516 #define WL_NAN_SET_PROTO_INIT_STATUS(x) \ 12517 ((x) |= (WL_NAN_PROTO_INIT_DONE)) 12518 12519 #define WL_NAN_GET_CFG_CREATE_STATUS(x) \ 12520 (((x) & WL_NAN_CFG_CREATE_DONE) ? TRUE:FALSE) 12521 #define WL_NAN_CLEAR_CFG_CREATE_STATUS(x) \ 12522 ((x) &= ~WL_NAN_CFG_CREATE_DONE) 12523 #define WL_NAN_SET_CFG_CREATE_STATUS(x) \ 12524 ((x) |= (WL_NAN_CFG_CREATE_DONE)) 12525 12526 #define WL_NAN_IOCTL_VERSION 0x2 12527 /* < some sufficient ioc buff size for our module */ 12528 #define WL_NAN_IOC_BUFSZ 256 12529 /* some sufficient ioc buff size for dump commands */ 12530 #define WL_NAN_IOC_BUFSZ_EXT 1024 12531 #define WL_NAN_MAX_SIDS_IN_BEACONS 127 /* Max allowed SIDs */ 12532 #define WL_NAN_MASTER_RANK_LEN 8 12533 #define WL_NAN_RANGE_LIMITED 0x0040 /* Publish/Subscribe flags */ 12534 12535 /** The service hash (service id) is exactly this many bytes. */ 12536 #define WL_NAN_SVC_HASH_LEN 6 12537 #define WL_NAN_HASHES_PER_BLOOM 4 /** Number of hash functions per bloom filter */ 12538 12539 /* no. of max last disc results */ 12540 #define WL_NAN_MAX_DISC_RESULTS 3 12541 12542 /* Max len of Rx and Tx filters */ 12543 #define WL_NAN_MAX_SVC_MATCH_FILTER_LEN 255 12544 12545 /* Max service name len */ 12546 #define WL_NAN_MAX_SVC_NAME_LEN 32 12547 12548 /* Type of Data path connection */ 12549 #define WL_NAN_DP_TYPE_UNICAST 0 12550 #define WL_NAN_DP_TYPE_MULTICAST 1 12551 12552 /* MAX security params length PMK field */ 12553 #define WL_NAN_NCS_SK_PMK_LEN 32 12554 12555 /* Post disc attr ID type */ 12556 typedef uint8 wl_nan_post_disc_attr_id_t; 12557 12558 /* 12559 * Component IDs 12560 */ 12561 typedef enum { 12562 WL_NAN_COMPID_CONFIG = 1, 12563 WL_NAN_COMPID_ELECTION = 2, 12564 WL_NAN_COMPID_SD = 3, 12565 WL_NAN_COMPID_TIMESYNC = 4, 12566 WL_NAN_COMPID_DATA_PATH = 5, 12567 WL_NAN_COMPID_DEBUG = 15 /* Keep this at the end */ 12568 } wl_nan_comp_id_t; 12569 12570 #define WL_NAN_COMP_SHIFT 8 12571 #define WL_NAN_COMP_MASK(_c) (0x0F & ((uint8)(_c))) 12572 #define WL_NAN_COMP_ID(_c) (WL_NAN_COMP_MASK(_c) << WL_NAN_COMP_SHIFT) 12573 12574 /* NAN Events */ 12575 12576 /** Instance ID type (unique identifier) */ 12577 typedef uint8 wl_nan_instance_id_t; 12578 12579 /* Publish sent for a subscribe */ 12580 /* WL_NAN_EVENT_REPLIED */ 12581 12582 typedef struct wl_nan_ev_replied { 12583 struct ether_addr sub_mac; /* Subscriber MAC */ 12584 wl_nan_instance_id_t pub_id; /* Publisher Instance ID */ 12585 uint8 sub_id; /* Subscriber ID */ 12586 int8 sub_rssi; /* Subscriber RSSI */ 12587 uint8 pad[3]; 12588 } wl_nan_ev_replied_t; 12589 12590 typedef struct wl_nan_event_replied { 12591 struct ether_addr sub_mac; /* Subscriber MAC */ 12592 wl_nan_instance_id_t pub_id; /* Publisher Instance ID */ 12593 uint8 sub_id; /* Subscriber ID */ 12594 int8 sub_rssi; /* Subscriber RSSI */ 12595 uint8 attr_num; 12596 uint16 attr_list_len; /* sizeof attributes attached to payload */ 12597 uint8 attr_list[0]; /* attributes payload */ 12598 } wl_nan_event_replied_t; 12599 12600 /* NAN Tx status of transmitted frames */ 12601 #define WL_NAN_TXS_FAILURE 0 12602 #define WL_NAN_TXS_SUCCESS 1 12603 12604 /* NAN frame types */ 12605 enum wl_nan_frame_type { 12606 /* discovery frame types */ 12607 WL_NAN_FRM_TYPE_PUBLISH = 1, 12608 WL_NAN_FRM_TYPE_SUBSCRIBE = 2, 12609 WL_NAN_FRM_TYPE_FOLLOWUP = 3, 12610 12611 /* datapath frame types */ 12612 WL_NAN_FRM_TYPE_DP_REQ = 4, 12613 WL_NAN_FRM_TYPE_DP_RESP = 5, 12614 WL_NAN_FRM_TYPE_DP_CONF = 6, 12615 WL_NAN_FRM_TYPE_DP_INSTALL = 7, 12616 WL_NAN_FRM_TYPE_DP_END = 8, 12617 12618 /* schedule frame types */ 12619 WL_NAN_FRM_TYPE_SCHED_REQ = 9, 12620 WL_NAN_FRM_TYPE_SCHED_RESP = 10, 12621 WL_NAN_FRM_TYPE_SCHED_CONF = 11, 12622 WL_NAN_FRM_TYPE_SCHED_UPD = 12, 12623 12624 /* ranging frame types */ 12625 WL_NAN_FRM_TYPE_RNG_REQ = 13, 12626 WL_NAN_FRM_TYPE_RNG_RESP = 14, 12627 WL_NAN_FRM_TYPE_RNG_TERM = 15, 12628 WL_NAN_FRM_TYPE_RNG_REPORT = 16, 12629 12630 WL_NAN_FRM_TYPE_UNSOLICIT_SDF = 17, 12631 WL_NAN_FRM_TYPE_INVALID 12632 }; 12633 typedef uint8 wl_nan_frame_type_t; 12634 12635 /* NAN Reason codes for tx status */ 12636 enum wl_nan_txs_reason_codes { 12637 WL_NAN_REASON_SUCCESS = 1, /* NAN status success */ 12638 WL_NAN_REASON_TIME_OUT = 2, /* timeout reached */ 12639 WL_NAN_REASON_DROPPED = 3, /* pkt dropped due to internal failure */ 12640 WL_NAN_REASON_MAX_RETRIES_DONE = 4 /* Max retries exceeded */ 12641 }; 12642 12643 /* For NAN TX status */ 12644 typedef struct wl_nan_event_txs { 12645 uint8 status; /* For TX status, success or failure */ 12646 uint8 reason_code; /* to identify reason when status is failure */ 12647 uint16 host_seq; /* seq num to keep track of pkts sent by host */ 12648 uint8 type; /* wl_nan_frame_type_t */ 12649 uint8 pad; 12650 uint16 opt_tlvs_len; 12651 uint8 opt_tlvs[]; 12652 } wl_nan_event_txs_t; 12653 12654 /* SD transmit pkt's event status is sent as optional tlv in wl_nan_event_txs_t */ 12655 typedef struct wl_nan_event_sd_txs { 12656 uint8 inst_id; /* Publish or subscribe instance id */ 12657 uint8 req_id; /* Requestor instance id */ 12658 } wl_nan_event_sd_txs_t; 12659 12660 /* nanho fsm tlv WL_NAN_XTLV_NANHO_OOB_TXS(0x0b0a) */ 12661 typedef struct wl_nan_event_nanho_txs { 12662 uint32 fsm_id; /* nho fsm id */ 12663 uint16 seq_id; /* nho seq id */ 12664 uint16 pad; 12665 } wl_nan_event_nanho_txs_t; 12666 12667 /* Subscribe or Publish instance Terminated */ 12668 12669 /* WL_NAN_EVENT_TERMINATED */ 12670 12671 #define NAN_SD_TERM_REASON_TIMEOUT 1 12672 #define NAN_SD_TERM_REASON_HOSTREQ 2 12673 #define NAN_SD_TERM_REASON_FWTERM 3 12674 #define NAN_SD_TERM_REASON_FAIL 4 12675 12676 typedef struct wl_nan_ev_terminated { 12677 uint8 instance_id; /* publish / subscribe instance id */ 12678 uint8 reason; /* 1=timeout, 2=Host/IOVAR, 3=FW Terminated 4=Failure */ 12679 uint8 svctype; /* 0 - Publish, 0x1 - Subscribe */ 12680 uint8 pad; /* Align */ 12681 uint32 tx_cnt; /* Number of SDFs sent */ 12682 } wl_nan_ev_terminated_t; 12683 12684 /* Follow up received against a pub / subscr */ 12685 /* WL_NAN_EVENT_RECEIVE */ 12686 12687 typedef struct wl_nan_ev_receive { 12688 struct ether_addr remote_addr; /* Peer NAN device MAC */ 12689 uint8 local_id; /* Local subscribe or publish ID */ 12690 uint8 remote_id; /* Remote subscribe or publish ID */ 12691 int8 fup_rssi; 12692 uint8 attr_num; 12693 uint16 attr_list_len; /* sizeof attributes attached to payload */ 12694 uint8 attr_list[0]; /* attributes payload */ 12695 } wl_nan_ev_receive_t; 12696 12697 /* WL_NAN_EVENT_DISC_CACHE_TIMEOUT */ 12698 #define WL_NAN_DISC_CACHE_EXPIRY_ENTRIES_MAX 8 12699 12700 typedef struct wl_nan_disc_expired_cache_entry { 12701 uint8 l_sub_id; /* local sub instance_id */ 12702 uint8 r_pub_id; /* remote-matched pub instance_id */ 12703 struct ether_addr r_nmi_addr; /* remote-matched pub nmi addr */ 12704 } wl_nan_disc_expired_cache_entry_t; 12705 12706 typedef struct wl_nan_ev_disc_cache_timeout { 12707 uint16 count; /* no. of expired cache entries */ 12708 uint16 pad; 12709 wl_nan_disc_expired_cache_entry_t cache_exp_list[]; 12710 } wl_nan_ev_disc_cache_timeout_t; 12711 12712 /* For NAN event mask extention */ 12713 #define WL_NAN_EVMASK_EXTN_VER 1 12714 #define WL_NAN_EVMASK_EXTN_LEN 16 /* 16*8 = 128 masks supported */ 12715 12716 typedef struct wl_nan_event_extn { 12717 uint8 ver; 12718 uint8 pad; 12719 uint16 len; 12720 uint8 evmask[]; 12721 } wl_nan_evmask_extn_t; 12722 12723 /* WL_NAN_XTLV_DATA_DP_TXS */ 12724 12725 typedef struct wl_nan_data_dp_txs { 12726 uint8 ndp_id; 12727 uint8 pad; 12728 struct ether_addr indi; /* initiator ndi */ 12729 } wl_nan_data_dp_txs_t; 12730 12731 /* WL_NAN_XTLV_RNG_TXS */ 12732 12733 typedef struct wl_nan_range_txs { 12734 uint8 range_id; 12735 uint8 pad[3]; 12736 } wl_nan_range_txs_t; 12737 12738 #define NAN_MAX_BANDS 2 12739 12740 enum wl_nan_oob_af_txs_reason_code { 12741 WL_NAN_OOB_AF_TX_REASON_BMAP = 0x01, /* Bitmap schedule */ 12742 WL_NAN_OOB_AF_TX_REASON_TIMEOUT = 0x02, /* OOB AF session timeout */ 12743 WL_NAN_OOB_AF_TX_REASON_DISABLED= 0x03, /* OOB disabled while it was scheduled */ 12744 }; 12745 12746 /* WL_NAN_EVENT_OOB_AF_TXS event sent to host after NAN OOB AF transmit attempted */ 12747 typedef struct wl_nan_event_oob_af_txs { 12748 uint8 result; /* For TX status, success or failure */ 12749 uint8 reason; /* wl_nan_oob_af_txs_reason_code */ 12750 uint16 token; /* Token from the host */ 12751 } wl_nan_event_oob_af_txs_t; 12752 12753 /* WL_NAN_EVENT_OOB_AF_TXS status */ 12754 #define NAN_OOB_AF_TXS_ACK 0x1 12755 #define NAN_OOB_AF_TXS_NO_ACK 0x2 12756 #define NAN_OOB_AF_TXS_EXPIRED 0x3 12757 #define NAN_OOB_AF_TXS_DISABLED 0x4 12758 12759 /* WL_NAN_EVENT_OOB_AF_RX event sent to host upon receiving a NAN OOB AF frame */ 12760 typedef struct wl_nan_event_oob_af_rx { 12761 struct ether_addr sa; 12762 struct ether_addr da; 12763 struct ether_addr bssid; 12764 uint16 payload_len; 12765 uint8 payload[]; /* AF hdr + NAN attrbutes in TLV format */ 12766 } wl_nan_event_oob_af_rx_t; 12767 12768 #define WL_NAN_CFG_OOB_AF_BODY_MAX_SIZE 1024u /* Max size of AF payload */ 12769 #define WL_NAN_CFG_OOB_AF_MAX_TIMEOUT 8000u /* 8 Sec. Max timeout(in ms) for OOB AF session */ 12770 12771 /* Max size of the NAN OOB AF information in the IOVAR */ 12772 #define WL_NAN_CFG_OOB_AF_MAX_INFO_SIZE \ 12773 (sizeof(bcm_xtlv_t) + sizeof(wl_nan_oob_af_t) + \ 12774 WL_NAN_CFG_OOB_AF_BODY_MAX_SIZE) 12775 /* 12776 * TLVs - Below XTLV definitions will be deprecated 12777 * in due course (soon as all other branches update 12778 * to the comp ID based XTLVs listed below). 12779 */ 12780 enum wl_nan_cmd_xtlv_id { 12781 WL_NAN_XTLV_MAC_ADDR = 0x120, 12782 WL_NAN_XTLV_MATCH_RX = 0x121, 12783 WL_NAN_XTLV_MATCH_TX = 0x122, 12784 WL_NAN_XTLV_SVC_INFO = 0x123, 12785 WL_NAN_XTLV_SVC_NAME = 0x124, 12786 WL_NAN_XTLV_SR_FILTER = 0x125, 12787 WL_NAN_XTLV_FOLLOWUP = 0x126, 12788 WL_NAN_XTLV_SVC_LIFE_COUNT = 0x127, 12789 WL_NAN_XTLV_AVAIL = 0x128, 12790 WL_NAN_XTLV_SDF_RX = 0x129, 12791 WL_NAN_XTLV_SDE_CONTROL = 0x12a, 12792 WL_NAN_XTLV_SDE_RANGE_LIMIT = 0x12b, 12793 WL_NAN_XTLV_NAN_AF = 0x12c, 12794 WL_NAN_XTLV_SD_TERMINATE = 0x12d, 12795 WL_NAN_XTLV_CLUSTER_ID = 0x12e, 12796 WL_NAN_XTLV_PEER_RSSI = 0x12f, 12797 WL_NAN_XTLV_BCN_RX = 0x130, 12798 WL_NAN_XTLV_REPLIED = 0x131, /* Publish sent for a subscribe */ 12799 WL_NAN_XTLV_RECEIVED = 0x132, /* FUP Received */ 12800 WL_NAN_XTLV_DISC_RESULTS = 0x133, /* Discovery results */ 12801 WL_NAN_XTLV_TXS = 0x134 /* TX status */ 12802 }; 12803 12804 #define WL_NAN_CMD_GLOBAL 0x00 12805 #define WL_NAN_CMD_CFG_COMP_ID 0x01 12806 #define WL_NAN_CMD_ELECTION_COMP_ID 0x02 12807 #define WL_NAN_CMD_SD_COMP_ID 0x03 12808 #define WL_NAN_CMD_SYNC_COMP_ID 0x04 12809 #define WL_NAN_CMD_DATA_COMP_ID 0x05 12810 #define WL_NAN_CMD_DAM_COMP_ID 0x06 12811 #define WL_NAN_CMD_RANGE_COMP_ID 0x07 12812 #define WL_NAN_CMD_GENERIC_COMP_ID 0x08 12813 #define WL_NAN_CMD_SCHED_COMP_ID 0x09 12814 #define WL_NAN_CMD_NSR_COMP_ID 0x0a /* NAN Save Restore */ 12815 #define WL_NAN_CMD_NANHO_COMP_ID 0x0b /* NAN Host offload */ 12816 #define WL_NAN_CMD_DBG_COMP_ID 0x0f 12817 12818 #define WL_NAN_CMD_COMP_SHIFT 8 12819 #define NAN_CMD(x, y) (((x) << WL_NAN_CMD_COMP_SHIFT) | (y)) 12820 12821 /* 12822 * Module based NAN TLV IDs 12823 */ 12824 typedef enum wl_nan_tlv { 12825 12826 WL_NAN_XTLV_CFG_MATCH_RX = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x01), 12827 WL_NAN_XTLV_CFG_MATCH_TX = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x02), 12828 WL_NAN_XTLV_CFG_SR_FILTER = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x03), 12829 WL_NAN_XTLV_CFG_SVC_NAME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x04), 12830 WL_NAN_XTLV_CFG_NAN_STATUS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x05), 12831 WL_NAN_XTLV_CFG_SVC_LIFE_COUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x06), 12832 WL_NAN_XTLV_CFG_SVC_HASH = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x07), 12833 WL_NAN_XTLV_CFG_SEC_CSID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x08), /* Security CSID */ 12834 WL_NAN_XTLV_CFG_SEC_PMK = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x09), /* Security PMK */ 12835 WL_NAN_XTLV_CFG_SEC_PMKID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0A), 12836 WL_NAN_XTLV_CFG_SEC_SCID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0B), 12837 WL_NAN_XTLV_CFG_VNDR_PAYLOAD = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0C), 12838 WL_NAN_XTLV_CFG_HOST_INDPID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0D), 12839 /* when host ndpid is used */ 12840 WL_NAN_XTLV_CFG_MAC_ADDR = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0E), 12841 /* fast disc time bitmap config */ 12842 WL_NAN_XTLV_CFG_FDISC_TBMP = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0F), 12843 12844 WL_NAN_XTLV_SD_SVC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 12845 WL_NAN_XTLV_SD_FOLLOWUP = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x02), 12846 WL_NAN_XTLV_SD_SDF_RX = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x03), 12847 WL_NAN_XTLV_SD_SDE_CONTROL = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x04), 12848 WL_NAN_XTLV_SD_SDE_RANGE_LIMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x05), 12849 WL_NAN_XTLV_SD_NAN_AF = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x06), 12850 WL_NAN_XTLV_SD_TERM = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x07), 12851 WL_NAN_XTLV_SD_REPLIED = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x08), /* Pub sent */ 12852 WL_NAN_XTLV_SD_FUP_RECEIVED = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x09), /* FUP Received */ 12853 WL_NAN_XTLV_SD_DISC_RESULTS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0A), /* Pub RX */ 12854 WL_NAN_XTLV_SD_TXS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0B), /* Tx status */ 12855 WL_NAN_XTLV_SD_SDE_SVC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0C), 12856 WL_NAN_XTLV_SD_SDE_SVC_UPD_IND = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0D), 12857 WL_NAN_XTLV_SD_SVC_NDI = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0E), 12858 WL_NAN_XTLV_SD_NDP_SPEC_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0F), 12859 WL_NAN_XTLV_SD_NDPE_TLV_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x10), 12860 WL_NAN_XTLV_SD_NDL_QOS_UPD = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x11), 12861 WL_NAN_XTLV_SD_DISC_CACHE_TIMEOUT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x12), 12862 WL_NAN_XTLV_SD_PEER_NMI = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x13), 12863 12864 WL_NAN_XTLV_SYNC_BCN_RX = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 12865 WL_NAN_XTLV_EV_MR_CHANGED = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x02), 12866 12867 WL_NAN_XTLV_DATA_DP_END = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 12868 WL_NAN_XTLV_DATA_DP_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 12869 WL_NAN_XTLV_DATA_DP_SEC_INST = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 12870 WL_NAN_XTLV_DATA_DP_TXS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x04), /* txs for dp */ 12871 WL_NAN_XTLV_DATA_DP_OPAQUE_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x05), 12872 WL_NAN_XTLV_RANGE_INFO = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01), 12873 WL_NAN_XTLV_RNG_TXS = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x02), 12874 12875 WL_NAN_XTLV_EV_SLOT_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x01), 12876 WL_NAN_XTLV_EV_GEN_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x02), 12877 WL_NAN_XTLV_CCA_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x03), 12878 WL_NAN_XTLV_PER_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x04), 12879 WL_NAN_XTLV_CHBOUND_INFO = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x05), 12880 WL_NAN_XTLV_SLOT_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x06), 12881 12882 WL_NAN_XTLV_DAM_NA_ATTR = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), /* na attr */ 12883 WL_NAN_XTLV_HOST_ASSIST_REQ = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x02), /* host assist */ 12884 12885 /* wl_nan_fw_cap_t */ 12886 WL_NAN_XTLV_GEN_FW_CAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 12887 /* wl_nan_fw_cap_v2_t */ 12888 WL_NAN_XTLV_GEN_FW_CAP_V2 = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 12889 12890 /* NAN OOB AF tlv */ 12891 WL_NAN_XTLV_OOB_AF = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x03), 12892 12893 WL_NAN_XTLV_SCHED_INFO = NAN_CMD(WL_NAN_CMD_SCHED_COMP_ID, 0x01), 12894 12895 /* Nan Save-Restore XTLVs */ 12896 WL_NAN_XTLV_NSR2_PEER = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x21), 12897 WL_NAN_XTLV_NSR2_NDP = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x22), 12898 12899 /* Host offload XTLVs */ 12900 WL_NAN_XTLV_NANHO_PEER_ENTRY = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), 12901 WL_NAN_XTLV_NANHO_DCAPLIST = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x02), 12902 WL_NAN_XTLV_NANHO_DCSLIST = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x03), 12903 WL_NAN_XTLV_NANHO_BLOB = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x04), 12904 WL_NAN_XTLV_NANHO_NDP_STATE = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x05), 12905 WL_NAN_XTLV_NANHO_FRM_TPLT = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x06), 12906 WL_NAN_XTLV_NANHO_OOB_NAF = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x07), 12907 WL_NAN_XTLV_NANHO_LOG_ERR_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x08), 12908 WL_NAN_XTLV_NANHO_LOG_DBG_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x09), 12909 WL_NAN_XTLV_NANHO_OOB_TXS = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0A), 12910 WL_NAN_XTLV_NANHO_DCAP_ATTR = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0B), 12911 WL_NAN_XTLV_NANHO_ELEM_ATTR = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0C), 12912 WL_NAN_XTLV_NANHO_SEC_SA = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x0D) 12913 } wl_nan_tlv_t; 12914 12915 /* Sub Module ID's for NAN */ 12916 enum { 12917 NAN_MAC = 0, /* nan mac */ 12918 NAN_DISC = 1, /* nan discovery */ 12919 NAN_DBG = 2, /* nan debug */ 12920 NAN_SCHED = 3, /* nan sched */ 12921 NAN_PEER_ENTRY = 4, /* nan peer entry */ 12922 NAN_AVAIL = 5, /* nan avail */ 12923 NAN_DAM = 6, /* nan dam */ 12924 NAN_FSM = 7, /* nan fsm registry */ 12925 NAN_NDP = 8, /* nan ndp */ 12926 NAN_NDL = 9, /* nan ndl */ 12927 NAN_DP = 10, /* nan dp core */ 12928 NAN_RNG = 11, /* nan ranging */ 12929 NAN_SEC = 12, /* nan sec */ 12930 NAN_LAST = 13 12931 }; 12932 12933 enum wl_nan_sub_cmd_xtlv_id { 12934 12935 /* Special command - Tag zero */ 12936 WL_NAN_CMD_GLB_NAN_VER = NAN_CMD(WL_NAN_CMD_GLOBAL, 0x00), 12937 12938 /* nan cfg sub-commands */ 12939 12940 WL_NAN_CMD_CFG_NAN_INIT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x01), 12941 WL_NAN_CMD_CFG_ROLE = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x02), 12942 WL_NAN_CMD_CFG_HOP_CNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x03), 12943 WL_NAN_CMD_CFG_HOP_LIMIT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x04), 12944 WL_NAN_CMD_CFG_WARMUP_TIME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x05), 12945 WL_NAN_CMD_CFG_STATUS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x06), 12946 WL_NAN_CMD_CFG_OUI = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x07), 12947 WL_NAN_CMD_CFG_COUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x08), 12948 WL_NAN_CMD_CFG_CLEARCOUNT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x09), 12949 WL_NAN_CMD_CFG_CHANNEL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0A), 12950 WL_NAN_CMD_CFG_BAND = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0B), 12951 WL_NAN_CMD_CFG_CID = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0C), 12952 WL_NAN_CMD_CFG_IF_ADDR = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0D), 12953 WL_NAN_CMD_CFG_BCN_INTERVAL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0E), 12954 WL_NAN_CMD_CFG_SDF_TXTIME = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x0F), 12955 WL_NAN_CMD_CFG_SID_BEACON = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x10), 12956 WL_NAN_CMD_CFG_DW_LEN = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x11), 12957 WL_NAN_CMD_CFG_AVAIL = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x12), 12958 WL_NAN_CMD_CFG_WFA_TM = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x13), 12959 WL_NAN_CMD_CFG_EVENT_MASK = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x14), 12960 WL_NAN_CMD_CFG_NAN_CONFIG = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x15), /* ctrl */ 12961 WL_NAN_CMD_CFG_NAN_ENAB = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x16), 12962 WL_NAN_CMD_CFG_ULW = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x17), 12963 WL_NAN_CMD_CFG_NAN_CONFIG2 = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x18), /* ctrl2 */ 12964 WL_NAN_CMD_CFG_DEV_CAP = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x19), 12965 WL_NAN_CMD_CFG_SCAN_PARAMS = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1A), 12966 WL_NAN_CMD_CFG_VNDR_PAYLOAD = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1B), 12967 WL_NAN_CMD_CFG_FASTDISC = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1C), 12968 WL_NAN_CMD_CFG_MIN_TX_RATE = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1D), 12969 WL_NAN_CMD_CFG_FSM_TIMEOUT = NAN_CMD(WL_NAN_CMD_CFG_COMP_ID, 0x1E), 12970 WL_NAN_CMD_CFG_MAX = WL_NAN_CMD_CFG_FSM_TIMEOUT, 12971 12972 /* Add new commands before and update */ 12973 12974 /* nan election sub-commands */ 12975 WL_NAN_CMD_ELECTION_HOST_ENABLE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x01), 12976 WL_NAN_CMD_ELECTION_METRICS_CONFIG = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x02), 12977 WL_NAN_CMD_ELECTION_METRICS_STATE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x03), 12978 WL_NAN_CMD_ELECTION_LEAVE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x03), 12979 WL_NAN_CMD_ELECTION_MERGE = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x04), 12980 WL_NAN_CMD_ELECTION_ADVERTISERS = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x05), 12981 WL_NAN_CMD_ELECTION_RSSI_THRESHOLD = NAN_CMD(WL_NAN_CMD_ELECTION_COMP_ID, 0x06), 12982 WL_NAN_CMD_ELECTION_MAX = WL_NAN_CMD_ELECTION_RSSI_THRESHOLD, 12983 /* New commands go before and update */ 12984 12985 /* nan SD sub-commands */ 12986 WL_NAN_CMD_SD_PARAMS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 12987 WL_NAN_CMD_SD_PUBLISH = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x02), 12988 WL_NAN_CMD_SD_PUBLISH_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x03), 12989 WL_NAN_CMD_SD_CANCEL_PUBLISH = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x04), 12990 WL_NAN_CMD_SD_SUBSCRIBE = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x05), 12991 WL_NAN_CMD_SD_SUBSCRIBE_LIST = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x06), 12992 WL_NAN_CMD_SD_CANCEL_SUBSCRIBE = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x07), 12993 WL_NAN_CMD_SD_VND_INFO = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x08), 12994 WL_NAN_CMD_SD_STATS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x09), 12995 WL_NAN_CMD_SD_TRANSMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0A), 12996 WL_NAN_CMD_SD_FUP_TRANSMIT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0B), 12997 WL_NAN_CMD_SD_CONNECTION = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0C), 12998 WL_NAN_CMD_SD_SHOW = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0D), 12999 WL_NAN_CMD_SD_DISC_CACHE_TIMEOUT = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0E), 13000 WL_NAN_CMD_SD_DISC_CACHE_CLEAR = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x0F), 13001 WL_NAN_CMD_SD_MAX = WL_NAN_CMD_SD_DISC_CACHE_CLEAR, 13002 13003 /* nan time sync sub-commands */ 13004 13005 WL_NAN_CMD_SYNC_SOCIAL_CHAN = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 13006 WL_NAN_CMD_SYNC_AWAKE_DWS = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x02), 13007 WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x03), 13008 WL_NAN_CMD_SYNC_MAX = WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD, 13009 13010 /* nan2 commands */ 13011 WL_NAN_CMD_DATA_CONFIG = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 13012 WL_NAN_CMD_DATA_RSVD02 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 13013 WL_NAN_CMD_DATA_RSVD03 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 13014 WL_NAN_CMD_DATA_DATAREQ = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x04), 13015 WL_NAN_CMD_DATA_DATARESP = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x05), 13016 WL_NAN_CMD_DATA_DATAEND = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x06), 13017 WL_NAN_CMD_DATA_SCHEDUPD = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x07), 13018 WL_NAN_CMD_DATA_RSVD08 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x08), 13019 WL_NAN_CMD_DATA_CAP = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x9), 13020 WL_NAN_CMD_DATA_STATUS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0A), 13021 WL_NAN_CMD_DATA_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0B), 13022 WL_NAN_CMD_DATA_RSVD0C = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0C), 13023 WL_NAN_CMD_DATA_NDP_SHOW = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0D), 13024 WL_NAN_CMD_DATA_DATACONF = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0E), 13025 WL_NAN_CMD_DATA_MIN_TX_RATE = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x0F), 13026 WL_NAN_CMD_DATA_MAX_PEERS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x10), 13027 WL_NAN_CMD_DATA_DP_IDLE_PERIOD = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x11), 13028 WL_NAN_CMD_DATA_DP_OPAQUE_INFO = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x12), 13029 WL_NAN_CMD_DATA_DP_HB_DURATION = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x13), 13030 WL_NAN_CMD_DATA_DATAEND_V2 = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x14), 13031 WL_NAN_CMD_DATA_PATH_MAX = WL_NAN_CMD_DATA_DATAEND_V2, /* New ones before and update */ 13032 13033 /* nan dam sub-commands */ 13034 WL_NAN_CMD_DAM_CFG = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), 13035 WL_NAN_CMD_DAM_MAX = WL_NAN_CMD_DAM_CFG, /* New ones before and update */ 13036 13037 /* nan2.0 ranging commands */ 13038 WL_NAN_CMD_RANGE_REQUEST = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01), 13039 WL_NAN_CMD_RANGE_AUTO = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x02), 13040 WL_NAN_CMD_RANGE_RESPONSE = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x03), 13041 WL_NAN_CMD_RANGE_CANCEL = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x04), 13042 WL_NAN_CMD_RANGE_IDLE_COUNT = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x05), 13043 WL_NAN_CMD_RANGE_CANCEL_EXT = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x06), 13044 13045 /* nan debug sub-commands */ 13046 WL_NAN_CMD_DBG_SCAN_PARAMS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x01), 13047 WL_NAN_CMD_DBG_SCAN = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x02), 13048 WL_NAN_CMD_DBG_SCAN_RESULTS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x03), 13049 /* This is now moved under CFG */ 13050 WL_NAN_CMD_DBG_EVENT_MASK = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x04), 13051 WL_NAN_CMD_DBG_EVENT_CHECK = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x05), 13052 WL_NAN_CMD_DBG_DUMP = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x06), 13053 WL_NAN_CMD_DBG_CLEAR = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x07), 13054 WL_NAN_CMD_DBG_RSSI = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x08), 13055 WL_NAN_CMD_DBG_DEBUG = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x09), 13056 WL_NAN_CMD_DBG_TEST1 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0A), 13057 WL_NAN_CMD_DBG_TEST2 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0B), 13058 WL_NAN_CMD_DBG_TEST3 = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0C), 13059 WL_NAN_CMD_DBG_DISC_RESULTS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0D), 13060 WL_NAN_CMD_DBG_STATS = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0E), 13061 WL_NAN_CMD_DBG_LEVEL = NAN_CMD(WL_NAN_CMD_DBG_COMP_ID, 0x0F), 13062 WL_NAN_CMD_DBG_MAX = WL_NAN_CMD_DBG_LEVEL, /* New ones before and update */ 13063 13064 /* Generic componenet */ 13065 WL_NAN_CMD_GEN_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 13066 WL_NAN_CMD_GEN_FW_CAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 13067 WL_NAN_CMD_CFG_OOB_AF = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x03), 13068 WL_NAN_CMD_GEN_MAX = WL_NAN_CMD_CFG_OOB_AF, 13069 13070 /* NAN Save-Restore */ 13071 WL_NAN_CMD_NSR2 = NAN_CMD(WL_NAN_CMD_NSR_COMP_ID, 0x20), 13072 WL_NAN_CMD_NSR2_MAX = WL_NAN_CMD_NSR2, 13073 13074 /* Host offload sub-commands */ 13075 WL_NAN_CMD_NANHO_UPDATE = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), /* WILL BE REMOVED */ 13076 WL_NAN_CMD_NANHO_INFO = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x01), 13077 WL_NAN_CMD_NANHO_FRM_TPLT = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x02), /* unused */ 13078 WL_NAN_CMD_NANHO_OOB_NAF = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x03), /* unused */ 13079 WL_NAN_CMD_NANHO_LOG_CTRL = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x04), 13080 WL_NAN_CMD_NANHO_VER = NAN_CMD(WL_NAN_CMD_NANHO_COMP_ID, 0x05), 13081 WL_NAN_CMD_NANHO_MAX = WL_NAN_CMD_NANHO_VER, 13082 13083 /* Add submodules below, and update WL_NAN_CMD_MAX */ 13084 13085 /* ROML check for this enum should use WL_NAN_CMD_MAX */ 13086 WL_NAN_CMD_MAX = WL_NAN_CMD_NANHO_MAX 13087 }; 13088 13089 /* 13090 * Component/Module based NAN TLV IDs for NAN stats 13091 */ 13092 typedef enum wl_nan_stats_tlv { 13093 WL_NAN_XTLV_SYNC_MAC_STATS = NAN_CMD(WL_NAN_CMD_SYNC_COMP_ID, 0x01), 13094 13095 WL_NAN_XTLV_SD_DISC_STATS = NAN_CMD(WL_NAN_CMD_SD_COMP_ID, 0x01), 13096 13097 WL_NAN_XTLV_DATA_NDP_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x01), 13098 WL_NAN_XTLV_DATA_NDL_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x02), 13099 WL_NAN_XTLV_DATA_SEC_STATS = NAN_CMD(WL_NAN_CMD_DATA_COMP_ID, 0x03), 13100 13101 WL_NAN_XTLV_GEN_SCHED_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x01), 13102 WL_NAN_XTLV_GEN_PEER_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x02), 13103 WL_NAN_XTLV_GEN_PEER_STATS_DEVCAP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x03), 13104 WL_NAN_XTLV_GEN_PEER_STATS_NDP = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x04), 13105 WL_NAN_XTLV_GEN_PEER_STATS_SCHED = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x05), 13106 WL_NAN_XTLV_GEN_AVAIL_STATS_SCHED = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x06), 13107 WL_NAN_XTLV_GEN_NDP_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x07), 13108 WL_NAN_XTLV_GEN_PARSE_STATS = NAN_CMD(WL_NAN_CMD_GENERIC_COMP_ID, 0x08), 13109 13110 WL_NAN_XTLV_DAM_STATS = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x01), 13111 WL_NAN_XTLV_DAM_AVAIL_STATS = NAN_CMD(WL_NAN_CMD_DAM_COMP_ID, 0x02), 13112 13113 WL_NAN_XTLV_RANGE_STATS = NAN_CMD(WL_NAN_CMD_RANGE_COMP_ID, 0x01) 13114 } wl_nan_stats_tlv_t; 13115 13116 /* NAN stats WL_NAN_CMD_GEN_STATS command */ 13117 /* Input data */ 13118 typedef struct wl_nan_cmn_get_stat { 13119 uint32 modules_btmap; /* Bitmap to indicate module stats are needed: 13120 * See NAN Sub Module ID's above 13121 */ 13122 uint8 operation; /* Get, Get and Clear */ 13123 uint8 arg1; /* Submodule control variable1 */ 13124 uint8 arg2; /* Submodule control variable2 */ 13125 uint8 pad; /* May not be needed as TLV's are aligned,add to pass compile chk */ 13126 } wl_nan_cmn_get_stat_t; 13127 13128 /* Output for Stats container */ 13129 typedef struct wl_nan_cmn_stat { 13130 uint32 n_stats; /* Number of different sub TLV stats present in the container */ 13131 uint32 totlen; /* Total Length of stats data in container */ 13132 uint8 stats_tlvs []; /* Stat TLV's container */ 13133 } wl_nan_cmn_stat_t; 13134 13135 /* Defines for operation */ 13136 #define WLA_NAN_STATS_GET 0 13137 #define WLA_NAN_STATS_GET_CLEAR 1 13138 13139 #define WL_NAN_STAT_ALL 0xFFFFFFFF 13140 13141 /* NAN Mac stats */ 13142 13143 typedef struct wl_nan_mac_band_stats { 13144 uint32 bcn_tx; /* 2g/5g disc/sync beacon tx count */ 13145 uint32 bcn_rx; /* 2g/5g disc/sync beacon rx count */ 13146 uint32 dws; /* Number of 2g/5g DW's */ 13147 } wl_nan_mac_band_stats_t; 13148 13149 /* Note: if this struct is changing update wl_nan_slot_ecounters_vX_t version, 13150 * as this struct is sent as payload in wl_nan_slot_ecounter_vX_ts 13151 */ 13152 typedef struct wl_nan_mac_stats { 13153 wl_nan_mac_band_stats_t band[NAN_MAX_BANDS]; /* MAC sync band specific stats */ 13154 uint32 naf_tx; /* NAN AF tx */ 13155 uint32 naf_rx; /* NAN AF rx */ 13156 uint32 sdf_tx; /* SDF tx */ 13157 uint32 sdf_rx; /* SDF rx */ 13158 uint32 cnt_sync_bcn_rx_tu[3]; /* delta bw */ 13159 uint32 cnt_bcn_tx_out_dw; /* TX sync beacon outside dw */ 13160 uint32 cnt_role_am_dw; /* anchor master role due to dw */ 13161 uint32 cnt_am_hop_err; /* wrong hopcount set for AM */ 13162 } wl_nan_mac_stats_t; 13163 13164 typedef struct wl_nan_mac_stats_v1 { 13165 wl_nan_mac_band_stats_t band[NAN_MAX_BANDS]; /* MAC sync band specific stats */ 13166 uint32 naf_tx; /* NAN AF tx */ 13167 uint32 naf_rx; /* NAN AF rx */ 13168 uint32 sdf_tx; /* SDF tx */ 13169 uint32 sdf_rx; /* SDF rx */ 13170 uint32 cnt_sync_bcn_rx_tu[3]; /* delta bw */ 13171 uint32 cnt_bcn_tx_out_dw; /* TX sync beacon outside dw */ 13172 uint32 cnt_role_am_dw; /* anchor master role due to dw */ 13173 uint32 cnt_am_hop_err; /* wrong hopcount set for AM */ 13174 uint32 merge_scan_cnt_2g; /* 2G band merge scan cnt */ 13175 uint32 merge_scan_cnt_5g; /* 5G band merge scan cnt */ 13176 } wl_nan_mac_stats_v1_t; 13177 13178 /* NAN Sched stats */ 13179 /* Per core Sched stats */ 13180 typedef struct nan_sched_stats_core { 13181 uint32 slotstart; /* slot_start */ 13182 uint32 slotend; /* slot_end */ 13183 uint32 slotskip; /* slot_skip */ 13184 uint32 slotstart_partial; /* slot resume */ 13185 uint32 slotend_partial; /* slot pre-empt */ 13186 uint8 avail_upd_cnt; /* count to track num of times avail has been updated */ 13187 uint8 pad[3]; 13188 } nan_sched_stats_core_t; 13189 /* Common Sched stats */ 13190 typedef struct nan_sched_stats_cmn { 13191 uint32 slot_adj_dw; /* Slot adjusts due to DW changes */ 13192 uint32 slot_dur; /* Total slot duration in TU's */ 13193 } nan_sched_stats_cmn_t; 13194 13195 /* Note: if this struct is changing update wl_nan_slot_ecounters_vX_t version, 13196 * as this struct is sent as payload in wl_nan_slot_ecounters_vX_t 13197 */ 13198 typedef struct nan_sched_stats { 13199 nan_sched_stats_cmn_t cmn; 13200 nan_sched_stats_core_t slice[MAX_NUM_D11CORES]; 13201 } nan_sched_stats_t; 13202 /* End NAN Sched stats */ 13203 13204 /* NAN Discovery stats */ 13205 typedef struct nan_disc_stats { 13206 uint32 pub_tx; /* Publish tx */ 13207 uint32 pub_rx; /* Publish rx */ 13208 uint32 sub_tx; /* Subscribe tx */ 13209 uint32 sub_rx; /* Subscribe rx */ 13210 uint32 fup_tx; /* Followup tx */ 13211 uint32 fup_rx; /* Followup rx */ 13212 uint32 pub_resp_ignored; /* response to incoming publish ignored */ 13213 uint32 sub_resp_ignored; /* response to incoming subscribe ignored */ 13214 } nan_disc_stats_t; 13215 /* NAN Discovery stats end */ 13216 13217 /* statistics for nan sec */ 13218 typedef struct nan_sec_stats_s { 13219 uint32 mic_fail; /* rx mic fail */ 13220 uint32 replay_fail; /* replay counter */ 13221 uint32 tx_fail; /* tx fail (from txstatus) */ 13222 uint32 key_info_err; /* key info field err */ 13223 uint32 ok_sessions; /* successful mx negotiations */ 13224 uint32 fail_sessions; /* failed sessions */ 13225 uint32 keydesc_err; /* key desc error */ 13226 uint32 invalid_cipher; /* cipher suite not valid */ 13227 uint32 pmk_not_found; /* no pmk found for given service or for any reason */ 13228 uint32 no_pmk_for_pmkid; /* no pmk found for give pmkid */ 13229 uint32 key_install_err; /* failed to install keys */ 13230 uint32 no_keydesc_attr; /* key desc attr missing */ 13231 uint32 nonce_mismatch; /* nonce mismatch */ 13232 } nan_sec_stats_t; 13233 13234 /* WL_NAN_XTLV_GEN_PEER_STATS */ 13235 typedef struct wl_nan_peer_stats { 13236 struct ether_addr nmi; 13237 uint8 pad[2]; 13238 uint32 pkt_enq; /* counter for queued pkt of peer */ 13239 13240 /* NDL */ 13241 bool ndl_exist; 13242 uint8 ndl_state; 13243 bool counter_proposed; 13244 uint8 pad1; 13245 13246 /* NDL QoS */ 13247 uint16 local_max_latency; 13248 uint16 peer_max_latency; 13249 uint8 local_min_slots; 13250 uint8 peer_min_slots; 13251 13252 /* security association */ 13253 struct ether_addr sec_laddr; /* local mac addr */ 13254 struct ether_addr sec_raddr; /* remote mac addr */ 13255 uint8 sec_csid; 13256 uint8 pad2; 13257 } wl_nan_peer_stats_t; 13258 13259 /* WL_NAN_XTLV_GEN_PEER_STATS_DEVCAP */ 13260 typedef struct wl_nan_peer_stats_dev_cap { 13261 uint8 mapid; 13262 uint8 awake_dw_2g; 13263 uint8 awake_dw_5g; 13264 uint8 bands_supported; 13265 uint8 op_mode; 13266 uint8 num_antennas; 13267 uint16 chan_switch_time; 13268 uint8 capabilities; 13269 uint8 pad[3]; 13270 } wl_nan_peer_stats_dev_cap_t; 13271 13272 /* WL_NAN_XTLV_GEN_PEER_STATS_NDP */ 13273 typedef struct wl_nan_peer_stats_ndp { 13274 uint8 peer_role; 13275 uint8 ndp_state; 13276 uint8 indp_id; /* initiator ndp id */ 13277 uint8 ndp_ctrl; /* ndp control field */ 13278 struct ether_addr peer_nmi; 13279 struct ether_addr peer_ndi; 13280 struct ether_addr local_ndi; 13281 13282 /* peer scb info */ 13283 bool scb_allocated; 13284 bool scb_found; 13285 uint32 scb_flags; 13286 uint32 scb_flags2; 13287 uint32 scb_flags3; 13288 } wl_nan_peer_stats_ndp_t; 13289 13290 enum { 13291 WL_NAN_SCHED_STAT_SLOT_COMM = 0x01, /* Committed slot */ 13292 WL_NAN_SCHED_STAT_SLOT_COND = 0x02, /* Conditional slot(proposal/counter) */ 13293 WL_NAN_SCHED_STAT_SLOT_NDC = 0x04, /* NDC slot */ 13294 WL_NAN_SCHED_STAT_SLOT_IMMUT = 0x08, /* Immutable slot */ 13295 WL_NAN_SCHED_STAT_SLOT_RANGE = 0x10, /* Ranging slot */ 13296 }; 13297 typedef uint16 wl_nan_stats_sched_slot_info_t; 13298 13299 typedef struct wl_nan_stats_sched_slot { 13300 wl_nan_stats_sched_slot_info_t info; /* capture slot type and more info */ 13301 chanspec_t chanspec; 13302 } wl_nan_stats_sched_slot_t; 13303 13304 /* WL_NAN_XTLV_GEN_PEER_STATS_SCHED, WL_NAN_XTLV_GEN_AVAIL_STATS_SCHED */ 13305 typedef struct wl_nan_stats_sched { 13306 uint8 map_id; 13307 uint8 seq_id; /* seq id from NA attr */ 13308 uint8 slot_dur; 13309 uint8 pad; 13310 uint16 period; 13311 uint16 num_slot; 13312 wl_nan_stats_sched_slot_t slot[]; 13313 } wl_nan_stats_sched_t; 13314 13315 /* WL_NAN_XTLV_GEN_PEER_STATS_SCHED */ 13316 typedef struct wl_nan_peer_stats_sched { 13317 uint8 map_id; 13318 uint8 seq_id; /* seq id from NA attr */ 13319 uint8 slot_dur; 13320 uint8 pad; 13321 uint16 period; 13322 uint16 num_slot; 13323 wl_nan_stats_sched_slot_t slot[]; 13324 } wl_nan_peer_stats_sched_t; 13325 13326 /* WL_NAN_XTLV_RANGE_STATS */ 13327 typedef struct wl_nan_range_stats { 13328 uint16 rng_ssn_estb; 13329 uint16 rng_ssn_fail; 13330 uint16 rng_sched_start; 13331 uint16 rng_sched_end; 13332 uint16 ftm_ssn_success; /* number of succesfull ftm sessions */ 13333 uint16 ftm_ssn_fail; 13334 uint16 num_meas; /* number of ftm frames */ 13335 uint16 num_valid_meas; /* number of ftm frames with valid timestamp */ 13336 } wl_nan_range_stats_t; 13337 13338 /* defines for ndp stats flag */ 13339 13340 #define NAN_NDP_STATS_FLAG_ROLE_MASK 0x01 13341 #define NAN_NDP_STATS_FLAG_ROLE_INIT 0x00 13342 #define NAN_NDP_STATS_FLAG_ROLE_RESP 0x01 13343 13344 #define NAN_NDP_STATS_STATE_BIT_SHIFT 1 13345 #define NAN_NDP_STATS_FLAG_STATE_MASK 0x07 13346 #define NAN_NDP_STATS_FLAG_STATE_IN_PROG 0x00 13347 #define NAN_NDP_STATS_FLAG_STATE_ESTB 0x01 13348 #define NAN_NDP_STATS_FLAG_STATE_TEARDOWN_WAIT 0x02 13349 /* More states can be added here, when needed */ 13350 13351 /* WL_NAN_XTLV_GEN_NDP_STATS */ 13352 typedef struct wl_nan_ndp_stats_s { 13353 uint8 ndp_id; 13354 uint8 indp_id; 13355 uint8 flags; 13356 uint8 nan_sec_csid; 13357 struct ether_addr lndi_addr; 13358 struct ether_addr pnmi_addr; 13359 struct ether_addr pndi_addr; 13360 uint8 PAD[2]; 13361 } wl_nan_ndp_stats_t; 13362 13363 /* WL_NAN_XTLV_EV_SLOT_INFO */ 13364 typedef struct wl_nan_slot_info_s { 13365 /* dw slot start expected */ 13366 uint32 dwst_h; 13367 uint32 dwst_l; 13368 /* dw slot start actual */ 13369 uint32 act_dwst_h; 13370 uint32 act_dwst_l; 13371 uint16 cur_chan[MAX_NUM_D11CORES]; /* sdb channels */ 13372 uint16 dw_chan; /* dw channel */ 13373 uint8 dw_no; /* dw number */ 13374 uint8 slot_seq_no; /* slot seq no. */ 13375 } wl_nan_slot_info_t; 13376 13377 /* WL_NAN_XTLV_DAM_STATS */ 13378 typedef struct wl_nan_dam_stats { 13379 uint32 cnt_rej_crb_inuse; /* DAM rejections because of crb in use already */ 13380 } wl_nan_dam_stats_t; 13381 13382 /* WL_NAN_EVENT_MR_CHANGED */ 13383 typedef uint8 wl_nan_mr_changed_t; 13384 #define WL_NAN_AMR_CHANGED 1 13385 #define WL_NAN_IMR_CHANGED 2 13386 13387 /* 13388 * The macro BCMUTILS_ERR_CODES is defined only 13389 * when using the common header file(a new approach) bcmutils/include/bcmerror.h. 13390 * Otherwise, use the error codes from this file. 13391 */ 13392 #ifndef BCMUTILS_ERR_CODES 13393 13394 /** status - TBD BCME_ vs NAN status - range reserved for BCME_ */ 13395 enum { 13396 /* add new status here... */ 13397 WL_NAN_E_INVALID_TOKEN = -2135, /* invalid token or mismatch */ 13398 WL_NAN_E_INVALID_ATTR = -2134, /* generic invalid attr error */ 13399 WL_NAN_E_INVALID_NDL_ATTR = -2133, /* invalid NDL attribute */ 13400 WL_NAN_E_SCB_NORESOURCE = -2132, /* no more peer scb available */ 13401 WL_NAN_E_PEER_NOTAVAIL = -2131, 13402 WL_NAN_E_SCB_EXISTS = -2130, 13403 WL_NAN_E_INVALID_PEER_NDI = -2129, 13404 WL_NAN_E_INVALID_LOCAL_NDI = -2128, 13405 WL_NAN_E_ALREADY_EXISTS = -2127, /* generic NAN error for duplication */ 13406 WL_NAN_E_EXCEED_MAX_NUM_MAPS = -2126, 13407 WL_NAN_E_INVALID_DEV_CHAN_SCHED = -2125, 13408 WL_NAN_E_INVALID_PEER_BLOB_TYPE = -2124, 13409 WL_NAN_E_INVALID_LCL_BLOB_TYPE = -2123, 13410 WL_NAN_E_BCMC_PDPA = -2122, /* BCMC NAF PDPA */ 13411 WL_NAN_E_TIMEOUT = -2121, 13412 WL_NAN_E_HOST_CFG = -2120, 13413 WL_NAN_E_NO_ACK = -2119, 13414 WL_NAN_E_SECINST_FAIL = -2118, 13415 WL_NAN_E_REJECT_NDL = -2117, /* generic NDL rejection error */ 13416 WL_NAN_E_INVALID_NDP_ATTR = -2116, 13417 WL_NAN_E_HOST_REJECTED = -2115, 13418 WL_NAN_E_PCB_NORESOURCE = -2114, 13419 WL_NAN_E_NDC_EXISTS = -2113, 13420 WL_NAN_E_NO_NDC_ENTRY_AVAIL = -2112, 13421 WL_NAN_E_INVALID_NDC_ENTRY = -2111, 13422 WL_NAN_E_SD_TX_LIST_FULL = -2110, 13423 WL_NAN_E_SVC_SUB_LIST_FULL = -2109, 13424 WL_NAN_E_SVC_PUB_LIST_FULL = -2108, 13425 WL_NAN_E_SDF_MAX_LEN_EXCEEDED = -2107, 13426 WL_NAN_E_ZERO_CRB = -2106, /* no CRB between local and peer */ 13427 WL_NAN_E_PEER_NDC_NOT_SELECTED = -2105, /* peer ndc not selected */ 13428 WL_NAN_E_DAM_CHAN_CONFLICT = -2104, /* dam schedule channel conflict */ 13429 WL_NAN_E_DAM_SCHED_PERIOD = -2103, /* dam schedule period mismatch */ 13430 WL_NAN_E_LCL_NDC_NOT_SELECTED = -2102, /* local selected ndc not configured */ 13431 WL_NAN_E_NDL_QOS_INVALID_NA = -2101, /* na doesn't comply with ndl qos */ 13432 WL_NAN_E_CLEAR_NAF_WITH_SA_AS_RNDI = -2100, /* rx clear naf with peer rndi */ 13433 WL_NAN_E_SEC_CLEAR_PKT = -2099, /* rx clear pkt from a peer with sec_sa */ 13434 WL_NAN_E_PROT_NON_PDPA_NAF = -2098, /* rx protected non PDPA frame */ 13435 WL_NAN_E_DAM_DOUBLE_REMOVE = -2097, /* remove peer schedule already removed */ 13436 WL_NAN_E_DAM_DOUBLE_MERGE = -2096, /* merge peer schedule already merged */ 13437 WL_NAN_E_DAM_REJECT_INVALID = -2095, /* reject for invalid schedule */ 13438 WL_NAN_E_DAM_REJECT_RANGE = -2094, 13439 WL_NAN_E_DAM_REJECT_QOS = -2093, 13440 WL_NAN_E_DAM_REJECT_NDC = -2092, 13441 WL_NAN_E_DAM_REJECT_PEER_IMMUT = -2091, 13442 WL_NAN_E_DAM_REJECT_LCL_IMMUT = -2090, 13443 WL_NAN_E_DAM_EXCEED_NUM_SCHED = -2089, 13444 WL_NAN_E_DAM_INVALID_SCHED_MAP = -2088, /* invalid schedule map list */ 13445 WL_NAN_E_DAM_INVALID_LCL_SCHED = -2087, 13446 WL_NAN_E_INVALID_MAP_ID = -2086, 13447 WL_NAN_E_CHAN_OVERLAP_ACROSS_MAP = -2085, 13448 WL_NAN_E_INVALID_CHAN_LIST = -2084, 13449 WL_NAN_E_INVALID_RANGE_TBMP = -2083, 13450 WL_NAN_E_INVALID_IMMUT_SCHED = -2082, 13451 WL_NAN_E_INVALID_NDC_ATTR = -2081, 13452 WL_NAN_E_INVALID_TIME_BITMAP = -2080, 13453 WL_NAN_E_INVALID_NA_ATTR = -2079, 13454 WL_NAN_E_NO_NA_ATTR_IN_AVAIL_MAP = -2078, /* no na attr saved in avail map */ 13455 WL_NAN_E_INVALID_MAP_IDX = -2077, 13456 WL_NAN_E_SEC_SA_NOTFOUND = -2076, 13457 WL_NAN_E_BSSCFG_NOTFOUND = -2075, 13458 WL_NAN_E_SCB_NOTFOUND = -2074, 13459 WL_NAN_E_NCS_SK_KDESC_TYPE = -2073, 13460 WL_NAN_E_NCS_SK_KEY_DESC_VER = -2072, /* key descr ver */ 13461 WL_NAN_E_NCS_SK_KEY_TYPE = -2071, /* key descr type */ 13462 WL_NAN_E_NCS_SK_KEYINFO_FAIL = -2070, /* key info (generic) */ 13463 WL_NAN_E_NCS_SK_KEY_LEN = -2069, /* key len */ 13464 WL_NAN_E_NCS_SK_KDESC_NOT_FOUND = -2068, /* key desc not found */ 13465 WL_NAN_E_NCS_SK_INVALID_PARAMS = -2067, /* invalid args */ 13466 WL_NAN_E_NCS_SK_KDESC_INVALID = -2066, /* key descr is not valid */ 13467 WL_NAN_E_NCS_SK_NONCE_MISMATCH = -2065, 13468 WL_NAN_E_NCS_SK_KDATA_SAVE_FAIL = -2064, /* not able to save key data */ 13469 WL_NAN_E_NCS_SK_AUTH_TOKEN_CALC_FAIL = -2063, 13470 WL_NAN_E_NCS_SK_PTK_CALC_FAIL = -2062, 13471 WL_NAN_E_INVALID_STARTOFFSET = -2061, 13472 WL_NAN_E_BAD_NA_ENTRY_TYPE = -2060, 13473 WL_NAN_E_INVALID_CHANBMP = -2059, 13474 WL_NAN_E_INVALID_OP_CLASS = -2058, 13475 WL_NAN_E_NO_IES = -2057, 13476 WL_NAN_E_NO_PEER_ENTRY_AVAIL = -2056, 13477 WL_NAN_E_INVALID_PEER = -2055, 13478 WL_NAN_E_PEER_EXISTS = -2054, 13479 WL_NAN_E_PEER_NOTFOUND = -2053, 13480 WL_NAN_E_NO_MEM = -2052, 13481 WL_NAN_E_INVALID_OPTION = -2051, 13482 WL_NAN_E_INVALID_BAND = -2050, 13483 WL_NAN_E_INVALID_MAC = -2049, 13484 WL_NAN_E_BAD_INSTANCE = -2048, 13485 /* NAN status code reserved from -2048 to -3071 */ 13486 /* Do NOT add new status below -2048 */ 13487 WL_NAN_E_ERROR = -1, 13488 WL_NAN_E_OK = 0 13489 }; 13490 13491 #endif /* BCMUTILS_ERR_CODES */ 13492 13493 /* Error codes used in vendor specific attribute in Data Path Termination frames */ 13494 enum { 13495 WL_NAN_DPEND_E_OK = 0, 13496 WL_NAN_DPEND_E_ERROR = 1, 13497 WL_NAN_DPEND_E_HOST_CMD = 2, 13498 WL_NAN_DPEND_E_HOST_REJECTED = 3, /* host rejected rx frame */ 13499 WL_NAN_DPEND_E_RESOURCE_LIMIT = 4, 13500 WL_NAN_DPEND_E_NO_ACK_RCV = 5, 13501 WL_NAN_DPEND_E_TIMEOUT = 6, 13502 WL_NAN_DPEND_E_NO_ELT = 7, /* rx frame missing element container */ 13503 WL_NAN_DPEND_E_NO_NDP_ATTR = 8, 13504 WL_NAN_DPEND_E_NO_AVAIL_ATTR = 9, 13505 WL_NAN_DPEND_E_NO_NDC_ATTR = 10, 13506 WL_NAN_DPEND_E_NO_RANGE_BM = 11, 13507 WL_NAN_DPEND_E_INVALID_NDP_ATTR = 12, 13508 WL_NAN_DPEND_E_INVALID_NDC_ATTR = 13, 13509 WL_NAN_DPEND_E_INVALID_IMMUT = 14, 13510 WL_NAN_DPEND_E_INVALID_NDL_QOS = 15, 13511 WL_NAN_DPEND_E_INVALID_SEC_PARAMS = 16, 13512 WL_NAN_DPEND_E_REJECT_AVAIL = 17, 13513 WL_NAN_DPEND_E_REJECT_NDL = 18, 13514 WL_NAN_DPEND_E_SCB_NORESOURCE = 19 13515 }; 13516 13517 typedef int32 wl_nan_status_t; 13518 13519 /** nan cmd list entry */ 13520 enum wl_nan_sub_cmd_input_flags { 13521 WL_NAN_SUB_CMD_FLAG_NONE = 0, 13522 WL_NAN_SUB_CMD_FLAG_SKIP = 1, /* Skip to next sub-command on error */ 13523 WL_NAN_SUB_CMD_FLAG_TERMINATE = 2, /* Terminate processing and return */ 13524 WL_NAN_SUB_CMD_FLAG_LAST /* Keep this at the end */ 13525 }; 13526 13527 /** container for nan events */ 13528 typedef struct wl_nan_ioc { 13529 uint16 version; /**< interface command or event version */ 13530 uint16 id; /**< nan ioctl cmd ID */ 13531 uint16 len; /**< total length of all tlv records in data[] */ 13532 uint16 pad; /**< pad to be 32 bit aligment */ 13533 uint8 data []; /**< var len payload of bcm_xtlv_t type */ 13534 } wl_nan_ioc_t; 13535 13536 /* 13537 * NAN sub-command data structures 13538 */ 13539 13540 /* 13541 * Config component WL_NAN_CMD_CFG_XXXX sub-commands 13542 * WL_NAN_CMD_CFG_ENABLE 13543 */ 13544 enum wl_nan_config_state { 13545 WL_NAN_CONFIG_STATE_DISABLE = 0, 13546 WL_NAN_CONFIG_STATE_ENABLE = 1 13547 }; 13548 13549 typedef int8 wl_nan_config_state_t; 13550 13551 /* WL_NAN_CMD_CFG_NAN_INIT */ 13552 13553 typedef uint8 wl_nan_init_t; 13554 13555 /* WL_NAN_CMD_CFG_NAN_VERSION */ 13556 typedef uint16 wl_nan_ver_t; 13557 13558 /* WL_NAN_CMD_CFG_NAN_CONFIG */ 13559 typedef uint32 wl_nan_cfg_ctrl_t; 13560 13561 /* WL_NAN_CMD_CFG_NAN_CONFIG2 */ 13562 typedef struct wl_nan_cfg_ctrl2 { 13563 uint32 flags1; /* wl_nan_cfg_ctrl2_flags1 */ 13564 uint32 flags2; /* wl_nan_cfg_ctrl2_flags2 */ 13565 } wl_nan_cfg_ctrl2_t; 13566 13567 enum wl_nan_cfg_ctrl2_flags1 { 13568 /* Allows unicast SDF TX while local device is under NDP/NDL negotiation, 13569 * but Not with the peer SDF destined to. 13570 */ 13571 WL_NAN_CTRL2_FLAG1_ALLOW_SDF_TX_UCAST_IN_PROG = 0x00000001, 13572 /* Allows broadcast SDF TX while local device is under NDP/NDL negotiation */ 13573 WL_NAN_CTRL2_FLAG1_ALLOW_SDF_TX_BCAST_IN_PROG = 0x00000002, 13574 /* Allows the device to send schedule update automatically on local schedule change */ 13575 WL_NAN_CTRL2_FLAG1_AUTO_SCHEDUPD = 0x00000004, 13576 /* Allows the device to handle slot pre_close operations */ 13577 WL_NAN_CTRL2_FLAG1_SLOT_PRE_CLOSE = 0x00000008, 13578 /* Control flag to enable/disable NDPE capability */ 13579 WL_NAN_CTRL2_FLAG1_NDPE_CAP = 0x000000010, 13580 /* Control flag to enable/disable AUTO DAM LWT mode */ 13581 WL_NAN_CTRL2_FLAG1_AUTODAM_LWT_MODE = 0x000000020, 13582 /* Control flag to enable/disable PMK per NDP */ 13583 WL_NAN_CTRL2_FLAG1_PMK_PER_NDP = 0x000000040, 13584 /* Control flag to enable/disable allowing clear Schedule Update on Secured connection */ 13585 WL_NAN_CTRL2_FLAG1_SEC_ALLOW_CLEAR_SCHED_UPD_PKT = 0x000000080, 13586 /* Control flag to disable/enable 5G FAW */ 13587 WL_NAN_CTRL2_FLAG1_DISABLE_5G_FAW = 0x000000100, 13588 /* Control flag to disable/enable AUTO DAM 6G CAP */ 13589 WL_NAN_CTRL2_FLAG1_DISABLE_AUTODAM_6G_CAP = 0x000000200, 13590 /* Control flag to disable/enable allowing of unsecured OOB AF in a secured connection */ 13591 WL_NAN_CTRL2_FLAG1_ALLOW_UNSECURED_OOB_AF = 0x000000400, 13592 /* Control flag to enable/disable 6G FULL avail */ 13593 WL_NAN_CTRL2_FLAG1_6G_FULL_AVAIL = 0x000000800 13594 }; 13595 #define WL_NAN_CTRL2_FLAGS1_MASK 0x00000FFF 13596 13597 #define WL_NAN_CTRL2_FLAGS2_MASK 0x00000000 13598 13599 /* 13600 * WL_NAN_CMD_CFG_BAND, WL_NAN_CMD_CFG_RSSI_THRESHOLD(Get only) 13601 */ 13602 typedef uint8 wl_nan_band_t; 13603 13604 /* 13605 * WL_NAN_CMD_CFG_ROLE 13606 */ 13607 enum wl_nan_role { 13608 WL_NAN_ROLE_AUTO = 0, 13609 WL_NAN_ROLE_NON_MASTER_NON_SYNC = 1, 13610 WL_NAN_ROLE_NON_MASTER_SYNC = 2, 13611 WL_NAN_ROLE_MASTER = 3, 13612 WL_NAN_ROLE_ANCHOR_MASTER = 4 13613 }; 13614 13615 typedef uint8 wl_nan_role_t; 13616 13617 typedef struct wl_nan_device_state 13618 { 13619 wl_nan_role_t role; /* Sync Master, Non-Sync Master */ 13620 uint8 state; /* TBD */ 13621 uint8 hopcount; /* Hops to the Anchor Master */ 13622 struct ether_addr immediate_master; /* Master MAC */ 13623 struct ether_addr anchor_master; /* Anchor Master MAC */ 13624 struct ether_addr cluster_id; /* Cluster ID to which this device belongs to */ 13625 uint8 PAD[3]; 13626 uint32 tsf_high; /* NAN Cluster TSFs */ 13627 uint32 tsf_low; 13628 } wl_nan_device_state_t; 13629 13630 /* 13631 * WL_NAN_CMD_CFG_HOP_CNT, WL_NAN_CMD_CFG_HOP_LIMIT 13632 */ 13633 typedef uint8 wl_nan_hop_count_t; 13634 13635 /* 13636 * WL_NAN_CMD_CFG_WARMUP_TIME 13637 */ 13638 typedef uint32 wl_nan_warmup_time_ticks_t; 13639 13640 /* 13641 * WL_NAN_CMD_CFG_RSSI_THRESHOLD 13642 * rssi_close and rssi_mid are used to transition master to non-master 13643 * role by NAN state machine. rssi thresholds corresponding to the band 13644 * will be updated. 13645 */ 13646 /* To be deprecated */ 13647 typedef struct wl_nan_rssi_threshold { 13648 wl_nan_band_t band; 13649 int8 rssi_close; 13650 int8 rssi_mid; 13651 uint8 pad; 13652 } wl_nan_rssi_threshold_t; 13653 13654 /* WL_NAN_CMD_ELECTION_RSSI_THRESHOLD */ 13655 13656 typedef struct wl_nan_rssi_thld { 13657 int8 rssi_close_2g; 13658 int8 rssi_mid_2g; 13659 int8 rssi_close_5g; 13660 int8 rssi_mid_5g; 13661 } wl_nan_rssi_thld_t; 13662 13663 /* WL_NAN_CMD_DATA_MAX_PEERS */ 13664 13665 typedef uint8 wl_nan_max_peers_t; 13666 13667 /* 13668 * WL_NAN_CMD_CFG_STATUS 13669 */ 13670 13671 typedef enum wl_nan_election_mode { 13672 WL_NAN_ELECTION_RUN_BY_HOST = 1, 13673 WL_NAN_ELECTION_RUN_BY_FW = 2 13674 } wl_nan_election_mode_t; 13675 13676 typedef struct wl_nan_conf_status { 13677 struct ether_addr nmi; /* NAN mgmt interface address */ 13678 uint8 enabled; /* NAN is enabled */ 13679 uint8 role; /* Current nan sync role */ 13680 struct ether_addr cid; /* Current Cluster id */ 13681 uint8 social_chans[2]; /* Social channels */ 13682 uint8 mr[8]; /* Self Master Rank */ 13683 uint8 amr[8]; /* Anchor Master Rank */ 13684 uint32 ambtt; /* Anchor master beacon target time */ 13685 uint32 cluster_tsf_h; /* Current Cluster TSF High */ 13686 uint32 cluster_tsf_l; /* Current Cluster TSF Low */ 13687 uint8 election_mode; /* Election mode, host or firmware */ 13688 uint8 hop_count; /* Current Hop count */ 13689 uint8 imr[8]; /* Immediate Master Rank */ 13690 uint8 pad[4]; /* remove after precommit */ 13691 uint16 opt_tlvs_len; 13692 uint8 opt_tlvs[]; 13693 } wl_nan_conf_status_t; 13694 13695 /* 13696 * WL_NAN_CMD_CFG_OUI 13697 */ 13698 typedef struct wl_nan_oui_type { 13699 uint8 nan_oui[DOT11_OUI_LEN]; 13700 uint8 type; 13701 } wl_nan_oui_type_t; 13702 13703 /* 13704 * WL_NAN_CMD_CFG_COUNT 13705 */ 13706 typedef struct wl_nan_count { 13707 uint32 cnt_bcn_tx; /**< TX disc/sync beacon count */ 13708 uint32 cnt_bcn_rx; /**< RX disc/sync beacon count */ 13709 uint32 cnt_svc_disc_tx; /**< TX svc disc frame count */ 13710 uint32 cnt_svc_disc_rx; /**< RX svc disc frame count */ 13711 } wl_nan_count_t; 13712 /* 13713 * Election component WL_NAN_CMD_ELECTION_XXXX sub-commands 13714 * WL_NAN_CMD_ELECTION_HOST_ENABLE 13715 */ 13716 enum wl_nan_enable_flags { 13717 WL_NAN_DISABLE_FLAG_HOST_ELECTION = 0, 13718 WL_NAN_ENABLE_FLAG_HOST_ELECTION = 1 13719 }; 13720 13721 /* 13722 * 0 - disable host based election 13723 * 1 - enable host based election 13724 */ 13725 typedef uint8 wl_nan_host_enable_t; 13726 13727 /* 13728 * WL_NAN_CMD_ELECTION_METRICS_CONFIG 13729 */ 13730 /* Set only */ 13731 typedef struct wl_nan_election_metric_config { 13732 uint8 random_factor; /* Configured random factor */ 13733 uint8 master_pref; /* configured master preference */ 13734 uint8 pad[2]; 13735 } wl_nan_election_metric_config_t; 13736 13737 /* 13738 * WL_NAN_CMD_ELECTION_METRICS_STATE 13739 */ 13740 /* Get only */ 13741 typedef struct wl_nan_election_metric_state { 13742 uint8 random_factor; /* random factor used in MIs */ 13743 uint8 master_pref; /* Master advertised in MIs */ 13744 uint8 pad[2]; 13745 } wl_nan_election_metric_state_t; 13746 13747 /* 13748 * WL_NAN_CMD_ELECTION_LEAVE 13749 * WL_NAN_CMD_ELECTION_STOP 13750 */ 13751 typedef struct ether_addr wl_nan_cluster_id_t; 13752 13753 #define NHO_SEC_NCS_SK_REPLAY_CNT_LEN 8u 13754 /* kck */ 13755 #define NHO_SEC_NCS_SK_256_KCK_LEN 24u /* refer nan2 r21 7.1.4.1 */ 13756 /* kek */ 13757 #define NHO_SEC_NCS_SK_256_KEK_LEN 32u /* refer nan2 r21 7.1.4.1 */ 13758 /* tk */ 13759 #define NHO_SEC_NCS_SK_256_TK_LEN 32u /* refer nan2 r21 section 7 */ 13760 13761 #define NHO_SEC_NCS_SK_MAX_KEY_LEN (NHO_SEC_NCS_SK_256_KCK_LEN \ 13762 + NHO_SEC_NCS_SK_256_KEK_LEN \ 13763 + NHO_SEC_NCS_SK_256_TK_LEN) 13764 13765 #define NHO_SEC_KEY_INSTALL_FLAG (1 << 0) 13766 #define NHO_SEC_KEY_UNINSTALL_FLAG (1 << 1) 13767 13768 /* WL_NAN_XTLV_NANHO_SEC_SA */ 13769 typedef struct nanho_sec_sa { 13770 int8 csid; /* Cipher suite ID to identify the security type */ 13771 uint8 kck_len; /* KCK len in key_buf */ 13772 uint8 kek_len; /* KEK len in key_buf */ 13773 uint8 tk_len; /* Transient key len in key_buf */ 13774 uint16 flags; 13775 uint16 pad; 13776 struct ether_addr laddr; /* local mac addr */ 13777 struct ether_addr raddr; /* remote mac addr */ 13778 uint8 key_krc[NHO_SEC_NCS_SK_REPLAY_CNT_LEN]; /* Key Replay ctr */ 13779 uint8 key_buf[NHO_SEC_NCS_SK_MAX_KEY_LEN]; /* PTK = KCK + KEK + TK */ 13780 } nanho_sec_sa_t; 13781 13782 /* 13783 * WL_NAN_CMD_ELECTION_MERGE 13784 * 0 - disable cluster merge 13785 * 1 - enable cluster merge 13786 */ 13787 typedef uint8 wl_nan_merge_enable_t; 13788 13789 /* 13790 * WL_NAN_CMD_CFG_ROLE 13791 * role = 0 means configuration by firmware(obsolete); otherwise by host 13792 * when host configures role, also need target master address to sync to 13793 */ 13794 #define NAN_SYNC_MASTER_SELF 1 13795 #define NAN_SYNC_MASTER_USE_TIMING 2 /* Use the tsf timing provided */ 13796 #define NAN_SYNC_MASTER_AMREC_UPD 4 /* provide AM record update */ 13797 13798 /* 13799 struct ether_addr addr: 13800 when NAN_SYNC_MASTER_USE_TIMING is set, addr is the mac of Rx NAN beacon 13801 providing the timing info 13802 ltsf_h, ltsf_l: 13803 The local TSF timestamp filled in by FW in the WL_NAN_EVENT_BCN_RX event; 13804 rtsf_h, rtsf_l: 13805 The timestamp in the Rx beacon frame, filled in by host 13806 uint32 ambtt: 13807 the amtt in the cluster ID attribute in the Rx beacon frame 13808 */ 13809 13810 typedef struct nan_sync_master { 13811 uint8 flag; /* 1: self; 2: use TSF timing; 4: AMR update */ 13812 uint8 hop_count; 13813 struct ether_addr addr; 13814 struct ether_addr cluster_id; 13815 chanspec_t channel; /* bcn reception channel */ 13816 uint32 ltsf_h; 13817 uint32 ltsf_l; 13818 uint32 rtsf_h; 13819 uint32 rtsf_l; 13820 uint8 amr[WL_NAN_MASTER_RANK_LEN]; 13821 uint32 ambtt; 13822 } nan_sync_master_t; 13823 13824 #ifdef WLAWDL 13825 /* 13826 * NAN Sync TLV(NSTLV): 13827 * To keep NAN/AWDL concurrency time sync. 13828 * It is generated at hybrid device, and propogated by AWDL only device. 13829 * It contains the information needed to run NAN election 13830 */ 13831 #include <packed_section_start.h> 13832 typedef BWL_PRE_PACKED_STRUCT struct awdl_nan_sync_tlv { 13833 uint16 hop_count; /* total hop_count */ 13834 struct ether_addr src_addr; /* macaddr of the hybrid originator of nstlv */ 13835 struct ether_addr cluster_id; /* NAN cluster ID of hybrid originator of nstlv */ 13836 uint32 nan_tsf_h; /* NAN cluster TSF of the hybrid originator of nstlv */ 13837 uint32 nan_tsf_l; 13838 uint8 master_preference; 13839 uint8 random_factor; 13840 uint8 amr[WL_NAN_MASTER_RANK_LEN]; 13841 uint8 orig_hop_count; /* hop_count of the origin hybrid NAN device */ 13842 uint32 ambtt; /* Anchor Master Beacon Transmission Time */ 13843 uint8 opt_xtlv_len; /* xtlv len */ 13844 } BWL_POST_PACKED_STRUCT awdl_nan_sync_tlv_t; 13845 13846 typedef BWL_PRE_PACKED_STRUCT struct wl_awdl_nan_sync_tlv { 13847 uint8 type; /* 23 for NTLV */ 13848 uint16 param_len; 13849 awdl_nan_sync_tlv_t ntlv; 13850 } BWL_POST_PACKED_STRUCT wl_awdl_nan_sync_tlv_t; 13851 13852 /* External NAN sync TLV which can be used by other modules to pass NAN sync info */ 13853 typedef awdl_nan_sync_tlv_t external_nan_sync_tlv_t; 13854 #include <packed_section_end.h> 13855 #endif /* WLAWDL */ 13856 13857 /* NAN advertiser structure */ 13858 /* TODO RSDB: add chspec to indicates core corresponds correct core */ 13859 typedef struct nan_adv_entry { 13860 uint8 age; /* used to remove stale entries */ 13861 uint8 hop_count; /* for NTLV support, use bit7 for virtual NAN peer */ 13862 struct ether_addr addr; 13863 struct ether_addr cluster_id; 13864 chanspec_t channel; /* bcn reception channel */ 13865 uint32 ltsf_h; 13866 uint32 ltsf_l; 13867 uint32 rtsf_h; 13868 uint32 rtsf_l; 13869 uint8 amr[WL_NAN_MASTER_RANK_LEN]; 13870 uint32 ambtt; 13871 int8 rssi[NAN_MAX_BANDS]; /* rssi last af was received at */ 13872 int8 last_rssi[NAN_MAX_BANDS]; /* rssi in the last AF */ 13873 } nan_adv_entry_t; 13874 #define NAN_VIRTUAL_PEER_BIT 0x80 13875 13876 typedef enum { 13877 NAC_CNT_NTLV_AF_TX = 0, /* count of AF containing NTLV tx */ 13878 NAC_CNT_NTLV_AF_RX, /* count of AF containing NTLV rx */ 13879 NAC_CNT_NTLV_TMERR_TX, /* count of NTLV tx timing error */ 13880 NAC_CNT_NTLV_TMERR_RX, /* count of NTLV rx timing error */ 13881 NAC_CNT_NTLV_TM_MISMATCH, /* count of TopMaster mismatch in Rx NTLV processing */ 13882 NAC_CNT_NTLV_ADV_EXISTED, /* count of NTLV ignored bc advertiser existed from bcn */ 13883 NAC_CNT_NTLV_STALED_BCN, /* count of staled bcn from NTLV info */ 13884 NAC_CNT_NTLV_MERGE, /* count of NTLV used for NAN cluster merge */ 13885 NAC_CNT_NTLV_ELECTION_DROP, /* count of NTLV dropped in NAN election */ 13886 NAC_CNT_NTLV_TSF_ADOPT, /* count of NTLV used for NAN TSF adoption */ 13887 NAC_CNT_NTLV_LAST 13888 } nac_cnt_enum_t; 13889 13890 #define NAC_MAX_CNT (NAC_CNT_NTLV_LAST) 13891 13892 typedef struct nac_stats { 13893 uint32 nac_cnt[NAC_MAX_CNT]; 13894 } nac_stats_t; 13895 13896 typedef struct nan_adv_table { 13897 uint8 num_adv; 13898 uint8 adv_size; 13899 uint8 pad[2]; 13900 nan_adv_entry_t adv_nodes[0]; 13901 } nan_adv_table_t; 13902 13903 typedef struct wl_nan_role_cfg { 13904 wl_nan_role_t cfg_role; 13905 wl_nan_role_t cur_role; 13906 uint8 pad[2]; 13907 nan_sync_master_t target_master; 13908 } wl_nan_role_cfg_t; 13909 13910 typedef struct wl_nan_role_config { 13911 wl_nan_role_t role; 13912 struct ether_addr target_master; 13913 uint8 pad; 13914 } wl_nan_role_config_t; 13915 13916 typedef int8 wl_nan_sd_optional_field_types_t; 13917 13918 /* Flag bits for Publish and Subscribe (wl_nan_sd_params_t flags) */ 13919 13920 /* First 8 bits are blocked for mapping 13921 * against svc_control flag bits which goes out 13922 * as part of SDA attribute in air in SDF frames 13923 */ 13924 #define WL_NAN_RANGE_LIMITED 0x0040 13925 13926 /* Event generation indicator (default is continuous) */ 13927 13928 #define WL_NAN_MATCH_ONCE 0x100000 13929 #define WL_NAN_MATCH_NEVER 0x200000 13930 13931 /* Bits specific to Publish */ 13932 13933 #define WL_NAN_PUB_UNSOLICIT 0x1000 /* Unsolicited Tx */ 13934 #define WL_NAN_PUB_SOLICIT 0x2000 /* Solicited Tx */ 13935 #define WL_NAN_PUB_BOTH 0x3000 /* Both the above */ 13936 13937 #define WL_NAN_PUB_BCAST 0x4000 /* bcast solicited Tx only */ 13938 #define WL_NAN_PUB_EVENT 0x8000 /* Event on each solicited Tx */ 13939 #define WL_NAN_PUB_SOLICIT_PENDING 0x10000 /* Used for one-time solicited Publish */ 13940 13941 #define WL_NAN_FOLLOWUP 0x20000 /* Follow-up frames */ 13942 #define WL_NAN_TX_FOLLOWUP 0x40000 /* host generated transmit Follow-up frames */ 13943 13944 /* Bits specific to Subscribe */ 13945 13946 #define WL_NAN_SUB_ACTIVE 0x1000 /* Active subscribe mode */ 13947 #define WL_NAN_SUB_MATCH_IF_SVC_INFO 0x2000 /* Service info in publish */ 13948 13949 #define WL_NAN_TTL_UNTIL_CANCEL 0xFFFFFFFF /* Special values for time to live (ttl) parameter */ 13950 13951 /* 13952 * Publish - runs until first transmission 13953 * Subscribe - runs until first DiscoveryResult event 13954 */ 13955 #define WL_NAN_TTL_FIRST 0 13956 13957 /* Nan Service Based control Flags */ 13958 13959 /* If set, dev will take care of dp_resp */ 13960 #define WL_NAN_SVC_CTRL_AUTO_DPRESP 0x1000000 13961 13962 /* If set, host wont rec event "receive" */ 13963 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_RECEIVE 0x2000000 13964 13965 /* If set, host wont rec event "replied" */ 13966 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_REPLIED 0x4000000 13967 13968 /* If set, host wont rec event "terminated" */ 13969 #define WL_NAN_SVC_CTRL_SUPPRESS_EVT_TERMINATED 0x8000000 13970 13971 /* 13972 * WL_NAN_CMD_SD_PARAMS 13973 */ 13974 typedef struct wl_nan_sd_params 13975 { 13976 uint16 length; /* length including options */ 13977 uint8 period; /* period of the unsolicited SDF xmission in DWs */ 13978 uint8 awake_dw; /* interval between two DWs where SDF tx/rx are done */ 13979 uint8 svc_hash[WL_NAN_SVC_HASH_LEN]; /* Hash for the service name */ 13980 uint8 instance_id; /* Instance of the current service */ 13981 int8 proximity_rssi; /* RSSI limit to Rx subscribe or pub SDF 0 no effect */ 13982 uint32 flags; /* bitmap representing aforesaid optional flags */ 13983 int32 ttl; /* TTL for this instance id, -1 will run till cancelled */ 13984 tlv_t optional[1]; /* optional fields in the SDF as appropriate */ 13985 } wl_nan_sd_params_t; 13986 13987 /* 13988 * WL_NAN_CMD_SD_PUBLISH_LIST 13989 * WL_NAN_CMD_SD_SUBSCRIBE_LIST 13990 */ 13991 typedef struct wl_nan_service_info 13992 { 13993 uint8 instance_id; /* Publish instance ID */ 13994 uint8 service_hash[WL_NAN_SVC_HASH_LEN]; /* Hash for service name */ 13995 } wl_nan_service_info_t; 13996 13997 typedef struct wl_nan_service_list 13998 { 13999 uint16 id_count; /* Number of registered publish/subscribe services */ 14000 wl_nan_service_info_t list[1]; /* service info defined by nan_service instance */ 14001 } wl_nan_service_list_t; 14002 14003 /* 14004 * WL_NAN_CMD_CFG_BCN_INTERVAL 14005 */ 14006 typedef uint16 wl_nan_disc_bcn_interval_t; 14007 14008 /* 14009 * WL_NAN_CMD_CFG_SDF_TXTIME 14010 */ 14011 typedef uint16 wl_nan_svc_disc_txtime_t; 14012 14013 /* 14014 * WL_NAN_CMD_CFG_STOP_BCN_TX 14015 */ 14016 typedef uint16 wl_nan_stop_bcn_tx_t; 14017 14018 /* 14019 * WL_NAN_CMD_CFG_FSM_TIMEOUT 14020 */ 14021 typedef uint32 wl_nan_fsm_timeout_t; 14022 14023 /* 14024 * WL_NAN_CMD_CFG_SID_BEACON 14025 */ 14026 typedef struct wl_nan_sid_beacon_control { 14027 uint8 sid_enable; /* Flag to indicate the inclusion of Service IDs in Beacons */ 14028 uint8 sid_count; /* Limit for number of publish SIDs to be included in Beacons */ 14029 uint8 sub_sid_count; /* Limit for number of subscribe SIDs to be included in Beacons */ 14030 uint8 pad; 14031 } wl_nan_sid_beacon_control_t; 14032 14033 /* 14034 * WL_NAN_CMD_CFG_DW_LEN 14035 */ 14036 typedef uint16 wl_nan_dw_len_t; 14037 14038 /* 14039 * WL_NAN_CMD_CFG_AWAKE_DW Will be deprecated. 14040 */ 14041 typedef struct wl_nan_awake_dw { 14042 wl_nan_band_t band; /* 0 - b mode 1- a mode */ 14043 uint8 interval; /* 1 or 2 or 4 or 8 or 16 */ 14044 uint16 pad; 14045 } wl_nan_awake_dw_t; 14046 14047 /* 14048 * WL_NAN_CMD_CFG_AWAKE_DWS 14049 */ 14050 typedef struct wl_nan_awake_dws { 14051 uint8 dw_interval_2g; /* 2G DW interval */ 14052 uint8 dw_interval_5g; /* 5G DW interval */ 14053 uint16 pad; 14054 } wl_nan_awake_dws_t; 14055 14056 /* WL_NAN_CMD_SYNC_BCN_RSSI_NOTIF_THRESHOLD */ 14057 14058 typedef struct wl_nan_rssi_notif_thld { 14059 int8 bcn_rssi_2g; 14060 int8 bcn_rssi_5g; 14061 int16 pad; 14062 } wl_nan_rssi_notif_thld_t; 14063 14064 /* 14065 * WL_NAN_CMD_CFG_SOCIAL_CHAN 14066 */ 14067 typedef struct wl_nan_social_channels { 14068 uint8 soc_chan_2g; /* 2G social channel */ 14069 uint8 soc_chan_5g; /* 5G social channel */ 14070 uint16 pad; 14071 } wl_nan_social_channels_t; 14072 14073 /* 14074 * WL_NAN_CMD_SD_CANCEL_PUBLISH 14075 * WL_NAN_CMD_SD_CANCEL_SUBSCRIBE 14076 */ 14077 typedef uint8 wl_nan_instance_id; /* Instance ID of an active publish instance */ 14078 14079 /* 14080 * WL_NAN_CMD_SD_VND_INFO 14081 */ 14082 typedef struct wl_nan_sd_vendor_info 14083 { 14084 uint16 length; /* Size in bytes of the payload following this field */ 14085 uint8 data[]; /* Vendor Information */ 14086 } wl_nan_sd_vendor_info_t; 14087 14088 /* 14089 * WL_NAN_CMD_SD_STATS 14090 */ 14091 typedef struct wl_nan_sd_stats { 14092 uint32 sdftx; 14093 uint32 sdfrx; 14094 uint32 sdsrffail; 14095 uint32 sdrejrssi; 14096 uint32 sdfollowuprx; 14097 uint32 sdsubmatch; 14098 uint32 sdpubreplied; 14099 uint32 sdmftfail1; 14100 uint32 sdmftfail2; 14101 uint32 sdmftfail3; 14102 uint32 sdmftfail4; 14103 } wl_nan_sd_stats_t; 14104 14105 /* Flag bits for sd transmit message (wl_nan_sd_transmit_t flags) */ 14106 14107 /* If set, host wont rec "tx status" event for tx-followup msg */ 14108 #define WL_NAN_FUP_SUPR_EVT_TXS 0x01 14109 /* more flags can be added here */ 14110 14111 /* 14112 * WL_NAN_CMD_SD_TRANSMIT 14113 * WL_NAN_CMD_SD_FUP_TRANSMIT 14114 */ 14115 typedef struct wl_nan_sd_transmit { 14116 uint8 local_service_id; /* Sender Service ID */ 14117 uint8 requestor_service_id; /* Destination Service ID */ 14118 struct ether_addr destination_addr; /* Destination MAC */ 14119 uint16 token; /* follow_up_token when a follow-up 14120 * msg is queued successfully 14121 */ 14122 uint8 priority; /* requested relative prio */ 14123 uint8 flags; /* Flags for tx follow-up msg */ 14124 uint16 opt_len; /* total length of optional tlvs */ 14125 uint8 opt_tlv[]; /* optional tlvs in bcm_xtlv_t type */ 14126 } wl_nan_sd_transmit_t; 14127 14128 /* disc cache timeout for a cache entry */ 14129 typedef uint16 wl_nan_disc_cache_timeout_t; 14130 14131 /* 14132 * WL_NAN_CMD_SYNC_TSRESERVE 14133 */ 14134 /** time slot */ 14135 #define NAN_MAX_TIMESLOT 32 14136 typedef struct wl_nan_timeslot { 14137 uint32 abitmap; /**< available bitmap */ 14138 uint32 chanlist[NAN_MAX_TIMESLOT]; 14139 } wl_nan_timeslot_t; 14140 14141 /* 14142 * Deprecated 14143 * 14144 * WL_NAN_CMD_SYNC_TSRELEASE 14145 */ 14146 typedef uint32 wl_nan_ts_bitmap_t; 14147 14148 /* nan passive scan params */ 14149 #define NAN_SCAN_MAX_CHCNT 8 14150 /* nan merge scan params */ 14151 typedef struct wl_nan_scan_params { 14152 /* dwell time of discovery channel corresponds to band_idx. 14153 * If set to 0 then fw default will be used. 14154 */ 14155 uint16 dwell_time; 14156 /* scan period of discovery channel corresponds to band_idx. 14157 * If set to 0 then fw default will be used. 14158 */ 14159 uint16 scan_period; 14160 /* band index of discovery channel */ 14161 uint8 band_index; 14162 } wl_nan_scan_params_t; 14163 14164 /* 14165 * WL_NAN_CMD_DBG_SCAN 14166 */ 14167 typedef struct wl_nan_dbg_scan { 14168 struct ether_addr cid; 14169 uint8 pad[2]; 14170 } wl_nan_dbg_scan_t; 14171 14172 /* NAN_DBG_LEVEL */ 14173 typedef struct wl_nan_dbg_level { 14174 uint32 nan_err_level; /* for Error levels */ 14175 uint32 nan_dbg_level; /* for bebug logs and trace */ 14176 uint32 nan_info_level; /* for dumps like prhex */ 14177 } wl_nan_dbg_level_t; 14178 14179 /* 14180 * WL_NAN_CMD_DBG_EVENT_MASK 14181 */ 14182 typedef uint32 wl_nan_event_mask_t; 14183 14184 /* 14185 * WL_NAN_CMD_DBG_EVENT_CHECK 14186 */ 14187 typedef uint8 wl_nan_dbg_ifname[BCM_MSG_IFNAME_MAX]; 14188 14189 /* 14190 * WL_NAN_CMD_DBG_DUMP 14191 * WL_NAN_CMD_DBG_CLEAR 14192 */ 14193 enum wl_nan_dbg_dump_type { 14194 WL_NAN_DBG_DT_RSSI_DATA = 1, 14195 WL_NAN_DBG_DT_STATS_DATA = 2, 14196 /* 14197 * Additional enums before this line 14198 */ 14199 WL_NAN_DBG_DT_INVALID 14200 }; 14201 typedef int8 wl_nan_dbg_dump_type_t; 14202 14203 /** various params and ctl swithce for nan_debug instance */ 14204 /* 14205 * WL_NAN_CMD_DBG_DEBUG 14206 */ 14207 typedef struct wl_nan_debug_params { 14208 uint16 cmd; /**< debug cmd to perform a debug action */ 14209 uint16 status; 14210 uint32 msglevel; /**< msg level if enabled */ 14211 uint8 enabled; /**< runtime debuging enabled */ 14212 uint8 collect; 14213 uint8 PAD[2]; 14214 } wl_nan_debug_params_t; 14215 14216 typedef struct wl_nan_sched_svc_timeslot_s { 14217 uint32 abitmap; /* availability bitmap */ 14218 uint32 chanlist[NAN_MAX_TIMESLOT]; 14219 uint8 res; /* resolution: 0 = 16ms, 1 = 32ms, 2 = 64ms 3 = reserved. REfer NAN spec */ 14220 uint8 mapid; /* mapid from NAN spec. Used to differentiate 2G Vs 5G band */ 14221 uint8 PAD[2]; 14222 } wl_nan_sched_svc_timeslot_t; 14223 14224 /* 14225 * WL_NAN_CMD_DATA_DP_IDLE_PERIOD 14226 */ 14227 typedef uint16 wl_nan_ndp_idle_period_t; 14228 14229 /* 14230 * WL_NAN_CMD_DATA_DP_HB_DURATION 14231 */ 14232 typedef uint16 wl_nan_ndp_hb_duration_t; 14233 14234 /* nan cmd IDs */ 14235 enum wl_nan_cmds { 14236 /* nan cfg /disc & dbg ioctls */ 14237 WL_NAN_CMD_ENABLE = 1, 14238 WL_NAN_CMD_ATTR = 2, 14239 WL_NAN_CMD_NAN_JOIN = 3, 14240 WL_NAN_CMD_LEAVE = 4, 14241 WL_NAN_CMD_MERGE = 5, 14242 WL_NAN_CMD_STATUS = 6, 14243 WL_NAN_CMD_TSRESERVE = 7, 14244 WL_NAN_CMD_TSSCHEDULE = 8, 14245 WL_NAN_CMD_TSRELEASE = 9, 14246 WL_NAN_CMD_OUI = 10, 14247 WL_NAN_CMD_OOB_AF = 11, 14248 WL_NAN_CMD_SCAN_PARAMS = 12, 14249 14250 WL_NAN_CMD_COUNT = 15, 14251 WL_NAN_CMD_CLEARCOUNT = 16, 14252 14253 /* discovery engine commands */ 14254 WL_NAN_CMD_PUBLISH = 20, 14255 WL_NAN_CMD_SUBSCRIBE = 21, 14256 WL_NAN_CMD_CANCEL_PUBLISH = 22, 14257 WL_NAN_CMD_CANCEL_SUBSCRIBE = 23, 14258 WL_NAN_CMD_TRANSMIT = 24, 14259 WL_NAN_CMD_CONNECTION = 25, 14260 WL_NAN_CMD_SHOW = 26, 14261 WL_NAN_CMD_STOP = 27, /* stop nan for a given cluster ID */ 14262 /* nan debug iovars & cmds */ 14263 WL_NAN_CMD_SCAN = 47, 14264 WL_NAN_CMD_SCAN_RESULTS = 48, 14265 WL_NAN_CMD_EVENT_MASK = 49, 14266 WL_NAN_CMD_EVENT_CHECK = 50, 14267 WL_NAN_CMD_DUMP = 51, 14268 WL_NAN_CMD_CLEAR = 52, 14269 WL_NAN_CMD_RSSI = 53, 14270 14271 WL_NAN_CMD_DEBUG = 60, 14272 WL_NAN_CMD_TEST1 = 61, 14273 WL_NAN_CMD_TEST2 = 62, 14274 WL_NAN_CMD_TEST3 = 63, 14275 WL_NAN_CMD_DISC_RESULTS = 64, 14276 /* nan 2.0 data path commands */ 14277 WL_NAN_CMD_DATAPATH = 65 14278 }; 14279 14280 /* NAN DP interface commands */ 14281 enum wl_nan_dp_cmds { 14282 /* nan 2.0 ioctls */ 14283 WL_NAN_CMD_DP_CAP = 1000, 14284 WL_NAN_CMD_DP_CONFIG = 1001, 14285 WL_NAN_CMD_DP_CREATE = 1002, 14286 WL_NAN_CMD_DP_AUTO_CONNECT = 1003, 14287 WL_NAN_CMD_DP_DATA_REQ = 1004, 14288 WL_NAN_CMD_DP_DATA_RESP = 1005, 14289 WL_NAN_CMD_DP_SCHED_UPD = 1006, 14290 WL_NAN_CMD_DP_END = 1007, 14291 WL_NAN_CMD_DP_CONNECT = 1008, 14292 WL_NAN_CMD_DP_STATUS = 1009 14293 }; 14294 14295 /* TODO Should remove this fixed length */ 14296 #define WL_NAN_DATA_SVC_SPEC_INFO_LEN 32 /* arbitrary */ 14297 #define WL_NAN_DP_MAX_SVC_INFO 0xFF 14298 #define WL_NAN_DATA_NDP_INST_SUPPORT 16 14299 14300 /* Nan flags (16 bits) */ 14301 #define WL_NAN_DP_FLAG_SVC_INFO 0x0001 14302 #define WL_NAN_DP_FLAG_CONFIRM 0x0002 14303 #define WL_NAN_DP_FLAG_EXPLICIT_CFM 0x0004 14304 #define WL_NAN_DP_FLAG_SECURITY 0x0008 14305 #define WL_NAN_DP_FLAG_HAST_NDL_COUNTER 0x0010 /* Host assisted NDL counter */ 14306 14307 /* NAN Datapath host status */ 14308 #define WL_NAN_DP_STATUS_ACCEPTED 1 14309 #define WL_NAN_DP_STATUS_REJECTED 0 14310 14311 /* to be done */ 14312 typedef struct wl_nan_dp_cap { 14313 uint8 tbd; 14314 } wl_nan_dp_cap_t; 14315 14316 /** The service hash (service id) is exactly this many bytes. */ 14317 #define WL_NAN_SVC_HASH_LEN 6 14318 /** Number of hash functions per bloom filter */ 14319 #define WL_NAN_HASHES_PER_BLOOM 4 14320 /* no. of max last disc results */ 14321 #define WL_NAN_MAX_DISC_RESULTS 3 14322 14323 /* NAN security related defines */ 14324 /* NCS-SK related */ 14325 #define WL_NAN_NCS_SK_PMK_LEN 32 14326 #define WL_NAN_NCS_SK_PMKID_LEN 16 14327 14328 /* recent discovery results */ 14329 typedef struct wl_nan_disc_result_s 14330 { 14331 wl_nan_instance_id_t instance_id; /* instance id of pub/sub req */ 14332 wl_nan_instance_id_t peer_instance_id; /* peer instance id of pub/sub req/resp */ 14333 uint8 svc_hash[WL_NAN_SVC_HASH_LEN]; /* service descp string */ 14334 struct ether_addr peer_mac; /* peer mac address */ 14335 } wl_nan_disc_result_t; 14336 14337 /* list of recent discovery results */ 14338 typedef struct wl_nan_disc_results_s 14339 { 14340 wl_nan_disc_result_t disc_result[WL_NAN_MAX_DISC_RESULTS]; 14341 } wl_nan_disc_results_list_t; 14342 14343 /* nan 1.0 events */ 14344 /* To be deprecated - will be replaced by event_disc_result */ 14345 typedef struct wl_nan_ev_disc_result { 14346 wl_nan_instance_id_t pub_id; 14347 wl_nan_instance_id_t sub_id; 14348 struct ether_addr pub_mac; 14349 uint8 opt_tlvs[0]; 14350 } wl_nan_ev_disc_result_t; 14351 14352 typedef struct wl_nan_event_disc_result { 14353 wl_nan_instance_id_t pub_id; 14354 wl_nan_instance_id_t sub_id; 14355 struct ether_addr pub_mac; 14356 int8 publish_rssi; /* publisher RSSI */ 14357 uint8 attr_num; 14358 uint16 attr_list_len; /* length of the all the attributes in the SDF */ 14359 uint8 attr_list[0]; /* list of NAN attributes */ 14360 } wl_nan_event_disc_result_t; 14361 14362 typedef struct wl_nan_ev_p2p_avail { 14363 struct ether_addr sender; 14364 struct ether_addr p2p_dev_addr; 14365 uint8 dev_role; 14366 uint8 resolution; 14367 uint8 repeat; 14368 uint8 pad[3]; 14369 chanspec_t chanspec; 14370 uint32 avail_bmap; 14371 } wl_nan_ev_p2p_avail_t; 14372 14373 /* 14374 * discovery interface event structures * 14375 */ 14376 14377 enum wl_nan_oob_af_flags { 14378 WL_NAN_OOB_AF_FLAG_SEND_EVENT = 0x0001, /* send tx status event */ 14379 WL_NAN_OOB_AF_FLAG_FLUSH_PCB = 0x0002, /* flush PCB */ 14380 WL_NAN_OOB_AF_FLAG_ADD_DCAP = 0x0004, /* add dev cap attr into NAF body */ 14381 WL_NAN_OOB_AF_FLAG_ADD_ELMT = 0x0008, /* add elmt container attr into NAF body */ 14382 WL_NAN_OOB_AF_FLAG_MFP_REQUIRED = 0x0010 /* MFP required */ 14383 }; 14384 typedef uint16 wl_nan_oob_af_flags_t; 14385 14386 /* mandatory parameters for OOB action frame */ 14387 typedef struct wl_nan_oob_af_params_s 14388 { 14389 uint8 fup_lcl_id; /* local instance ID of follow-up SDF */ 14390 uint8 fup_peer_id; /* peer instance ID of follow-up SDF */ 14391 uint8 sdf_type; /* represented by service control type NAN_SC_XXX */ 14392 uint8 unused_uint8; 14393 uint32 unused_uint32; 14394 struct ether_addr bssid; 14395 struct ether_addr dest; 14396 uint32 pkt_lifetime; 14397 uint8 n2af_sub_type; /* NAN2 AF sub type */ 14398 uint8 retry_cnt; /* NAF tx retry (not 802.11 re-tx) */ 14399 uint16 token; /* NAN host seq num */ 14400 uint16 flags; /* wl_nan_oob_af_flags_t */ 14401 uint32 fsm_id; /* unique fsm id */ 14402 uint16 payload_len; 14403 uint8 payload[1]; 14404 } wl_nan_oob_af_params_t; 14405 14406 /* NAN Ranging */ 14407 14408 /* Bit defines for global flags */ 14409 #define WL_NAN_RANGING_ENABLE 1 /**< enable RTT */ 14410 #define WL_NAN_RANGING_RANGED 2 /**< Report to host if ranged as target */ 14411 typedef struct nan_ranging_config { 14412 uint32 chanspec; /**< Ranging chanspec */ 14413 uint16 timeslot; /**< NAN RTT start time slot 1-511 */ 14414 uint16 duration; /**< NAN RTT duration in ms */ 14415 struct ether_addr allow_mac; /**< peer initiated ranging: the allowed peer mac 14416 * address, a unicast (for one peer) or 14417 * a broadcast for all. Setting it to all zeros 14418 * means responding to none,same as not setting 14419 * the flag bit NAN_RANGING_RESPOND 14420 */ 14421 uint16 flags; 14422 } wl_nan_ranging_config_t; 14423 14424 /** list of peers for self initiated ranging */ 14425 /** Bit defines for per peer flags */ 14426 #define WL_NAN_RANGING_REPORT (1<<0) /**< Enable reporting range to target */ 14427 typedef struct nan_ranging_peer { 14428 uint32 chanspec; /**< desired chanspec for this peer */ 14429 uint32 abitmap; /**< available bitmap */ 14430 struct ether_addr ea; /**< peer MAC address */ 14431 uint8 frmcnt; /**< frame count */ 14432 uint8 retrycnt; /**< retry count */ 14433 uint16 flags; /**< per peer flags, report or not */ 14434 uint16 PAD; 14435 } wl_nan_ranging_peer_t; 14436 typedef struct nan_ranging_list { 14437 uint8 count; /**< number of MAC addresses */ 14438 uint8 num_peers_done; /**< host set to 0, when read, shows number of peers 14439 * completed, success or fail 14440 */ 14441 uint8 num_dws; /**< time period to do the ranging, specified in dws */ 14442 uint8 reserve; /**< reserved field */ 14443 wl_nan_ranging_peer_t rp[1]; /**< variable length array of peers */ 14444 } wl_nan_ranging_list_t; 14445 14446 /* ranging results, a list for self initiated ranging and one for peer initiated ranging */ 14447 /* There will be one structure for each peer */ 14448 #define WL_NAN_RANGING_STATUS_SUCCESS 1 14449 #define WL_NAN_RANGING_STATUS_FAIL 2 14450 #define WL_NAN_RANGING_STATUS_TIMEOUT 3 14451 #define WL_NAN_RANGING_STATUS_ABORT 4 /**< with partial results if sounding count > 0 */ 14452 typedef struct nan_ranging_result { 14453 uint8 status; /**< 1: Success, 2: Fail 3: Timeout 4: Aborted */ 14454 uint8 sounding_count; /**< number of measurements completed (0 = failure) */ 14455 struct ether_addr ea; /**< initiator MAC address */ 14456 uint32 chanspec; /**< Chanspec where the ranging was done */ 14457 uint32 timestamp; /**< 32bits of the TSF timestamp ranging was completed at */ 14458 uint32 distance; /**< mean distance in meters expressed as Q4 number. 14459 * Only valid when sounding_count > 0. Examples: 14460 * 0x08 = 0.5m 14461 * 0x10 = 1m 14462 * 0x18 = 1.5m 14463 * set to 0xffffffff to indicate invalid number 14464 */ 14465 int32 rtt_var; /**< standard deviation in 10th of ns of RTTs measured. 14466 * Only valid when sounding_count > 0 14467 */ 14468 struct ether_addr tgtea; /**< target MAC address */ 14469 uint8 PAD[2]; 14470 } wl_nan_ranging_result_t; 14471 typedef struct nan_ranging_event_data { 14472 uint8 mode; /**< 1: Result of host initiated ranging */ 14473 /* 2: Result of peer initiated ranging */ 14474 uint8 reserved; 14475 uint8 success_count; /**< number of peers completed successfully */ 14476 uint8 count; /**< number of peers in the list */ 14477 wl_nan_ranging_result_t rr[1]; /**< variable array of ranging peers */ 14478 } wl_nan_ranging_event_data_t; 14479 14480 enum { 14481 WL_NAN_STATS_RSSI = 1, 14482 WL_NAN_STATS_DATA = 2, 14483 WL_NAN_STATS_DP = 3, 14484 /* 14485 * ***** ADD before this line **** 14486 */ 14487 WL_NAN_STATS_INVALID 14488 }; 14489 typedef struct wl_nan_dp_stats { 14490 uint32 tbd; /* TBD */ 14491 } wl_nan_dp_stats_t; 14492 14493 typedef struct wl_nan_stats { 14494 /* general */ 14495 uint32 cnt_dw; /* DW slots */ 14496 uint32 cnt_disc_bcn_sch; /* disc beacon slots */ 14497 uint32 cnt_amr_exp; /* count of ambtt expiries resetting roles */ 14498 uint32 cnt_bcn_upd; /* count of beacon template updates */ 14499 uint32 cnt_bcn_tx; /* count of sync & disc bcn tx */ 14500 uint32 cnt_bcn_rx; /* count of sync & disc bcn rx */ 14501 uint32 cnt_sync_bcn_tx; /* count of sync bcn tx within DW */ 14502 uint32 cnt_disc_bcn_tx; /* count of disc bcn tx */ 14503 uint32 cnt_sdftx_bcmc; /* count of bcast/mcast sdf tx */ 14504 uint32 cnt_sdftx_uc; /* count of unicast sdf tx */ 14505 uint32 cnt_sdftx_fail; /* count of unicast sdf tx fails */ 14506 uint32 cnt_sdf_rx; /* count of sdf rx */ 14507 /* NAN roles */ 14508 uint32 cnt_am; /* anchor master */ 14509 uint32 cnt_master; /* master */ 14510 uint32 cnt_nms; /* non master sync */ 14511 uint32 cnt_nmns; /* non master non sync */ 14512 /* TX */ 14513 uint32 cnt_err_txtime; /* txtime in sync bcn frame not a multiple of dw intv */ 14514 uint32 cnt_err_unsch_tx; /* tx while not in DW/ disc bcn slot */ 14515 uint32 cnt_err_bcn_tx; /* beacon tx error */ 14516 uint32 cnt_sync_bcn_tx_miss; /* no. of times time delta between 2 cosequetive 14517 * sync beacons is more than expected 14518 */ 14519 /* MSCH */ 14520 uint32 cnt_err_msch_reg; /* error is Dw/disc reg with msch */ 14521 uint32 cnt_err_wrong_ch_cb; /* count of msch calbacks in wrong channel */ 14522 uint32 cnt_dw_skip; /* count of DW rejected */ 14523 uint32 cnt_disc_skip; /* count of disc bcn rejected */ 14524 uint32 cnt_dw_start_early; /* msch cb not at registered time */ 14525 uint32 cnt_dw_start_late; /* no. of delays in slot start */ 14526 /* SCANS */ 14527 uint32 cnt_mrg_scan; /* count of merge scans completed */ 14528 uint32 cnt_err_ms_rej; /* number of merge scan failed */ 14529 uint32 cnt_scan_results; /* no. of nan beacons scanned */ 14530 uint32 cnt_join_scan_rej; /* no. of join scans rejected */ 14531 uint32 cnt_nan_scan_abort; /* no. of join scans rejected */ 14532 /* enable/disable */ 14533 uint32 cnt_nan_enab; /* no. of times nan feature got enabled */ 14534 uint32 cnt_nan_disab; /* no. of times nan feature got disabled */ 14535 uint32 cnt_sync_bcn_rx; /* count of sync bcn rx within DW */ 14536 uint32 cnt_sync_bcn_rx_tu[3]; /* Delta bw the tsf in bcn & remote */ 14537 uint32 cnt_bcn_tx_out_dw; /* TX sync beacon outside dw */ 14538 uint32 cnt_role_am_dw; /* anchor master role due to dw */ 14539 uint32 cnt_am_hop_err; /* wrong hopcount set for AM */ 14540 } wl_nan_stats_t; 14541 14542 #define WL_NAN_MAC_MAX_NAN_PEERS 6 14543 #define WL_NAN_MAC_MAX_RSSI_DATA_PER_PEER 10 14544 14545 typedef struct wl_nan_nbr_rssi { 14546 uint8 rx_chan; /* channel number on which bcn rcvd */ 14547 uint8 PAD[3]; 14548 int32 rssi_raw; /* received rssi value */ 14549 int32 rssi_avg; /* normalized rssi value */ 14550 } wl_nan_peer_rssi_t; 14551 14552 typedef struct wl_nan_peer_rssi_entry { 14553 struct ether_addr mac; /* peer mac address */ 14554 uint8 flags; /* TODO:rssi data order: latest first, oldest first etc */ 14555 uint8 rssi_cnt; /* rssi data sample present */ 14556 wl_nan_peer_rssi_t rssi[WL_NAN_MAC_MAX_RSSI_DATA_PER_PEER]; /* RSSI data frm peer */ 14557 } wl_nan_peer_rssi_entry_t; 14558 14559 #define WL_NAN_PEER_RSSI 0x1 14560 #define WL_NAN_PEER_RSSI_LIST 0x2 14561 14562 typedef struct wl_nan_nbr_rssi_data { 14563 uint8 flags; /* this is a list or single rssi data */ 14564 uint8 peer_cnt; /* number of peers */ 14565 uint16 pad; /* padding */ 14566 wl_nan_peer_rssi_entry_t peers[1]; /* peers data list */ 14567 } wl_nan_peer_rssi_data_t; 14568 14569 /* WL_NAN_CMD_DBG_DUMP, GET Resp */ 14570 typedef struct wl_nan_dbg_dump_rsp { 14571 wl_nan_dbg_dump_type_t dump_type; /* dump data type */ 14572 uint8 pad[3]; 14573 union { 14574 wl_nan_peer_rssi_data_t peer_rssi; 14575 wl_nan_stats_t nan_stats; 14576 } u; 14577 } wl_nan_dbg_dump_rsp_t; 14578 14579 enum nan_termination_status { 14580 NAN_TERM_REASON_INVALID = 1, 14581 NAN_TERM_REASON_TIMEOUT = 2, 14582 NAN_TERM_REASON_USER_REQ = 3, 14583 NAN_TERM_REASON_FAILURE = 4, 14584 NAN_TERM_REASON_COUNT_REACHED = 5, 14585 NAN_TERM_REASON_DE_SHUTDOWN = 6, 14586 NAN_TERM_REASON_DISABLE_IN_PROGRESS = 7 14587 }; 14588 14589 /* nan2 data iovar */ 14590 /* nan2 qos */ 14591 typedef struct wl_nan_dp_qos 14592 { 14593 uint8 tid; 14594 uint8 pad; 14595 uint16 pkt_size; 14596 uint16 mean_rate; 14597 uint16 svc_interval; 14598 } wl_nan_dp_qos_t; 14599 14600 #define WL_NAN_NDL_QOS_MAX_LAT_NO_PREF 0xFFFF 14601 14602 /* nan2 qos */ 14603 typedef struct wl_nan_ndl_qos 14604 { 14605 uint8 min_slots; /* min slots per dw interval */ 14606 uint8 pad; 14607 uint16 max_latency; /* max latency */ 14608 } wl_nan_ndl_qos_t; 14609 14610 /* ndp config */ 14611 typedef struct wl_nan_ndp_config 14612 { 14613 uint8 ndp_id; 14614 uint8 pub_id; 14615 struct ether_addr pub_addr; 14616 struct ether_addr data_addr; /* configure local data addr */ 14617 struct ether_addr init_data_addr; /* initiator data addr */ 14618 uint8 svc_spec_info[WL_NAN_DATA_SVC_SPEC_INFO_LEN]; 14619 wl_nan_dp_qos_t qos; 14620 uint16 avail_len; 14621 uint8 pad[3]; 14622 uint8 data[1]; 14623 } wl_nan_ndp_config_t; 14624 14625 /* nan2 device capabilities */ 14626 typedef struct wl_nan_ndp_oper_cfg { 14627 uint8 awake_dw_2g; 14628 uint8 awake_dw_5g; 14629 uint8 bands_supported; 14630 uint8 op_mode; 14631 } wl_nan_ndp_oper_cfg_t; 14632 14633 typedef uint8 wl_nan_ndp_ndpid_t; 14634 typedef uint8 wl_nan_ndp_conn_t; 14635 14636 #define WL_NAN_INVALID_NDPID 0 /* reserved ndp id */ 14637 14638 typedef struct wl_nan_dp_req { 14639 uint8 type; /* 0- unicast 1 - multicast */ 14640 uint8 pub_id; /* Publisher ID */ 14641 uint16 flags; 14642 struct ether_addr peer_mac; /* Peer's NMI addr */ 14643 struct ether_addr mcast_mac; /* Multicast addr */ 14644 struct ether_addr ndi; 14645 wl_nan_dp_qos_t qos; 14646 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 14647 uint8 tlv_params[]; /* xtlv parameters for command */ 14648 } wl_nan_dp_req_t; 14649 14650 /* TODO Need to replace ndp_id with lndp_id */ 14651 /* Return structure to data req IOVAR */ 14652 typedef struct wl_nan_dp_req_ret { 14653 struct ether_addr indi; /* Initiators data mac addr */ 14654 uint8 ndp_id; /* Initiators ndpid */ 14655 uint8 pad; 14656 } wl_nan_dp_req_ret_t; 14657 14658 typedef struct wl_nan_dp_resp { 14659 uint8 type; /* 0- unicast 1 - multicast */ 14660 uint8 status; /* Accepted or Rejected */ 14661 uint8 reason_code; 14662 /* Local NDP ID for unicast, mc_id for multicast, 0 for implicit NMSG */ 14663 uint8 ndp_id; /* can be host indp id also */ 14664 wl_nan_dp_qos_t qos; 14665 /* Initiator data address for unicast or multicast address for multicast */ 14666 struct ether_addr mac_addr; 14667 struct ether_addr ndi; 14668 uint16 flags; 14669 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 14670 uint8 tlv_params[]; /* xtlv parameters for command */ 14671 } wl_nan_dp_resp_t; 14672 14673 /* Return structure to data resp IOVAR */ 14674 typedef struct wl_nan_dp_resp_ret { 14675 uint8 nmsgid; /* NMSG ID or for multicast else 0 */ 14676 uint8 pad[3]; 14677 } wl_nan_dp_resp_ret_t; 14678 14679 typedef struct wl_nan_dp_conf { 14680 uint8 lndp_id; /* can be host ndp id */ 14681 uint8 status; /* Accepted or Rejected */ 14682 uint8 pad[2]; 14683 } wl_nan_dp_conf_t; 14684 14685 /* WL_NAN_CMD_DATA_DATAEND */ 14686 typedef struct wl_nan_dp_end 14687 { 14688 uint8 lndp_id; /* can be host ndp id */ 14689 uint8 status; 14690 struct ether_addr mac_addr; /* initiator's ndi */ 14691 } wl_nan_dp_end_t; 14692 14693 /* wl_nan_dp_end_v2_t flags */ 14694 #define WL_NAN_DP_END_V2_FLAG_NO_TX 0x0001u 14695 #define WL_NAN_DP_END_V2_FLAG_NO_RETRY 0x0002u 14696 14697 /* WL_NAN_CMD_DATA_DATAEND_V2 */ 14698 typedef struct wl_nan_dp_end_v2 14699 { 14700 uint8 ndp_id; /* initiator's NDP ID or local NDP ID */ 14701 uint8 status; 14702 struct ether_addr indi; /* initiator's ndi */ 14703 uint16 flags; /* flags to enable/disable retry, etc. */ 14704 uint16 opt_len; /* total length of optional tlvs */ 14705 uint8 opt_tlv[]; /* optional tlvs in bcm_xtlv_t type */ 14706 } wl_nan_dp_end_v2_t; 14707 14708 typedef struct wl_nan_dp_schedupd { 14709 uint8 type; /* 0: unicast, 1: multicast */ 14710 uint8 flags; 14711 struct ether_addr addr; /* peer NMI or multicast addr */ 14712 wl_nan_dp_qos_t qos; 14713 wl_nan_ndl_qos_t ndl_qos; /* ndl qos */ 14714 uint8 map_id; 14715 uint8 pad; 14716 uint16 hostseq; 14717 } wl_nan_dp_schedupd_t; 14718 14719 /* set: update with notification, unset: NDL setup handshake */ 14720 #define WL_NAN_DP_SCHEDUPD_NOTIF (1 << 0) 14721 14722 /* list ndp ids */ 14723 typedef struct wl_nan_ndp_id_list { 14724 uint16 ndp_count; 14725 uint8 lndp_id[]; 14726 } wl_nan_ndp_id_list_t; 14727 14728 /* nan2 status */ 14729 typedef struct ndp_session { 14730 uint8 lndp_id; 14731 uint8 state; 14732 uint8 pub_id; 14733 uint8 pad; 14734 } ndp_session_t; 14735 14736 typedef struct wl_nan_ndp_status { 14737 struct ether_addr peer_nmi; 14738 struct ether_addr peer_ndi; 14739 ndp_session_t session; 14740 struct ether_addr lndi; 14741 uint8 pad[2]; 14742 } wl_nan_ndp_status_t; 14743 14744 #define NAN_DP_OPAQUE_INFO_DP_RESP 0x01 14745 #define NAN_DP_OPAQUE_INFO_DP_CONF 0x02 14746 14747 typedef struct wl_nan_dp_opaque_info { 14748 uint8 frm_mask; /* dp_resp / dp_conf as defined above. */ 14749 struct ether_addr initiator_ndi; /* NDI to match in the dp_req. */ 14750 uint8 pub_id; /* publish id where the opaque data is included. */ 14751 uint8 len; /* len of opaque_info[]. */ 14752 uint8 pad[3]; 14753 uint8 opaque_info[0]; 14754 } wl_nan_dp_opaque_info_t; 14755 14756 /* events */ 14757 #define NAN_DP_SESSION_UNICAST 0 14758 #define NAN_DP_SESSION_MULTICAST 1 14759 #define NAN_DP_SECURITY_NONE 0 14760 #define NAN_DP_SECURITY_CSID 1 14761 #define NAN_DP_SECURITY_MK 2 14762 #define WL_NAN_DATA_NMSGID_LEN 8 /* 8 bytes as per nan spec */ 14763 14764 /* DP TERM event causes */ 14765 #define WL_NAN_DP_TERM_WITH_INACTIVITY 1u 14766 #define WL_NAN_DP_TERM_WITH_FSM_DESTROY 2u 14767 #define WL_NAN_DP_TERM_WITH_PEER_DP_END 3u 14768 #define WL_NAN_DP_TERM_WITH_STALE_NDP 4u 14769 #define WL_NAN_DP_TERM_WITH_DISABLE 5u 14770 #define WL_NAN_DP_TERM_WITH_NDI_DEL 6u 14771 #define WL_NAN_DP_TERM_WITH_PEER_HB_FAIL 7u 14772 #define WL_NAN_DP_TERM_WITH_HOST_IOVAR 8u 14773 #define WL_NAN_DP_TERM_WITH_ESTB_FAIL 9u 14774 #define WL_NAN_DP_TERM_WITH_SCHED_REJECT 10u 14775 14776 /* Common event structure for Nan Datapath 14777 * Used for sending NDP Indication, Response, Confirmation, Securty Install and Establish events 14778 */ 14779 typedef struct wl_nan_ev_datapath_cmn { 14780 uint8 type; 14781 /* ndp_id is valid only if type is unicast */ 14782 uint8 ndp_id; 14783 uint8 pub_id; 14784 uint8 security; 14785 /* Following two fields are valid only if type is unicast */ 14786 struct ether_addr initiator_ndi; 14787 struct ether_addr responder_ndi; 14788 struct ether_addr peer_nmi; 14789 uint8 status; 14790 uint8 role; 14791 /* Following two fields are valid only if type is multicast */ 14792 uint8 nmsg_id[WL_NAN_DATA_NMSGID_LEN]; 14793 uint8 mc_id; 14794 uint8 event_cause; 14795 uint16 opt_tlv_len; 14796 uint8 opt_tlvs[]; 14797 } wl_nan_ev_datapath_cmn_t; 14798 14799 /* this is obsolete - DON'T USE */ 14800 typedef struct wl_nan_ev_datapath_end { 14801 uint8 ndp_id; 14802 uint8 status; 14803 uint8 pad[2]; 14804 struct ether_addr peer_nmi; 14805 struct ether_addr peer_ndi; 14806 } wl_nan_ev_datapath_end_t; 14807 14808 typedef struct wl_tsf { 14809 uint32 tsf_l; 14810 uint32 tsf_h; 14811 } wl_tsf_t; 14812 14813 typedef struct wl_nan_ev_rx_bcn { 14814 wl_tsf_t tsf; 14815 uint16 bcn_len; 14816 uint8 pad[2]; 14817 uint8 bcn[0]; 14818 } wl_nan_ev_rx_bcn_t; 14819 14820 /* reason of host assist request */ 14821 enum wl_nan_host_assist_reason { 14822 WL_NAN_HAST_REASON_NONE = 0, 14823 14824 /* reason for host assist request */ 14825 WL_NAN_HAST_REASON_NO_CRB = 1, /* NDL: no common NA */ 14826 WL_NAN_HAST_REASON_NDC = 2, /* NDL: NDC not compliant */ 14827 WL_NAN_HAST_REASON_IMMUT = 3, /* NDL: peer immutable schedule */ 14828 WL_NAN_HAST_REASON_RNG = 4, /* NDL: ranging schedule */ 14829 WL_NAN_HAST_REASON_QOS = 5, /* NDL: QoS not satisfied */ 14830 WL_NAN_HAST_REASON_SVC_NDI_MISSING = 6, /* SD: SVC NDI missing */ 14831 WL_NAN_HAST_REASON_PEER_SCB_NORESOURCE = 7, /* NDP: no more peer scb available */ 14832 WL_NAN_HAST_REASON_NDP_PMK_MISSING = 8, /* NDP: PMK needed from host */ 14833 WL_NAN_HAST_REASON_SVC_NDI_AND_PMK_MISSING = 9 /* PMK and SVC NDI needed from host */ 14834 }; 14835 typedef uint8 wl_nan_host_assist_reason_t; 14836 14837 /* WL_NAN_XTLV_HOST_ASSIST_REQ */ 14838 typedef struct wl_nan_host_assist_req { 14839 struct ether_addr peer_nmi; /* peer nmi */ 14840 struct ether_addr initiator_ndi; /* initiator ndi */ 14841 uint8 indp_id; /* initiator NDP ID */ 14842 wl_nan_frame_type_t frm_type; /* received NAF type */ 14843 wl_nan_host_assist_reason_t reason; /* reason of host assist request */ 14844 uint8 pub_id; /* Publish ID (valid for WL_NAN_FRM_TYPE_DP_REQ) */ 14845 uint8 pad[2]; 14846 } wl_nan_host_assist_req_t; 14847 14848 /* nan sub-features */ 14849 enum wl_nan_fw_cap_flag1 { 14850 WL_NAN_FW_CAP_FLAG_NONE = 0x00000000, /* dummy */ 14851 WL_NAN_FW_CAP_FLAG1_AVAIL = 0x00000001, 14852 WL_NAN_FW_CAP_FLAG1_DISC = 0x00000002, 14853 WL_NAN_FW_CAP_FLAG1_DATA = 0x00000004, 14854 WL_NAN_FW_CAP_FLAG1_SEC = 0x00000008, 14855 WL_NAN_FW_CAP_FLAG1_RANGE = 0x00000010, 14856 WL_NAN_FW_CAP_FLAG1_WFA_TB = 0x00000020, 14857 WL_NAN_FW_CAP_FLAG1_DAM = 0x00000040, 14858 WL_NAN_FW_CAP_FLAG1_DAM_STRICT = 0x00000080, 14859 WL_NAN_FW_CAP_FLAG1_DAM_AUTO = 0x00000100, 14860 WL_NAN_FW_CAP_FLAG1_DBG = 0x00000200, 14861 WL_NAN_FW_CAP_FLAG1_BCMC_IN_NDC = 0x00000400, 14862 WL_NAN_FW_CAP_FLAG1_CHSTATS = 0x00000800, 14863 WL_NAN_FW_CAP_FLAG1_ASSOC_COEX = 0x00001000, 14864 WL_NAN_FW_CAP_FLAG1_FASTDISC = 0x00002000, 14865 WL_NAN_FW_CAP_FLAG1_NO_ID_GEN = 0x00004000, 14866 WL_NAN_FW_CAP_FLAG1_DP_OPAQUE_DATA = 0x00008000, 14867 WL_NAN_FW_CAP_FLAG1_NSR2 = 0x00010000, 14868 WL_NAN_FW_CAP_FLAG1_NSR2_SAVE = 0x00020000, 14869 WL_NAN_FW_CAP_FLAG1_NANHO = 0x00040000, 14870 WL_NAN_FW_CAP_FLAG1_NDPE = 0x00080000, 14871 WL_NAN_FW_CAP_FLAG1_OOB_AF = 0x00100000, 14872 WL_NAN_FW_CAP_FLAG1_PMK_PER_NDP = 0x00200000 14873 }; 14874 14875 /* WL_NAN_XTLV_GEN_FW_CAP */ 14876 typedef struct wl_nan_fw_cap { 14877 uint32 flags1; /* nan sub-features compiled in firmware */ 14878 uint32 flags2; /* for more sub-features in future */ 14879 uint8 max_svc_publishes; /* max num of service publish */ 14880 uint8 max_svc_subscribes; /* max num of service subscribe */ 14881 uint8 max_lcl_sched_maps; /* max num of local schedule map */ 14882 uint8 max_lcl_ndc_entries; /* max num of local NDC entry */ 14883 uint8 max_lcl_ndi_interfaces; /* max num of local NDI interface */ 14884 uint8 max_peer_entries; /* max num of peer entry */ 14885 uint8 max_ndp_sessions; /* max num of NDP session */ 14886 uint8 max_concurrent_nan_clusters; /* max num of concurrent clusters */ 14887 uint16 max_service_name_len; /* max service name length */ 14888 uint16 max_match_filter_len; /* max match filter length */ 14889 uint16 max_total_match_filter_len; /* max total match filter length */ 14890 uint16 max_service_specific_info_len; /* max service specific info length */ 14891 uint16 max_vsa_data_len; /* max vendor specific attrib data length */ 14892 uint16 max_mesh_data_len; /* max mesh data length */ 14893 uint16 max_app_info_len; /* max app info length */ 14894 uint16 max_sdea_svc_specific_info_len; /* max sdea ser specific info length */ 14895 uint8 max_queued_tx_followup_msgs; /* max no. of queued tx followup msgs */ 14896 uint8 max_subscribe_address; /* max subscribe addresses supported */ 14897 uint8 ndp_supported_bands; /* number of ndp supported bands */ 14898 uint8 is_ndp_security_supported; /* if secure ndp is supported */ 14899 uint8 cipher_suites_supported_mask; /* bitmask for suites supported */ 14900 uint8 pad[3]; 14901 } wl_nan_fw_cap_t; 14902 14903 /* WL_NAN_XTLV_GEN_FW_CAP_V2 */ 14904 typedef struct wl_nan_fw_cap_v2 { 14905 uint32 flags1; /* nan sub-features compiled in firmware */ 14906 uint32 flags2; /* for more sub-features in future */ 14907 uint8 max_svc_publishes; /* max num of service publish */ 14908 uint8 max_svc_subscribes; /* max num of service subscribe */ 14909 uint8 max_lcl_sched_maps; /* max num of local schedule map */ 14910 uint8 max_lcl_ndc_entries; /* max num of local NDC entry */ 14911 uint8 max_lcl_ndi_interfaces; /* max num of local NDI interface */ 14912 uint8 max_peer_entries; /* max num of peer entry */ 14913 uint8 max_peer_sched_maps; /* max num of peer schedule maps */ 14914 uint8 max_ndp_sessions; /* max num of NDP session */ 14915 uint32 cipher_suites_supported_mask; /* bitmask for supported cipher suites */ 14916 uint32 reserved_uint32_1; /* reserved for future sub-features */ 14917 uint32 reserved_uint32_2; /* reserved for future sub-features */ 14918 uint32 reserved_uint32_3; /* reserved for future sub-features */ 14919 uint32 reserved_uint32_4; /* reserved for future sub-features */ 14920 } wl_nan_fw_cap_v2_t; 14921 14922 /* nan cipher suite support mask bits */ 14923 #define WL_NAN_CIPHER_SUITE_SHARED_KEY_128_MASK 0x01 14924 #define WL_NAN_CIPHER_SUITE_SHARED_KEY_256_MASK 0x02 14925 14926 /* NAN Save Restore */ 14927 #define WL_NAN_NSR2_INFO_MAX_SIZE 2048 /* arbitrary */ 14928 14929 /* WL_NAN_XTLV_NSR2_PEER */ 14930 typedef struct wl_nan_nsr_peer_info { 14931 struct ether_addr nmi; 14932 uint8 l_min_slots; /* local QoS min slots */ 14933 uint8 p_min_slots; /* peer QoS min slots */ 14934 uint16 l_max_latency; /* local QoS max latency */ 14935 uint16 p_max_latency; /* peer QoS max latency */ 14936 uint8 num_map; /* num of NA map */ 14937 uint8 pad; 14938 uint16 attrs_len; /* total len of following attrs */ 14939 uint8 attrs[]; /* peer attributes (NA/NDC/ULW/DevCap/Element container) */ 14940 } wl_nan_nsr_peer_info_t; 14941 14942 enum wl_nan_nsr_ndp_flag { 14943 WL_NAN_NSR_NDP_FLAG_LCL_INITATOR = 0x0001, 14944 WL_NAN_NSR_NDP_FLAG_MCAST = 0x0002 14945 }; 14946 typedef uint16 wl_nan_nsr_ndp_flag_t; 14947 14948 /* WL_NAN_XTLV_NSR2_NDP */ 14949 typedef struct wl_nan_nsr_ndp_info { 14950 struct ether_addr peer_nmi; 14951 struct ether_addr peer_ndi; 14952 struct ether_addr lcl_ndi; 14953 uint16 flags; /* wl_nan_nsr_ndp_flag_t */ 14954 uint8 pub_id; /* publish id */ 14955 uint8 indp_id; /* initiator's ndp id */ 14956 uint8 last_token; /* last NDP dialog token */ 14957 uint8 pad; 14958 } wl_nan_nsr_ndp_info_t; 14959 14960 /* NAN2.0 Ranging definitions */ 14961 14962 /* result indication bit map */ 14963 #define NAN_RANGE_INDICATION_NONE 0 14964 #define NAN_RANGE_INDICATION_CONT (1<<0) 14965 #define NAN_RANGE_INDICATION_INGRESS (1<<1) 14966 #define NAN_RANGE_INDICATION_EGRESS (1<<2) 14967 14968 /* responder flags */ 14969 #define NAN_RANGE_FLAG_AUTO_ACCEPT (1 << 0) 14970 #define NAN_RANGE_FLAG_RESULT_REQUIRED (1 << 1) 14971 14972 typedef struct wl_nan_range_req { 14973 struct ether_addr peer; 14974 uint8 publisher_id; 14975 uint8 indication; /* bit map for result event */ 14976 uint32 resolution; /* default millimeters */ 14977 uint32 ingress; /* ingress limit in mm */ 14978 uint32 egress; /* egress limit in mm */ 14979 uint32 interval; /* max interval(in TU) b/w two ranging measurements */ 14980 } wl_nan_range_req_t; 14981 14982 #define NAN_RNG_REQ_IOV_LEN 24 14983 14984 typedef uint8 wl_nan_range_id; 14985 14986 typedef struct wl_nan_range_resp { 14987 wl_nan_range_id range_id; 14988 uint8 flags; /* auto response, range result required */ 14989 uint8 status; /* accept, reject */ 14990 uint8 indication; /* bit map for result event */ 14991 uint32 resolution; /* default millimeters */ 14992 uint32 ingress; /* ingress limit in mm */ 14993 uint32 egress; /* egress limit in mm */ 14994 uint32 interval; /* max interval(in TU) b/w two ranging measurements */ 14995 } wl_nan_range_resp_t; 14996 14997 #define NAN_RNG_RESP_IOV_LEN 20 14998 14999 #define NAN_RNG_TERM_FLAG_IMMEDIATE (1u << 0u) /* Do not wait for TXS */ 15000 #define NAN_RNG_TERM_FLAG_SILENT_TEARDOWN (1u << 1u) /* Do not TX rng_term */ 15001 #define NAN_RNG_TERM_FLAG_EVENT_HOST (1u << 2u) /* Notify event to host */ 15002 #define NAN_RNG_TERM_FLAG_OPT_TLVS (1u << 3u) /* opt tlvs present */ 15003 15004 typedef struct wl_nan_range_cancel_ext { 15005 wl_nan_range_id range_id; 15006 uint8 flags; 15007 uint8 pad[2]; 15008 } wl_nan_range_cancel_ext_t; 15009 15010 #define NAN_RNG_CANCEL_IOV_FIXED_LEN 4u 15011 15012 #define NAN_RNG_MAX_IOV_LEN 255 15013 15014 typedef struct wl_nan_ev_rng_req_ind { 15015 struct ether_addr peer_m_addr; 15016 uint8 rng_id; 15017 /* ftm parameters */ 15018 uint8 max_burst_dur; 15019 uint8 min_ftm_delta; 15020 uint8 max_num_ftm; 15021 uint8 ftm_format_bw; 15022 /* location info availability bit map */ 15023 uint8 lc_info_avail; 15024 /* Last movement indication */ 15025 uint16 last_movement; 15026 uint8 pad[2]; 15027 } wl_nan_ev_rng_req_ind_t; 15028 15029 #define NAN_RNG_REQ_IND_SIZE 14 15030 15031 typedef struct wl_nan_ev_rng_rpt_ind { 15032 uint32 dist_mm; /* in millimeter */ 15033 struct ether_addr peer_m_addr; 15034 uint8 indication; /* indication definitions mentioned above */ 15035 uint8 rng_id; 15036 } wl_nan_ev_rng_rpt_ind_t; 15037 15038 #define NAN_RNG_RPT_IND_SIZE 12 15039 15040 /* number of continuous ranging crbs which can be idle, 15041 * after which ranging session will be terminated. 15042 * Default value is 5. Set to zero for disabling the 15043 * idle timeout functionality 15044 */ 15045 typedef uint8 wl_nan_range_idle_count_t; 15046 15047 /* nan ranging termination reason codes */ 15048 #define NAN_RNG_TERM_REASON_CODE_BASE 100u 15049 #define NAN_RNG_TERM_REASON_CODE(reason_code) \ 15050 (NAN_RNG_TERM_REASON_CODE_BASE + (reason_code)) 15051 15052 /* Reason Code Unspecified */ 15053 #define NAN_RNG_TERM_UNSPECIFIED NAN_RNG_TERM_REASON_CODE(0u) 15054 /* no ftms from peer */ 15055 #define NAN_RNG_TERM_IDLE_TIMEOUT NAN_RNG_TERM_REASON_CODE(1u) 15056 /* On Peer Termination */ 15057 #define NAN_RNG_TERM_PEER_REQ NAN_RNG_TERM_REASON_CODE(2u) 15058 /* On User or Host Termination */ 15059 #define NAN_RNG_TERM_USER_REQ NAN_RNG_TERM_REASON_CODE(3u) 15060 /* On FSM Timeout, waiting for Resp from peer */ 15061 #define NAN_RNG_TERM_RNG_RESP_TIMEOUT NAN_RNG_TERM_REASON_CODE(4u) 15062 /* On range resp, reject from peer */ 15063 #define NAN_RNG_TERM_RNG_RESP_REJ NAN_RNG_TERM_REASON_CODE(5u) 15064 /* On range req/resp txs fail */ 15065 #define NAN_RNG_TERM_RNG_TXS_FAIL NAN_RNG_TERM_REASON_CODE(6u) 15066 15067 typedef struct wl_nan_ev_rng_term_ind { 15068 struct ether_addr peer_m_addr; 15069 uint8 reason_code; 15070 uint8 rng_id; 15071 } wl_nan_ev_rng_term_ind_t; 15072 15073 #define NAN_RNG_TERM_IND_SIZE 8 15074 15075 typedef struct wl_nan_ev_rng_resp { 15076 struct ether_addr peer_m_addr; 15077 uint8 status; 15078 uint8 rng_id; 15079 } wl_nan_ev_rng_resp_t; 15080 15081 /* Used by NDL schedule events - 15082 * WL_NAN_EVENT_PEER_SCHED_UPD_NOTIF, WL_NAN_EVENT_PEER_SCHED_REQ 15083 * WL_NAN_EVENT_PEER_SCHED_RESP, WL_NAN_EVENT_PEER_SCHED_CONF 15084 */ 15085 typedef struct wl_nan_ev_sched_info { 15086 struct ether_addr peer_nmi; 15087 uint8 ndl_status; /* applies only to sched resp/conf */ 15088 uint8 pad; 15089 uint16 opt_tlv_len; 15090 uint8 opt_tlvs[]; 15091 } wl_nan_ev_sched_info_t; 15092 15093 /* WL_NAN_EVENT_CHAN_BOUNDARY */ 15094 typedef struct wl_nan_chbound_info { 15095 uint32 cluster_tsf_h; /* Current Cluster TSF High */ 15096 uint32 cluster_tsf_l; /* Current Cluster TSF Low */ 15097 uint16 cur_chspec; 15098 uint16 opt_tlvs_len; 15099 uint8 opt_tlvs[]; 15100 } wl_nan_chbound_info_t; 15101 15102 /* channel stats (includes nan & non-nan) */ 15103 15104 /* WL_NAN_XTLV_CCA_STATS */ 15105 typedef struct wl_nan_cca_stats { 15106 uint16 chanspec; 15107 uint8 pad[2]; 15108 uint32 sample_dur; 15109 15110 uint32 congest_ibss; 15111 uint32 congest_obss; 15112 uint32 interference; 15113 } wl_nan_cca_stats_t; 15114 15115 /* WL_NAN_XTLV_PER_STATS */ 15116 typedef struct wl_nan_per_stats_s { 15117 uint16 chanspec; 15118 uint8 pad[2]; 15119 uint32 sample_dur; 15120 15121 uint32 txframe; /* tx data frames */ 15122 uint32 txretrans; /* tx mac retransmits */ 15123 uint32 txerror; /* tx data errors */ 15124 uint32 txctl; /* tx management frames */ 15125 uint32 txserr; /* tx status errors */ 15126 15127 uint32 rxframe; /* rx data frames */ 15128 uint32 rxerror; /* rx data errors */ 15129 uint32 rxctl; /* rx management frames */ 15130 15131 uint32 txbar; /* tx bar */ 15132 uint32 rxbar; /* rx bar */ 15133 uint32 txaction; /* tx action frame */ 15134 uint32 rxaction; /* rx action frame */ 15135 uint32 txlost; /* lost packets reported in txs */ 15136 uint32 rxback; /* rx block ack */ 15137 uint32 txback; /* tx bloak ack */ 15138 } wl_nan_per_stats_t; 15139 15140 /* fast discovery beacon config 15141 * WL_NAN_XTLV_CFG_FDISC_TBMP 15142 */ 15143 typedef struct wl_nan_fastdisc_s { 15144 uint8 id; 15145 uint8 bitmap_len; 15146 uint8 pad[2]; 15147 uint8 bitmap[]; 15148 } wl_nan_fastdisc_t; 15149 15150 #define WL_NAN_FASTDISC_CFG_SIZE 1024 /* arbitrary */ 15151 15152 #ifdef WL_NANHO 15153 /* ****************** NAN Host offload specific strucures ****************** */ 15154 15155 enum wl_nan_rx_mgmt_frm_type { 15156 WL_NAN_RX_MGMT_FRM_BCN = 0, 15157 WL_NAN_RX_MGMT_FRM_SDF = 1, 15158 WL_NAN_RX_MGMT_FRM_NAF = 2 15159 }; 15160 typedef uint8 wl_nan_rx_mgmt_frm_type_t; 15161 15162 /* WL_NAN_EVENT_RX_MGMT_FRM */ 15163 typedef struct wl_nan_event_rx_mgmt_frm { 15164 uint8 frm_type; /* wl_nan_rx_mgmt_frm_type_t */ 15165 uint8 pad; 15166 uint16 frm_len; 15167 uint8 frm[]; 15168 } wl_nan_event_rx_mgmt_frm_t; 15169 15170 #define WL_NAN_NANHO_UPDATE_MAX_SIZE 2048 /* arbitrary */ 15171 15172 enum wl_nan_peer_entry_action { 15173 WL_NAN_PEER_ENTRY_ACT_ADD = 0, /* add peer entry */ 15174 WL_NAN_PEER_ENTRY_ACT_REMOVE = 1 /* remove peer entry */ 15175 }; 15176 typedef uint8 wl_nan_peer_entry_action_t; 15177 15178 /* WL_NAN_XTLV_NANHO_PEER_ENTRY */ 15179 typedef struct wl_nan_peer_entry 15180 { 15181 struct ether_addr nmi; /* nmi of peer device */ 15182 uint8 action; /* wl_nan_peer_entry_action_t */ 15183 uint8 pad; 15184 } wl_nan_peer_entry_t; 15185 15186 enum wl_nan_dcaplist_action { 15187 WL_NAN_DCAPLIST_ACT_UPDATE = 0, /* update or add */ 15188 WL_NAN_DCAPLIST_ACT_REMOVE = 1 /* remove (only for peer dcap cache entry) */ 15189 }; 15190 typedef uint8 wl_nan_dcaplist_action_t; 15191 15192 /* WL_NAN_XTLV_NANHO_DCAPLIST */ 15193 typedef struct wl_nan_dev_cap_list 15194 { 15195 struct ether_addr nmi; /* null for local device */ 15196 uint8 action; /* wl_nan_dcaplist_action_t */ 15197 /* optional fields for WL_NAN_DCAPLIST_ACT_UPDATE */ 15198 uint8 num_maps; 15199 uint8 dcap[]; /* list of nan_dev_cap_t */ 15200 } wl_nan_dev_cap_list_t; 15201 15202 typedef struct wl_nan_dev_chan_sched { 15203 uint16 num_slots; /* number of slot in schedule */ 15204 uint16 period; /* period of channel schedule (TU) */ 15205 uint8 slot_dur; /* slot duration (TU) */ 15206 uint8 map_id; /* map id (TBD) */ 15207 uint8 pad[2]; 15208 uint8 data[]; 15209 /* chanspec_t chan_sched[num_slot] */ 15210 /* uint8 slot_info[num_slot] */ 15211 } wl_nan_dev_chan_sched_t; 15212 15213 /* WL_NAN_XTLV_NANHO_DCSLIST */ 15214 typedef struct wl_nan_dev_chan_sched_list { 15215 struct ether_addr nmi; /* null for local device */ 15216 uint8 num_maps; 15217 uint8 pad; 15218 wl_nan_dev_chan_sched_t dcs[]; 15219 } wl_nan_dev_chan_sched_list_t; 15220 15221 /* WL_NAN_XTLV_NANHO_BLOB */ 15222 typedef struct wl_nan_dev_blob { 15223 struct ether_addr nmi; /* null for local device */ 15224 uint16 blob_len; /* blob len in blob[] buffer */ 15225 uint8 blob_type; 15226 uint8 pad[3]; 15227 uint8 blob[]; 15228 } wl_nan_dev_blob_t; 15229 15230 typedef struct wl_nan_peer_ndl_state { 15231 struct ether_addr nmi; 15232 uint8 ndl_state; /* nan_peer_ndl_state_t */ 15233 uint8 pad; 15234 } wl_nan_peer_ndl_state_t; 15235 15236 enum wl_nan_ndp_state_action { 15237 WL_NAN_NDP_STATE_ACT_ESTABLISHED = 0, 15238 WL_NAN_NDP_STATE_ACT_TERMINATED = 1 15239 }; 15240 typedef uint8 wl_nan_ndp_state_action_t; 15241 15242 /* WL_NAN_XTLV_NANHO_NDP_STATE */ 15243 typedef struct wl_nan_ndp_state { 15244 struct ether_addr peer_nmi; 15245 struct ether_addr peer_ndi; 15246 struct ether_addr lcl_ndi; 15247 uint8 action; /* wl_nan_ndp_state_action_t */ 15248 uint8 pad; 15249 /* TODO: secured NDP information */ 15250 } wl_nan_ndp_state_t; 15251 15252 /* *************** end of NAN Host offload specific strucures ************** */ 15253 #endif /* WL_NANHO */ 15254 15255 /* ********************* end of NAN section ******************************** */ 15256 /* endif WL_NAN */ 15257 15258 #define P2P_NAN_IOC_BUFSZ 512 /* some sufficient ioc buff size */ 15259 #define WL_P2P_NAN_IOCTL_VERSION 0x1 15260 15261 /* container for p2p nan iovtls & events */ 15262 typedef struct wl_p2p_nan_ioc { 15263 uint16 version; /* interface command or event version */ 15264 uint16 id; /* p2p nan ioctl cmd ID */ 15265 uint16 len; /* total length of data[] */ 15266 uint16 pad; /* padding */ 15267 uint8 data []; /* var len payload of bcm_xtlv_t type */ 15268 } wl_p2p_nan_ioc_t; 15269 15270 /* p2p nan cmd IDs */ 15271 enum wl_p2p_nan_cmds { 15272 /* p2p nan cfg ioctls */ 15273 WL_P2P_NAN_CMD_ENABLE = 1, 15274 WL_P2P_NAN_CMD_CONFIG = 2, 15275 WL_P2P_NAN_CMD_DEL_CONFIG = 3, 15276 WL_P2P_NAN_CMD_GET_INSTS = 4 15277 }; 15278 15279 #define WL_P2P_NAN_CONFIG_VERSION 1 15280 15281 #define WL_P2P_NAN_DEVICE_P2P 0x0 15282 #define WL_P2P_NAN_DEVICE_GO 0x1 15283 #define WL_P2P_NAN_DEVICE_GC 0x2 15284 #define WL_P2P_NAN_DEVICE_INVAL 0xFF 15285 15286 /* NAN P2P operation */ 15287 typedef struct p2p_nan_config { 15288 uint16 version; /* wl_p2p_nan_config_t structure version */ 15289 uint16 len; /* total length including version and variable IE */ 15290 uint32 flags; /* 0x1 to NEW, 0x2 to ADD, 0x4 to DEL */ 15291 uint8 inst_id; /* publisher/subscriber id */ 15292 uint8 inst_type; /* publisher/subscriber */ 15293 uint8 dev_role; /* P2P device role: 'P2P','GO' or 'GC' */ 15294 uint8 pad1; /* padding */ 15295 uint8 resolution; /* Availability bitmap resolution */ 15296 uint8 repeat; /* Whether Availabilty repeat across DW */ 15297 uint16 ie_len; /* variable ie len */ 15298 struct ether_addr dev_mac; /* P2P device addres */ 15299 uint16 pad2; /* Padding */ 15300 uint32 avail_bmap; /* availability interval bitmap */ 15301 uint32 chanspec; /* Chanspec */ 15302 uint8 ie[]; /* hex ie data */ 15303 } wl_p2p_nan_config_t; 15304 15305 #define WL_P2P_NAN_SERVICE_LIST_VERSION 1 15306 typedef enum wl_nan_service_type { 15307 WL_NAN_SVC_INST_PUBLISHER = 1, 15308 WL_NAN_SVC_INST_SUBSCRIBER = 2 15309 } wl_nan_service_type_t; 15310 15311 #define WL_P2P_NAN_CONFIG_NEW 0x1 15312 #define WL_P2P_NAN_CONFIG_ADD 0x2 15313 #define WL_P2P_NAN_CONFIG_DEL 0x4 15314 15315 typedef struct wl_nan_svc_inst { 15316 uint8 inst_id; /* publisher/subscriber id */ 15317 uint8 inst_type; /* publisher/subscriber */ 15318 } wl_nan_svc_inst_t; 15319 15320 typedef struct wl_nan_svc_inst_list { 15321 uint16 version; /* this structure version */ 15322 uint16 len; /* total length including version and variable svc list */ 15323 uint16 count; /* service instance count */ 15324 uint16 pad; /* padding */ 15325 wl_nan_svc_inst_t svc[1]; /* service instance list */ 15326 } wl_nan_svc_inst_list_t; 15327 15328 #define NAN_POST_DISC_P2P_DATA_VER 1 15329 /* This structure will be used send peer p2p data with 15330 * NAN discovery result 15331 */ 15332 typedef struct nan_post_disc_p2p_data { 15333 uint8 ver; /* this structure version */ 15334 uint8 dev_role; /* P2P Device role */ 15335 uint8 resolution; /* Availability bitmap resolution */ 15336 uint8 repeat; /* Whether Availabilty repeat across DW */ 15337 struct ether_addr dev_mac; /* P2P device addres */ 15338 uint16 pad1; /* Padding */ 15339 uint32 chanspec; /* Chanspec */ 15340 uint32 avl_bmp; /* availability interval bitmap */ 15341 } nan_post_disc_p2p_data_t; 15342 15343 enum { 15344 WL_AVAIL_NONE = 0x0000, 15345 WL_AVAIL_LOCAL = 0x0001, 15346 WL_AVAIL_PEER = 0x0002, 15347 WL_AVAIL_NDC = 0x0003, 15348 WL_AVAIL_IMMUTABLE = 0x0004, 15349 WL_AVAIL_RESPONSE = 0x0005, 15350 WL_AVAIL_COUNTER = 0x0006, 15351 WL_AVAIL_RANGING = 0x0007, 15352 WL_AVAIL_UPD_POT = 0x0008, /* modify potential, keep committed/conditional */ 15353 WL_AVAIL_UPD_COM_COND = 0x0009, /* modify committed/conditional, keep potential */ 15354 WL_AVAIL_REMOVE_MAP = 0x000A, /* remove map */ 15355 WL_AVAIL_FRM_TYPE = 0x000B, /* specify frame types containing NA */ 15356 WL_AVAIL_TYPE_MAX = WL_AVAIL_FRM_TYPE /* New ones before and update */ 15357 }; 15358 #define WL_AVAIL_TYPE_MASK 0x000F 15359 #define WL_AVAIL_FLAG_REMOVE 0x2000 /* remove schedule attr of given type & map id */ 15360 #define WL_AVAIL_FLAG_SELECTED_NDC 0x4000 15361 #define WL_AVAIL_FLAG_RAW_MODE 0x8000 15362 #define WL_AVAIL_FLAGS_MASK 0xFF00 15363 #define WL_AVAIL_FLAGS_SHIFT 8 15364 15365 typedef int16 wl_avail_flags_t; 15366 15367 /* availability entry flags */ 15368 enum { 15369 WL_AVAIL_ENTRY_NONE = 0x0000, 15370 WL_AVAIL_ENTRY_COM = 0x0001, /* committed */ 15371 WL_AVAIL_ENTRY_POT = 0x0002, /* potential */ 15372 WL_AVAIL_ENTRY_COND = 0x0004, /* conditional */ 15373 WL_AVAIL_ENTRY_PAGED = 0x0008, /* P-NDL */ 15374 WL_AVAIL_ENTRY_USAGE = 0x0030, /* usage preference */ 15375 WL_AVAIL_ENTRY_BIT_DUR = 0x00C0, /* bit duration */ 15376 WL_AVAIL_ENTRY_BAND_PRESENT = 0x0100, /* band present */ 15377 WL_AVAIL_ENTRY_CHAN_PRESENT = 0x0200, /* channel information present */ 15378 WL_AVAIL_ENTRY_CHAN_ENTRY_PRESENT = 0x0400, /* channel entry (opclass+bitmap) */ 15379 /* free to use 0x0800 */ 15380 WL_AVAIL_ENTRY_RXNSS = 0xF000 /* max num of spatial stream RX */ 15381 }; 15382 15383 /* bit duration */ 15384 enum { 15385 WL_AVAIL_BIT_DUR_16 = 0, /* 16TU */ 15386 WL_AVAIL_BIT_DUR_32 = 1, /* 32TU */ 15387 WL_AVAIL_BIT_DUR_64 = 2, /* 64TU */ 15388 WL_AVAIL_BIT_DUR_128 = 3, /* 128TU */ 15389 }; 15390 15391 /* period */ 15392 enum { 15393 WL_AVAIL_PERIOD_0 = 0, /* 0TU */ 15394 WL_AVAIL_PERIOD_128 = 1, /* 128TU */ 15395 WL_AVAIL_PERIOD_256 = 2, /* 256TU */ 15396 WL_AVAIL_PERIOD_512 = 3, /* 512TU */ 15397 WL_AVAIL_PERIOD_1024 = 4, /* 1024TU */ 15398 WL_AVAIL_PERIOD_2048 = 5, /* 2048TU */ 15399 WL_AVAIL_PERIOD_4096 = 6, /* 4096TU */ 15400 WL_AVAIL_PERIOD_8192 = 7, /* 8192TU */ 15401 }; 15402 15403 /* band */ 15404 enum { 15405 WL_AVAIL_BAND_NONE = 0, /* reserved */ 15406 WL_AVAIL_BAND_SUB1G = 1, /* sub-1 GHz */ 15407 WL_AVAIL_BAND_2G = 2, /* 2.4 GHz */ 15408 WL_AVAIL_BAND_3G = 3, /* reserved (for 3.6 GHz) */ 15409 WL_AVAIL_BAND_5G = 4, /* 4.9 and 5 GHz */ 15410 WL_AVAIL_BAND_60G = 5, /* reserved (for 60 GHz) */ 15411 }; 15412 15413 #define WL_AVAIL_ENTRY_TYPE_MASK 0x000F 15414 #define WL_AVAIL_ENTRY_USAGE_MASK 0x0030 /* up to 4 usage preferences */ 15415 #define WL_AVAIL_ENTRY_USAGE_SHIFT 4 15416 #define WL_AVAIL_ENTRY_USAGE_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_USAGE_MASK) \ 15417 >> WL_AVAIL_ENTRY_USAGE_SHIFT) 15418 15419 #define WL_AVAIL_ENTRY_BIT_DUR_MASK 0x00C0 /* 0:16TU, 1:32TU, 2:64TU, 3:128TU */ 15420 #define WL_AVAIL_ENTRY_BIT_DUR_SHIFT 6 15421 #define WL_AVAIL_ENTRY_BIT_DUR_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_BIT_DUR_MASK) \ 15422 >> WL_AVAIL_ENTRY_BIT_DUR_SHIFT) 15423 15424 #define WL_AVAIL_ENTRY_BAND_MASK 0x0100 /* 0=band not present, 1=present */ 15425 #define WL_AVAIL_ENTRY_BAND_SHIFT 8 15426 15427 #define WL_AVAIL_ENTRY_CHAN_MASK 0x0200 /* 0=channel info not present, 1=present */ 15428 #define WL_AVAIL_ENTRY_CHAN_SHIFT 9 15429 15430 #define WL_AVAIL_ENTRY_CHAN_ENTRY_MASK 0x0400 /* 0=chanspec, 1=hex channel entry */ 15431 #define WL_AVAIL_ENTRY_CHAN_ENTRY_SHIFT 10 15432 15433 #define WL_AVAIL_ENTRY_RXNSS_MASK 0xF000 15434 #define WL_AVAIL_ENTRY_RXNSS_SHIFT 12 15435 #define WL_AVAIL_ENTRY_RXNSS_VAL(_flags) (((_flags) & WL_AVAIL_ENTRY_RXNSS_MASK) \ 15436 >> WL_AVAIL_ENTRY_RXNSS_SHIFT) 15437 #define WL_AVAIL_ENTRY_RXNSS_MAX 15 /* 0-15 */ 15438 15439 /* mask for channel_entry (to be obsoleted) */ 15440 #define WL_AVAIL_ENTRY_OPCLASS_MASK 0xFF 15441 #define WL_AVAIL_ENTRY_CHAN_BITMAP_MASK 0xFF00 15442 #define WL_AVAIL_ENTRY_CHAN_BITMAP_SHIFT 8 15443 #define WL_AVAIL_ENTRY_CHAN_BITMAP_VAL(_info) (((_info) & WL_AVAIL_ENTRY_CHAN_BITMAP_MASK) \ 15444 >> WL_AVAIL_ENTRY_CHAN_BITMAP_SHIFT) 15445 15446 /* Used for raw channel entry field input */ 15447 #define MAX_CHAN_ENTRY_LEN 6 15448 15449 typedef struct wl_avail_entry { 15450 uint16 length; /* total length */ 15451 uint16 start_offset; /* in TUs, multiply by 16 for total offset */ 15452 union { 15453 uint32 channel_info; /* either chanspec or hex channel entry (opclass + 15454 * bitmap per NAN spec), as indicated by setting 15455 * WL_AVAIL_ENTRY_HEX_CHAN_ENTRY flag 15456 */ 15457 uint32 band; /* defined by WL_BAND enum, 2=2.4GHz, 4=5GHz */ 15458 uint8 channel_entry[MAX_CHAN_ENTRY_LEN]; 15459 uint8 align[8]; /* aligned len of union in structure (not for use) 15460 * if member of union is changed, 15461 * update length of align[] accordingly. 15462 */ 15463 } u; /* band or channel value, 0=all band/channels */ 15464 uint8 sched_map_id; /* avail map id associated with sched entry */ 15465 uint8 pad; 15466 uint8 period; /* in TUs, defined by WL_AVAIL_PERIOD enum 15467 * 1:128, 2:256, 3:512, 4:1024, 5:2048, 6:4096, 15468 * 7:8192 15469 */ 15470 uint8 bitmap_len; 15471 uint16 flags; /* defined by avail entry flags enum: 15472 * type, usage pref, bit duration, rx nss, 15473 * and band, channel or channel entry 15474 */ 15475 uint8 bitmap[]; /* time bitmap */ 15476 } wl_avail_entry_t; 15477 15478 #define WL_AVAIL_VERSION 1 /* current wl_avail version */ 15479 15480 typedef struct wl_avail { 15481 uint16 length; /* total length */ 15482 uint16 flags; /* LSB - avail type (defined by WL_AVAIL enum) 15483 * MSB - avail flags 15484 */ 15485 uint8 id; /* id used for multiple maps/avail */ 15486 uint8 lndc_id; /* ndc id used in multi-ndc case */ 15487 uint8 version; 15488 uint8 pad; 15489 struct ether_addr addr; /* peer mac address or ndc id */ 15490 uint8 num_entries; 15491 uint8 unused_byte; 15492 /* add additional fields above this line */ 15493 uint8 entry[]; 15494 } wl_avail_t; 15495 15496 #define WL_AVAIL_MIN_LEN(n) ((n) ? OFFSETOF(wl_avail_t, entry) + \ 15497 ((n) * OFFSETOF(wl_avail_entry_t, bitmap)) : 0) 15498 15499 /* unaligned schedule (window) */ 15500 typedef struct wl_avail_ulw { 15501 uint8 id; /* schedule ID */ 15502 uint8 overwrite; /* bit 0: overwrite all 15503 * 1-4: map ID if overwrite all is 0 15504 */ 15505 uint16 flags; 15506 uint32 start; /* start time of first ULW, in us */ 15507 uint32 dur; /* duration of ULW, in us */ 15508 uint32 period; /* time between consecutive ULWs, in us */ 15509 union { 15510 uint32 chanspec; 15511 uint32 band; 15512 uint8 chan_entry[MAX_CHAN_ENTRY_LEN]; 15513 uint8 pad[8]; 15514 } u; 15515 uint8 cntdwn; /* remaining ULWs before schedule ends */ 15516 uint8 pad[3]; 15517 } wl_avail_ulw_t; 15518 15519 /* unset: NAN is not available during ULW, set: NAN is avail depending on ctrl flags */ 15520 #define WL_NAN_ULW_CTRL_PRESENT (1 << 0) 15521 /* unset: band, set: channel */ 15522 #define WL_NAN_ULW_CTRL_TYPE (1 << 1) 15523 /* set: NAN is availabile on specified band/channel */ 15524 #define WL_NAN_ULW_CTRL_AVAIL (1 << 2) 15525 /* channel is provided in raw attribute format */ 15526 #define WL_NAN_ULW_CTRL_RAW_CHAN (1 << 3) 15527 15528 /* nan wfa testmode operations */ 15529 enum { 15530 WL_NAN_WFA_TM_IGNORE_TERMINATE_NAF = 0x00000001, 15531 WL_NAN_WFA_TM_IGNORE_RX_DATA_OUTSIDE_CRB = 0x00000002, 15532 WL_NAN_WFA_TM_ALLOW_TX_DATA_OUTSIDE_CRB = 0x00000004, 15533 WL_NAN_WFA_TM_ENFORCE_NDL_COUNTER = 0x00000008, 15534 WL_NAN_WFA_TM_BYPASS_NDL_PROPOSAL_VALIDATION = 0x00000010, 15535 /* allow data(pings) tx while ndp sec negotiation */ 15536 WL_NAN_WFA_TM_SEC_SEND_PINGS_BYPASS_NDP_SM = 0x00000020, 15537 /* generate and insert incorrect mic */ 15538 WL_NAN_WFA_TM_SEC_INCORRECT_MIC = 0x00000040, 15539 /* send m4 reject deliberately */ 15540 WL_NAN_WFA_TM_SEC_REJECT_STATUS4M4 = 0x00000080, 15541 /* send mgmt frame (for eg. ndp terminate) in clear txt (bypass security) */ 15542 WL_NAN_WFA_TM_SEC_SEND_MGMT_CLEAR = 0x00000100, 15543 /* validate qos */ 15544 WL_NAN_WFA_TM_NDL_QOS_VALIDATE = 0x00000200, 15545 /* firmware generated schedule update */ 15546 WL_NAN_WFA_TM_GEN_SCHED_UPD = 0x00000400, 15547 /* add lower 4-bytes of TSF to configured start time */ 15548 WL_NAN_WFA_TM_ULW_START_TIME = 0x00000800, 15549 /* enable schedule validation for SDF */ 15550 WL_NAN_WFA_TM_SDF_SCHED_VALIDATE = 0x00001000, 15551 /* by pass faw na iovar */ 15552 WL_NAN_WFA_TM_SKIP_RAW_NA_BLOB = 0x00002000, 15553 /* overwrite local NA with peer NA in received frame */ 15554 WL_NAN_WFA_TM_LOCAL_NA_OVERWRITE = 0x00004000, 15555 /* randomize and self configure ndl qos(needed at responder in auto mode) */ 15556 WL_NAN_WFA_TM_SELF_CFG_NDL_QOS = 0x00008000, 15557 /* send NAF frames only in DW */ 15558 WL_NAN_WFA_TM_SEND_NAF_IN_DW = 0x00010000, 15559 /* restrict channels used for countered slots to Ch 6/149 only */ 15560 WL_NAN_WFA_TM_RESTRICT_COUNTER_SLOTS_CHAN = 0x00020000, 15561 /* NDPE negative test case (4.2.5 & 4.2.6) */ 15562 WL_NAN_WFA_TM_NDPE_NEGATIVE_TEST_TB = 0x00040000, 15563 /* Set NDPE(NAN3.0) capable bit in dev cap attr */ 15564 WL_NAN_WFA_TM_ENABLE_NDPE_CAP = 0x00080000, 15565 /* NDPE negative test case (4.2.5.2). Enable both NDP and NDPE attributes */ 15566 WL_NAN_WFA_TM_ENABLE_NDP_NDPE_ATTR = 0x00100000, 15567 15568 /* add above & update mask */ 15569 WL_NAN_WFA_TM_FLAG_MASK = 0x001FFFFF 15570 }; 15571 typedef uint32 wl_nan_wfa_testmode_t; 15572 15573 /* To be removed; replaced by wl_nan_vndr_payload */ 15574 typedef struct wl_nan_vndr_ie { 15575 uint32 flags; /* bitmask indicating which packet(s) contain this IE */ 15576 uint16 body_len; /* length of body (does not include oui field) */ 15577 uint8 pad[2]; 15578 uint8 oui[DOT11_OUI_LEN]; 15579 uint8 pad2; 15580 uint8 body[]; /* vendor IE payload */ 15581 } wl_nan_vndr_ie_t; 15582 15583 typedef struct wl_nan_vndr_payload { 15584 uint32 flags; /* bitmask indicating which packet(s) contain payload */ 15585 uint16 payload_len; /* length of payload */ 15586 uint8 pad[2]; 15587 uint8 payload[]; /* payload to be appended to NAN frame */ 15588 } wl_nan_vndr_payload_t; 15589 15590 typedef struct wl_nan_dev_cap { 15591 uint8 bands[NAN_MAX_BANDS]; 15592 uint8 awake_dw[NAN_MAX_BANDS]; 15593 uint8 overwrite_mapid[NAN_MAX_BANDS]; 15594 uint8 mapid; /* dev cap mapid */ 15595 uint8 all_maps; /* applies to device */ 15596 uint8 paging; 15597 uint8 pad[3]; 15598 } wl_nan_dev_cap_t; 15599 15600 /* arbitrary max len for frame template */ 15601 #define WL_NAN_FRM_TPLT_MAX_LEN 1024 15602 15603 typedef struct wl_nan_frm_tplt { 15604 wl_nan_frame_type_t type; 15605 uint8 pad; 15606 uint16 len; /* length of template */ 15607 uint8 data[]; /* template */ 15608 } wl_nan_frm_tplt_t; 15609 15610 #define RSSI_THRESHOLD_SIZE 16 15611 #define MAX_IMP_RESP_SIZE 256 15612 15613 typedef struct wl_proxd_rssi_bias { 15614 int32 version; /**< version */ 15615 int32 threshold[RSSI_THRESHOLD_SIZE]; /**< threshold */ 15616 int32 peak_offset; /**< peak offset */ 15617 int32 bias; /**< rssi bias */ 15618 int32 gd_delta; /**< GD - GD_ADJ */ 15619 int32 imp_resp[MAX_IMP_RESP_SIZE]; /**< (Hi*Hi)+(Hr*Hr) */ 15620 } wl_proxd_rssi_bias_t; 15621 15622 typedef struct wl_proxd_rssi_bias_avg { 15623 int32 avg_threshold[RSSI_THRESHOLD_SIZE]; /**< avg threshold */ 15624 int32 avg_peak_offset; /**< avg peak offset */ 15625 int32 avg_rssi; /**< avg rssi */ 15626 int32 avg_bias; /**< avg bias */ 15627 } wl_proxd_rssi_bias_avg_t; 15628 15629 #include <packed_section_start.h> 15630 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_info { 15631 uint16 type; /**< type: 0 channel table, 1 channel smoothing table, 2 and 3 seq */ 15632 uint16 index; /**< The current frame index, from 1 to total_frames. */ 15633 uint16 tof_cmd; /**< M_TOF_CMD */ 15634 uint16 tof_rsp; /**< M_TOF_RSP */ 15635 uint16 tof_avb_rxl; /**< M_TOF_AVB_RX_L */ 15636 uint16 tof_avb_rxh; /**< M_TOF_AVB_RX_H */ 15637 uint16 tof_avb_txl; /**< M_TOF_AVB_TX_L */ 15638 uint16 tof_avb_txh; /**< M_TOF_AVB_TX_H */ 15639 uint16 tof_id; /**< M_TOF_ID */ 15640 uint8 tof_frame_type; 15641 uint8 tof_frame_bw; 15642 int8 tof_rssi; 15643 int32 tof_cfo; 15644 int32 gd_adj_ns; /**< gound delay */ 15645 int32 gd_h_adj_ns; /**< group delay + threshold crossing */ 15646 int16 nfft; /**< number of samples stored in H */ 15647 uint8 num_max_cores; 15648 15649 } BWL_POST_PACKED_STRUCT wl_proxd_collect_info_t; 15650 #include <packed_section_end.h> 15651 15652 #define K_TOF_COLLECT_H_PAD 1 15653 #define K_TOF_COLLECT_SC_20MHZ (64) 15654 /* Maximum possible size of sample capture */ 15655 #define K_TOF_COLLECT_SC_80MHZ (2*K_TOF_COLLECT_SC_20MHZ) 15656 /* Maximum possible size of channel dump */ 15657 #define K_TOF_COLLECT_CHAN_SIZE (2*K_TOF_COLLECT_SC_80MHZ) 15658 15659 /* 15660 A few extra samples are required to estimate frequency offset 15661 Right now 16 samples are being used. Can be changed in future. 15662 */ 15663 #define K_TOF_COLLECT_SAMP_SIZE_20MHZ ((2u) * (K_TOF_COLLECT_SC_20MHZ) + \ 15664 (16u) + (K_TOF_COLLECT_H_PAD)) 15665 #define K_TOF_COLLECT_RAW_SAMP_SIZE_20MHZ ((2u) * (K_TOF_COLLECT_SAMP_SIZE_20MHZ)) 15666 #define K_TOF_COLLECT_H_SIZE_20MHZ (K_TOF_COLLECT_SAMP_SIZE_20MHZ) 15667 #define K_TOF_COLLECT_HRAW_SIZE_20MHZ (K_TOF_COLLECT_RAW_SAMP_SIZE_20MHZ) 15668 15669 #define K_TOF_COLLECT_SAMP_SIZE_80MHZ ((2u) * (K_TOF_COLLECT_SC_80MHZ) + \ 15670 (16u) + (K_TOF_COLLECT_H_PAD)) 15671 #define K_TOF_COLLECT_RAW_SAMP_SIZE_80MHZ ((2u) * K_TOF_COLLECT_SAMP_SIZE_80MHZ) 15672 #define K_TOF_COLLECT_H_SIZE_80MHZ (K_TOF_COLLECT_SAMP_SIZE_80MHZ) 15673 #define K_TOF_COLLECT_HRAW_SIZE_80MHZ (K_TOF_COLLECT_RAW_SAMP_SIZE_80MHZ) 15674 #define K_TOF_COLLECT_HRAW_SIZE_20MHZ_1FS (K_TOF_COLLECT_SAMP_SIZE_20MHZ) 15675 #define K_TOF_COLLECT_HRAW_SIZE_80MHZ_1FS ((2u) * (K_TOF_COLLECT_SAMP_SIZE_20MHZ)) 15676 15677 #define WL_PROXD_COLLECT_DATA_VERSION_1 1 15678 #include <packed_section_start.h> 15679 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_data_v1 { 15680 wl_proxd_collect_info_t info; 15681 uint8 ri_rr[FTM_TPK_RI_RR_LEN]; 15682 /**< raw data read from phy used to adjust timestamps */ 15683 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 15684 } BWL_POST_PACKED_STRUCT wl_proxd_collect_data_t_v1; 15685 #include <packed_section_end.h> 15686 15687 #define WL_PROXD_COLLECT_DATA_VERSION_2 2 15688 #include <packed_section_start.h> 15689 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_data_v2 { 15690 wl_proxd_collect_info_t info; 15691 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 15692 /**< raw data read from phy used to adjust timestamps */ 15693 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 15694 } BWL_POST_PACKED_STRUCT wl_proxd_collect_data_t_v2; 15695 #include <packed_section_end.h> 15696 15697 #define WL_PROXD_COLLECT_DATA_VERSION_3 3 15698 typedef struct wl_proxd_collect_data_v3 { 15699 uint16 version; 15700 uint16 len; 15701 wl_proxd_collect_info_t info; 15702 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 15703 /**< raw data read from phy used to adjust timestamps */ 15704 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 15705 uint32 chan[4 * K_TOF_COLLECT_CHAN_SIZE]; 15706 } wl_proxd_collect_data_t_v3; 15707 15708 #define WL_PROXD_COLLECT_DATA_VERSION_4 4 15709 typedef struct wl_proxd_collect_data_v4 { 15710 uint16 version; 15711 uint16 len; 15712 wl_proxd_collect_info_t info; 15713 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0_5G]; 15714 /**< raw data read from phy used to adjust timestamps */ 15715 uint32 H[K_TOF_COLLECT_H_SIZE_20MHZ]; 15716 uint32 chan[4 * K_TOF_COLLECT_CHAN_SIZE]; 15717 } wl_proxd_collect_data_t_v4; 15718 #define WL_PROXD_COLLECT_DATA_VERSION_MAX WL_PROXD_COLLECT_DATA_VERSION_4 15719 15720 typedef struct wl_proxd_debug_data { 15721 uint8 count; /**< number of packets */ 15722 uint8 stage; /**< state machone stage */ 15723 uint8 received; /**< received or txed */ 15724 uint8 paket_type; /**< packet type */ 15725 uint8 category; /**< category field */ 15726 uint8 action; /**< action field */ 15727 uint8 token; /**< token number */ 15728 uint8 follow_token; /**< following token number */ 15729 uint16 index; /**< index of the packet */ 15730 uint16 tof_cmd; /**< M_TOF_CMD */ 15731 uint16 tof_rsp; /**< M_TOF_RSP */ 15732 uint16 tof_avb_rxl; /**< M_TOF_AVB_RX_L */ 15733 uint16 tof_avb_rxh; /**< M_TOF_AVB_RX_H */ 15734 uint16 tof_avb_txl; /**< M_TOF_AVB_TX_L */ 15735 uint16 tof_avb_txh; /**< M_TOF_AVB_TX_H */ 15736 uint16 tof_id; /**< M_TOF_ID */ 15737 uint16 tof_status0; /**< M_TOF_STATUS_0 */ 15738 uint16 tof_status2; /**< M_TOF_STATUS_2 */ 15739 uint16 tof_chsm0; /**< M_TOF_CHNSM_0 */ 15740 uint16 tof_phyctl0; /**< M_TOF_PHYCTL0 */ 15741 uint16 tof_phyctl1; /**< M_TOF_PHYCTL1 */ 15742 uint16 tof_phyctl2; /**< M_TOF_PHYCTL2 */ 15743 uint16 tof_lsig; /**< M_TOF_LSIG */ 15744 uint16 tof_vhta0; /**< M_TOF_VHTA0 */ 15745 uint16 tof_vhta1; /**< M_TOF_VHTA1 */ 15746 uint16 tof_vhta2; /**< M_TOF_VHTA2 */ 15747 uint16 tof_vhtb0; /**< M_TOF_VHTB0 */ 15748 uint16 tof_vhtb1; /**< M_TOF_VHTB1 */ 15749 uint16 tof_apmductl; /**< M_TOF_AMPDU_CTL */ 15750 uint16 tof_apmdudlim; /**< M_TOF_AMPDU_DLIM */ 15751 uint16 tof_apmdulen; /**< M_TOF_AMPDU_LEN */ 15752 } wl_proxd_debug_data_t; 15753 15754 /** version of the wl_wsec_info structure */ 15755 #define WL_WSEC_INFO_VERSION 0x01 15756 15757 /** start enum value for BSS properties */ 15758 #define WL_WSEC_INFO_BSS_BASE 0x0100 15759 /* for WFA testing (CTT testbed) */ 15760 #define WL_WSEC_INFO_TEST_BASE 0x0300 15761 /** size of len and type fields of wl_wsec_info_tlv_t struct */ 15762 #define WL_WSEC_INFO_TLV_HDR_LEN OFFSETOF(wl_wsec_info_tlv_t, data) 15763 15764 /** Allowed wl_wsec_info properties; not all of them may be supported. */ 15765 typedef enum { 15766 WL_WSEC_INFO_NONE = 0, 15767 WL_WSEC_INFO_MAX_KEYS = 1, 15768 WL_WSEC_INFO_NUM_KEYS = 2, 15769 WL_WSEC_INFO_NUM_HW_KEYS = 3, 15770 WL_WSEC_INFO_MAX_KEY_IDX = 4, 15771 WL_WSEC_INFO_NUM_REPLAY_CNTRS = 5, 15772 WL_WSEC_INFO_SUPPORTED_ALGOS = 6, 15773 WL_WSEC_INFO_MAX_KEY_LEN = 7, 15774 WL_WSEC_INFO_FLAGS = 8, 15775 /* add global/per-wlc properties above */ 15776 WL_WSEC_INFO_BSS_FLAGS = (WL_WSEC_INFO_BSS_BASE + 1), 15777 WL_WSEC_INFO_BSS_WSEC = (WL_WSEC_INFO_BSS_BASE + 2), 15778 WL_WSEC_INFO_BSS_TX_KEY_ID = (WL_WSEC_INFO_BSS_BASE + 3), 15779 WL_WSEC_INFO_BSS_ALGO = (WL_WSEC_INFO_BSS_BASE + 4), 15780 WL_WSEC_INFO_BSS_KEY_LEN = (WL_WSEC_INFO_BSS_BASE + 5), 15781 WL_WSEC_INFO_BSS_ALGOS = (WL_WSEC_INFO_BSS_BASE + 6), 15782 WL_WSEC_INFO_BSS_WPA_AP_RESTRICT = (WL_WSEC_INFO_BSS_BASE + 7), 15783 WL_WSEC_INFO_BSS_PMK_PASSPHRASE = (WL_WSEC_INFO_BSS_BASE + 8), 15784 WL_WSEC_INFO_BSS_SAE_PWE = (WL_WSEC_INFO_BSS_BASE + 9), 15785 WL_WSEC_INFO_BSS_SAE_PK = (WL_WSEC_INFO_BSS_BASE + 0xA), 15786 WL_WSEC_INFO_6G_LEGACY_SEC = (WL_WSEC_INFO_BSS_BASE + 0xB), 15787 /* 15788 * ADD NEW ENUM ABOVE HERE 15789 */ 15790 /* WPA3 CTT testbed specific requirement. refer to WFA CAPI command list */ 15791 WL_WSEC_INFO_TEST_SAE_GROUPS = (WL_WSEC_INFO_TEST_BASE), /* supported SAE groups */ 15792 WL_WSEC_INFO_TEST_SAE_GROUP_REJ = (WL_WSEC_INFO_TEST_BASE + 1), /* rejected group ID */ 15793 WL_WSEC_INFO_TEST_SAE_INVALID_VEC = (WL_WSEC_INFO_TEST_BASE + 2), /* test SAE vector */ 15794 WL_WSEC_INFO_TEST_PMK = (WL_WSEC_INFO_TEST_BASE + 3), /* query PMK */ 15795 WL_WSEC_INFO_OCV = (WL_WSEC_INFO_TEST_BASE + 4), /* OCV enable/disable */ 15796 WL_WSEC_INFO_TEST_INVALID_OCI = (WL_WSEC_INFO_TEST_BASE + 5), /* OCV invalid OCI */ 15797 WL_WSEC_INFO_TEST_PMKSA_CACHE = (WL_WSEC_INFO_TEST_BASE + 6), /* PMKSA cache on/off */ 15798 WL_WSEC_INFO_TEST_IGNORE_CSA = (WL_WSEC_INFO_TEST_BASE + 7), /* Ignore CSA */ 15799 WL_WSEC_INFO_TEST_IGNORE_ASSOCRESP = (WL_WSEC_INFO_TEST_BASE + 8), /* Ignore reassoc_resp */ 15800 WL_WSEC_INFO_TEST_TD_POLICY = (WL_WSEC_INFO_TEST_BASE + 9), /* set TD policy */ 15801 WL_WSEC_INFO_TEST_DISASSOC_MFP_TMO = (WL_WSEC_INFO_TEST_BASE + 0xA), 15802 /* sending disassoc frame when MFP query timed out */ 15803 15804 /* add per-BSS properties above */ 15805 WL_WSEC_INFO_MAX = 0xffff 15806 } wl_wsec_info_type_t; 15807 15808 #define WL_WSEC_PMK_INFO_VERSION 0x0100 /**< version 1.0 */ 15809 15810 typedef uint16 wl_wsec_info_pmk_info_flags_t; 15811 typedef uint32 wl_wsec_info_pmk_lifetime_t; 15812 typedef uint8 wl_wsec_info_akm_mask_t; 15813 typedef uint16 wl_wsec_info_pmk_info_flags; 15814 15815 enum { 15816 WL_WSEC_PMK_INFO_SSID_PRESENT = 0x1, 15817 WL_WSEC_PMK_DEFAULT_LIFETIME = 0x2 15818 }; 15819 15820 struct bcm_xlo { 15821 uint16 len; 15822 uint16 off; 15823 }; 15824 typedef struct bcm_xlo bcm_xlo_t; 15825 15826 /* 15827 ** all offsets are from the beginning of the structure that starts 15828 ** with the version field and length field is the total length of the structure 15829 ** including the version and length fields 15830 */ 15831 typedef struct wl_wsec_info_pmk_info { 15832 uint16 version; /* WL_WSEC_PMK_INFO_VERSION */ 15833 uint16 len; 15834 uint16 next_offset; /* If non zero, specifies offset of next next_offset field */ 15835 wl_wsec_info_pmk_info_flags_t flags; /* Fill in the input based on the flags */ 15836 wl_wsec_info_pmk_lifetime_t pmk_lifetime; 15837 wl_wsec_info_akm_mask_t akm_mask; /* RSN authenticated key management suite */ 15838 uint8 rsvd[3]; /* reserved for future use */ 15839 bcm_xlo_t ssid; /* ssid - key, zero length is allowed for SSID */ 15840 bcm_xlo_t bssid; /* bssid - key, zero length = broadcast/wildcard */ 15841 bcm_xlo_t pass_id; /* key - optional password id for SAE */ 15842 bcm_xlo_t pmk; /* pmk - either 32 or 48 byte for SuiteB-192 */ 15843 bcm_xlo_t passphrase; /* passphrase info */ 15844 /* data follows */ 15845 } wl_wsec_info_pmk_info_t; 15846 15847 typedef struct { 15848 uint32 algos; /* set algos to be enabled/disabled */ 15849 uint32 mask; /* algos outside mask unaltered */ 15850 } wl_wsec_info_algos_t; 15851 15852 /** tlv used to return wl_wsec_info properties */ 15853 typedef struct { 15854 uint16 type; 15855 uint16 len; /**< data length */ 15856 uint8 data[1]; /**< data follows */ 15857 } wl_wsec_info_tlv_t; 15858 15859 /** input/output data type for wsec_info iovar */ 15860 typedef struct wl_wsec_info { 15861 uint8 version; /**< structure version */ 15862 uint8 pad[2]; 15863 uint8 num_tlvs; 15864 wl_wsec_info_tlv_t tlvs[1]; /**< tlv data follows */ 15865 } wl_wsec_info_t; 15866 #define AP_BLOCK_NONE 0x0000 /* default: No restriction */ 15867 #define AP_ALLOW_WPA2 0x0001 /* allow WPA2PSK AP */ 15868 #define AP_ALLOW_TSN 0x0002 /* WPA3 transition AP */ 15869 #define AP_ALLOW_WPA3_ONLY 0x0004 /* WPA3 only AP */ 15870 #define AP_ALLOW_MAX (AP_ALLOW_WPA2 | AP_ALLOW_TSN | \ 15871 AP_ALLOW_WPA3_ONLY) 15872 typedef struct { 15873 uint32 wpa_ap_restrict; /* set WPA2 / WPA3 AP restriction policy */ 15874 } wl_wsec_info_wpa_ap_restrict_t; 15875 15876 /* SAE PWE derivation method */ 15877 #define SAE_PWE_LOOP 0x1u 15878 #define SAE_PWE_H2E 0x2u 15879 15880 /* SAE PK modes */ 15881 #define WSEC_SAE_PK_NONE 0u 15882 #define WSEC_SAE_PK_ENABLED 0x1u 15883 #define WSEC_SAE_PK_ONLY 0x2u 15884 15885 /* HE 6Ghz security bitmap */ 15886 #define WL_HE_6G_SEC_DISABLE 0x00u /* HE 6G Open Security support disable */ 15887 #define WL_HE_6G_SEC_OPEN 0x01u /* HE 6G Open Security support */ 15888 15889 /* 15890 * randmac definitions 15891 */ 15892 #define WL_RANDMAC_MODULE "randmac" 15893 #define WL_RANDMAC_API_VERSION 0x0100 /**< version 1.0 */ 15894 #define WL_RANDMAC_API_MIN_VERSION 0x0100 /**< version 1.0 */ 15895 15896 /** subcommands that can apply to randmac */ 15897 enum { 15898 WL_RANDMAC_SUBCMD_NONE = 0, 15899 WL_RANDMAC_SUBCMD_GET_VERSION = 1, 15900 WL_RANDMAC_SUBCMD_ENABLE = 2, 15901 WL_RANDMAC_SUBCMD_DISABLE = 3, 15902 WL_RANDMAC_SUBCMD_CONFIG = 4, 15903 WL_RANDMAC_SUBCMD_STATS = 5, 15904 WL_RANDMAC_SUBCMD_CLEAR_STATS = 6, 15905 15906 WL_RANDMAC_SUBCMD_MAX 15907 }; 15908 typedef int16 wl_randmac_subcmd_t; 15909 15910 /* Common IOVAR struct */ 15911 typedef struct wl_randmac { 15912 uint16 version; 15913 uint16 len; /* total length */ 15914 wl_randmac_subcmd_t subcmd_id; /* subcommand id */ 15915 uint8 data[0]; /* subcommand data */ 15916 } wl_randmac_t; 15917 15918 #define WL_RANDMAC_IOV_HDR_SIZE OFFSETOF(wl_randmac_t, data) 15919 15920 /* randmac version subcommand */ 15921 typedef struct wl_randmac_version { 15922 uint16 version; /* Randmac method version info */ 15923 uint8 pad[2]; /* Align on 4 byte boundary */ 15924 } wl_randmac_version_t; 15925 15926 /* 15927 * Bitmask for methods supporting MAC randomization feature 15928 */ 15929 #define WL_RANDMAC_USER_NONE 0x0000 15930 #define WL_RANDMAC_USER_FTM 0x0001 15931 #define WL_RANDMAC_USER_NAN 0x0002 15932 #define WL_RANDMAC_USER_SCAN 0x0004 15933 #define WL_RANDMAC_USER_ANQP 0x0008 15934 #define WL_RANDMAC_USER_ALL 0xFFFF 15935 typedef uint16 wl_randmac_method_t; 15936 15937 enum { 15938 WL_RANDMAC_FLAGS_NONE = 0x00, 15939 WL_RANDMAC_FLAGS_ADDR = 0x01, 15940 WL_RANDMAC_FLAGS_MASK = 0x02, 15941 WL_RANDMAC_FLAGS_METHOD = 0x04, 15942 WL_RANDMAC_FLAGS_ALL = 0xFF 15943 }; 15944 typedef uint8 wl_randmac_flags_t; 15945 15946 /* randmac statistics subcommand */ 15947 typedef struct wl_randmac_stats { 15948 uint32 set_ok; /* Set random addr success count */ 15949 uint32 set_fail; /* Set random addr failed count */ 15950 uint32 set_reqs; /* Set random addr count */ 15951 uint32 reset_reqs; /* Restore random addr count */ 15952 uint32 restore_ok; /* Restore random addr succes count */ 15953 uint32 restore_fail; /* Restore random addr failed count */ 15954 uint32 events_sent; /* randmac module events count */ 15955 uint32 events_rcvd; /* randmac events received count */ 15956 } wl_randmac_stats_t; 15957 15958 /* randmac config subcommand */ 15959 typedef struct wl_randmac_config { 15960 struct ether_addr addr; /* Randomized MAC address */ 15961 struct ether_addr addr_mask; /* bitmask for randomization */ 15962 wl_randmac_method_t method; /* Enabled methods */ 15963 wl_randmac_flags_t flags; /* What config info changed */ 15964 uint8 PAD; 15965 } wl_randmac_config_t; 15966 15967 enum { 15968 WL_RANDMAC_EVENT_NONE = 0, /**< not an event, reserved */ 15969 WL_RANDMAC_EVENT_BSSCFG_ADDR_SET = 1, /* bsscfg addr randomized */ 15970 WL_RANDMAC_EVENT_BSSCFG_ADDR_RESTORE = 2, /* bsscfg addr restored */ 15971 WL_RANDMAC_EVENT_ENABLED = 3, /* randmac module enabled */ 15972 WL_RANDMAC_EVENT_DISABLE = 4, /* randmac module disabled */ 15973 WL_RANDMAC_EVENT_BSSCFG_STATUS = 5, /* bsscfg enable/disable */ 15974 15975 WL_RANDMAC_EVENT_MAX 15976 }; 15977 typedef int16 wl_randmac_event_type_t; 15978 typedef int32 wl_randmac_status_t; 15979 typedef uint32 wl_randmac_event_mask_t; 15980 15981 #define WL_RANDMAC_EVENT_MASK_ALL 0xfffffffe 15982 #define WL_RANDMAC_EVENT_MASK_EVENT(_event_type) (1 << (_event_type)) 15983 #define WL_RANDMAC_EVENT_ENABLED(_mask, _event_type) (\ 15984 ((_mask) & WL_RANDMAC_EVENT_MASK_EVENT(_event_type)) != 0) 15985 15986 /** tlv IDs - data length 4 bytes unless overridden by type, alignment 32 bits */ 15987 enum { 15988 WL_RANDMAC_TLV_NONE = 0, 15989 WL_RANDMAC_TLV_METHOD = 1, 15990 WL_RANDMAC_TLV_ADDR = 2, 15991 WL_RANDMAC_TLV_MASK = 3 15992 }; 15993 typedef uint16 wl_randmac_tlv_id_t; 15994 15995 typedef struct wl_randmac_tlv { 15996 wl_randmac_tlv_id_t id; 15997 uint16 len; /* Length of variable */ 15998 uint8 data[1]; 15999 } wl_randmac_tlv_t; 16000 16001 /** randmac event */ 16002 typedef struct wl_randmac_event { 16003 uint16 version; 16004 uint16 len; /* Length of all variables */ 16005 wl_randmac_event_type_t type; 16006 wl_randmac_method_t method; 16007 uint8 pad[2]; 16008 wl_randmac_tlv_t tlvs[1]; /**< variable */ 16009 } wl_randmac_event_t; 16010 16011 /* 16012 * scan MAC definitions 16013 */ 16014 16015 /** common iovar struct */ 16016 typedef struct wl_scanmac { 16017 uint16 subcmd_id; /**< subcommand id */ 16018 uint16 len; /**< total length of data[] */ 16019 uint8 data[]; /**< subcommand data */ 16020 } wl_scanmac_t; 16021 16022 /* subcommand ids */ 16023 #define WL_SCANMAC_SUBCMD_ENABLE 0 16024 #define WL_SCANMAC_SUBCMD_BSSCFG 1u /**< only GET supported */ 16025 #define WL_SCANMAC_SUBCMD_CONFIG 2u 16026 #define WL_SCANMAC_SUBCMD_MACADDR 3u 16027 16028 /** scanmac enable data struct */ 16029 typedef struct wl_scanmac_enable { 16030 uint8 enable; /**< 1 - enable, 0 - disable */ 16031 uint8 pad[3]; /**< 4-byte struct alignment */ 16032 } wl_scanmac_enable_t; 16033 16034 /** scanmac bsscfg data struct */ 16035 typedef struct wl_scanmac_bsscfg { 16036 uint32 bsscfg; /**< bsscfg index */ 16037 } wl_scanmac_bsscfg_t; 16038 16039 /** scanmac config data struct */ 16040 typedef struct wl_scanmac_config { 16041 struct ether_addr mac; /**< 6 bytes of MAC address or MAC prefix (i.e. OUI) */ 16042 struct ether_addr random_mask; /**< randomized bits on each scan */ 16043 uint16 scan_bitmap; /**< scans to use this MAC address */ 16044 uint8 pad[2]; /**< 4-byte struct alignment */ 16045 } wl_scanmac_config_t; 16046 16047 /** scanmac mac addr data struct */ 16048 typedef struct wl_scanmac_macaddr { 16049 struct ether_addr mac; /* last mac address used for scan. either randomized or permanent */ 16050 } wl_scanmac_macaddr_t; 16051 16052 /* scan bitmap */ 16053 #define WL_SCANMAC_SCAN_UNASSOC (0x01 << 0u) /**< unassociated scans */ 16054 #define WL_SCANMAC_SCAN_ASSOC_ROAM (0x01 << 1u) /**< associated roam scans */ 16055 #define WL_SCANMAC_SCAN_ASSOC_PNO (0x01 << 2u) /**< associated PNO scans */ 16056 #define WL_SCANMAC_SCAN_ASSOC_HOST (0x01 << 3u) /**< associated host scans */ 16057 #define WL_SCANMAC_SCAN_RAND_PERPRQ (0x01 << 4u) /* enable per probe rand */ 16058 #define WL_SCANMAC_SCAN_RAND_SCANCH (0x01 << 5u) /* enable scan chan rand */ 16059 16060 #define WL_SCAN_EVENT_VER1 1 16061 #define WL_SCAN_EVENT_VER2 2 16062 16063 #define WL_SCAN_TYPE_ASSOC 0x1 /* Assoc scan */ 16064 #define WL_SCAN_TYPE_ROAM 0x2 /* Roam scan */ 16065 #define WL_SCAN_TYPE_FWSCAN 0x4 /* Other FW scan */ 16066 #define WL_SCAN_TYPE_HOSTSCAN 0x8 /* Host scan */ 16067 16068 typedef struct scan_event_data { 16069 uint32 version; 16070 uint32 flags; 16071 uint16 num_chan_slice0; 16072 uint16 num_chan_slice1; 16073 /* Will contain num_chan_slice0 followed by num_chan_slice1 chanspecs */ 16074 chanspec_t scan_chan_list[]; 16075 } scan_event_data_v1_t; 16076 16077 /** tlv used to return chanspec list of each slice */ 16078 typedef struct scan_chan_tlv { 16079 uint16 type; /* slice index */ 16080 uint16 len; /* data length */ 16081 uint8 data[1]; /* chanspec list */ 16082 } scan_chan_tlv_t; 16083 16084 typedef struct scan_event_data_v2 { 16085 uint32 version; 16086 uint32 flags; 16087 uint32 num_tlvs; /* no of chanspec list tlvs */ 16088 scan_chan_tlv_t tlvs[1]; 16089 } scan_event_data_v2_t; 16090 16091 #ifdef WL_SCAN_EVENT_V2 16092 typedef scan_event_data_v2_t scan_event_data_t; 16093 #define WL_SCAN_EVENT_FIXED_LEN_V2 OFFSETOF(scan_event_data_t, tlvs) 16094 #define WL_SCAN_EVENT_VERSION WL_SCAN_EVENT_VER2 16095 #else 16096 #define WL_SCAN_EVENT_VERSION WL_SCAN_EVENT_VER1 16097 typedef scan_event_data_v1_t scan_event_data_t; 16098 #endif 16099 16100 /* 16101 * bonjour dongle offload definitions 16102 */ 16103 16104 /* common iovar struct */ 16105 typedef struct wl_bdo { 16106 uint16 subcmd_id; /* subcommand id */ 16107 uint16 len; /* total length of data[] */ 16108 uint8 data[]; /* subcommand data */ 16109 } wl_bdo_t; 16110 16111 /* subcommand ids */ 16112 #define WL_BDO_SUBCMD_DOWNLOAD 0 /* Download flattened database */ 16113 #define WL_BDO_SUBCMD_ENABLE 1 /* Start bonjour after download */ 16114 #define WL_BDO_SUBCMD_MAX_DOWNLOAD 2 /* Get the max download size */ 16115 16116 /* maximum fragment size */ 16117 #define BDO_MAX_FRAGMENT_SIZE 1024 16118 16119 /* download flattened database 16120 * 16121 * BDO must be disabled before database download else fail. 16122 * 16123 * If database size is within BDO_MAX_FRAGMENT_SIZE then only a single fragment 16124 * is required (i.e. frag_num = 0, total_size = frag_size). 16125 * If database size exceeds BDO_MAX_FRAGMENT_SIZE then multiple fragments are required. 16126 */ 16127 typedef struct wl_bdo_download { 16128 uint16 total_size; /* total database size */ 16129 uint16 frag_num; /* fragment number, 0 for first fragment, N-1 for last fragment */ 16130 uint16 frag_size; /* size of fragment (max BDO_MAX_FRAGMENT_SIZE) */ 16131 uint8 pad[2]; /* 4-byte struct alignment */ 16132 uint8 fragment[BDO_MAX_FRAGMENT_SIZE]; /* fragment data */ 16133 } wl_bdo_download_t; 16134 16135 /* enable 16136 * 16137 * Enable requires a downloaded database else fail. 16138 */ 16139 typedef struct wl_bdo_enable { 16140 uint8 enable; /* 1 - enable, 0 - disable */ 16141 uint8 pad[3]; /* 4-byte struct alignment */ 16142 } wl_bdo_enable_t; 16143 16144 /* 16145 * Get the max download size for Bonjour Offload. 16146 */ 16147 typedef struct wl_bdo_max_download { 16148 uint16 size; /* Max download size in bytes */ 16149 uint8 pad[2]; /* 4-byte struct alignment */ 16150 } wl_bdo_max_download_t; 16151 16152 /* 16153 * TCP keepalive offload definitions 16154 */ 16155 16156 /* common iovar struct */ 16157 typedef struct wl_tko { 16158 uint16 subcmd_id; /* subcommand id */ 16159 uint16 len; /* total length of data[] */ 16160 uint8 data[]; /* subcommand data */ 16161 } wl_tko_t; 16162 16163 /* subcommand ids */ 16164 #define WL_TKO_SUBCMD_MAX_TCP 0 /* max TCP connections supported */ 16165 #define WL_TKO_SUBCMD_PARAM 1 /* configure offload common parameters */ 16166 #define WL_TKO_SUBCMD_CONNECT 2 /* TCP connection info */ 16167 #define WL_TKO_SUBCMD_ENABLE 3 /* enable/disable */ 16168 #define WL_TKO_SUBCMD_STATUS 4 /* TCP connection status */ 16169 16170 /* WL_TKO_SUBCMD_MAX_CONNECT subcommand data */ 16171 typedef struct wl_tko_max_tcp { 16172 uint8 max; /* max TCP connections supported */ 16173 uint8 pad[3]; /* 4-byte struct alignment */ 16174 } wl_tko_max_tcp_t; 16175 16176 /* WL_TKO_SUBCMD_PARAM subcommand data */ 16177 typedef struct wl_tko_param { 16178 uint16 interval; /* keepalive tx interval (secs) */ 16179 uint16 retry_interval; /* keepalive retry interval (secs) */ 16180 uint16 retry_count; /* retry_count */ 16181 uint8 pad[2]; /* 4-byte struct alignment */ 16182 } wl_tko_param_t; 16183 16184 /* WL_TKO_SUBCMD_CONNECT subcommand data 16185 * invoke with unique 'index' for each TCP connection 16186 */ 16187 typedef struct wl_tko_connect { 16188 uint8 index; /* TCP connection index, 0 to max-1 */ 16189 uint8 ip_addr_type; /* 0 - IPv4, 1 - IPv6 */ 16190 uint16 local_port; /* local port */ 16191 uint16 remote_port; /* remote port */ 16192 uint16 PAD; 16193 uint32 local_seq; /* local sequence number */ 16194 uint32 remote_seq; /* remote sequence number */ 16195 uint16 request_len; /* TCP keepalive request packet length */ 16196 uint16 response_len; /* TCP keepalive response packet length */ 16197 uint8 data[]; /* variable length field containing local/remote IPv4/IPv6, 16198 * TCP keepalive request packet, TCP keepalive response packet 16199 * For IPv4, length is 4 * 2 + request_length + response_length 16200 * offset 0 - local IPv4 16201 * offset 4 - remote IPv4 16202 * offset 8 - TCP keepalive request packet 16203 * offset 8+request_length - TCP keepalive response packet 16204 * For IPv6, length is 16 * 2 + request_length + response_length 16205 * offset 0 - local IPv6 16206 * offset 16 - remote IPv6 16207 * offset 32 - TCP keepalive request packet 16208 * offset 32+request_length - TCP keepalive response packet 16209 */ 16210 } wl_tko_connect_t; 16211 16212 /* WL_TKO_SUBCMD_CONNECT subcommand data to GET configured info for specific index */ 16213 typedef struct wl_tko_get_connect { 16214 uint8 index; /* TCP connection index, 0 to max-1 */ 16215 uint8 pad[3]; /* 4-byte struct alignment */ 16216 } wl_tko_get_connect_t; 16217 16218 typedef struct wl_tko_enable { 16219 uint8 enable; /* 1 - enable, 0 - disable */ 16220 uint8 pad[3]; /* 4-byte struct alignment */ 16221 } wl_tko_enable_t; 16222 16223 /* WL_TKO_SUBCMD_STATUS subcommand data */ 16224 /* must be invoked before tko is disabled else status is unavailable */ 16225 typedef struct wl_tko_status { 16226 uint8 count; /* number of status entries (i.e. equals 16227 * max TCP connections supported) 16228 */ 16229 uint8 status[1]; /* variable length field contain status for 16230 * each TCP connection index 16231 */ 16232 } wl_tko_status_t; 16233 16234 typedef enum { 16235 TKO_STATUS_NORMAL = 0, /* TCP connection normal, no error */ 16236 TKO_STATUS_NO_RESPONSE = 1, /* no response to TCP keepalive */ 16237 TKO_STATUS_NO_TCP_ACK_FLAG = 2, /* TCP ACK flag not set */ 16238 TKO_STATUS_UNEXPECT_TCP_FLAG = 3, /* unexpect TCP flags set other than ACK */ 16239 TKO_STATUS_SEQ_NUM_INVALID = 4, /* ACK != sequence number */ 16240 TKO_STATUS_REMOTE_SEQ_NUM_INVALID = 5, /* SEQ > remote sequence number */ 16241 TKO_STATUS_TCP_DATA = 6, /* TCP data available */ 16242 TKO_STATUS_UNAVAILABLE = 255, /* not used/configured */ 16243 } tko_status_t; 16244 16245 enum rssi_reason { 16246 RSSI_REASON_UNKNOW = 0, 16247 RSSI_REASON_LOWRSSI = 1, 16248 RSSI_REASON_NSYC = 2, 16249 RSSI_REASON_TIMEOUT = 3 16250 }; 16251 16252 enum tof_reason { 16253 TOF_REASON_OK = 0, 16254 TOF_REASON_REQEND = 1, 16255 TOF_REASON_TIMEOUT = 2, 16256 TOF_REASON_NOACK = 3, 16257 TOF_REASON_INVALIDAVB = 4, 16258 TOF_REASON_INITIAL = 5, 16259 TOF_REASON_ABORT = 6 16260 }; 16261 16262 enum rssi_state { 16263 RSSI_STATE_POLL = 0, 16264 RSSI_STATE_TPAIRING = 1, 16265 RSSI_STATE_IPAIRING = 2, 16266 RSSI_STATE_THANDSHAKE = 3, 16267 RSSI_STATE_IHANDSHAKE = 4, 16268 RSSI_STATE_CONFIRMED = 5, 16269 RSSI_STATE_PIPELINE = 6, 16270 RSSI_STATE_NEGMODE = 7, 16271 RSSI_STATE_MONITOR = 8, 16272 RSSI_STATE_LAST = 9 16273 }; 16274 16275 enum tof_state { 16276 TOF_STATE_IDLE = 0, 16277 TOF_STATE_IWAITM = 1, 16278 TOF_STATE_TWAITM = 2, 16279 TOF_STATE_ILEGACY = 3, 16280 TOF_STATE_IWAITCL = 4, 16281 TOF_STATE_TWAITCL = 5, 16282 TOF_STATE_ICONFIRM = 6, 16283 TOF_STATE_IREPORT = 7 16284 }; 16285 16286 enum tof_mode_type { 16287 TOF_LEGACY_UNKNOWN = 0, 16288 TOF_LEGACY_AP = 1, 16289 TOF_NONLEGACY_AP = 2 16290 }; 16291 16292 enum tof_way_type { 16293 TOF_TYPE_ONE_WAY = 0, 16294 TOF_TYPE_TWO_WAY = 1, 16295 TOF_TYPE_REPORT = 2 16296 }; 16297 16298 enum tof_rate_type { 16299 TOF_FRAME_RATE_VHT = 0, 16300 TOF_FRAME_RATE_LEGACY = 1 16301 }; 16302 16303 #define TOF_ADJ_TYPE_NUM 4 /**< number of assisted timestamp adjustment */ 16304 enum tof_adj_mode { 16305 TOF_ADJ_SOFTWARE = 0, 16306 TOF_ADJ_HARDWARE = 1, 16307 TOF_ADJ_SEQ = 2, 16308 TOF_ADJ_NONE = 3 16309 }; 16310 16311 #define FRAME_TYPE_NUM 4 /**< number of frame type */ 16312 enum frame_type { 16313 FRAME_TYPE_CCK = 0, 16314 FRAME_TYPE_OFDM = 1, 16315 FRAME_TYPE_11N = 2, 16316 FRAME_TYPE_11AC = 3 16317 }; 16318 16319 typedef struct wl_proxd_status_iovar { 16320 uint16 method; /**< method */ 16321 uint8 mode; /**< mode */ 16322 uint8 peermode; /**< peer mode */ 16323 uint8 state; /**< state */ 16324 uint8 reason; /**< reason code */ 16325 uint8 PAD[2]; 16326 uint32 distance; /**< distance */ 16327 uint32 txcnt; /**< tx pkt counter */ 16328 uint32 rxcnt; /**< rx pkt counter */ 16329 struct ether_addr peer; /**< peer mac address */ 16330 int8 avg_rssi; /**< average rssi */ 16331 int8 hi_rssi; /**< highest rssi */ 16332 int8 low_rssi; /**< lowest rssi */ 16333 uint8 PAD[3]; 16334 uint32 dbgstatus; /**< debug status */ 16335 uint16 frame_type_cnt[FRAME_TYPE_NUM]; /**< frame types */ 16336 uint8 adj_type_cnt[TOF_ADJ_TYPE_NUM]; /**< adj types HW/SW */ 16337 } wl_proxd_status_iovar_t; 16338 16339 /* ifdef NET_DETECT */ 16340 typedef struct net_detect_adapter_features { 16341 uint8 wowl_enabled; 16342 uint8 net_detect_enabled; 16343 uint8 nlo_enabled; 16344 } net_detect_adapter_features_t; 16345 16346 typedef enum net_detect_bss_type { 16347 nd_bss_any = 0, 16348 nd_ibss, 16349 nd_ess 16350 } net_detect_bss_type_t; 16351 16352 typedef struct net_detect_profile { 16353 wlc_ssid_t ssid; 16354 net_detect_bss_type_t bss_type; /**< Ignore for now since Phase 1 is only for ESS */ 16355 uint32 cipher_type; /**< DOT11_CIPHER_ALGORITHM enumeration values */ 16356 uint32 auth_type; /**< DOT11_AUTH_ALGORITHM enumeration values */ 16357 } net_detect_profile_t; 16358 16359 typedef struct net_detect_profile_list { 16360 uint32 num_nd_profiles; 16361 net_detect_profile_t nd_profile[]; 16362 } net_detect_profile_list_t; 16363 16364 typedef struct net_detect_config { 16365 uint8 nd_enabled; 16366 uint8 PAD[3]; 16367 uint32 scan_interval; 16368 uint32 wait_period; 16369 uint8 wake_if_connected; 16370 uint8 wake_if_disconnected; 16371 uint8 PAD[2]; 16372 net_detect_profile_list_t nd_profile_list; 16373 } net_detect_config_t; 16374 16375 typedef enum net_detect_wake_reason { 16376 nd_reason_unknown, 16377 nd_net_detected, 16378 nd_wowl_event, 16379 nd_ucode_error 16380 } net_detect_wake_reason_t; 16381 16382 typedef struct net_detect_wake_data { 16383 net_detect_wake_reason_t nd_wake_reason; 16384 uint32 nd_wake_date_length; 16385 uint8 nd_wake_data[0]; /**< Wake data (currently unused) */ 16386 } net_detect_wake_data_t; 16387 16388 /* endif NET_DETECT */ 16389 16390 /* (unversioned, deprecated) */ 16391 typedef struct bcnreq { 16392 uint8 bcn_mode; 16393 uint8 PAD[3]; 16394 int32 dur; 16395 int32 channel; 16396 struct ether_addr da; 16397 uint16 random_int; 16398 wlc_ssid_t ssid; 16399 uint16 reps; 16400 uint8 PAD[2]; 16401 } bcnreq_t; 16402 16403 #define WL_RRM_BCN_REQ_VER 1 16404 typedef struct bcn_req { 16405 uint8 version; 16406 uint8 bcn_mode; 16407 uint8 pad_1[2]; 16408 int32 dur; 16409 int32 channel; 16410 struct ether_addr da; 16411 uint16 random_int; 16412 wlc_ssid_t ssid; 16413 uint16 reps; 16414 uint8 req_elements; 16415 uint8 pad_2; 16416 chanspec_list_t chspec_list; 16417 } bcn_req_t; 16418 16419 typedef struct rrmreq { 16420 struct ether_addr da; 16421 uint8 reg; 16422 uint8 chan; 16423 uint16 random_int; 16424 uint16 dur; 16425 uint16 reps; 16426 } rrmreq_t; 16427 16428 typedef struct framereq { 16429 struct ether_addr da; 16430 uint8 reg; 16431 uint8 chan; 16432 uint16 random_int; 16433 uint16 dur; 16434 struct ether_addr ta; 16435 uint16 reps; 16436 } framereq_t; 16437 16438 typedef struct statreq { 16439 struct ether_addr da; 16440 struct ether_addr peer; 16441 uint16 random_int; 16442 uint16 dur; 16443 uint8 group_id; 16444 uint8 PAD; 16445 uint16 reps; 16446 } statreq_t; 16447 16448 typedef struct txstrmreq { 16449 struct ether_addr da; /* Destination address */ 16450 uint16 random_int; /* Random interval for measurement start */ 16451 uint16 dur; /* Measurement duration */ 16452 uint16 reps; /* number of repetitions */ 16453 struct ether_addr peer; /* Peer MAC address */ 16454 uint8 tid; /* Traffic ID */ 16455 uint8 bin0_range; /* Delay range of the first bin */ 16456 } txstrmreq_t; 16457 16458 typedef struct lcireq { 16459 struct ether_addr da; /* Destination address */ 16460 uint16 reps; /* number of repetitions */ 16461 uint8 subj; /* Local/Remote/Thid party */ 16462 uint8 lat_res; /* Latitude requested Resolution */ 16463 uint8 lon_res; /* Longitude requested Resolution */ 16464 uint8 alt_res; /* Altitude requested Resolution */ 16465 } lcireq_t; 16466 16467 typedef struct civicreq { 16468 struct ether_addr da; /* Destination address */ 16469 uint16 reps; /* number of repetitions */ 16470 uint8 subj; /* Local/Remote/Thid party */ 16471 uint8 civloc_type; /* Format of location info */ 16472 uint8 siu; /* Unit of Location service interval */ 16473 uint8 pad; 16474 uint16 si; /* Location service interval */ 16475 } civicreq_t; 16476 16477 typedef struct locidreq { 16478 struct ether_addr da; /* Destination address */ 16479 uint16 reps; /* number of repetitions */ 16480 uint8 subj; /* Local/Remote/Thid party */ 16481 uint8 siu; /* Unit of Location service interval */ 16482 uint16 si; /* Location service interval */ 16483 } locidreq_t; 16484 16485 typedef struct wl_rrm_config_ioc { 16486 uint16 version; /* command version */ 16487 uint16 id; /* subiovar cmd ID */ 16488 uint16 len; /* total length of all bytes in data[] */ 16489 uint16 pad; /* 4-byte boundary padding */ 16490 uint8 data[1]; /* payload */ 16491 } wl_rrm_config_ioc_t; 16492 16493 enum { 16494 WL_RRM_CONFIG_NONE = 0, /* reserved */ 16495 WL_RRM_CONFIG_GET_LCI = 1, /* get LCI */ 16496 WL_RRM_CONFIG_SET_LCI = 2, /* set LCI */ 16497 WL_RRM_CONFIG_GET_CIVIC = 3, /* get civic location */ 16498 WL_RRM_CONFIG_SET_CIVIC = 4, /* set civic location */ 16499 WL_RRM_CONFIG_GET_LOCID = 5, /* get location identifier */ 16500 WL_RRM_CONFIG_SET_LOCID = 6, /* set location identifier */ 16501 WL_RRM_CONFIG_MAX = 7 16502 }; 16503 16504 #define WL_RRM_CONFIG_NAME "rrm_config" 16505 #define WL_RRM_CONFIG_MIN_LENGTH OFFSETOF(wl_rrm_config_ioc_t, data) 16506 16507 enum { 16508 WL_RRM_EVENT_NONE = 0, /* not an event, reserved */ 16509 WL_RRM_EVENT_FRNG_REQ = 1, /* Receipt of FRNG request frame */ 16510 WL_RRM_EVENT_FRNG_REP = 2, /* Receipt of FRNG report frame */ 16511 16512 WL_RRM_EVENT_MAX 16513 }; 16514 typedef int16 wl_rrm_event_type_t; 16515 16516 typedef struct frngreq_target { 16517 uint32 bssid_info; 16518 uint8 channel; 16519 uint8 phytype; 16520 uint8 reg; 16521 uint8 pad; 16522 struct ether_addr bssid; 16523 chanspec_t chanspec; 16524 uint32 sid; 16525 } frngreq_target_t; 16526 16527 typedef struct frngreq { 16528 wl_rrm_event_type_t event; /* RRM event type */ 16529 struct ether_addr da; 16530 uint16 max_init_delay; /* Upper bound of random delay, in TUs */ 16531 uint8 min_ap_count; /* Min FTM ranges requested (1-15) */ 16532 uint8 num_aps; /* Number of APs to range, at least min_ap_count */ 16533 uint16 max_age; /* Max elapsed time before FTM request, 0xFFFF = any */ 16534 uint16 reps; /* Number of repetitions of this measurement type */ 16535 frngreq_target_t targets[1]; /* Target BSSIDs to range */ 16536 } frngreq_t; 16537 16538 typedef struct frngrep_range { 16539 uint32 start_tsf; /* 4 lsb of tsf */ 16540 struct ether_addr bssid; 16541 uint8 pad[2]; 16542 uint32 range; 16543 uint32 max_err; 16544 uint8 rsvd; 16545 uint8 pad2[3]; 16546 } frngrep_range_t; 16547 16548 typedef struct frngrep_error { 16549 uint32 start_tsf; /* 4 lsb of tsf */ 16550 struct ether_addr bssid; 16551 uint8 code; 16552 uint8 pad[1]; 16553 } frngrep_error_t; 16554 16555 typedef struct frngrep { 16556 wl_rrm_event_type_t event; /* RRM event type */ 16557 struct ether_addr da; 16558 uint8 range_entry_count; 16559 uint8 error_entry_count; 16560 uint16 dialog_token; /* dialog token */ 16561 frngrep_range_t range_entries[DOT11_FTM_RANGE_ENTRY_MAX_COUNT]; 16562 frngrep_error_t error_entries[DOT11_FTM_RANGE_ERROR_ENTRY_MAX_COUNT]; 16563 } frngrep_t; 16564 16565 typedef struct wl_rrm_frng_ioc { 16566 uint16 version; /* command version */ 16567 uint16 id; /* subiovar cmd ID */ 16568 uint16 len; /* total length of all bytes in data[] */ 16569 uint16 pad; /* 4-byte boundary padding */ 16570 uint8 data[]; /* payload */ 16571 } wl_rrm_frng_ioc_t; 16572 16573 enum { 16574 WL_RRM_FRNG_NONE = 0, /* reserved */ 16575 WL_RRM_FRNG_SET_REQ = 1, /* send ftm ranging request */ 16576 WL_RRM_FRNG_MAX = 2 16577 }; 16578 16579 #define WL_RRM_FRNG_NAME "rrm_frng" 16580 #define WL_RRM_FRNG_MIN_LENGTH OFFSETOF(wl_rrm_frng_ioc_t, data) 16581 16582 #define WL_RRM_RPT_VER 0 16583 #define WL_RRM_RPT_MAX_PAYLOAD 256 16584 #define WL_RRM_RPT_MIN_PAYLOAD 7 16585 #define WL_RRM_RPT_FALG_ERR 0 16586 #define WL_RRM_RPT_FALG_GRP_ID_PROPR (1 << 0) 16587 #define WL_RRM_RPT_FALG_GRP_ID_0 (1 << 1) 16588 typedef struct { 16589 uint16 ver; /**< version */ 16590 struct ether_addr addr; /**< STA MAC addr */ 16591 uint32 timestamp; /**< timestamp of the report */ 16592 uint16 flag; /**< flag */ 16593 uint16 len; /**< length of payload data */ 16594 uint8 data[WL_RRM_RPT_MAX_PAYLOAD]; 16595 } statrpt_t; 16596 16597 typedef struct wlc_dwds_config { 16598 uint32 enable; 16599 uint32 mode; /**< STA/AP interface */ 16600 struct ether_addr ea; 16601 uint8 PAD[2]; 16602 } wlc_dwds_config_t; 16603 16604 typedef struct wl_el_set_params_s { 16605 uint8 set; /**< Set number */ 16606 uint8 PAD[3]; 16607 uint32 size; /**< Size to make/expand */ 16608 } wl_el_set_params_t; 16609 16610 typedef struct wl_el_tag_params_s { 16611 uint16 tag; 16612 uint8 set; 16613 uint8 flags; 16614 } wl_el_tag_params_t; 16615 16616 #define EVENT_LOG_SET_TYPE_CURRENT_VERSION 0 16617 typedef struct wl_el_set_type_s { 16618 uint16 version; 16619 uint16 len; 16620 uint8 set; /* Set number */ 16621 uint8 type; /* Type- EVENT_LOG_SET_TYPE_DEFAULT or EVENT_LOG_SET_TYPE_PRSRV */ 16622 uint16 PAD; 16623 } wl_el_set_type_t; 16624 16625 #define EVENT_LOG_SET_TYPE_ALL_V1 1 16626 16627 typedef struct wl_el_set_type_s_v1 { 16628 uint8 set_val; 16629 uint8 type_val; 16630 } wl_el_set_type_v1_t; 16631 16632 typedef struct wl_el_set_all_type_s_v1 { 16633 uint16 version; 16634 uint16 len; 16635 uint32 max_sets; 16636 wl_el_set_type_v1_t set_type[1]; /* set-Type Values Array */ 16637 } wl_el_set_all_type_v1_t; 16638 16639 typedef struct wl_staprio_cfg { 16640 struct ether_addr ea; /**< mac addr */ 16641 uint8 prio; /**< scb priority */ 16642 } wl_staprio_cfg_t; 16643 16644 #define STAMON_STACONFIG_VER 1 16645 /* size of struct wlc_stamon_sta_config_t elements */ 16646 #define STAMON_STACONFIG_LENGTH 20 16647 16648 typedef enum wl_stamon_cfg_cmd_type { 16649 STAMON_CFG_CMD_DEL = 0, 16650 STAMON_CFG_CMD_ADD = 1, 16651 STAMON_CFG_CMD_ENB = 2, 16652 STAMON_CFG_CMD_DSB = 3, 16653 STAMON_CFG_CMD_CNT = 4, 16654 STAMON_CFG_CMD_RSTCNT = 5, 16655 STAMON_CFG_CMD_GET_STATS = 6, 16656 STAMON_CFG_CMD_SET_MONTIME = 7 16657 } wl_stamon_cfg_cmd_type_t; 16658 16659 typedef struct wlc_stamon_sta_config { 16660 wl_stamon_cfg_cmd_type_t cmd; /**< 0 - delete, 1 - add */ 16661 struct ether_addr ea; 16662 uint16 version; /* Command structure version */ 16663 uint16 length; /* Command structure length */ 16664 uint8 pad[2]; 16665 /* Time (ms) for which STA's are monitored. Value ZERO indicates no time limit */ 16666 uint32 monitor_time; 16667 } wlc_stamon_sta_config_t; 16668 16669 /* ifdef SR_DEBUG */ 16670 typedef struct /* pmu_reg */{ 16671 uint32 pmu_control; 16672 uint32 pmu_capabilities; 16673 uint32 pmu_status; 16674 uint32 res_state; 16675 uint32 res_pending; 16676 uint32 pmu_timer1; 16677 uint32 min_res_mask; 16678 uint32 max_res_mask; 16679 uint32 pmu_chipcontrol1[4]; 16680 uint32 pmu_regcontrol[5]; 16681 uint32 pmu_pllcontrol[5]; 16682 uint32 pmu_rsrc_up_down_timer[31]; 16683 uint32 rsrc_dep_mask[31]; 16684 } pmu_reg_t; 16685 /* endif SR_DEBUG */ 16686 16687 typedef struct wl_taf_define { 16688 struct ether_addr ea; /**< STA MAC or 0xFF... */ 16689 uint16 version; /**< version */ 16690 uint32 sch; /**< method index */ 16691 uint32 prio; /**< priority */ 16692 uint32 misc; /**< used for return value */ 16693 uint8 text[]; /**< used to pass and return ascii text */ 16694 } wl_taf_define_t; 16695 16696 /** Received Beacons lengths information */ 16697 #define WL_LAST_BCNS_INFO_FIXED_LEN OFFSETOF(wlc_bcn_len_hist_t, bcnlen_ring) 16698 typedef struct wlc_bcn_len_hist { 16699 uint16 ver; /**< version field */ 16700 uint16 cur_index; /**< current pointed index in ring buffer */ 16701 uint32 max_bcnlen; /**< Max beacon length received */ 16702 uint32 min_bcnlen; /**< Min beacon length received */ 16703 uint32 ringbuff_len; /**< Length of the ring buffer 'bcnlen_ring' */ 16704 uint32 bcnlen_ring[1]; /**< ring buffer storing received beacon lengths */ 16705 } wlc_bcn_len_hist_t; 16706 16707 /* WDS net interface types */ 16708 #define WL_WDSIFTYPE_NONE 0x0 /**< The interface type is neither WDS nor DWDS. */ 16709 #define WL_WDSIFTYPE_WDS 0x1 /**< The interface is WDS type. */ 16710 #define WL_WDSIFTYPE_DWDS 0x2 /**< The interface is DWDS type. */ 16711 16712 typedef struct wl_bssload_static { 16713 uint8 is_static; 16714 uint8 PAD; 16715 uint16 sta_count; 16716 uint8 chan_util; 16717 uint8 PAD; 16718 uint16 aac; 16719 } wl_bssload_static_t; 16720 16721 /* Buffer of size WLC_SAMPLECOLLECT_MAXLEN (=10240 for 4345a0 ACPHY) 16722 * gets copied to this, multiple times 16723 */ 16724 typedef enum wl_gpaio_option { 16725 GPAIO_PMU_AFELDO, 16726 GPAIO_PMU_TXLDO, 16727 GPAIO_PMU_VCOLDO, 16728 GPAIO_PMU_LNALDO, 16729 GPAIO_PMU_ADCLDO, 16730 GPAIO_ICTAT_CAL, 16731 GPAIO_PMU_CLEAR, 16732 GPAIO_OFF, 16733 GPAIO_PMU_LOGENLDO, 16734 GPAIO_PMU_RXLDO2G, 16735 GPAIO_PMU_RXLDO5G, 16736 GPAIO_PMU_LPFTXLDO, 16737 GPAIO_PMU_LDO1P6, 16738 GPAIO_RCAL, 16739 GPAIO_IQDAC_BUF_DC_MEAS, 16740 GPAIO_IQDAC_BUF_DC_CLEAR, 16741 GPAIO_DAC_IQ_DC_RDBK, 16742 GPAIO_DAC_IQ_DC_RDBK_CLEAR, 16743 GPAIO_AFE_LDO_FOR_DAC_DC, 16744 GPAIO_PA5G_VCAS_SOURCE, 16745 GPAIO_BIQ2_DC_MEAS, 16746 GPAIO_BIQ2_DC_CLEAR, 16747 GPAIO_VBATMONITOR, 16748 GPAIO_PA5G_VCAS_GMDRAIN, 16749 GPAIO_PMU_ROLDO, 16750 GPAIO_PMU_PFDLDO, 16751 GPAIO_PMU_LCHLDO, 16752 GPAIO_PMU_MMDLDO, 16753 GPAIO_PMU_VCOCORELDO, 16754 GPAIO_PMU_PLLLDO, 16755 GPAIO_PMU_RXLDO, 16756 GPAIO_IQDAC_DC_TP, 16757 GPAIO_BG_ICTAT_CAL, 16758 GPAIO_BG_ICTAT_UNCAL, 16759 GPAIO_BG_CTAT_UNCAL, 16760 GPAIO_RX_TIA_VDD, 16761 GPAIO_RX_NBIAS_TIA, 16762 GPAIO_RX_NBIAS_LPF, 16763 GPAIO_RX_CMREF_BB, 16764 GPAIO_RX_CMREF_RF, 16765 GPAIO_RX_LDO_RF_V0P8, 16766 GPAIO_RX_IBIAS_N, 16767 GPAIO_RX_IBIAS_P, 16768 GPAIO_DIG_LDO, 16769 GPAIO_IPTAT_UNCAL, 16770 GPAIO_IPTAT_CAL, 16771 GPAIO_VPTAT_UNCAL, 16772 GPAIO_VCTAT_CAL, 16773 GPAIO_VBE, 16774 GPAIO_IOUT_TEST_3U, 16775 GPAIO_VCO_BIAS_N, 16776 GPAIO_VCO_BIAS_P, 16777 GPAIO_VCO_TEMPCO_N, 16778 GPAIO_VCO_TEMPCO_P, 16779 GPAIO_MMD_LDO, 16780 GPAIO_VCO_LDO, 16781 GPAIO_SRO_LDO, 16782 GPAIO_TX_VCTRL, 16783 GPAIO_TX_VCTRL_TC, 16784 GPAIO_GPA_BUF, 16785 GPAIO_LPBK_OUT, 16786 GPAIO_ADC_LPBK_INN, 16787 GPAIO_ADC_LPBK_INP, 16788 GPAIO_ETSSI 16789 } wl_gpaio_option_t; 16790 16791 /** IO Var Operations - the Value of iov_op In wlc_ap_doiovar */ 16792 typedef enum wlc_ap_iov_bss_operation { 16793 WLC_AP_IOV_OP_DELETE = -1, 16794 WLC_AP_IOV_OP_DISABLE = 0, 16795 WLC_AP_IOV_OP_ENABLE = 1, 16796 WLC_AP_IOV_OP_MANUAL_AP_BSSCFG_CREATE = 2, 16797 WLC_AP_IOV_OP_MANUAL_STA_BSSCFG_CREATE = 3, 16798 WLC_AP_IOV_OP_MOVE = 4 16799 } wlc_ap_iov_bss_oper_t; 16800 16801 /* LTE coex info */ 16802 /* Analogue of HCI Set MWS Signaling cmd */ 16803 typedef struct { 16804 int16 mws_rx_assert_offset; 16805 int16 mws_rx_assert_jitter; 16806 int16 mws_rx_deassert_offset; 16807 int16 mws_rx_deassert_jitter; 16808 int16 mws_tx_assert_offset; 16809 int16 mws_tx_assert_jitter; 16810 int16 mws_tx_deassert_offset; 16811 int16 mws_tx_deassert_jitter; 16812 int16 mws_pattern_assert_offset; 16813 int16 mws_pattern_assert_jitter; 16814 int16 mws_inact_dur_assert_offset; 16815 int16 mws_inact_dur_assert_jitter; 16816 int16 mws_scan_freq_assert_offset; 16817 int16 mws_scan_freq_assert_jitter; 16818 int16 mws_prio_assert_offset_req; 16819 } wci2_config_t; 16820 16821 /** Analogue of HCI MWS Channel Params */ 16822 typedef struct { 16823 uint16 mws_rx_center_freq; /**< MHz */ 16824 uint16 mws_tx_center_freq; 16825 uint16 mws_rx_channel_bw; /**< KHz */ 16826 uint16 mws_tx_channel_bw; 16827 uint8 mws_channel_en; 16828 uint8 mws_channel_type; /**< Don't care for WLAN? */ 16829 } mws_params_t; 16830 16831 #define LTECX_MAX_NUM_PERIOD_TYPES 7 16832 16833 /* LTE Frame params */ 16834 typedef struct { 16835 uint16 mws_frame_dur; 16836 int16 mws_framesync_assert_offset; 16837 uint16 mws_framesync_assert_jitter; 16838 uint16 mws_period_dur[LTECX_MAX_NUM_PERIOD_TYPES]; 16839 uint8 mws_period_type[LTECX_MAX_NUM_PERIOD_TYPES]; 16840 uint8 mws_num_periods; 16841 } mws_frame_config_t; 16842 16843 /** MWS wci2 message */ 16844 typedef struct { 16845 uint8 mws_wci2_data; /**< BT-SIG msg */ 16846 uint8 PAD; 16847 uint16 mws_wci2_interval; /**< Interval in us */ 16848 uint16 mws_wci2_repeat; /**< No of msgs to send */ 16849 } mws_wci2_msg_t; 16850 /* MWS ANT map */ 16851 typedef struct { 16852 uint16 combo1; /* mws ant selection 1 */ 16853 uint16 combo2; /* mws ant selection 2 */ 16854 uint16 combo3; /* mws ant selection 3 */ 16855 uint16 combo4; /* mws ant selection 4 */ 16856 } mws_ant_map_t; 16857 16858 /* MWS ANT map 2nd generation */ 16859 typedef struct { 16860 uint16 combo[16]; /* mws ant selection 2nd */ 16861 } mws_ant_map_t_2nd; 16862 16863 /* MWS Coex bitmap v2 map for Type0/Type6 */ 16864 typedef struct { 16865 uint16 bitmap_2G; /* 2G Bitmap */ 16866 uint16 bitmap_5G_lo; /* 5G lo bitmap */ 16867 uint16 bitmap_5G_mid; /* 5G mid bitmap */ 16868 uint16 bitmap_5G_hi; /* 5G hi bitmap */ 16869 } mws_coex_bitmap_v2_t; 16870 16871 /* MWS SCAN_REQ Bitmap */ 16872 typedef struct mws_scanreq_params { 16873 uint16 idx; 16874 uint16 bm_2g; 16875 uint16 bm_5g_lo; 16876 uint16 bm_5g_mid; 16877 uint16 bm_5g_hi; 16878 } mws_scanreq_params_t; 16879 16880 /* MWS NR Coex Channel map */ 16881 #define WL_MWS_NR_COEXMAP_VERSION 1 16882 typedef struct wl_mws_nr_coexmap { 16883 uint16 version; /* Structure version */ 16884 uint16 bitmap_5g_lo; /* bitmap for 5G low channels by 2: 16885 *34-48, 52-56, 60-64, 100-102 16886 */ 16887 uint16 bitmap_5g_mid; /* bitmap for 5G mid channels by 2: 16888 * 104, 108-112, 116-120, 124-128, 16889 * 132-136, 140, 149-151 16890 */ 16891 uint16 bitmap_5g_high; /* bitmap for 5G high channels by 2 16892 * 153, 157-161, 165 16893 */ 16894 } wl_mws_nr_coexmap_t; 16895 16896 typedef struct { 16897 uint32 config; /**< MODE: AUTO (-1), Disable (0), Enable (1) */ 16898 uint32 status; /**< Current state: Disabled (0), Enabled (1) */ 16899 } wl_config_t; 16900 16901 #define WLC_RSDB_MODE_AUTO_MASK 0x80 16902 #define WLC_RSDB_EXTRACT_MODE(val) ((int8)((val) & (~(WLC_RSDB_MODE_AUTO_MASK)))) 16903 16904 typedef struct { 16905 uint16 request; /* type of sensor hub request */ 16906 uint16 enable; /* enable/disable response for specified request */ 16907 uint16 interval; /* interval between responses to the request */ 16908 } shub_req_t; 16909 16910 #define WL_IF_STATS_T_VERSION 1 /**< current version of wl_if_stats structure */ 16911 16912 /** per interface counters */ 16913 typedef struct wl_if_stats { 16914 uint16 version; /**< version of the structure */ 16915 uint16 length; /**< length of the entire structure */ 16916 uint32 PAD; /**< padding */ 16917 16918 /* transmit stat counters */ 16919 uint64 txframe; /**< tx data frames */ 16920 uint64 txbyte; /**< tx data bytes */ 16921 uint64 txerror; /**< tx data errors (derived: sum of others) */ 16922 uint64 txnobuf; /**< tx out of buffer errors */ 16923 uint64 txrunt; /**< tx runt frames */ 16924 uint64 txfail; /**< tx failed frames */ 16925 uint64 txretry; /**< tx retry frames */ 16926 uint64 txretrie; /**< tx multiple retry frames */ 16927 uint64 txfrmsnt; /**< tx sent frames */ 16928 uint64 txmulti; /**< tx mulitcast sent frames */ 16929 uint64 txfrag; /**< tx fragments sent */ 16930 16931 /* receive stat counters */ 16932 uint64 rxframe; /**< rx data frames */ 16933 uint64 rxbyte; /**< rx data bytes */ 16934 uint64 rxerror; /**< rx data errors (derived: sum of others) */ 16935 uint64 rxnobuf; /**< rx out of buffer errors */ 16936 uint64 rxrunt; /**< rx runt frames */ 16937 uint64 rxfragerr; /**< rx fragment errors */ 16938 uint64 rxmulti; /**< rx multicast frames */ 16939 16940 uint64 txexptime; /* DATA Tx frames suppressed due to timer expiration */ 16941 uint64 txrts; /* RTS/CTS succeeeded count */ 16942 uint64 txnocts; /* RTS/CTS faled count */ 16943 16944 uint64 txretrans; /* Number of frame retransmissions */ 16945 } 16946 wl_if_stats_t; 16947 16948 typedef struct wl_band { 16949 uint16 bandtype; /**< WL_BAND_2G, WL_BAND_5G */ 16950 uint16 bandunit; /**< bandstate[] index */ 16951 uint16 phytype; /**< phytype */ 16952 uint16 phyrev; 16953 } 16954 wl_band_t; 16955 16956 #define WL_ROAM_STATS_VER_1 (1u) /**< current version of wl_if_stats structure */ 16957 16958 /** roam statistics counters */ 16959 typedef struct { 16960 uint16 version; /**< version of the structure */ 16961 uint16 length; /**< length of the entire structure */ 16962 uint32 initial_assoc_time; 16963 uint32 prev_roam_time; 16964 uint32 last_roam_event_type; 16965 uint32 last_roam_event_status; 16966 uint32 last_roam_event_reason; 16967 uint16 roam_success_cnt; 16968 uint16 roam_fail_cnt; 16969 uint16 roam_attempt_cnt; 16970 uint16 max_roam_target_cnt; 16971 uint16 min_roam_target_cnt; 16972 uint16 max_cached_ch_cnt; 16973 uint16 min_cached_ch_cnt; 16974 uint16 partial_roam_scan_cnt; 16975 uint16 full_roam_scan_cnt; 16976 uint16 most_roam_reason; 16977 uint16 most_roam_reason_cnt; 16978 } wl_roam_stats_v1_t; 16979 16980 #define WL_WLC_VERSION_T_VERSION 1 /**< current version of wlc_version structure */ 16981 16982 /** wlc interface version */ 16983 typedef struct wl_wlc_version { 16984 uint16 version; /**< version of the structure */ 16985 uint16 length; /**< length of the entire structure */ 16986 16987 /* epi version numbers */ 16988 uint16 epi_ver_major; /**< epi major version number */ 16989 uint16 epi_ver_minor; /**< epi minor version number */ 16990 uint16 epi_rc_num; /**< epi RC number */ 16991 uint16 epi_incr_num; /**< epi increment number */ 16992 16993 /* wlc interface version numbers */ 16994 uint16 wlc_ver_major; /**< wlc interface major version number */ 16995 uint16 wlc_ver_minor; /**< wlc interface minor version number */ 16996 } 16997 wl_wlc_version_t; 16998 16999 #define WL_SCAN_VERSION_T_VERSION 1 /**< current version of scan_version structure */ 17000 /** scan interface version */ 17001 typedef struct wl_scan_version { 17002 uint16 version; /**< version of the structure */ 17003 uint16 length; /**< length of the entire structure */ 17004 17005 /* scan interface version numbers */ 17006 uint16 scan_ver_major; /**< scan interface major version number */ 17007 } wl_scan_version_t; 17008 17009 /* Highest version of WLC_API_VERSION supported */ 17010 #define WLC_API_VERSION_MAJOR_MAX 8 17011 #define WLC_API_VERSION_MINOR_MAX 0 17012 17013 /* begin proxd definitions */ 17014 #include <packed_section_start.h> 17015 17016 #define WL_PROXD_API_VERSION 0x0300u /**< version 3.0 */ 17017 17018 /* proxd version with 11az */ 17019 #define WL_PROXD_11AZ_API_VERSION_1 0x0400u 17020 17021 /** Minimum supported API version */ 17022 #define WL_PROXD_API_MIN_VERSION 0x0300u 17023 17024 /** proximity detection methods */ 17025 enum { 17026 WL_PROXD_METHOD_NONE = 0, 17027 WL_PROXD_METHOD_RSVD1 = 1, /**< backward compatibility - RSSI, not supported */ 17028 WL_PROXD_METHOD_TOF = 2, /**< 11v+BCM proprietary */ 17029 WL_PROXD_METHOD_RSVD2 = 3, /**< 11v only - if needed */ 17030 WL_PROXD_METHOD_FTM = 4, /**< IEEE rev mc/2014 */ 17031 WL_PROXD_METHOD_MAX 17032 }; 17033 typedef int16 wl_proxd_method_t; 17034 17035 /** 11az ftm types */ 17036 enum { 17037 WL_FTM_TYPE_NONE = 0, /* ftm type unspecified */ 17038 WL_FTM_TYPE_MC = 1, /* Legacy MC ftm */ 17039 WL_FTM_TYPE_TB = 2, /* 11az Trigger based */ 17040 WL_FTM_TYPE_NTB = 3, /* 11az Non-trigger based */ 17041 WL_FTM_TYPE_MAX 17042 }; 17043 typedef uint8 wl_ftm_type_t; 17044 17045 /** global and method configuration flags */ 17046 enum { 17047 WL_PROXD_FLAG_NONE = 0x00000000, 17048 WL_PROXD_FLAG_RX_ENABLED = 0x00000001, /**< respond to requests, per bss */ 17049 WL_PROXD_FLAG_RX_RANGE_REQ = 0x00000002, /**< 11mc range requests enabled */ 17050 WL_PROXD_FLAG_TX_LCI = 0x00000004, /**< tx lci, if known */ 17051 WL_PROXD_FLAG_TX_CIVIC = 0x00000008, /**< tx civic, if known */ 17052 WL_PROXD_FLAG_RX_AUTO_BURST = 0x00000010, /**< auto respond w/o host action */ 17053 WL_PROXD_FLAG_TX_AUTO_BURST = 0x00000020, /**< continue tx w/o host action */ 17054 WL_PROXD_FLAG_AVAIL_PUBLISH = 0x00000040, /**< publish availability */ 17055 WL_PROXD_FLAG_AVAIL_SCHEDULE = 0x00000080, /**< schedule using availability */ 17056 WL_PROXD_FLAG_ASAP_CAPABLE = 0x00000100, /* ASAP capable */ 17057 WL_PROXD_FLAG_MBURST_FOLLOWUP = 0x00000200, /* new multi-burst algorithm */ 17058 WL_PROXD_FLAG_SECURE = 0x00000400, /* per bsscfg option */ 17059 WL_PROXD_FLAG_NO_TSF_SYNC = 0x00000800, /* disable tsf sync */ 17060 WL_PROXD_FLAG_ALL = 0xffffffff 17061 }; 17062 typedef uint32 wl_proxd_flags_t; 17063 17064 #define WL_PROXD_FLAGS_AVAIL (WL_PROXD_FLAG_AVAIL_PUBLISH | \ 17065 WL_PROXD_FLAG_AVAIL_SCHEDULE) 17066 17067 typedef enum wl_proxd_session_flags { 17068 WL_PROXD_SESSION_FLAG_NONE = 0x00000000, /**< no flags */ 17069 WL_PROXD_SESSION_FLAG_INITIATOR = 0x00000001, /**< local device is initiator */ 17070 WL_PROXD_SESSION_FLAG_TARGET = 0x00000002, /**< local device is target */ 17071 WL_PROXD_SESSION_FLAG_ONE_WAY = 0x00000004, /**< (initiated) 1-way rtt */ 17072 WL_PROXD_SESSION_FLAG_AUTO_BURST = 0x00000008, /**< created w/ rx_auto_burst */ 17073 WL_PROXD_SESSION_FLAG_PERSIST = 0x00000010, /**< good until cancelled */ 17074 WL_PROXD_SESSION_FLAG_RTT_DETAIL = 0x00000020, /**< rtt detail in results */ 17075 WL_PROXD_SESSION_FLAG_SECURE = 0x00000040, /**< session is secure */ 17076 WL_PROXD_SESSION_FLAG_AOA = 0x00000080, /**< AOA along w/ RTT */ 17077 WL_PROXD_SESSION_FLAG_RX_AUTO_BURST = 0x00000100, /**< Same as proxd flags above */ 17078 WL_PROXD_SESSION_FLAG_TX_AUTO_BURST = 0x00000200, /**< Same as proxd flags above */ 17079 WL_PROXD_SESSION_FLAG_NAN_BSS = 0x00000400, /**< Use NAN BSS, if applicable */ 17080 WL_PROXD_SESSION_FLAG_TS1 = 0x00000800, /**< e.g. FTM1 - ASAP-capable */ 17081 WL_PROXD_SESSION_FLAG_RANDMAC = 0x00001000, /**< use random mac */ 17082 WL_PROXD_SESSION_FLAG_REPORT_FAILURE = 0x00002000, /**< report failure to target */ 17083 WL_PROXD_SESSION_FLAG_INITIATOR_RPT = 0x00004000, /**< report distance to target */ 17084 WL_PROXD_SESSION_FLAG_NOCHANSWT = 0x00008000, 17085 WL_PROXD_SESSION_FLAG_NETRUAL = 0x00010000, /**< netrual mode */ 17086 WL_PROXD_SESSION_FLAG_SEQ_EN = 0x00020000, /**< Toast */ 17087 WL_PROXD_SESSION_FLAG_NO_PARAM_OVRD = 0x00040000, /**< no param override from target */ 17088 WL_PROXD_SESSION_FLAG_ASAP = 0x00080000, /**< ASAP session */ 17089 WL_PROXD_SESSION_FLAG_REQ_LCI = 0x00100000, /**< transmit LCI req */ 17090 WL_PROXD_SESSION_FLAG_REQ_CIV = 0x00200000, /**< transmit civic loc req */ 17091 WL_PROXD_SESSION_FLAG_PRE_SCAN = 0x00400000, /* enable pre-scan for asap=1 */ 17092 WL_PROXD_SESSION_FLAG_AUTO_VHTACK = 0x00800000, /* use vhtack based on brcm ie */ 17093 WL_PROXD_SESSION_FLAG_VHTACK = 0x01000000, /* vht ack is in use - output only */ 17094 WL_PROXD_SESSION_FLAG_BDUR_NOPREF = 0x02000000, /* burst-duration: no preference */ 17095 WL_PROXD_SESSION_FLAG_NUM_FTM_NOPREF = 0x04000000, /* num of FTM frames: no preference */ 17096 WL_PROXD_SESSION_FLAG_FTM_SEP_NOPREF = 0x08000000, /* time btw FTM frams: no pref */ 17097 WL_PROXD_SESSION_FLAG_NUM_BURST_NOPREF = 0x10000000, /* num of bursts: no pref */ 17098 WL_PROXD_SESSION_FLAG_BURST_PERIOD_NOPREF = 0x20000000, /* burst period: no pref */ 17099 WL_PROXD_SESSION_FLAG_MBURST_FOLLOWUP = 0x40000000, /* new mburst algo - reserved */ 17100 WL_PROXD_SESSION_FLAG_MBURST_NODELAY = 0x80000000, /**< good until cancelled */ 17101 /* core rotation on initiator (reuse ONE_WAY bit) */ 17102 WL_PROXD_SESSION_FLAG_CORE_ROTATE = 0x00000004, 17103 WL_PROXD_SESSION_FLAG_ALL = 0xffffffff 17104 } wl_proxd_session_flags_t; 17105 17106 /** session flags for 11AZ */ 17107 17108 /** session flags */ 17109 #define WL_FTM_SESSION_FLAG_NONE 0x0000000000000000llu /* no flags */ 17110 #define WL_FTM_SESSION_FLAG_INITIATOR 0x0000000000000001llu /* local is initiator */ 17111 #define WL_FTM_SESSION_FLAG_TARGET 0x0000000000000002llu /* local is target */ 17112 #define WL_FTM_SESSION_FLAG_CORE_ROTATE 0x0000000000000004llu /* initiator core rotate */ 17113 #define WL_FTM_SESSION_FLAG_AUTO_BURST 0x0000000000000008llu /* rx_auto_burst */ 17114 #define WL_FTM_SESSION_FLAG_PERSIST 0x0000000000000010llu /* good until cancelled */ 17115 #define WL_FTM_SESSION_FLAG_RTT_DETAIL 0x0000000000000020llu /* rtt detail results */ 17116 #define WL_FTM_SESSION_FLAG_SECURE 0x0000000000000040llu /* session is secure */ 17117 #define WL_FTM_SESSION_FLAG_AOA 0x0000000000000080llu /* AOA along w/ RTT */ 17118 #define WL_FTM_SESSION_FLAG_RX_AUTO_BURST 0x0000000000000100llu /* see flags above */ 17119 #define WL_FTM_SESSION_FLAG_TX_AUTO_BURST 0x0000000000000200llu /* see flags above */ 17120 #define WL_FTM_SESSION_FLAG_NAN_BSS 0x0000000000000400llu /* NAN BSS */ 17121 #define WL_FTM_SESSION_FLAG_ASAP_CAPABLE 0x0000000000000800llu /* ASAP-capable */ 17122 #define WL_FTM_SESSION_FLAG_RANDMAC 0x0000000000001000llu /* use random mac */ 17123 #define WL_FTM_SESSION_FLAG_REPORT_FAILURE 0x0000000000002000llu /* failure to target */ 17124 #define WL_FTM_SESSION_FLAG_INITIATOR_RPT 0x0000000000004000llu /* distance to target */ 17125 #define WL_FTM_SESSION_FLAG_NOCHANSWT 0x0000000000008000llu 17126 #define WL_FTM_SESSION_FLAG_NETRUAL 0x0000000000010000llu /* TODO: remove/reserved */ 17127 #define WL_FTM_SESSION_FLAG_SEQ_EN 0x0000000000020000llu /* Toast */ 17128 #define WL_FTM_SESSION_FLAG_NO_PARAM_OVRD 0x0000000000040000llu /* no override from tgt */ 17129 #define WL_FTM_SESSION_FLAG_ASAP 0x0000000000080000llu /* ASAP session */ 17130 #define WL_FTM_SESSION_FLAG_REQ_LCI 0x0000000000100000llu /* tx LCI req */ 17131 #define WL_FTM_SESSION_FLAG_REQ_CIV 0x0000000000200000llu /* tx civic loc req */ 17132 #define WL_FTM_SESSION_FLAG_PRE_SCAN 0x0000000000400000llu /* pre-scan for asap=1 */ 17133 #define WL_FTM_SESSION_FLAG_AUTO_VHTACK 0x0000000000800000llu /* vhtack based on brcmie */ 17134 #define WL_FTM_SESSION_FLAG_VHTACK 0x0000000001000000llu /* vht ack is in use */ 17135 #define WL_FTM_SESSION_FLAG_BDUR_NOPREF 0x0000000002000000llu /* burst-duration no pref */ 17136 #define WL_FTM_SESSION_FLAG_NUM_FTM_NOPREF 0x0000000004000000llu /* num of FTM: no pref */ 17137 #define WL_FTM_SESSION_FLAG_FTM_SEP_NOPREF 0x0000000008000000llu /* time btw FTM: no pref */ 17138 #define WL_FTM_SESSION_FLAG_NUM_BURST_NOPREF 0x0000000010000000llu /* num of bursts: no pref */ 17139 #define WL_FTM_SESSION_FLAG_BURST_PERIOD_NOPREF 0x0000000020000000llu /* burst period: no pref */ 17140 #define WL_FTM_SESSION_FLAG_MBURST_FOLLOWUP 0x0000000040000000llu /* new mburst algo */ 17141 #define WL_FTM_SESSION_FLAG_MBURST_NODELAY 0x0000000080000000llu /* good until cancelled */ 17142 #define WL_FTM_SESSION_FLAG_FULL_BW 0x0000000100000000llu /* use all bandwidth */ 17143 #define WL_FTM_SESSION_FLAG_R2I_TOA_PHASE_SHIFT 0x0000000200000000llu /* phase shft average toa */ 17144 #define WL_FTM_SESSION_FLAG_I2R_TOA_PHASE_SHIFT 0x0000000400000000llu /* phase shft average toa */ 17145 #define WL_FTM_SESSION_FLAG_I2R_IMMEDIATE_RPT 0x0000000800000000llu /* immediate I2R feedback */ 17146 #define WL_FTM_SESSION_FLAG_R2I_IMMEDIATE_RPT 0x0000001000000000llu /* immediate R2R report */ 17147 #define WL_FTM_SESSION_FLAG_DEV_CLASS_A 0x0000002000000000llu /* class A device */ 17148 #define WL_FTM_SESSION_FLAG_ALL 0xffffffffffffffffllu 17149 typedef uint64 wl_ftm_session_flags_t; 17150 typedef uint64 wl_ftm_session_mask_t; 17151 17152 /* flags common across mc/ntb/tb. 17153 * Explicit for the ones that are currently used. 17154 * Currently not used ones still reserve their bits in above. 17155 */ 17156 #define FTM_COMMON_CONFIG_MASK \ 17157 (WL_FTM_SESSION_FLAG_INITIATOR \ 17158 | WL_FTM_SESSION_FLAG_INITIATOR_RPT \ 17159 | WL_FTM_SESSION_FLAG_TARGET \ 17160 | WL_FTM_SESSION_FLAG_SECURE \ 17161 | WL_FTM_SESSION_FLAG_CORE_ROTATE \ 17162 | WL_FTM_SESSION_FLAG_RANDMAC \ 17163 | WL_FTM_SESSION_FLAG_RX_AUTO_BURST \ 17164 | WL_FTM_SESSION_FLAG_TX_AUTO_BURST \ 17165 | WL_FTM_SESSION_FLAG_REQ_LCI \ 17166 | WL_FTM_SESSION_FLAG_REQ_CIV \ 17167 | WL_FTM_SESSION_FLAG_RTT_DETAIL \ 17168 | WL_FTM_SESSION_FLAG_NO_PARAM_OVRD \ 17169 | WL_FTM_SESSION_FLAG_AUTO_BURST) 17170 17171 /* flags relevant to MC sessions */ 17172 #define FTM_MC_CONFIG_MASK \ 17173 (FTM_COMMON_CONFIG_MASK) | \ 17174 (WL_FTM_SESSION_FLAG_AUTO_VHTACK \ 17175 | WL_FTM_SESSION_FLAG_MBURST_NODELAY \ 17176 | WL_FTM_SESSION_FLAG_ASAP_CAPABLE \ 17177 | WL_FTM_SESSION_FLAG_ASAP \ 17178 | WL_FTM_SESSION_FLAG_VHTACK \ 17179 | WL_FTM_SESSION_FLAG_BDUR_NOPREF \ 17180 | WL_FTM_SESSION_FLAG_NUM_FTM_NOPREF \ 17181 | WL_FTM_SESSION_FLAG_FTM_SEP_NOPREF \ 17182 | WL_FTM_SESSION_FLAG_NUM_BURST_NOPREF \ 17183 | WL_FTM_SESSION_FLAG_BURST_PERIOD_NOPREF \ 17184 | WL_FTM_SESSION_FLAG_SEQ_EN \ 17185 | WL_FTM_SESSION_FLAG_MBURST_FOLLOWUP) 17186 17187 /* flags relevant to NTB sessions */ 17188 #define FTM_NTB_CONFIG_MASK \ 17189 (FTM_COMMON_CONFIG_MASK) | \ 17190 (WL_FTM_SESSION_FLAG_R2I_TOA_PHASE_SHIFT \ 17191 | WL_FTM_SESSION_FLAG_I2R_TOA_PHASE_SHIFT \ 17192 | WL_FTM_SESSION_FLAG_I2R_IMMEDIATE_RPT \ 17193 | WL_FTM_SESSION_FLAG_R2I_IMMEDIATE_RPT) 17194 17195 /* flages relevant to TB sessions. To be expanded */ 17196 #define FTM_TB_CONFIG_MASK (FTM_NTB_CONFIG_MASK) 17197 17198 /** time units - mc supports up to 0.1ns resolution */ 17199 enum { 17200 WL_PROXD_TMU_TU = 0, /**< 1024us */ 17201 WL_PROXD_TMU_SEC = 1, 17202 WL_PROXD_TMU_MILLI_SEC = 2, 17203 WL_PROXD_TMU_MICRO_SEC = 3, 17204 WL_PROXD_TMU_NANO_SEC = 4, 17205 WL_PROXD_TMU_PICO_SEC = 5 17206 }; 17207 typedef int16 wl_proxd_tmu_t; 17208 17209 /** time interval e.g. 10ns */ 17210 typedef struct wl_proxd_intvl { 17211 uint32 intvl; 17212 wl_proxd_tmu_t tmu; 17213 uint8 pad[2]; 17214 } wl_proxd_intvl_t; 17215 17216 /** commands that can apply to proxd, method or a session */ 17217 enum { 17218 WL_PROXD_CMD_NONE = 0, 17219 WL_PROXD_CMD_GET_VERSION = 1, 17220 WL_PROXD_CMD_ENABLE = 2, 17221 WL_PROXD_CMD_DISABLE = 3, 17222 WL_PROXD_CMD_CONFIG = 4, 17223 WL_PROXD_CMD_START_SESSION = 5, 17224 WL_PROXD_CMD_BURST_REQUEST = 6, 17225 WL_PROXD_CMD_STOP_SESSION = 7, 17226 WL_PROXD_CMD_DELETE_SESSION = 8, 17227 WL_PROXD_CMD_GET_RESULT = 9, 17228 WL_PROXD_CMD_GET_INFO = 10, 17229 WL_PROXD_CMD_GET_STATUS = 11, 17230 WL_PROXD_CMD_GET_SESSIONS = 12, 17231 WL_PROXD_CMD_GET_COUNTERS = 13, 17232 WL_PROXD_CMD_CLEAR_COUNTERS = 14, 17233 WL_PROXD_CMD_COLLECT = 15, /* not supported, see 'wl proxd_collect' */ 17234 WL_PROXD_CMD_TUNE = 16, /* not supported, see 'wl proxd_tune' */ 17235 WL_PROXD_CMD_DUMP = 17, 17236 WL_PROXD_CMD_START_RANGING = 18, 17237 WL_PROXD_CMD_STOP_RANGING = 19, 17238 WL_PROXD_CMD_GET_RANGING_INFO = 20, 17239 WL_PROXD_CMD_IS_TLV_SUPPORTED = 21, 17240 17241 WL_PROXD_CMD_MAX 17242 }; 17243 typedef int16 wl_proxd_cmd_t; 17244 17245 /* session ids: 17246 * id 0 is reserved 17247 * ids 1..0x7fff - allocated by host/app 17248 * ids 0x8000..0xffff - allocated by firmware, used for auto-rx 17249 */ 17250 enum { 17251 WL_PROXD_SESSION_ID_GLOBAL = 0 17252 }; 17253 17254 /* Externally allocated sids */ 17255 #define WL_PROXD_SID_EXT_MAX 0x7fff 17256 #define WL_PROXD_SID_EXT_ALLOC(_sid) ((_sid) > 0 && (_sid) <= WL_PROXD_SID_EXT_MAX) 17257 17258 /* block size for reserved sid blocks */ 17259 #define WL_PROXD_SID_EXT_BLKSZ 256 17260 #define WL_PROXD_SID_EXT_BLK_START(_i) (WL_PROXD_SID_EXT_MAX - (_i) * WL_PROXD_SID_EXT_BLKSZ + 1) 17261 #define WL_PROXD_SID_EXT_BLK_END(_start) ((_start) + WL_PROXD_SID_EXT_BLKSZ - 1) 17262 17263 /* rrm block */ 17264 #define WL_PROXD_SID_RRM_START WL_PROXD_SID_EXT_BLK_START(1) 17265 #define WL_PROXD_SID_RRM_END WL_PROXD_SID_EXT_BLK_END(WL_PROXD_SID_RRM_START) 17266 17267 /* nan block */ 17268 #define WL_PROXD_SID_NAN_START WL_PROXD_SID_EXT_BLK_START(2) 17269 #define WL_PROXD_SID_NAN_END WL_PROXD_SID_EXT_BLK_END(WL_PROXD_SID_NAN_START) 17270 17271 /** maximum number sessions that can be allocated, may be less if tunable */ 17272 #define WL_PROXD_MAX_SESSIONS 16 17273 17274 typedef uint16 wl_proxd_session_id_t; 17275 17276 /* Use WL_PROXD_E_* errorcodes from this file if BCMUTILS_ERR_CODES not defined */ 17277 #ifndef BCMUTILS_ERR_CODES 17278 17279 /** status - TBD BCME_ vs proxd status - range reserved for BCME_ */ 17280 enum { 17281 WL_PROXD_E_LAST = -1056, 17282 WL_PROXD_E_NOAVAIL = -1056, 17283 WL_PROXD_E_EXT_SCHED = -1055, 17284 WL_PROXD_E_NOT_BCM = -1054, 17285 WL_PROXD_E_FRAME_TYPE = -1053, 17286 WL_PROXD_E_VERNOSUPPORT = -1052, 17287 WL_PROXD_E_SEC_NOKEY = -1051, 17288 WL_PROXD_E_SEC_POLICY = -1050, 17289 WL_PROXD_E_SCAN_INPROCESS = -1049, 17290 WL_PROXD_E_BAD_PARTIAL_TSF = -1048, 17291 WL_PROXD_E_SCANFAIL = -1047, 17292 WL_PROXD_E_NOTSF = -1046, 17293 WL_PROXD_E_POLICY = -1045, 17294 WL_PROXD_E_INCOMPLETE = -1044, 17295 WL_PROXD_E_OVERRIDDEN = -1043, 17296 WL_PROXD_E_ASAP_FAILED = -1042, 17297 WL_PROXD_E_NOTSTARTED = -1041, 17298 WL_PROXD_E_INVALIDMEAS = -1040, 17299 WL_PROXD_E_INCAPABLE = -1039, 17300 WL_PROXD_E_MISMATCH = -1038, 17301 WL_PROXD_E_DUP_SESSION = -1037, 17302 WL_PROXD_E_REMOTE_FAIL = -1036, 17303 WL_PROXD_E_REMOTE_INCAPABLE = -1035, 17304 WL_PROXD_E_SCHED_FAIL = -1034, 17305 WL_PROXD_E_PROTO = -1033, 17306 WL_PROXD_E_EXPIRED = -1032, 17307 WL_PROXD_E_TIMEOUT = -1031, 17308 WL_PROXD_E_NOACK = -1030, 17309 WL_PROXD_E_DEFERRED = -1029, 17310 WL_PROXD_E_INVALID_SID = -1028, 17311 WL_PROXD_E_REMOTE_CANCEL = -1027, 17312 WL_PROXD_E_CANCELED = -1026, /**< local */ 17313 WL_PROXD_E_INVALID_SESSION = -1025, 17314 WL_PROXD_E_BAD_STATE = -1024, 17315 WL_PROXD_E_START = -1024, 17316 WL_PROXD_E_ERROR = -1, 17317 WL_PROXD_E_OK = 0 17318 }; 17319 typedef int32 wl_proxd_status_t; 17320 17321 #endif /* BCMUTILS_ERR_CODES */ 17322 17323 /* proxd errors from phy */ 17324 #define PROXD_TOF_INIT_ERR_BITS 16 17325 17326 enum { 17327 WL_PROXD_PHY_ERR_LB_CORR_THRESH = (1 << 0), /* Loopback Correlation threshold */ 17328 WL_PROXD_PHY_ERR_RX_CORR_THRESH = (1 << 1), /* Received Correlation threshold */ 17329 WL_PROXD_PHY_ERR_LB_PEAK_POWER = (1 << 2), /* Loopback Peak power */ 17330 WL_PROXD_PHY_ERR_RX_PEAK_POWER = (1 << 3), /* Received Peak power */ 17331 WL_PROXD_PHY_ERR_BITFLIP = (1 << 4), /* Bitflips */ 17332 WL_PROXD_PHY_ERR_SNR = (1 << 5), /* SNR */ 17333 WL_PROXD_PHY_RX_STRT_WIN_OFF = (1 << 6), /* Receive start window is off */ 17334 WL_PROXD_PHY_RX_END_WIN_OFF = (1 << 7), /* Receive End window is off */ 17335 WL_PROXD_PHY_ERR_LOW_CONFIDENCE = (1 << 15), /* Low confidence on meas distance */ 17336 }; 17337 typedef uint32 wl_proxd_phy_error_t; 17338 17339 /** session states */ 17340 enum { 17341 WL_PROXD_SESSION_STATE_NONE = 0, 17342 WL_PROXD_SESSION_STATE_CREATED = 1, 17343 WL_PROXD_SESSION_STATE_CONFIGURED = 2, 17344 WL_PROXD_SESSION_STATE_STARTED = 3, 17345 WL_PROXD_SESSION_STATE_DELAY = 4, 17346 WL_PROXD_SESSION_STATE_USER_WAIT = 5, 17347 WL_PROXD_SESSION_STATE_SCHED_WAIT = 6, 17348 WL_PROXD_SESSION_STATE_BURST = 7, 17349 WL_PROXD_SESSION_STATE_STOPPING = 8, 17350 WL_PROXD_SESSION_STATE_ENDED = 9, 17351 WL_PROXD_SESSION_STATE_START_WAIT = 10, 17352 WL_PROXD_SESSION_STATE_DESTROYING = -1 17353 }; 17354 17355 typedef enum wl_ftm_session_state { 17356 WL_FTM_SESSION_STATE_NONE = 0, 17357 WL_FTM_SESSION_STATE_CREATED = 1, 17358 WL_FTM_SESSION_STATE_CONFIGURED = 2, 17359 WL_FTM_SESSION_STATE_STARTED = 3, 17360 WL_FTM_SESSION_STATE_DELAY = 4, 17361 WL_FTM_SESSION_STATE_USER_WAIT = 5, 17362 WL_FTM_SESSION_STATE_SCHED_WAIT = 6, 17363 WL_FTM_SESSION_STATE_BURST = 7, 17364 WL_FTM_SESSION_STATE_ENDED = 8 17365 } wl_ftm_session_state_t; 17366 17367 typedef int16 wl_proxd_session_state_t; 17368 17369 /** RTT sample flags */ 17370 enum { 17371 WL_PROXD_RTT_SAMPLE_NONE = 0x00, 17372 WL_PROXD_RTT_SAMPLE_DISCARD = 0x01 17373 }; 17374 typedef uint8 wl_proxd_rtt_sample_flags_t; 17375 typedef int16 wl_proxd_rssi_t; 17376 typedef uint16 wl_proxd_snr_t; 17377 typedef uint16 wl_proxd_bitflips_t; 17378 17379 /** result flags */ 17380 enum { 17381 WL_PRXOD_RESULT_FLAG_NONE = 0x0000, 17382 WL_PROXD_RESULT_FLAG_NLOS = 0x0001, /**< LOS - if available */ 17383 WL_PROXD_RESULT_FLAG_LOS = 0x0002, /**< NLOS - if available */ 17384 WL_PROXD_RESULT_FLAG_FATAL = 0x0004, /**< Fatal error during burst */ 17385 WL_PROXD_RESULT_FLAG_VHTACK = 0x0008, /* VHTACK or Legacy ACK used */ 17386 WL_PROXD_REQUEST_SENT = 0x0010, /* FTM request was sent */ 17387 WL_PROXD_REQUEST_ACKED = 0x0020, /* FTM request was acked */ 17388 WL_PROXD_LTFSEQ_STARTED = 0x0040, /* LTF sequence started */ 17389 WL_PROXD_RESULT_FLAG_ALL = 0xffff 17390 }; 17391 typedef int16 wl_proxd_result_flags_t; 17392 17393 #define WL_PROXD_RTT_SAMPLE_VERSION_1 1 17394 typedef struct wl_proxd_rtt_sample_v1 { 17395 uint8 id; /**< id for the sample - non-zero */ 17396 wl_proxd_rtt_sample_flags_t flags; 17397 wl_proxd_rssi_t rssi; 17398 wl_proxd_intvl_t rtt; /**< round trip time */ 17399 uint32 ratespec; 17400 wl_proxd_snr_t snr; 17401 wl_proxd_bitflips_t bitflips; 17402 wl_proxd_status_t status; 17403 int32 distance; 17404 wl_proxd_phy_error_t tof_phy_error; 17405 wl_proxd_phy_error_t tof_tgt_phy_error; /* target phy error bit map */ 17406 wl_proxd_snr_t tof_tgt_snr; 17407 wl_proxd_bitflips_t tof_tgt_bitflips; 17408 uint8 coreid; 17409 uint8 pad[3]; 17410 } wl_proxd_rtt_sample_v1_t; 17411 17412 #define WL_PROXD_RTT_RESULT_VERSION_1 1 17413 /** rtt measurement result */ 17414 typedef struct wl_proxd_rtt_result_v1 { 17415 wl_proxd_session_id_t sid; 17416 wl_proxd_result_flags_t flags; 17417 wl_proxd_status_t status; 17418 struct ether_addr peer; 17419 wl_proxd_session_state_t state; /**< current state */ 17420 union { 17421 wl_proxd_intvl_t retry_after; /* hint for errors */ 17422 wl_proxd_intvl_t burst_duration; /* burst duration */ 17423 } u; 17424 wl_proxd_rtt_sample_v1_t avg_rtt; 17425 uint32 avg_dist; /* 1/256m units */ 17426 uint16 sd_rtt; /* RTT standard deviation */ 17427 uint8 num_valid_rtt; /* valid rtt cnt */ 17428 uint8 num_ftm; /* actual num of ftm cnt (Configured) */ 17429 uint16 burst_num; /* in a session */ 17430 uint16 num_rtt; /* 0 if no detail */ 17431 uint16 num_meas; /* number of ftm frames seen OTA */ 17432 uint8 pad[2]; 17433 wl_proxd_rtt_sample_v1_t rtt[1]; /* variable */ 17434 } wl_proxd_rtt_result_v1_t; 17435 17436 #define WL_PROXD_RTT_SAMPLE_VERSION_2 2 17437 typedef struct wl_proxd_rtt_sample_v2 { 17438 uint16 version; 17439 uint16 length; 17440 uint8 id; /**< id for the sample - non-zero */ 17441 wl_proxd_rtt_sample_flags_t flags; 17442 wl_proxd_rssi_t rssi; 17443 wl_proxd_intvl_t rtt; /**< round trip time */ 17444 uint32 ratespec; 17445 wl_proxd_snr_t snr; 17446 wl_proxd_bitflips_t bitflips; 17447 wl_proxd_status_t status; 17448 int32 distance; 17449 wl_proxd_phy_error_t tof_phy_error; 17450 wl_proxd_phy_error_t tof_tgt_phy_error; /* target phy error bit map */ 17451 wl_proxd_snr_t tof_tgt_snr; 17452 wl_proxd_bitflips_t tof_tgt_bitflips; 17453 uint8 coreid; 17454 uint8 pad[3]; 17455 uint32 chanspec; 17456 } wl_proxd_rtt_sample_v2_t; 17457 17458 #define WL_PROXD_RTT_RESULT_VERSION_2 2 17459 /** rtt measurement result */ 17460 typedef struct wl_proxd_rtt_result_v2 { 17461 uint16 version; 17462 uint16 length; /* up to rtt[] */ 17463 wl_proxd_session_id_t sid; 17464 wl_proxd_result_flags_t flags; 17465 wl_proxd_status_t status; 17466 struct ether_addr peer; 17467 wl_proxd_session_state_t state; /**< current state */ 17468 union { 17469 wl_proxd_intvl_t retry_after; /* hint for errors */ 17470 wl_proxd_intvl_t burst_duration; /* burst duration */ 17471 } u; 17472 uint32 avg_dist; /* 1/256m units */ 17473 uint16 sd_rtt; /* RTT standard deviation */ 17474 uint8 num_valid_rtt; /* valid rtt cnt */ 17475 uint8 num_ftm; /* actual num of ftm cnt (Configured) */ 17476 uint16 burst_num; /* in a session */ 17477 uint16 num_rtt; /* 0 if no detail */ 17478 uint16 num_meas; /* number of ftm frames seen OTA */ 17479 uint8 pad[2]; 17480 wl_proxd_rtt_sample_v2_t rtt[1]; /* variable, first element is avg_rtt */ 17481 } wl_proxd_rtt_result_v2_t; 17482 17483 /** aoa measurement result */ 17484 typedef struct wl_proxd_aoa_result { 17485 wl_proxd_session_id_t sid; 17486 wl_proxd_result_flags_t flags; 17487 wl_proxd_status_t status; 17488 struct ether_addr peer; 17489 wl_proxd_session_state_t state; 17490 uint16 burst_num; 17491 uint8 pad[2]; 17492 /* wl_proxd_aoa_sample_t sample_avg; TBD */ 17493 } BWL_POST_PACKED_STRUCT wl_proxd_aoa_result_t; 17494 #include <packed_section_end.h> 17495 17496 /** global stats */ 17497 typedef struct wl_proxd_counters { 17498 uint32 tx; /* tx frame count */ 17499 uint32 rx; /* rx frame count */ 17500 uint32 burst; /* total number of burst */ 17501 uint32 sessions; /* total number of sessions */ 17502 uint32 max_sessions; /* max concurrency */ 17503 uint32 sched_fail; /* scheduling failures */ 17504 uint32 timeouts; /* timeouts */ 17505 uint32 protoerr; /* protocol errors */ 17506 uint32 noack; /* tx w/o ack */ 17507 uint32 txfail; /* any tx falure */ 17508 uint32 lci_req_tx; /* tx LCI requests */ 17509 uint32 lci_req_rx; /* rx LCI requests */ 17510 uint32 lci_rep_tx; /* tx LCI reports */ 17511 uint32 lci_rep_rx; /* rx LCI reports */ 17512 uint32 civic_req_tx; /* tx civic requests */ 17513 uint32 civic_req_rx; /* rx civic requests */ 17514 uint32 civic_rep_tx; /* tx civic reports */ 17515 uint32 civic_rep_rx; /* rx civic reports */ 17516 uint32 rctx; /* ranging contexts created */ 17517 uint32 rctx_done; /* count of ranging done */ 17518 uint32 publish_err; /* availability publishing errors */ 17519 uint32 on_chan; /* count of scheduler onchan */ 17520 uint32 off_chan; /* count of scheduler offchan */ 17521 uint32 tsf_lo; /* local tsf or session tsf */ 17522 uint32 tsf_hi; 17523 uint32 num_meas; 17524 } wl_proxd_counters_t; 17525 17526 typedef struct wl_proxd_counters wl_proxd_session_counters_t; 17527 17528 enum { 17529 WL_PROXD_CAP_NONE = 0x0000, 17530 WL_PROXD_CAP_ALL = 0xffff 17531 }; 17532 typedef int16 wl_proxd_caps_t; 17533 17534 /** method capabilities */ 17535 enum { 17536 WL_PROXD_FTM_CAP_NONE = 0x0000, 17537 WL_PROXD_FTM_CAP_FTM1 = 0x0001 17538 }; 17539 typedef uint16 wl_proxd_ftm_caps_t; 17540 17541 typedef struct wl_proxd_tlv_id_list { 17542 uint16 num_ids; 17543 uint16 ids[1]; 17544 } wl_proxd_tlv_id_list_t; 17545 17546 typedef struct wl_proxd_session_id_list { 17547 uint16 num_ids; 17548 wl_proxd_session_id_t ids[1]; 17549 } wl_proxd_session_id_list_t; 17550 17551 typedef struct wl_proxd_tpk { 17552 struct ether_addr peer; 17553 uint8 tpk[TPK_FTM_LEN]; 17554 } wl_proxd_tpk_t; 17555 17556 /* tlvs returned for get_info on ftm method 17557 * configuration: 17558 * proxd flags 17559 * event mask 17560 * debug mask 17561 * session defaults (session tlvs) 17562 * status tlv - not supported for ftm method 17563 * info tlv 17564 */ 17565 typedef struct wl_proxd_ftm_info { 17566 wl_proxd_ftm_caps_t caps; 17567 uint16 max_sessions; 17568 uint16 num_sessions; 17569 uint16 rx_max_burst; 17570 } wl_proxd_ftm_info_t; 17571 17572 enum { 17573 WL_PROXD_WAIT_NONE = 0x0000, 17574 WL_PROXD_WAIT_KEY = 0x0001, 17575 WL_PROXD_WAIT_SCHED = 0x0002, 17576 WL_PROXD_WAIT_TSF = 0x0004 17577 }; 17578 typedef int16 wl_proxd_wait_reason_t; 17579 17580 /* tlvs returned for get_info on session 17581 * session config (tlvs) 17582 * session info tlv 17583 */ 17584 typedef struct wl_proxd_ftm_session_info { 17585 uint16 sid; 17586 uint8 bss_index; 17587 uint8 pad; 17588 struct ether_addr bssid; 17589 wl_proxd_session_state_t state; 17590 wl_proxd_status_t status; 17591 uint16 burst_num; 17592 wl_proxd_wait_reason_t wait_reason; 17593 uint32 meas_start_lo; /* sn tsf of 1st meas for cur/prev burst */ 17594 uint32 meas_start_hi; 17595 } wl_proxd_ftm_session_info_t; 17596 17597 typedef struct wl_proxd_ftm_session_status { 17598 uint16 sid; 17599 wl_proxd_session_state_t state; 17600 wl_proxd_status_t status; 17601 uint16 burst_num; 17602 uint16 core_info; 17603 } wl_proxd_ftm_session_status_t; 17604 17605 /** rrm range request */ 17606 typedef struct wl_proxd_range_req { 17607 uint16 num_repeat; 17608 uint16 init_delay_range; /**< in TUs */ 17609 uint8 pad; 17610 uint8 num_nbr; /**< number of (possible) neighbors */ 17611 nbr_element_t nbr[1]; 17612 } wl_proxd_range_req_t; 17613 17614 #define WL_PROXD_LCI_LAT_OFF 0 17615 #define WL_PROXD_LCI_LONG_OFF 5 17616 #define WL_PROXD_LCI_ALT_OFF 10 17617 17618 #define WL_PROXD_LCI_GET_LAT(_lci, _lat, _lat_err) { \ 17619 unsigned _off = WL_PROXD_LCI_LAT_OFF; \ 17620 _lat_err = (_lci)->data[(_off)] & 0x3f; \ 17621 _lat = (_lci)->data[(_off)+1]; \ 17622 _lat |= (_lci)->data[(_off)+2] << 8; \ 17623 _lat |= (_lci)->data[_(_off)+3] << 16; \ 17624 _lat |= (_lci)->data[(_off)+4] << 24; \ 17625 _lat <<= 2; \ 17626 _lat |= (_lci)->data[(_off)] >> 6; \ 17627 } 17628 17629 #define WL_PROXD_LCI_GET_LONG(_lci, _lcilong, _long_err) { \ 17630 unsigned _off = WL_PROXD_LCI_LONG_OFF; \ 17631 _long_err = (_lci)->data[(_off)] & 0x3f; \ 17632 _lcilong = (_lci)->data[(_off)+1]; \ 17633 _lcilong |= (_lci)->data[(_off)+2] << 8; \ 17634 _lcilong |= (_lci)->data[_(_off)+3] << 16; \ 17635 _lcilong |= (_lci)->data[(_off)+4] << 24; \ 17636 __lcilong <<= 2; \ 17637 _lcilong |= (_lci)->data[(_off)] >> 6; \ 17638 } 17639 17640 #define WL_PROXD_LCI_GET_ALT(_lci, _alt_type, _alt, _alt_err) { \ 17641 unsigned _off = WL_PROXD_LCI_ALT_OFF; \ 17642 _alt_type = (_lci)->data[_off] & 0x0f; \ 17643 _alt_err = (_lci)->data[(_off)] >> 4; \ 17644 _alt_err |= ((_lci)->data[(_off)+1] & 0x03) << 4; \ 17645 _alt = (_lci)->data[(_off)+2]; \ 17646 _alt |= (_lci)->data[(_off)+3] << 8; \ 17647 _alt |= (_lci)->data[_(_off)+4] << 16; \ 17648 _alt <<= 6; \ 17649 _alt |= (_lci)->data[(_off) + 1] >> 2; \ 17650 } 17651 17652 #define WL_PROXD_LCI_VERSION(_lci) ((_lci)->data[15] >> 6) 17653 17654 /* availability. advertising mechanism bss specific */ 17655 /** availablity flags */ 17656 enum { 17657 WL_PROXD_AVAIL_NONE = 0, 17658 WL_PROXD_AVAIL_NAN_PUBLISHED = 0x0001, 17659 WL_PROXD_AVAIL_SCHEDULED = 0x0002 /**< scheduled by proxd */ 17660 }; 17661 typedef int16 wl_proxd_avail_flags_t; 17662 17663 /** time reference */ 17664 enum { 17665 WL_PROXD_TREF_NONE = 0, 17666 WL_PROXD_TREF_DEV_TSF = 1, 17667 WL_PROXD_TREF_NAN_DW = 2, 17668 WL_PROXD_TREF_TBTT = 3, 17669 WL_PROXD_TREF_MAX /* last entry */ 17670 }; 17671 typedef int16 wl_proxd_time_ref_t; 17672 17673 /** proxd channel-time slot */ 17674 typedef struct { 17675 wl_proxd_intvl_t start; /**< from ref */ 17676 wl_proxd_intvl_t duration; /**< from start */ 17677 uint32 chanspec; 17678 } wl_proxd_time_slot_t; 17679 17680 typedef struct wl_proxd_avail24 { 17681 wl_proxd_avail_flags_t flags; /**< for query only */ 17682 wl_proxd_time_ref_t time_ref; 17683 uint16 max_slots; /**< for query only */ 17684 uint16 num_slots; 17685 wl_proxd_time_slot_t slots[1]; /**< ROM compat - not used */ 17686 wl_proxd_intvl_t repeat; 17687 wl_proxd_time_slot_t ts0[1]; 17688 } wl_proxd_avail24_t; 17689 #define WL_PROXD_AVAIL24_TIMESLOT(_avail24, _i) (&(_avail24)->ts0[(_i)]) 17690 #define WL_PROXD_AVAIL24_TIMESLOT_OFFSET(_avail24) OFFSETOF(wl_proxd_avail24_t, ts0) 17691 #define WL_PROXD_AVAIL24_TIMESLOTS(_avail24) WL_PROXD_AVAIL24_TIMESLOT(_avail24, 0) 17692 #define WL_PROXD_AVAIL24_SIZE(_avail24, _num_slots) (\ 17693 WL_PROXD_AVAIL24_TIMESLOT_OFFSET(_avail24) + \ 17694 (_num_slots) * sizeof(*WL_PROXD_AVAIL24_TIMESLOT(_avail24, 0))) 17695 17696 typedef struct wl_proxd_avail { 17697 wl_proxd_avail_flags_t flags; /**< for query only */ 17698 wl_proxd_time_ref_t time_ref; 17699 uint16 max_slots; /**< for query only */ 17700 uint16 num_slots; 17701 wl_proxd_intvl_t repeat; 17702 wl_proxd_time_slot_t slots[1]; 17703 } wl_proxd_avail_t; 17704 #define WL_PROXD_AVAIL_TIMESLOT(_avail, _i) (&(_avail)->slots[(_i)]) 17705 #define WL_PROXD_AVAIL_TIMESLOT_OFFSET(_avail) OFFSETOF(wl_proxd_avail_t, slots) 17706 17707 #define WL_PROXD_AVAIL_TIMESLOTS(_avail) WL_PROXD_AVAIL_TIMESLOT(_avail, 0) 17708 #define WL_PROXD_AVAIL_SIZE(_avail, _num_slots) (\ 17709 WL_PROXD_AVAIL_TIMESLOT_OFFSET(_avail) + \ 17710 (_num_slots) * sizeof(*WL_PROXD_AVAIL_TIMESLOT(_avail, 0))) 17711 17712 /* collect support TBD */ 17713 17714 /** debugging */ 17715 enum { 17716 WL_PROXD_DEBUG_NONE = 0x00000000, 17717 WL_PROXD_DEBUG_LOG = 0x00000001, 17718 WL_PROXD_DEBUG_IOV = 0x00000002, 17719 WL_PROXD_DEBUG_EVENT = 0x00000004, 17720 WL_PROXD_DEBUG_SESSION = 0x00000008, 17721 WL_PROXD_DEBUG_PROTO = 0x00000010, 17722 WL_PROXD_DEBUG_SCHED = 0x00000020, 17723 WL_PROXD_DEBUG_RANGING = 0x00000040, 17724 WL_PROXD_DEBUG_NAN = 0x00000080, 17725 WL_PROXD_DEBUG_PKT = 0x00000100, 17726 WL_PROXD_DEBUG_SEC = 0x00000200, 17727 WL_PROXD_DEBUG_EVENTLOG = 0x80000000, /* map/enable EVNET_LOG_TAG_PROXD_INFO */ 17728 WL_PROXD_DEBUG_ALL = 0xffffffff 17729 }; 17730 typedef uint32 wl_proxd_debug_mask_t; 17731 17732 /** tlv IDs - data length 4 bytes unless overridden by type, alignment 32 bits */ 17733 typedef enum { 17734 WL_PROXD_TLV_ID_NONE = 0, 17735 WL_PROXD_TLV_ID_METHOD = 1, 17736 WL_PROXD_TLV_ID_FLAGS = 2, 17737 WL_PROXD_TLV_ID_CHANSPEC = 3, /**< note: uint32 */ 17738 WL_PROXD_TLV_ID_TX_POWER = 4, 17739 WL_PROXD_TLV_ID_RATESPEC = 5, 17740 WL_PROXD_TLV_ID_BURST_DURATION = 6, /**< intvl - length of burst */ 17741 WL_PROXD_TLV_ID_BURST_PERIOD = 7, /**< intvl - between bursts */ 17742 WL_PROXD_TLV_ID_BURST_FTM_SEP = 8, /**< intvl - between FTMs */ 17743 WL_PROXD_TLV_ID_BURST_NUM_FTM = 9, /**< uint16 - per burst */ 17744 WL_PROXD_TLV_ID_NUM_BURST = 10, /**< uint16 */ 17745 WL_PROXD_TLV_ID_FTM_RETRIES = 11, /**< uint16 at FTM level */ 17746 WL_PROXD_TLV_ID_BSS_INDEX = 12, /**< uint8 */ 17747 WL_PROXD_TLV_ID_BSSID = 13, 17748 WL_PROXD_TLV_ID_INIT_DELAY = 14, /**< intvl - optional,non-standalone only */ 17749 WL_PROXD_TLV_ID_BURST_TIMEOUT = 15, /**< expect response within - intvl */ 17750 WL_PROXD_TLV_ID_EVENT_MASK = 16, /**< interested events - in/out */ 17751 WL_PROXD_TLV_ID_FLAGS_MASK = 17, /**< interested flags - in only */ 17752 WL_PROXD_TLV_ID_PEER_MAC = 18, /**< mac address of peer */ 17753 WL_PROXD_TLV_ID_FTM_REQ = 19, /**< dot11_ftm_req */ 17754 WL_PROXD_TLV_ID_LCI_REQ = 20, 17755 WL_PROXD_TLV_ID_LCI = 21, 17756 WL_PROXD_TLV_ID_CIVIC_REQ = 22, 17757 WL_PROXD_TLV_ID_CIVIC = 23, 17758 WL_PROXD_TLV_ID_AVAIL24 = 24, /**< ROM compatibility */ 17759 WL_PROXD_TLV_ID_SESSION_FLAGS = 25, 17760 WL_PROXD_TLV_ID_SESSION_FLAGS_MASK = 26, /**< in only */ 17761 WL_PROXD_TLV_ID_RX_MAX_BURST = 27, /**< uint16 - limit bursts per session */ 17762 WL_PROXD_TLV_ID_RANGING_INFO = 28, /**< ranging info */ 17763 WL_PROXD_TLV_ID_RANGING_FLAGS = 29, /**< uint16 */ 17764 WL_PROXD_TLV_ID_RANGING_FLAGS_MASK = 30, /**< uint16, in only */ 17765 WL_PROXD_TLV_ID_NAN_MAP_ID = 31, 17766 WL_PROXD_TLV_ID_DEV_ADDR = 32, 17767 WL_PROXD_TLV_ID_AVAIL = 33, /**< wl_proxd_avail_t */ 17768 WL_PROXD_TLV_ID_TLV_ID = 34, /* uint16 tlv-id */ 17769 WL_PROXD_TLV_ID_FTM_REQ_RETRIES = 35, /* uint16 FTM request retries */ 17770 WL_PROXD_TLV_ID_TPK = 36, /* 32byte TPK */ 17771 WL_PROXD_TLV_ID_RI_RR = 36, /* RI_RR */ 17772 WL_PROXD_TLV_ID_TUNE = 37, /* wl_proxd_pararms_tof_tune_t */ 17773 WL_PROXD_TLV_ID_CUR_ETHER_ADDR = 38, /* Source Address used for Tx */ 17774 17775 /* output - 512 + x */ 17776 WL_PROXD_TLV_ID_STATUS = 512, 17777 WL_PROXD_TLV_ID_COUNTERS = 513, 17778 WL_PROXD_TLV_ID_INFO = 514, 17779 WL_PROXD_TLV_ID_RTT_RESULT = 515, 17780 WL_PROXD_TLV_ID_AOA_RESULT = 516, 17781 WL_PROXD_TLV_ID_SESSION_INFO = 517, 17782 WL_PROXD_TLV_ID_SESSION_STATUS = 518, 17783 WL_PROXD_TLV_ID_SESSION_ID_LIST = 519, 17784 WL_PROXD_TLV_ID_RTT_RESULT_V2 = 520, 17785 17786 /* debug tlvs can be added starting 1024 */ 17787 WL_PROXD_TLV_ID_DEBUG_MASK = 1024, 17788 WL_PROXD_TLV_ID_COLLECT = 1025, /**< output only */ 17789 WL_PROXD_TLV_ID_STRBUF = 1026, 17790 17791 WL_PROXD_TLV_ID_COLLECT_HEADER = 1025, /* wl_proxd_collect_header_t */ 17792 WL_PROXD_TLV_ID_COLLECT_INFO = 1028, /* wl_proxd_collect_info_t */ 17793 WL_PROXD_TLV_ID_COLLECT_DATA = 1029, /* wl_proxd_collect_data_t */ 17794 WL_PROXD_TLV_ID_COLLECT_CHAN_DATA = 1030, /* wl_proxd_collect_data_t */ 17795 WL_PROXD_TLV_ID_MF_STATS_DATA = 1031, /* mf_stats_buffer */ 17796 17797 WL_PROXD_TLV_ID_COLLECT_INLINE_HEADER = 1032, 17798 WL_PROXD_TLV_ID_COLLECT_INLINE_FRAME_INFO = 1033, 17799 WL_PROXD_TLV_ID_COLLECT_INLINE_FRAME_DATA = 1034, 17800 WL_PROXD_TLV_ID_COLLECT_INLINE_RESULTS = 1035, 17801 17802 WL_PROXD_TLV_ID_MAX 17803 } wl_proxd_tlv_types_t; 17804 17805 #define TOF_COLLECT_INLINE_HEADER_INFO_VER_1 1 17806 17807 typedef struct wl_proxd_collect_inline_header_info_v1 17808 { 17809 uint16 version; 17810 uint16 pad1; 17811 uint32 ratespec; /* override */ 17812 chanspec_t chanspec; 17813 uint16 num_ftm; 17814 struct ether_addr peer_mac; 17815 struct ether_addr cur_ether_addr; /* source address for Tx */ 17816 } wl_proxd_collect_inline_header_info_v1_t; 17817 17818 #define TOF_COLLECT_INLINE_RESULTS_VER_1 1 17819 typedef struct wl_proxd_collect_inline_results_info_v1 17820 { 17821 uint16 version; 17822 uint16 pad1; 17823 uint32 meanrtt; 17824 uint32 distance; 17825 uint16 num_rtt; 17826 uint16 pad2; 17827 int32 status; 17828 uint32 ratespec; 17829 } wl_proxd_collect_inline_results_info_v1_t; 17830 17831 #define TOF_COLLECT_INLINE_FRAME_INFO_VER_1 1 17832 typedef struct wl_proxd_collect_inline_frame_info_v1 17833 { 17834 uint16 version; 17835 uint16 pad1; 17836 int32 gd; 17837 uint32 T[4]; 17838 uint32 prev_t1; 17839 uint32 prev_t4; 17840 int32 hadj; 17841 int8 rssi; 17842 uint8 pad[3]; 17843 } wl_proxd_collect_inline_frame_info_v1_t; 17844 17845 #define TOF_COLLECT_INLINE_FRAME_INFO_VER_2 2 17846 typedef struct wl_proxd_collect_inline_frame_info_v2 17847 { 17848 uint16 version; 17849 uint16 pad1; 17850 int32 gd; 17851 uint32 T[4]; 17852 int32 hadj; 17853 int8 rssi; 17854 uint8 pad[3]; 17855 } wl_proxd_collect_inline_frame_info_v2_t; 17856 17857 typedef struct wl_proxd_tlv { 17858 uint16 id; 17859 uint16 len; 17860 uint8 data[1]; 17861 } wl_proxd_tlv_t; 17862 17863 /** proxd iovar - applies to proxd, method or session */ 17864 typedef struct wl_proxd_iov { 17865 uint16 version; 17866 uint16 len; 17867 wl_proxd_cmd_t cmd; 17868 wl_proxd_method_t method; 17869 wl_proxd_session_id_t sid; 17870 wl_ftm_type_t ftm_type; /* 11az ftm type. Only valid with PROXD vers >= 0x0400 */ 17871 uint8 PAD[1]; 17872 wl_proxd_tlv_t tlvs[1]; /**< variable */ 17873 } wl_proxd_iov_t; 17874 17875 #define WL_PROXD_IOV_HDR_SIZE OFFSETOF(wl_proxd_iov_t, tlvs) 17876 17877 /* The following event definitions may move to bcmevent.h, but sharing proxd types 17878 * across needs more invasive changes unrelated to proxd 17879 */ 17880 enum { 17881 WL_PROXD_EVENT_NONE = 0, /**< not an event, reserved */ 17882 WL_PROXD_EVENT_SESSION_CREATE = 1, 17883 WL_PROXD_EVENT_SESSION_START = 2, 17884 WL_PROXD_EVENT_FTM_REQ = 3, 17885 WL_PROXD_EVENT_BURST_START = 4, 17886 WL_PROXD_EVENT_BURST_END = 5, 17887 WL_PROXD_EVENT_SESSION_END = 6, 17888 WL_PROXD_EVENT_SESSION_RESTART = 7, 17889 WL_PROXD_EVENT_BURST_RESCHED = 8, /**< burst rescheduled-e.g. partial TSF */ 17890 WL_PROXD_EVENT_SESSION_DESTROY = 9, 17891 WL_PROXD_EVENT_RANGE_REQ = 10, 17892 WL_PROXD_EVENT_FTM_FRAME = 11, 17893 WL_PROXD_EVENT_DELAY = 12, 17894 WL_PROXD_EVENT_VS_INITIATOR_RPT = 13, /**< (target) rx initiator-report */ 17895 WL_PROXD_EVENT_RANGING = 14, 17896 WL_PROXD_EVENT_LCI_MEAS_REP = 15, /* LCI measurement report */ 17897 WL_PROXD_EVENT_CIVIC_MEAS_REP = 16, /* civic measurement report */ 17898 WL_PROXD_EVENT_COLLECT = 17, 17899 WL_PROXD_EVENT_START_WAIT = 18, /* waiting to start */ 17900 WL_PROXD_EVENT_MF_STATS = 19, /* mf stats event */ 17901 17902 WL_PROXD_EVENT_MAX 17903 }; 17904 typedef int16 wl_proxd_event_type_t; 17905 17906 /** proxd event mask - upto 32 events for now */ 17907 typedef uint32 wl_proxd_event_mask_t; 17908 17909 #define WL_PROXD_EVENT_MASK_ALL 0xfffffffe 17910 #define WL_PROXD_EVENT_MASK_EVENT(_event_type) (1 << (_event_type)) 17911 #define WL_PROXD_EVENT_ENABLED(_mask, _event_type) (\ 17912 ((_mask) & WL_PROXD_EVENT_MASK_EVENT(_event_type)) != 0) 17913 17914 /** proxd event - applies to proxd, method or session */ 17915 typedef struct wl_proxd_event { 17916 uint16 version; 17917 uint16 len; 17918 wl_proxd_event_type_t type; 17919 wl_proxd_method_t method; 17920 wl_proxd_session_id_t sid; 17921 uint8 pad[2]; /* This field is used fragmentation purpose */ 17922 wl_proxd_tlv_t tlvs[1]; /**< variable */ 17923 } wl_proxd_event_t; 17924 17925 enum { 17926 WL_PROXD_RANGING_STATE_NONE = 0, 17927 WL_PROXD_RANGING_STATE_NOTSTARTED = 1, 17928 WL_PROXD_RANGING_STATE_INPROGRESS = 2, 17929 WL_PROXD_RANGING_STATE_DONE = 3 17930 }; 17931 typedef int16 wl_proxd_ranging_state_t; 17932 17933 /** proxd ranging flags */ 17934 enum { 17935 WL_PROXD_RANGING_FLAG_NONE = 0x0000, /**< no flags */ 17936 WL_PROXD_RANGING_FLAG_DEL_SESSIONS_ON_STOP = 0x0001, 17937 WL_PROXD_RANGING_FLAG_ALL = 0xffff 17938 }; 17939 typedef uint16 wl_proxd_ranging_flags_t; 17940 17941 struct wl_proxd_ranging_info { 17942 wl_proxd_status_t status; 17943 wl_proxd_ranging_state_t state; 17944 wl_proxd_ranging_flags_t flags; 17945 uint16 num_sids; 17946 uint16 num_done; 17947 }; 17948 typedef struct wl_proxd_ranging_info wl_proxd_ranging_info_t; 17949 17950 #include <packed_section_start.h> 17951 /* Legacy platform i.e. 43342/43430 */ 17952 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_1 1 17953 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_event_data_v1 { 17954 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 17955 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 17956 uint8 ri_rr[FTM_TPK_LEN]; 17957 wl_proxd_phy_error_t phy_err_mask; 17958 } BWL_POST_PACKED_STRUCT wl_proxd_collect_event_data_v1_t; 17959 17960 /* Secured 2.0 supoorted devices i.e. 4364 */ 17961 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_2 2 17962 typedef BWL_PRE_PACKED_STRUCT struct wl_proxd_collect_event_data_v2 { 17963 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 17964 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 17965 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 17966 wl_proxd_phy_error_t phy_err_mask; 17967 } BWL_POST_PACKED_STRUCT wl_proxd_collect_event_data_v2_t; 17968 #include <packed_section_end.h> 17969 17970 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_3 3 17971 typedef struct wl_proxd_collect_event_data_v3 { 17972 uint16 version; 17973 uint16 length; 17974 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 17975 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 17976 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0]; 17977 wl_proxd_phy_error_t phy_err_mask; 17978 } wl_proxd_collect_event_data_v3_t; 17979 17980 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_4 4 17981 typedef struct wl_proxd_collect_event_data_v4 { 17982 uint16 version; 17983 uint16 length; 17984 uint32 H_LB[K_TOF_COLLECT_H_SIZE_20MHZ]; 17985 uint32 H_RX[K_TOF_COLLECT_H_SIZE_20MHZ]; 17986 uint8 ri_rr[FTM_TPK_RI_RR_LEN_SECURE_2_0_5G]; 17987 wl_proxd_phy_error_t phy_err_mask; 17988 } wl_proxd_collect_event_data_v4_t; 17989 17990 #define WL_PROXD_COLLECT_EVENT_DATA_VERSION_MAX WL_PROXD_COLLECT_EVENT_DATA_VERSION_4 17991 17992 /** Data returned by the bssload_report iovar. This is also the WLC_E_BSS_LOAD event data */ 17993 #include <packed_section_start.h> 17994 typedef BWL_PRE_PACKED_STRUCT struct wl_bssload { 17995 uint16 sta_count; /**< station count */ 17996 uint16 aac; /**< available admission capacity */ 17997 uint8 chan_util; /**< channel utilization */ 17998 } BWL_POST_PACKED_STRUCT wl_bssload_t; 17999 #include <packed_section_end.h> 18000 18001 /** 18002 * Maximum number of configurable BSS Load levels. The number of BSS Load 18003 * ranges is always 1 more than the number of configured levels. eg. if 18004 * 3 levels of 10, 20, 30 are configured then this defines 4 load ranges: 18005 * 0-10, 11-20, 21-30, 31-255. A WLC_E_BSS_LOAD event is generated each time 18006 * the utilization level crosses into another range, subject to the rate limit. 18007 */ 18008 #define MAX_BSSLOAD_LEVELS 8 18009 #define MAX_BSSLOAD_RANGES (MAX_BSSLOAD_LEVELS + 1) 18010 18011 /** BSS Load event notification configuration. */ 18012 typedef struct wl_bssload_cfg { 18013 uint32 rate_limit_msec; /**< # of events posted to application will be limited to 18014 * one per specified period (0 to disable rate limit). 18015 */ 18016 uint8 num_util_levels; /**< Number of entries in util_levels[] below */ 18017 uint8 util_levels[MAX_BSSLOAD_LEVELS]; 18018 /**< Variable number of BSS Load utilization levels in 18019 * low to high order. An event will be posted each time 18020 * a received beacon's BSS Load IE channel utilization 18021 * value crosses a level. 18022 */ 18023 uint8 PAD[3]; 18024 } wl_bssload_cfg_t; 18025 18026 /** User roam cache support */ 18027 #define WL_USER_ROAM_CACHE_VER_1 1u 18028 #define WL_USER_ROAM_CACHE_VER WL_USER_ROAM_CACHE_VER_1 18029 18030 #define WL_USER_ROAM_CACHE_GET 0u /**< Read back the chanspec[s] */ 18031 #define WL_USER_ROAM_CACHE_ADD 1u /**< Add chanspec[s] */ 18032 #define WL_USER_ROAM_CACHE_DEL 2u /**< Delete chanspec[s] */ 18033 #define WL_USER_ROAM_CACHE_CLR 3u /**< Delete all chanspec[s] */ 18034 #define WL_USER_ROAM_CACHE_OVERRIDE 4u /**< Set to use roam cached chanspec only */ 18035 18036 typedef struct wl_user_roamcache { 18037 uint16 version; 18038 uint16 length; /**< Total length including version and length */ 18039 uint32 subcmd; /**< Sub-command for chanspec add/rel etc.. */ 18040 union { 18041 uint32 val; /**< Command value when applicable */ 18042 struct { 18043 uint16 num_ch; /**< Number of chanspecs in the following array */ 18044 chanspec_t chanspecs[]; 18045 } chlist; 18046 } u; 18047 } wl_user_roamcache_t; 18048 18049 /** Multiple roaming profile suport */ 18050 #define WL_MAX_ROAM_PROF_BRACKETS 4 18051 18052 #define WL_ROAM_PROF_VER_0 0 18053 #define WL_ROAM_PROF_VER_1 1 18054 #define WL_ROAM_PROF_VER_2 2 18055 #define WL_ROAM_PROF_VER_3 3 18056 18057 #define WL_MAX_ROAM_PROF_VER WL_ROAM_PROF_VER_1 18058 18059 #define WL_ROAM_PROF_NONE (0 << 0) 18060 #define WL_ROAM_PROF_LAZY (1 << 0) 18061 #define WL_ROAM_PROF_NO_CI (1 << 1) 18062 #define WL_ROAM_PROF_SUSPEND (1 << 2) 18063 #define WL_ROAM_PROF_EXTSCAN (1 << 3) 18064 #define WL_ROAM_PROF_SYNC_DTIM (1 << 6) 18065 #define WL_ROAM_PROF_DEFAULT (1 << 7) /**< backward compatible single default profile */ 18066 18067 #define WL_FACTOR_TABLE_MAX_LIMIT 5 18068 18069 #define WL_CU_2G_ROAM_TRIGGER (-60) 18070 #define WL_CU_5G_ROAM_TRIGGER (-70) 18071 18072 #define WL_CU_SCORE_DELTA_DEFAULT 20 18073 18074 #define WL_MAX_CHANNEL_USAGE 0x0FF 18075 #define WL_CU_PERCENTAGE_DISABLE 0 18076 #define WL_CU_PERCENTAGE_DEFAULT 70 18077 #define WL_CU_PERCENTAGE_MAX 100 18078 #define WL_CU_CALC_DURATION_DEFAULT 10 /* seconds */ 18079 #define WL_CU_CALC_DURATION_MAX 60 /* seconds */ 18080 18081 #define WL_ESTM_LOW_TRIGGER_DISABLE 0 18082 #define WL_ESTM_LOW_TRIGGER_DEFAULT 5 /* Mbps */ 18083 #define WL_ESTM_LOW_TRIGGER_MAX 250 /* Mbps */ 18084 #define WL_ESTM_ROAM_DELTA_DEFAULT 10 18085 18086 typedef struct wl_roam_prof_v4 { 18087 uint8 roam_flags; /**< bit flags */ 18088 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 18089 int8 rssi_lower; 18090 int8 roam_delta; 18091 18092 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 18093 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 18094 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 18095 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 18096 uint16 nfscan; /**< number of full scan to start with */ 18097 uint16 fullscan_period; 18098 uint16 init_scan_period; 18099 uint16 backoff_multiplier; 18100 uint16 max_scan_period; 18101 uint8 channel_usage; 18102 uint8 cu_avg_calc_dur; 18103 uint16 estm_low_trigger; /**< ESTM low throughput roam trigger */ 18104 int8 estm_roam_delta; /**< ESTM low throughput roam delta */ 18105 int8 pad[3]; 18106 uint16 lp_roamscan_period; 18107 uint16 max_fullscan_period; 18108 } wl_roam_prof_v4_t; 18109 18110 typedef struct wl_roam_prof_v3 { 18111 uint8 roam_flags; /**< bit flags */ 18112 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 18113 int8 rssi_lower; 18114 int8 roam_delta; 18115 18116 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 18117 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 18118 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 18119 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 18120 uint16 nfscan; /**< number of full scan to start with */ 18121 uint16 fullscan_period; 18122 uint16 init_scan_period; 18123 uint16 backoff_multiplier; 18124 uint16 max_scan_period; 18125 uint8 channel_usage; 18126 uint8 cu_avg_calc_dur; 18127 uint16 estm_low_trigger; /**< ESTM low throughput roam trigger */ 18128 int8 estm_roam_delta; /**< ESTM low throughput roam delta */ 18129 uint8 pad; 18130 } wl_roam_prof_v3_t; 18131 18132 typedef struct wl_roam_prof_v2 { 18133 int8 roam_flags; /**< bit flags */ 18134 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 18135 int8 rssi_lower; 18136 int8 roam_delta; 18137 18138 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 18139 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 18140 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 18141 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 18142 uint16 nfscan; /**< number of full scan to start with */ 18143 uint16 fullscan_period; 18144 uint16 init_scan_period; 18145 uint16 backoff_multiplier; 18146 uint16 max_scan_period; 18147 uint8 channel_usage; 18148 uint8 cu_avg_calc_dur; 18149 uint8 pad[2]; 18150 } wl_roam_prof_v2_t; 18151 18152 typedef struct wl_roam_prof_v1 { 18153 int8 roam_flags; /**< bit flags */ 18154 int8 roam_trigger; /**< RSSI trigger level per profile/RSSI bracket */ 18155 int8 rssi_lower; 18156 int8 roam_delta; 18157 18158 /* if channel_usage if zero, roam_delta is rssi delta required for new AP */ 18159 /* if channel_usage if non-zero, roam_delta is score delta(%) required for new AP */ 18160 int8 rssi_boost_thresh; /**< Min RSSI to qualify for RSSI boost */ 18161 int8 rssi_boost_delta; /**< RSSI boost for AP in the other band */ 18162 uint16 nfscan; /**< number of full scan to start with */ 18163 uint16 fullscan_period; 18164 uint16 init_scan_period; 18165 uint16 backoff_multiplier; 18166 uint16 max_scan_period; 18167 } wl_roam_prof_v1_t; 18168 18169 typedef struct wl_roam_prof_band_v4 { 18170 uint32 band; /**< Must be just one band */ 18171 uint16 ver; /**< version of this struct */ 18172 uint16 len; /**< length in bytes of this structure */ 18173 wl_roam_prof_v4_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 18174 } wl_roam_prof_band_v4_t; 18175 18176 typedef struct wl_roam_prof_band_v3 { 18177 uint32 band; /**< Must be just one band */ 18178 uint16 ver; /**< version of this struct */ 18179 uint16 len; /**< length in bytes of this structure */ 18180 wl_roam_prof_v3_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 18181 } wl_roam_prof_band_v3_t; 18182 18183 typedef struct wl_roam_prof_band_v2 { 18184 uint32 band; /**< Must be just one band */ 18185 uint16 ver; /**< version of this struct */ 18186 uint16 len; /**< length in bytes of this structure */ 18187 wl_roam_prof_v2_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 18188 } wl_roam_prof_band_v2_t; 18189 18190 typedef struct wl_roam_prof_band_v1 { 18191 uint32 band; /**< Must be just one band */ 18192 uint16 ver; /**< version of this struct */ 18193 uint16 len; /**< length in bytes of this structure */ 18194 wl_roam_prof_v1_t roam_prof[WL_MAX_ROAM_PROF_BRACKETS]; 18195 } wl_roam_prof_band_v1_t; 18196 18197 #define BSS_MAXTABLE_SIZE 10 18198 #define WNM_BSS_SELECT_FACTOR_VERSION 1 18199 typedef struct wnm_bss_select_factor_params { 18200 uint8 low; 18201 uint8 high; 18202 uint8 factor; 18203 uint8 pad; 18204 } wnm_bss_select_factor_params_t; 18205 18206 #define WNM_BSS_SELECT_FIXED_SIZE OFFSETOF(wnm_bss_select_factor_cfg_t, params) 18207 typedef struct wnm_bss_select_factor_cfg { 18208 uint8 version; 18209 uint8 band; 18210 uint16 type; 18211 uint16 pad; 18212 uint16 count; 18213 wnm_bss_select_factor_params_t params[1]; 18214 } wnm_bss_select_factor_cfg_t; 18215 18216 #define WNM_BSS_SELECT_WEIGHT_VERSION 1 18217 typedef struct wnm_bss_select_weight_cfg { 18218 uint8 version; 18219 uint8 band; 18220 uint16 type; 18221 uint16 weight; /* weightage for each type between 0 to 100 */ 18222 } wnm_bss_select_weight_cfg_t; 18223 18224 /* For branches before koala .. wbtext is part 18225 * of wnm need to use below type only 18226 */ 18227 typedef struct wnm_btm_default_score_cfg { 18228 uint32 default_score; /* default score */ 18229 uint8 band; 18230 } wnm_btm_default_score_cfg_t; 18231 18232 /* For branches from koala and above .. wbtext is 18233 * seperate module..need to use below type only 18234 */ 18235 typedef struct wbtext_btm_default_score_cfg { 18236 uint32 default_score; /* default score */ 18237 uint8 band; 18238 } wbtext_btm_default_score_cfg_t; 18239 18240 #define WNM_BSS_SELECT_TYPE_RSSI 0 18241 #define WNM_BSS_SELECT_TYPE_CU 1 18242 #define WNM_BSS_SELECT_TYPE_ESTM_DL 2 18243 18244 #define WNM_BSSLOAD_MONITOR_VERSION 1 18245 typedef struct wnm_bssload_monitor_cfg { 18246 uint8 version; 18247 uint8 band; 18248 uint8 duration; /* duration between 1 to 20sec */ 18249 } wnm_bssload_monitor_cfg_t; 18250 18251 #define WNM_ROAM_TRIGGER_VERSION 1 18252 typedef struct wnm_roam_trigger_cfg { 18253 uint8 version; 18254 uint8 band; 18255 uint16 type; 18256 int16 trigger; /* trigger for each type in new roam algorithm */ 18257 } wnm_roam_trigger_cfg_t; 18258 18259 /* Data structures for Interface Create/Remove */ 18260 18261 #define WL_INTERFACE_CREATE_VER_0 0 18262 #define WL_INTERFACE_CREATE_VER_1 1 18263 #define WL_INTERFACE_CREATE_VER_2 2 18264 #define WL_INTERFACE_CREATE_VER_3 3 18265 18266 /* 18267 * The flags filed of the wl_interface_create is designed to be 18268 * a Bit Mask. As of now only Bit 0 and Bit 1 are used as mentioned below. 18269 * The rest of the bits can be used, incase we have to provide 18270 * more information to the dongle 18271 */ 18272 18273 /* 18274 * Bit 0 of flags field is used to inform whether the interface requested to 18275 * be created is STA or AP. 18276 * 0 - Create a STA interface 18277 * 1 - Create an AP interface 18278 * NOTE: This Bit 0 is applicable for the WL_INTERFACE_CREATE_VER < 2 18279 */ 18280 #define WL_INTERFACE_CREATE_STA (0 << 0) 18281 #define WL_INTERFACE_CREATE_AP (1 << 0) 18282 18283 /* 18284 * From revision >= 2 Bit 0 of flags field will not used be for STA or AP interface creation. 18285 * "iftype" field shall be used for identifying the interface type. 18286 */ 18287 typedef enum wl_interface_type { 18288 WL_INTERFACE_TYPE_STA = 0, 18289 WL_INTERFACE_TYPE_AP = 1, 18290 18291 #ifdef WLAWDL 18292 WL_INTERFACE_TYPE_AWDL = 2, 18293 #endif /* WLAWDL */ 18294 18295 WL_INTERFACE_TYPE_NAN = 3, 18296 WL_INTERFACE_TYPE_P2P_GO = 4, 18297 WL_INTERFACE_TYPE_P2P_GC = 5, 18298 WL_INTERFACE_TYPE_P2P_DISC = 6, 18299 WL_INTERFACE_TYPE_IBSS = 7, 18300 WL_INTERFACE_TYPE_MESH = 8, 18301 WL_INTERFACE_TYPE_MAX 18302 } wl_interface_type_t; 18303 18304 /* 18305 * Bit 1 of flags field is used to inform whether MAC is present in the 18306 * data structure or not. 18307 * 0 - Ignore mac_addr field 18308 * 1 - Use the mac_addr field 18309 */ 18310 #define WL_INTERFACE_MAC_DONT_USE (0 << 1) 18311 #define WL_INTERFACE_MAC_USE (1 << 1) 18312 18313 /* 18314 * Bit 2 of flags field is used to inform whether core or wlc index 18315 * is present in the data structure or not. 18316 * 0 - Ignore wlc_index field 18317 * 1 - Use the wlc_index field 18318 */ 18319 #define WL_INTERFACE_WLC_INDEX_DONT_USE (0 << 2) 18320 #define WL_INTERFACE_WLC_INDEX_USE (1 << 2) 18321 18322 /* 18323 * Bit 3 of flags field is used to create interface on the host requested interface index 18324 * 0 - Ignore if_index field 18325 * 1 - Use the if_index field 18326 */ 18327 #define WL_INTERFACE_IF_INDEX_USE (1 << 3) 18328 18329 /* 18330 * Bit 4 of flags field is used to assign BSSID 18331 * 0 - Ignore bssid field 18332 * 1 - Use the bssid field 18333 */ 18334 #define WL_INTERFACE_BSSID_INDEX_USE (1 << 4) 18335 18336 typedef struct wl_interface_create_v0 { 18337 uint16 ver; /**< version of this struct */ 18338 uint32 flags; /**< flags that defines the operation */ 18339 struct ether_addr mac_addr; /**< Optional Mac address */ 18340 } wl_interface_create_v0_t; 18341 18342 typedef struct wl_interface_create { 18343 uint16 ver; /**< version of this struct */ 18344 uint8 pad1[2]; /**< Padding bytes */ 18345 uint32 flags; /**< flags that defines the operation */ 18346 struct ether_addr mac_addr; /**< Optional Mac address */ 18347 uint8 pad2[2]; /**< Padding bytes */ 18348 uint32 wlc_index; /**< Optional wlc index */ 18349 } wl_interface_create_v1_t; 18350 18351 typedef struct wl_interface_create_v2 { 18352 uint16 ver; /**< version of this struct */ 18353 uint8 pad1[2]; /**< Padding bytes */ 18354 uint32 flags; /**< flags that defines the operation */ 18355 struct ether_addr mac_addr; /**< Optional Mac address */ 18356 uint8 iftype; /**< Type of interface created */ 18357 uint8 pad2; /**< Padding bytes */ 18358 uint32 wlc_index; /**< Optional wlc index */ 18359 } wl_interface_create_v2_t; 18360 18361 typedef struct wl_interface_create_v3 { 18362 uint16 ver; /**< version of this struct */ 18363 uint16 len; /**< length of whole structure including variable length */ 18364 uint16 fixed_len; /**< Fixed length of this structure excluding data[] */ 18365 uint8 iftype; /**< Type of interface created */ 18366 uint8 wlc_index; /**< Optional wlc index */ 18367 uint32 flags; /**< flags that defines the operation */ 18368 struct ether_addr mac_addr; /**< Optional Mac address */ 18369 struct ether_addr bssid; /**< Optional BSSID */ 18370 uint8 if_index; /**< interface index requested by Host */ 18371 uint8 pad[3]; /**< Padding bytes to ensure data[] is at 32 bit aligned */ 18372 uint8 data[]; /**< Optional application/Module specific data */ 18373 } wl_interface_create_v3_t; 18374 18375 #define WL_INTERFACE_INFO_VER_0 0 18376 #define WL_INTERFACE_INFO_VER_1 1 18377 #define WL_INTERFACE_INFO_VER_2 2 18378 18379 typedef struct wl_interface_info_v0 { 18380 uint16 ver; /**< version of this struct */ 18381 struct ether_addr mac_addr; /**< MAC address of the interface */ 18382 char ifname[BCM_MSG_IFNAME_MAX]; /**< name of interface */ 18383 uint8 bsscfgidx; /**< source bsscfg index */ 18384 } wl_interface_info_v0_t; 18385 18386 typedef struct wl_interface_info_v1 { 18387 uint16 ver; /**< version of this struct */ 18388 struct ether_addr mac_addr; /**< MAC address of the interface */ 18389 char ifname[BCM_MSG_IFNAME_MAX]; /**< name of interface */ 18390 uint8 bsscfgidx; /**< source bsscfg index */ 18391 uint8 PAD; 18392 } wl_interface_info_v1_t; 18393 18394 typedef struct wl_interface_info_v2 { 18395 uint16 ver; /**< version of this struct */ 18396 uint16 length; /**< length of the whole structure */ 18397 struct ether_addr mac_addr; /**< MAC address of the interface */ 18398 uint8 bsscfgidx; /**< source bsscfg index */ 18399 uint8 if_index; /**< Interface index allocated by FW */ 18400 char ifname[BCM_MSG_IFNAME_MAX]; /**< name of interface */ 18401 } wl_interface_info_v2_t; 18402 18403 #define PHY_RXIQEST_AVERAGING_DELAY 10 18404 18405 typedef struct wl_iqest_params { 18406 uint32 rxiq; 18407 uint8 niter; 18408 uint8 delay; 18409 uint8 PAD[2]; 18410 } wl_iqest_params_t; 18411 18412 typedef struct wl_iqest_sweep_params { 18413 wl_iqest_params_t params; 18414 uint8 nchannels; 18415 uint8 channel[3]; /** variable */ 18416 } wl_iqest_sweep_params_t; 18417 18418 typedef struct wl_iqest_value { 18419 uint8 channel; 18420 uint8 PAD[3]; 18421 uint32 rxiq; 18422 } wl_iqest_value_t; 18423 18424 typedef struct wl_iqest_result { 18425 uint8 nvalues; 18426 uint8 PAD[3]; 18427 wl_iqest_value_t value[1]; 18428 } wl_iqest_result_t; 18429 18430 #define WL_PRIO_ROAM_PROF_V1 (1u) 18431 18432 typedef struct wl_prio_roam_prof_v1 { 18433 uint16 version; /* Version info */ 18434 uint16 length; /* byte length of this structure */ 18435 uint8 prio_roam_mode; /* Roam mode RCC/RCC+Full Scan */ 18436 uint8 PAD[3]; 18437 } wl_prio_roam_prof_v1_t; 18438 18439 typedef enum wl_prio_roam_mode { 18440 PRIO_ROAM_MODE_OFF = 0, /* Prio_Roam feature disable */ 18441 PRIO_ROAM_MODE_RCC_ONLY = 1, /* Scan RCC list only */ 18442 PRIO_ROAM_MODE_RCC_FULLSCAN = 2, /* Scan RCC list + Full scan */ 18443 PRIO_ROAM_MODE_FULLSCAN_ONLY = 3 /* Full Scan only */ 18444 } wl_prio_roam_mode_t; 18445 18446 /* BTCX AIBSS (Oxygen) Status */ 18447 typedef struct wlc_btc_aibss_info { 18448 uint32 prev_tsf_l; // Lower 32 bits of last read of TSF 18449 uint32 prev_tsf_h; // Higher 32 bits of last read of TSF 18450 uint32 last_btinfo; // Last read of BT info 18451 uint32 local_btinfo; // Local BT INFO BitMap 18452 uint8 bt_out_of_sync_cnt; // BT not in sync with strobe 18453 uint8 esco_off_cnt; // Count incremented when ESCO is off 18454 uint8 strobe_enabled; // Set only in AIBSS mode 18455 uint8 strobe_on; // strobe to BT is on for Oxygen 18456 uint8 local_bt_in_sync; // Sync status of local BT when strobe is on 18457 uint8 other_bt_in_sync; // Sync state of BT in other devices in AIBSS 18458 uint8 local_bt_is_master; // Local BT is master 18459 uint8 sco_prot_on; // eSCO Protection on in local device 18460 uint8 other_esco_present; // eSCO status in other devices in AIBSS 18461 uint8 rx_agg_change; // Indicates Rx Agg size needs to change 18462 uint8 rx_agg_modified; // Rx Agg size modified 18463 uint8 acl_grant_set; // ACL grants on for speeding up sync 18464 uint8 write_ie_err_cnt; // BTCX Ie write error cnt 18465 uint8 parse_ie_err_cnt; // BTCX IE parse error cnt 18466 uint8 wci2_fail_cnt; // WCI2 init failure cnt 18467 uint8 strobe_enable_err_cnt; // Strobe enable err cnt 18468 uint8 strobe_init_err_cnt; // Strobe init err cnt 18469 uint8 tsf_jump_cnt; // TSF jump cnt 18470 uint8 acl_grant_cnt; // ALC grant cnt 18471 uint8 pad1; 18472 uint16 ibss_tsf_shm; // SHM address of strobe TSF 18473 uint16 pad2; 18474 } wlc_btc_aibss_info_t; 18475 18476 #define WLC_BTC_AIBSS_STATUS_VER 1 18477 #define WLC_BTC_AIBSS_STATUS_LEN (sizeof(wlc_btc_aibss_status_t) - 2 * (sizeof(uint16))) 18478 18479 typedef struct wlc_btc_aibss_status { 18480 uint16 version; // Version # 18481 uint16 len; // Length of the structure(excluding len & version) 18482 int32 mode; // Current value of btc_mode 18483 uint16 bth_period; // bt coex period. read from shm. 18484 uint16 agg_off_bm; // AGG OFF BM read from SHM 18485 uint8 bth_active; // bt active session 18486 uint8 pad[3]; 18487 wlc_btc_aibss_info_t aibss_info; // Structure definition above 18488 } wlc_btc_aibss_status_t; 18489 18490 typedef enum { 18491 STATE_NONE = 0, 18492 18493 /* WLAN -> BT */ 18494 W2B_DATA_SET = 21, 18495 B2W_ACK_SET = 22, 18496 W2B_DATA_CLEAR = 23, 18497 B2W_ACK_CLEAR = 24, 18498 18499 /* BT -> WLAN */ 18500 B2W_DATA_SET = 31, 18501 W2B_ACK_SET = 32, 18502 B2W_DATA_CLEAR = 33, 18503 W2B_ACK_CLEAR = 34 18504 } bwte_gci_intstate_t; 18505 18506 #define WL_BWTE_STATS_VERSION 1 /* version of bwte_stats_t */ 18507 typedef struct { 18508 uint32 version; 18509 18510 bwte_gci_intstate_t inttobt; 18511 bwte_gci_intstate_t intfrombt; 18512 18513 uint32 bt2wl_intrcnt; /* bt->wlan interrrupt count */ 18514 uint32 wl2bt_intrcnt; /* wlan->bt interrupt count */ 18515 18516 uint32 wl2bt_dset_cnt; 18517 uint32 wl2bt_dclear_cnt; 18518 uint32 wl2bt_aset_cnt; 18519 uint32 wl2bt_aclear_cnt; 18520 18521 uint32 bt2wl_dset_cnt; 18522 uint32 bt2wl_dclear_cnt; 18523 uint32 bt2wl_aset_cnt; 18524 uint32 bt2wl_aclear_cnt; 18525 18526 uint32 state_error_1; 18527 uint32 state_error_2; 18528 uint32 state_error_3; 18529 uint32 state_error_4; 18530 } bwte_stats_t; 18531 18532 #define TBOW_MAX_SSID_LEN 32 18533 #define TBOW_MAX_PASSPHRASE_LEN 63 18534 18535 #define WL_TBOW_SETUPINFO_T_VERSION 1 /* version of tbow_setup_netinfo_t */ 18536 typedef struct tbow_setup_netinfo { 18537 uint32 version; 18538 uint8 opmode; 18539 uint8 pad; 18540 uint8 macaddr[ETHER_ADDR_LEN]; 18541 uint32 ssid_len; 18542 uint8 ssid[TBOW_MAX_SSID_LEN]; 18543 uint8 passphrase_len; 18544 uint8 passphrase[TBOW_MAX_PASSPHRASE_LEN]; 18545 chanspec_t chanspec; 18546 uint8 PAD[2]; 18547 uint32 channel; 18548 } tbow_setup_netinfo_t; 18549 18550 typedef enum tbow_ho_opmode { 18551 TBOW_HO_MODE_START_GO = 0, 18552 TBOW_HO_MODE_START_STA, 18553 TBOW_HO_MODE_START_GC, 18554 TBOW_HO_MODE_TEST_GO, 18555 TBOW_HO_MODE_STOP_GO = 0x10, 18556 TBOW_HO_MODE_STOP_STA, 18557 TBOW_HO_MODE_STOP_GC, 18558 TBOW_HO_MODE_TEARDOWN 18559 } tbow_ho_opmode_t; 18560 18561 /* Beacon trim feature statistics */ 18562 /* configuration */ 18563 #define BCNTRIMST_PER 0 /* Number of beacons to trim (0: disable) */ 18564 #define BCNTRIMST_TIMEND 1 /* Number of bytes till TIM IE */ 18565 #define BCNTRIMST_TSFLMT 2 /* TSF tolerance value (usecs) */ 18566 /* internal use */ 18567 #define BCNTRIMST_CUR 3 /* PSM's local beacon trim counter */ 18568 #define BCNTRIMST_PREVLEN 4 /* Beacon length excluding the TIM IE */ 18569 #define BCNTRIMST_TIMLEN 5 /* TIM IE Length */ 18570 #define BCNTRIMST_RSSI 6 /* Partial beacon RSSI */ 18571 #define BCNTRIMST_CHAN 7 /* Partial beacon channel */ 18572 /* debug stat (off by default) */ 18573 #define BCNTRIMST_DUR 8 /* RX duration until beacon trimmed */ 18574 #define BCNTRIMST_RXMBSS 9 /* MYBSSID beacon received */ 18575 #define BCNTRIMST_CANTRIM 10 /* # beacons which were trimmed */ 18576 #define BCNTRIMST_LENCHG 11 /* # beacons not trimmed due to length change */ 18577 #define BCNTRIMST_TSFDRF 12 /* # beacons not trimmed due to large TSF delta */ 18578 #define BCNTRIMST_NOTIM 13 /* # beacons not trimmed due to TIM missing */ 18579 18580 #define BCNTRIMST_NUM 14 18581 18582 #define WL_BCNTRIM_STATUS_VERSION_1 1 18583 #define WL_BCNTRIM_STATUS_VERSION_2 2 /* current version of 18584 * struct wl_bcntrim_status_v2_t and 18585 * struct wl_bcntrim_status_query_v2_t 18586 * changes in v2: curr_slice_id also include 18587 * beacon offload state 18588 */ 18589 18590 typedef struct wl_bcntrim_status_query_v1 { 18591 uint16 version; 18592 uint16 len; /* Total length includes fixed fields */ 18593 uint8 reset; /* reset after reading the stats */ 18594 uint8 pad[3]; /* 4-byte alignment */ 18595 } wl_bcntrim_status_query_v1_t; 18596 18597 /* bits for curr_slice_id */ 18598 #define WL_BCNTRIM_CURR_SLICE_ID_MASK 0x0Fu /* bits 0-3 for curr_slice_id */ 18599 #define WL_BCNTRIM_SC_OFFLOAD_ACTIVE_MASK 0x80u /* mask for sc beacon offload */ 18600 #define WL_BCNTRIM_SC_OFFLOAD_ACTIVE_FLAG (1u << 7u) /* MSB of curr_slice_id is used 18601 * to indicate if the offload is 18602 * currently active or not 18603 */ 18604 typedef struct wl_bcntrim_status_v1 { 18605 uint16 version; 18606 uint16 len; /* Total length includes fixed fields and variable data[] */ 18607 uint8 curr_slice_id; /* slice index of the interface */ 18608 uint8 applied_cfg; /* applied bcntrim N threshold */ 18609 uint8 pad[2]; /* 4-byte alignment */ 18610 uint32 fw_status; /* Bits representing bcntrim disable reason in FW */ 18611 uint32 total_disable_dur; /* total duration (msec) bcntrim remains 18612 disabled due to FW disable reasons 18613 */ 18614 uint32 data[]; /* variable length data containing stats */ 18615 } wl_bcntrim_status_v1_t; 18616 18617 /* v1 and v2 struct format for query and status are identical */ 18618 typedef wl_bcntrim_status_v1_t wl_bcntrim_status_v2_t; 18619 typedef wl_bcntrim_status_query_v1_t wl_bcntrim_status_query_v2_t; 18620 18621 #define BCNTRIM_STATS_MAX 10 /* Total stats part of the status data[] */ 18622 18623 /* Bits for FW status */ 18624 #define WL_BCNTRIM_DISABLE_HOST 0x1 /* Host disabled bcntrim through bcntrim IOVar */ 18625 #define WL_BCNTRIM_DISABLE_PHY_RATE 0x2 /* bcntrim disabled because beacon rx rate is 18626 * higher than phy_rate_thresh 18627 */ 18628 #define WL_BCNTRIM_DISABLE_QUIET_IE 0x4 /* bcntrim disable when Quiet IE present */ 18629 #define WL_BCNTRIM_DISABLE_QBSSLOAD_IE 0x8 /* bcntrim disable when QBSS Load IE present */ 18630 #define WL_BCNTRIM_DISABLE_OPERMODE_IE 0x10 /* bcntrim disable when opermode IE is present */ 18631 #define WL_BCNTRIM_DISABLE_CSA_IE 0x20 /* bcntrim dsiable when CSA IE is present */ 18632 #define WL_BCNTRIM_DISABLE_SC_OFFLOAD 0x40 /* bcntrim disable on SC */ 18633 18634 #define BCNTRIM_DISABLE_THRESHOLD_TIME 1000 * 10 /* enable bcntrim after a threshold (10sec) 18635 * when disabled due to above mentioned IE's 18636 */ 18637 #define WL_BCNTRIM_CFG_VERSION_1 1 18638 /* Common IOVAR struct */ 18639 typedef struct wl_bcntrim_cfg_v1 { 18640 uint16 version; 18641 uint16 len; /* Total length includes fixed fields and variable data[] */ 18642 uint16 subcmd_id; /* subcommand id */ 18643 uint16 pad; /* pad/reserved */ 18644 uint8 data[]; /* subcommand data; could be empty */ 18645 } wl_bcntrim_cfg_v1_t; 18646 18647 /* subcommands ids */ 18648 enum { 18649 WL_BCNTRIM_CFG_SUBCMD_PHY_RATE_THRESH = 0, /* PHY rate threshold above 18650 * which bcntrim is not applied 18651 */ 18652 WL_BCNTRIM_CFG_SUBCMD_OVERRIDE_DISABLE_MASK = 1, /* Override bcntrim disable reasons */ 18653 WL_BCNTRIM_CFG_SUBCMD_TSF_DRIFT_LIMIT = 2, /* TSF drift limit to consider bcntrim */ 18654 WL_BCNTRIM_CFG_SUBCMD_SC_BCNTRIM = 3 /* config bcntrim on SC */ 18655 }; 18656 18657 #define BCNTRIM_MAX_PHY_RATE 48 /* in 500Kbps */ 18658 #define BCNTRIM_MAX_TSF_DRIFT 65535 /* in usec */ 18659 #define WL_BCNTRIM_OVERRIDE_DISABLE_MASK \ 18660 (WL_BCNTRIM_DISABLE_QUIET_IE | WL_BCNTRIM_DISABLE_QBSSLOAD_IE) 18661 18662 /* WL_BCNTRIM_CFG_SUBCMD_PHY_RATE_TRESH */ 18663 typedef struct wl_bcntrim_cfg_phy_rate_thresh { 18664 uint32 rate; /* beacon rate (in 500kbps units) */ 18665 } wl_bcntrim_cfg_phy_rate_thresh_t; 18666 18667 /* WL_BCNTRIM_CFG_SUBCMD_OVERRIDE_DISABLE_MASK */ 18668 typedef struct wl_bcntrim_cfg_override_disable_mask { 18669 uint32 mask; /* bits representing individual disable reason to override */ 18670 } wl_bcntrim_cfg_override_disable_mask_t; 18671 18672 /* WL_BCNTRIM_CFG_SUBCMD_TSF_DRIFT_LIMIT */ 18673 typedef struct wl_bcntrim_cfg_tsf_drift_limit { 18674 uint16 drift; /* tsf drift limit specified in usec */ 18675 uint8 pad[2]; /* 4-byte alignment */ 18676 } wl_bcntrim_cfg_tsf_drift_limit_t; 18677 18678 /* WL_BCNTRIM_CFG_SUBCMD_SC_BCNTRIM */ 18679 typedef struct wl_bcntrim_cfg_sc_bcntrim { 18680 uint32 sc_config; /* 0 disable or 1 enable sc bcntrim */ 18681 } wl_bcntrim_cfg_sc_bcntrim_t; 18682 18683 /* -------------- TX Power Cap --------------- */ 18684 #define TXPWRCAP_MAX_NUM_CORES 8 18685 #define TXPWRCAP_MAX_NUM_ANTENNAS (TXPWRCAP_MAX_NUM_CORES * 2) 18686 18687 #define TXPWRCAP_MAX_NUM_CORES_V3 4 18688 #define TXPWRCAP_MAX_NUM_ANTENNAS_V3 (TXPWRCAP_MAX_NUM_CORES_V3 * 2) 18689 18690 #define TXPWRCAP_NUM_SUBBANDS 5 18691 #define TXPWRCAP_MAX_NUM_SUBGRPS 10 18692 18693 /* IOVAR txcapconfig enum's */ 18694 #define TXPWRCAPCONFIG_WCI2 0u 18695 #define TXPWRCAPCONFIG_HOST 1u 18696 #define TXPWRCAPCONFIG_WCI2_AND_HOST 2u 18697 #define TXPWRCAPCONFIG_NONE 0xFFu 18698 18699 /* IOVAR txcapstate enum's */ 18700 #define TXPWRCAPSTATE_LOW_CAP 0 18701 #define TXPWRCAPSTATE_HIGH_CAP 1 18702 #define TXPWRCAPSTATE_HOST_LOW_WCI2_LOW_CAP 0 18703 #define TXPWRCAPSTATE_HOST_LOW_WCI2_HIGH_CAP 1 18704 #define TXPWRCAPSTATE_HOST_HIGH_WCI2_LOW_CAP 2 18705 #define TXPWRCAPSTATE_HOST_HIGH_WCI2_HIGH_CAP 3 18706 18707 /* IOVAR txcapconfig and txcapstate structure is shared: SET and GET */ 18708 #define TXPWRCAPCTL_VERSION 2 18709 #define TXPWRCAPCTL_VERSION_3 3 18710 18711 typedef struct wl_txpwrcap_ctl { 18712 uint8 version; 18713 uint8 ctl[TXPWRCAP_NUM_SUBBANDS]; 18714 } wl_txpwrcap_ctl_t; 18715 18716 typedef struct wl_txpwrcap_ctl_v3 { 18717 uint8 version; 18718 uint8 ctl[TXPWRCAP_MAX_NUM_SUBGRPS]; 18719 } wl_txpwrcap_ctl_v3_t; 18720 18721 /* IOVAR txcapdump structure: GET only */ 18722 #define TXPWRCAP_DUMP_VERSION 2 18723 typedef struct wl_txpwrcap_dump { 18724 uint8 version; 18725 uint8 pad0; 18726 uint8 current_country[2]; 18727 uint32 current_channel; 18728 uint8 config[TXPWRCAP_NUM_SUBBANDS]; 18729 uint8 state[TXPWRCAP_NUM_SUBBANDS]; 18730 uint8 high_cap_state_enabled; 18731 uint8 wci2_cell_status_last; 18732 uint8 download_present; 18733 uint8 num_subbands; 18734 uint8 num_antennas; 18735 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 18736 uint8 num_cc_groups; 18737 uint8 current_country_cc_group_info_index; 18738 int8 low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18739 int8 high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18740 uint8 PAD[3]; 18741 } wl_txpwrcap_dump_t; 18742 18743 typedef struct wl_txpwrcap_dump_v3 { 18744 uint8 version; 18745 uint8 pad0; 18746 uint8 current_country[2]; 18747 uint32 current_channel; 18748 uint8 config[TXPWRCAP_NUM_SUBBANDS]; 18749 uint8 state[TXPWRCAP_NUM_SUBBANDS]; 18750 uint8 high_cap_state_enabled; 18751 uint8 wci2_cell_status_last; 18752 uint8 download_present; 18753 uint8 num_subbands; 18754 uint8 num_antennas; 18755 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 18756 uint8 num_cc_groups; 18757 uint8 current_country_cc_group_info_index; 18758 uint8 cap_states_per_cc_group; 18759 int8 host_low_wci2_low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18760 int8 host_low_wci2_high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18761 int8 host_high_wci2_low_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18762 int8 host_high_wci2_high_cap[TXPWRCAP_MAX_NUM_ANTENNAS*TXPWRCAP_NUM_SUBBANDS]; 18763 uint8 PAD[2]; 18764 } wl_txpwrcap_dump_v3_t; 18765 18766 /* 18767 * Capability flag for wl_txpwrcap_tbl_v2_t and wl_txpwrcap_t 18768 * The index into pwrs will be: 0: onbody-cck, 1: onbody-ofdm, 2:offbody-cck, 3:offbody-ofdm 18769 * 18770 * For 5G power in SDB case as well as for non-SDB case, the value of flag will be: CAP_ONOFF_BODY 18771 * The index into pwrs will be: 0: onbody, 1: offbody-ofdm 18772 */ 18773 18774 #define CAP_ONOFF_BODY (0x1) /* on/off body only */ 18775 #define CAP_CCK_OFDM (0x2) /* cck/ofdm capability only */ 18776 #define CAP_LTE_CELL (0x4) /* cell on/off capability; required for iOS builds */ 18777 #define CAP_HEAD_BODY (0x8) /* head/body capability */ 18778 #define CAP_2G_DEPON_5G (0x10) /* 2G pwr caps depend on other slice 5G subband */ 18779 #define CAP_SISO_MIMO (0x20) /* Siso/Mimo Separate Power Caps */ 18780 #define CAP_ANT_TX (0x40) /* Separate Power Caps based on cell ant tx value */ 18781 #define CAP_LTE_PQBIT (0x100u) /* QPBit is enabled */ 18782 #define CAP_ONOFF_BODY_CCK_OFDM (CAP_ONOFF_BODY | CAP_CCK_OFDM) 18783 #define CAP_TXPWR_ALL (CAP_ONOFF_BODY|CAP_CCK_OFDM|CAP_LTE_CELL|\ 18784 CAP_SISO_MIMO|CAP_HEAD_BODY|CAP_ANT_TX) 18785 18786 #define TXHDR_SEC_MAX 5u /* Deprecated. Kept till removed in all branches */ 18787 #define TXPWRCAP_MAX_STATES 4u 18788 #define TXPWRCAP_MAX_STATES_V3 10u 18789 #define TXPWRCAP_CCKOFDM_ONOFFBODY_MAX_STATES 4u 18790 #define TXPWRCAP_ONOFFBODY_MAX_STATES 2u 18791 #define TXPWRCAP_ONOFFCELL_MAX_STATES 2u 18792 18793 #define TXHDR_SEC_NONSDB_MAIN_2G 0 18794 #define TXHDR_SEC_NONSDB_MAIN_5G 1 18795 #define TXHDR_SEC_NONSDB_AUX_2G 2 18796 #define TXHDR_SEC_NONSDB_AUX_5G 3 18797 #define TXHDR_SEC_SDB_MAIN_2G 4 18798 #define TXHDR_SEC_SDB_MAIN_5G 5 18799 #define TXHDR_SEC_SDB_AUX_2G 6 18800 #define TXHDR_SEC_SDB_AUX_5G 7 18801 #define TXHDR_MAX_SECTION 8 18802 18803 #define WL_TXPWRCAP_MAX_SLICES 2 18804 #define WL_TXPWRCAPDUMP_VER 4 18805 18806 #define WL_TXPWRCAP_VERSION_2 2 18807 #define WL_TXPWRCAP_VERSION_3 3 18808 18809 typedef struct wl_txpwrcap { 18810 uint8 capability; 18811 uint8 num_cap_states; 18812 uint8 section; /* Index from above,eg. TXHDR_SEC_NONSDB */ 18813 int8 pwrs[][TXPWRCAP_NUM_SUBBANDS][TXPWRCAP_MAX_NUM_CORES]; 18814 } wl_txpwrcap_t; 18815 18816 typedef struct { 18817 uint8 capability; 18818 uint8 num_cap_states; 18819 uint8 num_subgrps; 18820 uint8 section; /* Index from above,eg. TXHDR_SEC_NONSDB */ 18821 int8 pwrs[][TXPWRCAP_MAX_NUM_SUBGRPS][TXPWRCAP_MAX_NUM_ANTENNAS_V3]; 18822 } wl_txpwrcap_v2_t; 18823 18824 #define TXPWRCAP_DUMP_VERSION_4 4u 18825 #define TXPWRCAP_DUMP_VERSION_5 5u 18826 #define TXPWRCAP_DUMP_VERSION_6 6u 18827 18828 typedef struct wl_txpwrcap_dump_v4 { 18829 uint8 version; 18830 uint8 num_pwrcap; 18831 uint8 current_country[2]; 18832 uint32 current_channel; 18833 uint8 download_present; 18834 uint8 num_cores; /* number cores on slice */ 18835 uint8 num_cc_groups; /* number cc groups */ 18836 uint8 current_country_cc_group_info_index; 18837 /* first power cap always exist 18838 * On main,-non-sdb follows by sdb2g and then sdb5g 18839 * On aux slice - aux2g then aux5g. 18840 */ 18841 wl_txpwrcap_t pwrcap; /* first power cap */ 18842 } wl_txpwrcap_dump_v4_t; 18843 18844 typedef struct wl_txpwrcap_dump_v5 { 18845 uint8 version; 18846 uint8 num_pwrcap; 18847 uint8 current_country[2]; 18848 uint8 current_channel; 18849 uint8 high_cap_state_enabled; 18850 uint8 reserved[2]; 18851 uint8 download_present; 18852 uint8 num_ants; /* number antenna slice */ 18853 uint8 num_cc_groups; /* number cc groups */ 18854 uint8 current_country_cc_group_info_index; 18855 uint8 ant_tx; /* current value of ant_tx */ 18856 uint8 cell_status; /* current value of cell status */ 18857 int8 pwrcap[]; /* variable size power caps (wl_txpwrcap_v2_t) */ 18858 } wl_txpwrcap_dump_v5_t; 18859 18860 typedef struct wl_txpwrcap_dump_v6 { 18861 uint8 version; 18862 uint8 num_pwrcap; 18863 uint8 current_country[2]; 18864 uint8 current_channel; 18865 uint8 high_cap_state_enabled; 18866 uint8 reserved[2]; 18867 uint8 download_present; 18868 uint8 num_ants; /* number antenna slice */ 18869 uint8 num_cc_groups; /* number cc groups */ 18870 uint8 current_country_cc_group_info_index; 18871 uint8 ant_tx; /* current value of ant_tx */ 18872 uint8 cell_status; /* current value of cell status */ 18873 uint16 capability[TXHDR_MAX_SECTION]; /* capabilities */ 18874 int8 pwrcap[]; /* variable size power caps (wl_txpwrcap_v2_t) */ 18875 } wl_txpwrcap_dump_v6_t; 18876 18877 #define TXCAPINFO_VERSION_1 1 18878 typedef struct wl_txpwrcap_ccgrp_info { 18879 uint8 num_cc; 18880 char cc_list[1][2]; /* 2 letters for each country. At least one country */ 18881 } wl_txpwrcap_ccgrp_info_t; 18882 18883 typedef struct { 18884 uint16 version; 18885 uint16 length; /* length in bytes */ 18886 uint8 num_ccgrp; 18887 /* followed by one or more wl_txpwrcap_ccgrp_info_t */ 18888 wl_txpwrcap_ccgrp_info_t ccgrp_data[1]; 18889 } wl_txpwrcap_info_t; 18890 18891 typedef struct wl_txpwrcap_tbl { 18892 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES]; 18893 /* Stores values for valid antennas */ 18894 int8 pwrcap_cell_on[TXPWRCAP_MAX_NUM_ANTENNAS]; /* qdBm units */ 18895 int8 pwrcap_cell_off[TXPWRCAP_MAX_NUM_ANTENNAS]; /* qdBm units */ 18896 } wl_txpwrcap_tbl_t; 18897 18898 typedef struct wl_txpwrcap_tbl_v2 { 18899 uint8 version; 18900 uint8 length; /* size of entire structure, including the pwrs */ 18901 uint8 capability; /* capability bitmap */ 18902 uint8 num_cores; /* number of cores i.e. entries in each cap state row */ 18903 /* 18904 * pwrs array has TXPWRCAP_MAX_STATES rows - one for each cap state. 18905 * Each row has up to TXPWRCAP_MAX_NUM_CORES entries - one for each core. 18906 */ 18907 uint8 pwrs[][TXPWRCAP_MAX_NUM_CORES]; /* qdBm units */ 18908 } wl_txpwrcap_tbl_v2_t; 18909 18910 typedef struct wl_txpwrcap_tbl_v3 { 18911 uint8 version; 18912 uint8 length; /* size of entire structure, including the pwrs */ 18913 uint8 capability; /* capability bitmap */ 18914 uint8 num_cores; /* number of cores */ 18915 uint8 num_antennas_per_core[TXPWRCAP_MAX_NUM_CORES_V3]; 18916 /* 18917 * pwrs array has TXPWRCAP_MAX_STATES rows - one for each cap state. 18918 * Each row has up to TXPWRCAP_MAX_NUM_ANTENNAS entries - for each antenna. 18919 * Included in the rows of powers are rows for fail safe. 18920 */ 18921 int8 pwrs[][TXPWRCAP_MAX_NUM_ANTENNAS_V3]; /* qdBm units */ 18922 } wl_txpwrcap_tbl_v3_t; 18923 18924 /* dynamic sar iovar subcommand ids */ 18925 enum { 18926 IOV_DYNSAR_MODE = 1, 18927 IOV_DYNSAR_PWR_OFF = 2, 18928 IOV_DYNSAR_STAT_SUM = 3, 18929 IOV_DYNSAR_STAT_DET = 4, 18930 IOV_DYNSAR_TS = 5, 18931 IOV_DYNSAR_OPT_DUR = 6, 18932 IOV_DYNSAR_OPT_TXDC = 7, 18933 IOV_DYNSAR_STATUS = 8, 18934 IOV_DYNSAR_EVENT = 9, 18935 IOV_DYNSAR_VAR = 10, 18936 IOV_DYNSAR_SUM_AGG = 11, 18937 IOV_DYNSAR_CMD_LAST 18938 }; 18939 18940 /* when subcommand is IOV_DYNSAR_MODE, the mode can be one of the below */ 18941 enum { 18942 IOV_DYNSAR_MODE_OFF = 0, /* DSA optimization turned off */ 18943 IOV_DYNSAR_MODE_PWR = 1, /* DSA Power optimization mode */ 18944 IOV_DYNSAR_MODE_HBR_NOMUTE = 2, /* DSA Hybrid power and nomute optimization mode */ 18945 18946 IOV_DYNSAR_MODE_MAX 18947 }; 18948 18949 #define DYNSAR_CNT_VERSION_V1 1u 18950 #define DYNSAR_CNT_VERSION_V2 2u 18951 #define DYNSAR_STS_OBS_WIN 20u 18952 #define DYNSAR_MAX_ANT WL_STA_ANT_MAX 18953 #define DYNSAR_MAX_AGG_IDX (DYNSAR_MAX_ANT << 1u) /* max antenna aggregation index */ 18954 #define DYNSAR_MAC_NUM 2u 18955 18956 /* Error bits */ 18957 #define DYNSAR_NO_TXCAP (1u << 0u) 18958 #define DYNSAR_NO_CLM (1u << 1u) 18959 #define DYNSAR_TDMTX_DISABLED (1u << 2u) 18960 #define DYNSAR_VIOLATION (1u << 3u) 18961 #define DYNSAR_ANT_NUM_MISMATCH (1u << 4u) 18962 #define DYNSAR_COUNTRY_DISABLED (1u << 5u) 18963 18964 typedef struct wlc_dynsar_sts_mon_ctr_st { 18965 uint32 tx_dur; /* in usec */ 18966 uint32 tx_dur_raw; /* in usec */ 18967 uint32 plim_avg; /* In uw. plim averaged over mon win. */ 18968 uint32 energy; /* pavg * dur in mw * ms */ 18969 uint32 qsar; /* plim * dur in mw * ms */ 18970 uint16 fs; /* failsafe duration in usec */ 18971 uint8 util_hist; /* utilization in past observe sec */ 18972 uint8 util_pred; /* utilization of past (observe - budget) & predicted budget sec */ 18973 } wlc_dynsar_sts_mon_ctr_t; 18974 18975 typedef struct wlc_dynsar_sts_obs_win { 18976 uint8 opt; 18977 uint8 valid; 18978 uint16 pad; 18979 uint32 dur; /* monitor duration in usec */ 18980 uint64 ts; /* timestamp in usec */ 18981 } wlc_dynsar_sts_obs_win_t; 18982 18983 typedef struct dynsar_agg_entry { 18984 uint32 util; 18985 uint32 util_sqr; 18986 uint32 mean_util; 18987 uint32 var; 18988 } dynsar_agg_ent_t; 18989 18990 typedef struct dynsar_agg_stat { 18991 /* variable length */ 18992 uint16 len; /* length of this structure including data */ 18993 uint16 num_ent; /* number of entries per aggregated slot */ 18994 uint16 num_agg; /* number of aggregated slots */ 18995 uint16 pad; /* pad */ 18996 uint64 buf[]; /* num_ent entries wlc_dynsar_sts_obs_win_t 18997 * followed by num_ent entries dynsar_agg_ent_t 18998 */ 18999 } dynsar_agg_stat_t; 19000 19001 /* structure holding dynsar per slice counters that interface to iovar */ 19002 typedef struct dynsar_cnt_v1 { 19003 uint16 ver; 19004 uint16 len; /* length of this structure */ 19005 uint8 num_ant; /* num_antennas */ 19006 uint8 win; /* number of valid entries in the observe window */ 19007 uint8 slice; 19008 uint8 pad; /* num_antennas */ 19009 uint64 sync_ts; /* time of first mon period collection after last sync */ 19010 wlc_dynsar_sts_obs_win_t obs[DYNSAR_STS_OBS_WIN]; 19011 wlc_dynsar_sts_mon_ctr_t mon_ctr[DYNSAR_STS_OBS_WIN][DYNSAR_MAX_ANT]; 19012 } dynsar_cnt_v1_t; 19013 19014 typedef struct dynsar_shared_ant_stats { 19015 uint32 tx_dur; /* tx duration */ 19016 uint8 sar_util; /* sar utilization */ 19017 uint8 pad[3]; /* pad */ 19018 } dynsar_shared_ant_stats_t; 19019 19020 typedef struct dynsar_unshared_ant_stats { 19021 uint32 qsar; /* mw * ms */ 19022 uint32 energy; /* mw * ms */ 19023 uint32 tx_dur; /* tx duration */ 19024 } dynsar_unshared_ant_stats_t; 19025 19026 typedef struct dynsar_sum_v1 { 19027 uint16 ver; 19028 uint16 len; /* length of this structure */ 19029 uint32 dur; /* duration in us */ 19030 uint64 ts; /* time stamp of report in us */ 19031 uint64 sync_ts; /* time of first mon period collection after last sync */ 19032 uint8 slice; 19033 uint8 num_ant; 19034 uint8 opt; 19035 uint8 sync; 19036 /* per antenna counters aggregated if shared between radios */ 19037 struct { 19038 uint32 tx_dur; /* tx duration */ 19039 uint8 sar_util; /* sar utilization */ 19040 uint8 PAD[3]; /* pad */ 19041 } shared[DYNSAR_MAX_ANT]; 19042 19043 /* per antenna counters not aggregated between radios */ 19044 struct { 19045 uint32 qsar; /* mw * ms */ 19046 uint32 energy; /* mw * ms */ 19047 } unshared[DYNSAR_MAX_ANT]; 19048 } dynsar_sum_v1_t; 19049 19050 typedef struct dynsar_sum_v2 { 19051 uint16 ver; 19052 uint16 len; /* length of this structure */ 19053 uint32 dur; /* duration in us */ 19054 uint64 ts; /* time stamp of report in us */ 19055 uint64 sync_ts; /* time of first mon period collection after last sync */ 19056 uint8 num_ant; /* max number of antennas between 2 slices */ 19057 uint8 opt; 19058 uint8 sync; 19059 uint8 max_mac; /* number of slices */ 19060 uint8 num_agg; /* number of aggregated antennas */ 19061 uint8 offset_shared; /* offset from beginning of structure to shared antenna data */ 19062 uint8 offset_unshared; /* offset from beginning of structure to unshared antenna data */ 19063 uint8 pad; 19064 /* Variable length data sections follow as per above offsets: 19065 * dynsar_unshared_ant_stats_t [max_mac][num_ant] 19066 * dynsar_shared_ant_stats_t [num_agg] 19067 */ 19068 } dynsar_sum_v2_t; 19069 19070 typedef struct dynsar_status { 19071 uint16 ver; 19072 uint16 len; /* length of this structure */ 19073 uint8 slice; /* slice number */ 19074 uint8 mode; /* optimization mode */ 19075 uint8 util_thrhd; /* utilization threshold */ 19076 uint8 opt_txdc; /* txdc prediction percentage */ 19077 uint8 opt_dur; /* optimization prediction duration */ 19078 uint8 event; /* if wl event is configured */ 19079 uint8 time_sync; /* if gpio pulse is configured */ 19080 uint8 power_off; /* power offset in db */ 19081 uint8 num_ant; /* num antenna */ 19082 uint8 status; /* status bitmap. e.g. WL_DYNSAR_STS_PWR_OPT. 19083 * These are same as status field in wl_event 19084 */ 19085 uint8 error; /* error bits */ 19086 uint8 gpio_pin; /* gpio pin */ 19087 /* aggregation index array of num_ant entries */ 19088 uint8 agg[]; /* aggregation indices */ 19089 } dynsar_status_t; 19090 19091 typedef struct dynsar_var_info { 19092 uint lim; /* variance limit */ 19093 uint off; /* hysterysis offset applied to variance while optimized */ 19094 } dynsar_var_info_t; 19095 19096 typedef struct dynsar_status_v2 { 19097 uint16 ver; 19098 uint16 len; /* length of this structure */ 19099 uint8 slice; /* slice number */ 19100 uint8 mode; /* optimization mode */ 19101 uint8 util_thrhd; /* utilization threshold */ 19102 uint8 opt_txdc; /* txdc prediction percentage */ 19103 uint8 opt_dur; /* optimization prediction duration */ 19104 uint8 event; /* if wl event is configured */ 19105 uint8 time_sync; /* if gpio pulse is configured */ 19106 uint8 power_off; /* power offset in db */ 19107 uint8 num_ant; /* num antenna */ 19108 uint8 status; /* status bitmap. e.g. WL_DYNSAR_STS_PWR_OPT. 19109 * These are same as status field in wl_event 19110 */ 19111 uint8 error; /* error bits */ 19112 uint8 gpio_pin; /* gpio pin */ 19113 dynsar_var_info_t var; /* variance information */ 19114 /* aggregation index array of num_ant entries */ 19115 uint8 agg[]; /* aggregation indices */ 19116 } dynsar_status_v2_t; 19117 19118 typedef struct wl_dynsar_ioc { 19119 uint16 id; /* ID of the sub-command */ 19120 uint16 len; /* total length of all data[] */ 19121 union { /* var len payload */ 19122 uint8 cnt; 19123 dynsar_cnt_v1_t det; 19124 dynsar_agg_stat_t agg_stat; 19125 dynsar_sum_v1_t sum; 19126 dynsar_sum_v2_t sumv2; 19127 dynsar_status_t status; 19128 dynsar_status_v2_t statusv2; 19129 dynsar_var_info_t var; 19130 } data; 19131 } wl_dynsar_ioc_t; 19132 19133 typedef struct wlc_dynsar_status { 19134 uint16 ver; 19135 uint16 len; /* length of this structure */ 19136 } wl_dynsar_status_t; 19137 19138 /* ##### Ecounters section ##### */ 19139 #define ECOUNTERS_VERSION_1 1 19140 19141 /* Input structure for ecounters IOVAR */ 19142 typedef struct ecounters_config_request { 19143 uint16 version; /* config version */ 19144 uint16 set; /* Set where data will go. */ 19145 uint16 size; /* Size of the set. */ 19146 uint16 timeout; /* timeout in seconds. */ 19147 uint16 num_events; /* Number of events to report. */ 19148 uint16 ntypes; /* Number of entries in type array. */ 19149 uint16 type[1]; /* Statistics Types (tags) to retrieve. */ 19150 } ecounters_config_request_t; 19151 19152 #define ECOUNTERS_EVENTMSGS_VERSION_1 1 19153 #define ECOUNTERS_TRIGGER_CONFIG_VERSION_1 1 19154 19155 #define ECOUNTERS_EVENTMSGS_EXT_MASK_OFFSET \ 19156 OFFSETOF(ecounters_eventmsgs_ext_t, mask[0]) 19157 19158 #define ECOUNTERS_TRIG_CONFIG_TYPE_OFFSET \ 19159 OFFSETOF(ecounters_trigger_config_t, type[0]) 19160 19161 typedef struct ecounters_eventmsgs_ext { 19162 uint8 version; 19163 uint8 len; 19164 uint8 mask[1]; 19165 } ecounters_eventmsgs_ext_t; 19166 19167 typedef struct ecounters_trigger_config { 19168 uint16 version; /* version */ 19169 uint16 set; /* set where data should go */ 19170 uint16 rsvd; /* reserved */ 19171 uint16 pad; /* pad/reserved */ 19172 uint16 ntypes; /* number of types/tags */ 19173 uint16 type[1]; /* list of types */ 19174 } ecounters_trigger_config_t; 19175 19176 #define ECOUNTERS_TRIGGER_REASON_VERSION_1 1 19177 typedef enum { 19178 /* Triggered due to timer based ecounters */ 19179 ECOUNTERS_TRIGGER_REASON_TIMER = 0, 19180 /* Triggered due to event based configuration */ 19181 ECOUNTERS_TRIGGER_REASON_EVENTS = 1, 19182 ECOUNTERS_TRIGGER_REASON_D2H_EVENTS = 2, 19183 ECOUNTERS_TRIGGER_REASON_H2D_EVENTS = 3, 19184 ECOUNTERS_TRIGGER_REASON_USER_EVENTS = 4, 19185 ECOUNTERS_TRIGGER_REASON_MAX = 5 19186 } ecounters_trigger_reasons_list_t; 19187 19188 typedef struct ecounters_trigger_reason { 19189 uint16 version; /* version */ 19190 uint16 trigger_reason; /* trigger reason */ 19191 uint32 sub_reason_code; /* sub reason code */ 19192 uint32 trigger_time_now; /* time in ms at trigger */ 19193 uint32 host_ref_time; /* host ref time */ 19194 } ecounters_trigger_reason_t; 19195 19196 #define WL_LQM_VERSION_1 1 19197 19198 /* For wl_lqm_t flags field */ 19199 #define WL_LQM_CURRENT_BSS_VALID 0x1 19200 #define WL_LQM_TARGET_BSS_VALID 0x2 19201 19202 #define WL_PERIODIC_COMPACT_CNTRS_VER_1 (1) 19203 #define WL_PERIODIC_TXBF_CNTRS_VER_1 (1) 19204 typedef struct { 19205 uint16 version; 19206 uint16 pad; 19207 /* taken from wl_wlc_cnt_t */ 19208 uint32 txfail; 19209 /* taken from wl_cnt_ge40mcst_v1_t */ 19210 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 19211 * Control Management (includes retransmissions) 19212 */ 19213 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 19214 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 19215 uint32 txback; /**< blockack txcnt */ 19216 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 19217 uint32 txnoack; /**< dot11ACKFailureCount */ 19218 uint32 txframe; /**< tx data frames */ 19219 uint32 txretrans; /**< tx mac retransmits */ 19220 uint32 txpspoll; /**< Number of TX PS-poll */ 19221 19222 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 19223 * expecting a response 19224 */ 19225 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 19226 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19227 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19228 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19229 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19230 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19231 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19232 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19233 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19234 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19235 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 19236 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19237 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 19238 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 19239 uint32 rxback; /**< blockack rxcnt */ 19240 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 19241 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19242 uint32 rxbeaconobss; /**< beacons received from other BSS */ 19243 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 19244 * other BSS (WDS FRAME) 19245 */ 19246 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 19247 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 19248 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 19249 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19250 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 19251 uint32 rxtoolate; /**< receive too late */ 19252 uint32 rxframe; /**< rx data frames */ 19253 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 19254 uint32 tx_toss_cnt; /* number of tx packets tossed */ 19255 uint32 rx_toss_cnt; /* number of rx packets tossed */ 19256 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 19257 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 19258 uint32 txbcnfrm; /**< beacons transmitted */ 19259 } wl_periodic_compact_cntrs_v1_t; 19260 19261 #define WL_PERIODIC_COMPACT_CNTRS_VER_2 (2) 19262 typedef struct { 19263 uint16 version; 19264 uint16 pad; 19265 /* taken from wl_wlc_cnt_t */ 19266 uint32 txfail; 19267 /* taken from wl_cnt_ge40mcst_v1_t */ 19268 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 19269 * Control Management (includes retransmissions) 19270 */ 19271 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 19272 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 19273 uint32 txback; /**< blockack txcnt */ 19274 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 19275 uint32 txnoack; /**< dot11ACKFailureCount */ 19276 uint32 txframe; /**< tx data frames */ 19277 uint32 txretrans; /**< tx mac retransmits */ 19278 uint32 txpspoll; /**< Number of TX PS-poll */ 19279 19280 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 19281 * expecting a response 19282 */ 19283 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 19284 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19285 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19286 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19287 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19288 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19289 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19290 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19291 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19292 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19293 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 19294 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19295 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 19296 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 19297 uint32 rxback; /**< blockack rxcnt */ 19298 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 19299 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19300 uint32 rxbeaconobss; /**< beacons received from other BSS */ 19301 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 19302 * other BSS (WDS FRAME) 19303 */ 19304 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 19305 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 19306 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 19307 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19308 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 19309 uint32 rxtoolate; /**< receive too late */ 19310 uint32 rxframe; /**< rx data frames */ 19311 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 19312 uint32 tx_toss_cnt; /* number of tx packets tossed */ 19313 uint32 rx_toss_cnt; /* number of rx packets tossed */ 19314 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 19315 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 19316 uint32 txbcnfrm; /**< beacons transmitted */ 19317 uint32 rxretry; /* Number of rx packets received after retry */ 19318 uint32 rxdup; /* Number of dump packet. Indicates whether peer is receiving ack */ 19319 uint32 chswitch_cnt; /* Number of channel switches */ 19320 uint32 pm_dur; /* Total sleep time in PM, msecs */ 19321 } wl_periodic_compact_cntrs_v2_t; 19322 19323 #define WL_PERIODIC_COMPACT_CNTRS_VER_3 (3) 19324 typedef struct { 19325 uint16 version; 19326 uint16 pad; 19327 /* taken from wl_wlc_cnt_t */ 19328 uint32 txfail; 19329 /* taken from wl_cnt_ge40mcst_v1_t */ 19330 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 19331 * Control Management (includes retransmissions) 19332 */ 19333 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 19334 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 19335 uint32 txback; /**< blockack txcnt */ 19336 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 19337 uint32 txnoack; /**< dot11ACKFailureCount */ 19338 uint32 txframe; /**< tx data frames */ 19339 uint32 txretrans; /**< tx mac retransmits */ 19340 uint32 txpspoll; /**< Number of TX PS-poll */ 19341 19342 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 19343 * expecting a response 19344 */ 19345 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 19346 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19347 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19348 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19349 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19350 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19351 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19352 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19353 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19354 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19355 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 19356 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19357 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 19358 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 19359 uint32 rxback; /**< blockack rxcnt */ 19360 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 19361 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19362 uint32 rxbeaconobss; /**< beacons received from other BSS */ 19363 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 19364 * other BSS (WDS FRAME) 19365 */ 19366 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 19367 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 19368 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 19369 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19370 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 19371 uint32 rxtoolate; /**< receive too late */ 19372 uint32 rxframe; /**< rx data frames */ 19373 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 19374 uint32 tx_toss_cnt; /* number of tx packets tossed */ 19375 uint32 rx_toss_cnt; /* number of rx packets tossed */ 19376 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 19377 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 19378 uint32 txbcnfrm; /**< beacons transmitted */ 19379 uint32 rxretry; /* Number of rx packets received after retry */ 19380 uint32 rxdup; /* Number of dump packet. Indicates whether peer is receiving ack */ 19381 uint32 chswitch_cnt; /* Number of channel switches */ 19382 uint32 pm_dur; /* Total sleep time in PM, msecs */ 19383 uint32 rxholes; /* Count of missed packets from peer */ 19384 } wl_periodic_compact_cntrs_v3_t; 19385 19386 #define WL_PERIODIC_COMPACT_CNTRS_VER_4 (4) 19387 typedef struct { 19388 uint16 version; 19389 uint16 pad; 19390 /* taken from wl_wlc_cnt_t */ 19391 uint32 txfail; 19392 /* taken from wl_cnt_ge40mcst_v1_t */ 19393 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 19394 * Control Management (includes retransmissions) 19395 */ 19396 uint32 txrtsfrm; /**< number of RTS sent out by the MAC */ 19397 uint32 txctsfrm; /**< number of CTS sent out by the MAC */ 19398 uint32 txback; /**< blockack txcnt */ 19399 uint32 txucast; /**< number of unicast tx expecting response other than cts/cwcts */ 19400 uint32 txnoack; /**< dot11ACKFailureCount */ 19401 uint32 txframe; /**< tx data frames */ 19402 uint32 txretrans; /**< tx mac retransmits */ 19403 uint32 txpspoll; /**< Number of TX PS-poll */ 19404 19405 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 19406 * expecting a response 19407 */ 19408 uint32 txrtsfail; /**< number of rts transmission failure that reach retry limit */ 19409 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19410 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19411 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19412 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19413 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19414 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19415 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19416 uint32 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19417 uint32 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19418 uint32 rxhlovfl; /**< number of length / header fifo overflows */ 19419 uint32 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19420 uint32 rxctsucast; /**< number of unicast CTS addressed to the MAC (good FCS) */ 19421 uint32 rxackucast; /**< number of ucast ACKS received (good FCS) */ 19422 uint32 rxback; /**< blockack rxcnt */ 19423 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 19424 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19425 uint32 rxbeaconobss; /**< beacons received from other BSS */ 19426 uint32 rxdtucastobss; /**< number of unicast frames addressed to the MAC from 19427 * other BSS (WDS FRAME) 19428 */ 19429 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 19430 uint32 rxrtsocast; /**< number of received RTS not addressed to the MAC */ 19431 uint32 rxctsocast; /**< number of received CTS not addressed to the MAC */ 19432 uint32 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19433 uint32 rxmpdu_mu; /**< Number of MU MPDUs received */ 19434 uint32 rxtoolate; /**< receive too late */ 19435 uint32 rxframe; /**< rx data frames */ 19436 uint32 lqcm_report; /**< lqcm metric tx/rx idx */ 19437 uint32 tx_toss_cnt; /* number of tx packets tossed */ 19438 uint32 rx_toss_cnt; /* number of rx packets tossed */ 19439 uint32 last_tx_toss_rsn; /* reason because of which last tx pkt tossed */ 19440 uint32 last_rx_toss_rsn; /* reason because of which last rx pkt tossed */ 19441 uint32 txbcnfrm; /**< beacons transmitted */ 19442 uint32 rxretry; /* Number of rx packets received after retry */ 19443 uint32 rxdup; /* Number of dump packet. Indicates whether peer is receiving ack */ 19444 uint32 chswitch_cnt; /* Number of channel switches */ 19445 uint32 pm_dur; /* Total sleep time in PM, msecs */ 19446 uint32 rxholes; /* Count of missed packets from peer */ 19447 19448 uint32 rxundec; /* Decrypt failures */ 19449 uint32 rxundec_mcst; /* Decrypt failures multicast */ 19450 uint16 replay; /* replay failures */ 19451 uint16 replay_mcst; /* ICV failures */ 19452 19453 uint32 pktfilter_discard; /* Filtered packtets by pkt filter */ 19454 uint32 pktfilter_forward; /* Forwared packets by pkt filter */ 19455 uint32 mac_rxfilter; /* Pkts filtered due to class/auth state mismatch */ 19456 19457 } wl_periodic_compact_cntrs_v4_t; 19458 19459 #define WL_PERIODIC_COMPACT_HE_CNTRS_VER_1 (1) 19460 typedef struct { 19461 uint16 version; 19462 uint16 len; 19463 uint32 he_rxtrig_rand; 19464 uint32 he_colormiss_cnt; 19465 uint32 he_txmtid_back; 19466 uint32 he_rxmtid_back; 19467 uint32 he_rxmsta_back; 19468 uint32 he_rxtrig_basic; 19469 uint32 he_rxtrig_murts; 19470 uint32 he_rxtrig_bsrp; 19471 uint32 he_rxdlmu; 19472 uint32 he_physu_rx; 19473 uint32 he_txtbppdu; 19474 } wl_compact_he_cnt_wlc_v1_t; 19475 19476 #define WL_PERIODIC_COMPACT_HE_CNTRS_VER_2 (2) 19477 typedef struct { 19478 uint16 version; 19479 uint16 len; 19480 uint32 he_rxtrig_myaid; 19481 uint32 he_rxtrig_rand; 19482 uint32 he_colormiss_cnt; 19483 uint32 he_txmampdu; 19484 uint32 he_txmtid_back; 19485 uint32 he_rxmtid_back; 19486 uint32 he_rxmsta_back; 19487 uint32 he_txfrag; 19488 uint32 he_rxdefrag; 19489 uint32 he_txtrig; 19490 uint32 he_rxtrig_basic; 19491 uint32 he_rxtrig_murts; 19492 uint32 he_rxtrig_bsrp; 19493 uint32 he_rxhemuppdu_cnt; 19494 uint32 he_physu_rx; 19495 uint32 he_phyru_rx; 19496 uint32 he_txtbppdu; 19497 uint32 he_null_tbppdu; 19498 uint32 he_rxhesuppdu_cnt; 19499 uint32 he_rxhesureppdu_cnt; 19500 uint32 he_null_zero_agg; 19501 uint32 he_null_bsrp_rsp; 19502 uint32 he_null_fifo_empty; 19503 } wl_compact_he_cnt_wlc_v2_t; 19504 19505 /* for future versions of this data structure, can consider wl_txbf_ecounters_t 19506 * which contains the full list of txbf dump counters 19507 */ 19508 typedef struct { 19509 uint16 version; 19510 uint16 coreup; 19511 uint32 txndpa; 19512 uint32 txndp; 19513 uint32 rxsf; 19514 uint32 txbfm; 19515 uint32 rxndpa_u; 19516 uint32 rxndpa_m; 19517 uint32 bferpt; 19518 uint32 rxbfpoll; 19519 uint32 txsf; 19520 } wl_periodic_txbf_cntrs_v1_t; 19521 19522 typedef struct { 19523 struct ether_addr BSSID; 19524 chanspec_t chanspec; 19525 int32 rssi; 19526 int32 snr; 19527 } wl_rx_signal_metric_t; 19528 19529 typedef struct { 19530 uint8 version; 19531 uint8 flags; 19532 uint16 pad; 19533 int32 noise_level; /* current noise level */ 19534 wl_rx_signal_metric_t current_bss; 19535 wl_rx_signal_metric_t target_bss; 19536 } wl_lqm_t; 19537 19538 #define WL_PERIODIC_IF_STATE_VER_1 (1) 19539 typedef struct wl_if_state_compact { 19540 uint8 version; 19541 uint8 assoc_state; 19542 uint8 antenna_count; /**< number of valid antenna rssi */ 19543 int8 noise_level; /**< noise right after tx (in dBm) */ 19544 int8 snr; /* current noise level */ 19545 int8 rssi_sum; /**< summed rssi across all antennas */ 19546 uint16 pad16; 19547 int8 rssi_ant[WL_RSSI_ANT_MAX]; /**< rssi per antenna */ 19548 struct ether_addr BSSID; 19549 chanspec_t chanspec; 19550 } wl_if_state_compact_t; 19551 19552 #define WL_EVENT_STATISTICS_VER_1 (1) 19553 /* Event based statistics ecounters */ 19554 typedef struct { 19555 uint16 version; 19556 uint16 pad; 19557 struct ether_addr BSSID; /* BSSID of the BSS */ 19558 uint32 txdeauthivalclass; 19559 } wl_event_based_statistics_v1_t; 19560 19561 #define WL_EVENT_STATISTICS_VER_2 (2) 19562 /* Event based statistics ecounters */ 19563 typedef struct { 19564 uint16 version; 19565 uint16 pad; 19566 struct ether_addr BSSID; /* BSSID of the BSS */ 19567 uint32 txdeauthivalclass; 19568 /* addition for v2 */ 19569 int32 timestamp; /* last deauth time */ 19570 struct ether_addr last_deauth; /* wrong deauth MAC */ 19571 uint16 misdeauth; /* wrong deauth count every 1sec */ 19572 int16 cur_rssi; /* current bss rssi */ 19573 int16 deauth_rssi; /* deauth pkt rssi */ 19574 } wl_event_based_statistics_v2_t; 19575 19576 #define WL_EVENT_STATISTICS_VER_3 (3) 19577 /* Event based statistics ecounters */ 19578 typedef struct { 19579 uint16 version; 19580 uint16 pad; 19581 struct ether_addr BSSID; /* BSSID of the BSS */ 19582 uint16 PAD; 19583 uint32 txdeauthivalclass; 19584 /* addition for v2 */ 19585 int32 timestamp; /* last deauth time */ 19586 struct ether_addr last_deauth; /* wrong deauth MAC */ 19587 uint16 misdeauth; /* wrong deauth count every 1sec */ 19588 int16 cur_rssi; /* current bss rssi */ 19589 int16 deauth_rssi; /* deauth pkt rssi */ 19590 /* addition for v3 (roam statistics) */ 19591 uint32 initial_assoc_time; 19592 uint32 prev_roam_time; 19593 uint32 last_roam_event_type; 19594 uint32 last_roam_event_status; 19595 uint32 last_roam_event_reason; 19596 uint16 roam_success_cnt; 19597 uint16 roam_fail_cnt; 19598 uint16 roam_attempt_cnt; 19599 uint16 max_roam_target_cnt; 19600 uint16 min_roam_target_cnt; 19601 uint16 max_cached_ch_cnt; 19602 uint16 min_cached_ch_cnt; 19603 uint16 partial_roam_scan_cnt; 19604 uint16 full_roam_scan_cnt; 19605 uint16 most_roam_reason; 19606 uint16 most_roam_reason_cnt; 19607 } wl_event_based_statistics_v3_t; 19608 19609 #define WL_EVENT_STATISTICS_VER_4 (4u) 19610 /* Event based statistics ecounters */ 19611 typedef struct { 19612 uint16 version; 19613 uint16 pad; 19614 struct ether_addr BSSID; /* BSSID of the BSS */ 19615 uint16 PAD; 19616 uint32 txdeauthivalclass; 19617 /* addition for v2 */ 19618 int32 timestamp; /* last deauth time */ 19619 struct ether_addr last_deauth; /* wrong deauth MAC */ 19620 uint16 misdeauth; /* wrong deauth count every 1sec */ 19621 int16 cur_rssi; /* current bss rssi */ 19622 int16 deauth_rssi; /* deauth pkt rssi */ 19623 } wl_event_based_statistics_v4_t; 19624 19625 /* ##### SC/ Sc offload/ WBUS related ecounters */ 19626 19627 #define WL_SC_PERIODIC_COMPACT_CNTRS_VER_1 (1) 19628 typedef struct { 19629 uint16 version; 19630 uint16 pad; 19631 uint32 rxstrt; /**< number of received frames with a good PLCP */ 19632 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 19633 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 19634 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 19635 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 19636 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 19637 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 19638 uint16 rxrtsucast; /**< number of unicast RTS addressed to the MAC (good FCS) */ 19639 uint16 rxf0ovfl; /**< number of receive fifo 0 overflows */ 19640 uint16 rxf1ovfl; /**< number of receive fifo 0 overflows */ 19641 uint16 rxhlovfl; /**< number of length / header fifo overflows */ 19642 uint16 rxbeaconmbss; /**< beacons received from member of BSS */ 19643 uint16 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 19644 uint16 rxbeaconobss; /**< beacons received from other BSS */ 19645 uint16 rxdtmcast; /**< number of RX Data multicast frames received by the MAC */ 19646 uint16 rxtoolate; /**< receive too late */ 19647 uint16 chswitch_cnt; /* Number of channel switches */ 19648 uint32 pm_dur; /* Total sleep time in PM, msecs */ 19649 uint16 hibernate_cnt; /* Number of times sc went to hibernate */ 19650 uint16 awake_cnt; /* Number of times sc awake is called */ 19651 uint16 sc_up_cnt; /* Number of times sc up/down happened */ 19652 uint16 sc_down_cnt; /* Number of times sc down happened */ 19653 } wl_sc_periodic_compact_cntrs_v1_t; 19654 19655 #define WL_WBUS_PERIODIC_CNTRS_VER_1 (1) 19656 typedef struct { 19657 uint16 version; 19658 uint16 pad; 19659 uint16 num_register; /* Number of registrations */ 19660 uint16 num_deregister; /* Number of deregistrations */ 19661 uint8 num_pending; /* Number of pending non-bt */ 19662 uint8 num_active; /* Number of active non-bt */ 19663 uint8 num_bt; /* Number of bt users */ 19664 uint8 pad1; 19665 uint16 num_rej; /* Number of reject */ 19666 uint16 num_rej_bt; /* Number of rejects for bt */ 19667 uint16 num_accept_attempt; /* Numbber of accept attempt */ 19668 uint16 num_accept_ok; /* Number of accept ok */ 19669 } wl_wbus_periodic_cntrs_v1_t; 19670 19671 #define WL_STA_OFLD_CNTRS_VER_1 (1) 19672 typedef struct { 19673 uint16 version; 19674 uint16 pad; 19675 19676 uint16 sc_ofld_enter_cnt; 19677 uint16 sc_ofld_exit_cnt; 19678 uint16 sc_ofld_wbus_reject_cnt; 19679 uint16 sc_ofld_wbus_cb_fail_cnt; 19680 uint16 sc_ofld_missed_bcn_cnt; 19681 uint8 sc_ofld_last_exit_reason; 19682 uint8 sc_ofld_last_enter_fail_reason; 19683 } wl_sta_ofld_cntrs_v1_t; 19684 19685 /* ##### Ecounters v2 section ##### */ 19686 19687 #define ECOUNTERS_VERSION_2 2 19688 19689 /* Enumeration of various ecounters request types. This namespace is different from 19690 * global reportable stats namespace. 19691 */ 19692 enum { 19693 WL_ECOUNTERS_XTLV_REPORT_REQ = 1 19694 }; 19695 19696 /* Input structure for ecounters IOVAR */ 19697 typedef struct ecounters_config_request_v2 { 19698 uint16 version; /* config version */ 19699 uint16 len; /* Length of this struct including variable len */ 19700 uint16 logset; /* Set where data will go. */ 19701 uint16 reporting_period; /* reporting_period */ 19702 uint16 num_reports; /* Number of timer expirations to report on */ 19703 uint8 pad[2]; /* Reserved for future use */ 19704 uint8 ecounters_xtlvs[]; /* Statistics Types (tags) to retrieve. */ 19705 } ecounters_config_request_v2_t; 19706 19707 #define ECOUNTERS_STATS_TYPES_FLAG_SLICE 0x1 19708 #define ECOUNTERS_STATS_TYPES_FLAG_IFACE 0x2 19709 #define ECOUNTERS_STATS_TYPES_FLAG_GLOBAL 0x4 19710 #define ECOUNTERS_STATS_TYPES_DEFAULT 0x8 19711 19712 /* Slice mask bits */ 19713 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE0 0x1u 19714 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE1 0x2u 19715 #define ECOUNTERS_STATS_TYPES_SLICE_MASK_SLICE_SC 0x4u 19716 19717 typedef struct ecounters_stats_types_report_req { 19718 /* flags: bit0 = slice, bit1 = iface, bit2 = global, 19719 * rest reserved 19720 */ 19721 uint16 flags; 19722 uint16 if_index; /* host interface index */ 19723 uint16 slice_mask; /* bit0 = slice0, bit1=slice1, rest reserved */ 19724 uint8 pad[2]; /* padding */ 19725 uint8 stats_types_req[]; /* XTLVs of requested types */ 19726 } ecounters_stats_types_report_req_t; 19727 19728 /* ##### Ecounters_Eventmsgs v2 section ##### */ 19729 19730 #define ECOUNTERS_EVENTMSGS_VERSION_2 2 19731 19732 typedef struct event_ecounters_config_request_v2 { 19733 uint16 version; /* config version */ 19734 uint16 len; /* Length of this struct including variable len */ 19735 uint16 logset; /* Set where data will go. */ 19736 uint16 event_id; /* Event id for which this config is meant for */ 19737 uint8 flags; /* Config flags */ 19738 uint8 pad[3]; /* Reserved for future use */ 19739 uint8 ecounters_xtlvs[]; /* Statistics Types (tags) to retrieve. */ 19740 } event_ecounters_config_request_v2_t; 19741 19742 #define EVENT_ECOUNTERS_FLAGS_ADD (1 << 0) /* Add configuration for the event_id if set */ 19743 #define EVENT_ECOUNTERS_FLAGS_DEL (1 << 1) /* Delete configuration for event_id if set */ 19744 #define EVENT_ECOUNTERS_FLAGS_ANYIF (1 << 2) /* Interface filtering disable / off bit */ 19745 #define EVENT_ECOUNTERS_FLAGS_BE (1 << 3) /* If cleared report stats of 19746 * one event log buffer 19747 */ 19748 #define EVENT_ECOUNTERS_FLAGS_DEL_ALL (1 << 4) /* Delete all the configurations of 19749 * event ecounters if set 19750 */ 19751 19752 #define EVENT_ECOUNTERS_FLAGS_BUS (1 << 5) /* Add configuration for the bus events */ 19753 #define EVENT_ECOUNTERS_FLAGS_BUS_H2D (1 << 6) /* Add configuration for the bus direction 19754 * 0 - D2H and 1 - H2D 19755 */ 19756 19757 #define EVENT_ECOUNTERS_FLAGS_DELAYED_FLUSH (1 << 7) /* Flush only when half of the total size 19758 * of blocks gets filled. This is to avoid 19759 * many interrupts to host. 19760 */ 19761 #define EVENT_ECOUNTERS_FLAGS_USER (1 << 6) /* Add configuration for user defined events 19762 * Reuse the same flag as H2D 19763 */ 19764 19765 /* Ecounters suspend resume */ 19766 #define ECOUNTERS_SUSPEND_VERSION_V1 1 19767 /* To be used in populating suspend_mask and suspend_bitmap */ 19768 #define ECOUNTERS_SUSPEND_TIMER (1 << ECOUNTERS_TRIGGER_REASON_TIMER) 19769 #define ECOUNTERS_SUSPEND_EVENTS (1 << ECOUNTERS_TRIGGER_REASON_EVENTS) 19770 19771 typedef struct ecounters_suspend { 19772 uint16 version; 19773 uint16 len; 19774 uint32 suspend_bitmap; /* type of ecounter reporting to be suspended */ 19775 uint32 suspend_mask; /* type of ecounter reporting to be suspended */ 19776 } ecounters_suspend_t; 19777 19778 /* -------------- dynamic BTCOEX --------------- */ 19779 #define DCTL_TROWS 2 /**< currently practical number of rows */ 19780 #define DCTL_TROWS_MAX 4 /**< 2 extra rows RFU */ 19781 /* DYNCTL profile flags */ 19782 #define DCTL_FLAGS_DISABLED 0 /**< default value: all features disabled */ 19783 #define DCTL_FLAGS_DYNCTL (1 << 0) /**< 1 - enabled, 0 - legacy only */ 19784 #define DCTL_FLAGS_DESENSE (1 << 1) /**< auto desense is enabled */ 19785 #define DCTL_FLAGS_MSWITCH (1 << 2) /**< mode switching is enabled */ 19786 #define DCTL_FLAGS_PWRCTRL (1 << 3) /**< Tx power control is enabled */ 19787 /* for now AGG on/off is handled separately */ 19788 #define DCTL_FLAGS_TX_AGG_OFF (1 << 4) /**< TBD: allow TX agg Off */ 19789 #define DCTL_FLAGS_RX_AGG_OFF (1 << 5) /**< TBD: allow RX agg Off */ 19790 /* used for dry run testing only */ 19791 #define DCTL_FLAGS_DRYRUN (1 << 7) /**< Enables dynctl dry run mode */ 19792 #define IS_DYNCTL_ON(prof) ((prof->flags & DCTL_FLAGS_DYNCTL) != 0) 19793 #define IS_DESENSE_ON(prof) ((prof->flags & DCTL_FLAGS_DESENSE) != 0) 19794 #define IS_MSWITCH_ON(prof) ((prof->flags & DCTL_FLAGS_MSWITCH) != 0) 19795 #define IS_PWRCTRL_ON(prof) ((prof->flags & DCTL_FLAGS_PWRCTRL) != 0) 19796 /* desense level currently in use */ 19797 #define DESENSE_OFF 0 19798 #define DFLT_DESENSE_MID 12 19799 #define DFLT_DESENSE_HIGH 2 19800 19801 /** 19802 * dynctl data points(a set of btpwr & wlrssi thresholds) 19803 * for mode & desense switching 19804 */ 19805 typedef struct btc_thr_data { 19806 int8 mode; /**< used by desense sw */ 19807 int8 bt_pwr; /**< BT tx power threshold */ 19808 int8 bt_rssi; /**< BT rssi threshold */ 19809 /* wl rssi range when mode or desense change may be needed */ 19810 int8 wl_rssi_high; 19811 int8 wl_rssi_low; 19812 } btc_thr_data_t; 19813 19814 /* dynctl. profile data structure */ 19815 #define DCTL_PROFILE_VER 0x01 19816 #include <packed_section_start.h> 19817 typedef BWL_PRE_PACKED_STRUCT struct dctl_prof { 19818 uint8 version; /**< dynctl profile version */ 19819 /* dynctl profile flags bit:0 - dynctl On, bit:1 dsns On, bit:2 mode sw On, */ 19820 uint8 flags; /**< bit[6:3] reserved, bit7 - Dryrun (sim) - On */ 19821 /** wl desense levels to apply */ 19822 uint8 dflt_dsns_level; 19823 uint8 low_dsns_level; 19824 uint8 mid_dsns_level; 19825 uint8 high_dsns_level; 19826 /** mode switching hysteresis in dBm */ 19827 int8 msw_btrssi_hyster; 19828 /** default btcoex mode */ 19829 uint8 default_btc_mode; 19830 /** num of active rows in mode switching table */ 19831 uint8 msw_rows; 19832 /** num of rows in desense table */ 19833 uint8 dsns_rows; 19834 /** dynctl mode switching data table */ 19835 btc_thr_data_t msw_data[DCTL_TROWS_MAX]; 19836 /** dynctl desense switching data table */ 19837 btc_thr_data_t dsns_data[DCTL_TROWS_MAX]; 19838 } BWL_POST_PACKED_STRUCT dctl_prof_t; 19839 #include <packed_section_end.h> 19840 19841 /** dynctl status info */ 19842 #include <packed_section_start.h> 19843 typedef BWL_PRE_PACKED_STRUCT struct dynctl_status { 19844 uint8 sim_on; /**< true if simulation is On */ 19845 uint16 bt_pwr_shm; /**< BT per/task power as read from ucode */ 19846 int8 bt_pwr; /**< BT pwr extracted & converted to dBm */ 19847 int8 bt_rssi; /**< BT rssi in dBm */ 19848 int8 wl_rssi; /**< last wl rssi reading used by btcoex */ 19849 uint8 dsns_level; /**< current desense level */ 19850 uint8 btc_mode; /**< current btcoex mode */ 19851 /* add more status items if needed, pad to 4 BB if needed */ 19852 } BWL_POST_PACKED_STRUCT dynctl_status_t; 19853 #include <packed_section_end.h> 19854 19855 /** dynctl simulation (dryrun data) */ 19856 #include <packed_section_start.h> 19857 typedef BWL_PRE_PACKED_STRUCT struct dynctl_sim { 19858 uint8 sim_on; /**< simulation mode on/off */ 19859 int8 btpwr; /**< simulated BT power in dBm */ 19860 int8 btrssi; /**< simulated BT rssi in dBm */ 19861 int8 wlrssi; /**< simulated WL rssi in dBm */ 19862 } BWL_POST_PACKED_STRUCT dynctl_sim_t; 19863 /* no default structure packing */ 19864 #include <packed_section_end.h> 19865 19866 /** PTK key maintained per SCB */ 19867 #define RSN_TEMP_ENCR_KEY_LEN 16 19868 typedef struct wpa_ptk { 19869 uint8 kck[RSN_KCK_LENGTH]; /**< EAPOL-Key Key Confirmation Key (KCK) */ 19870 uint8 kek[RSN_KEK_LENGTH]; /**< EAPOL-Key Key Encryption Key (KEK) */ 19871 uint8 tk1[RSN_TEMP_ENCR_KEY_LEN]; /**< Temporal Key 1 (TK1) */ 19872 uint8 tk2[RSN_TEMP_ENCR_KEY_LEN]; /**< Temporal Key 2 (TK2) */ 19873 } wpa_ptk_t; 19874 19875 /** GTK key maintained per SCB */ 19876 typedef struct wpa_gtk { 19877 uint32 idx; 19878 uint32 key_len; 19879 uint8 key[DOT11_MAX_KEY_SIZE]; 19880 } wpa_gtk_t; 19881 19882 /** FBT Auth Response Data structure */ 19883 typedef struct wlc_fbt_auth_resp { 19884 uint8 macaddr[ETHER_ADDR_LEN]; /**< station mac address */ 19885 uint8 pad[2]; 19886 uint8 pmk_r1_name[WPA2_PMKID_LEN]; 19887 wpa_ptk_t ptk; /**< pairwise key */ 19888 wpa_gtk_t gtk; /**< group key */ 19889 uint32 ie_len; 19890 uint8 status; /**< Status of parsing FBT authentication 19891 Request in application 19892 */ 19893 uint8 ies[1]; /**< IEs contains MDIE, RSNIE, 19894 FBTIE (ANonce, SNonce,R0KH-ID, R1KH-ID) 19895 */ 19896 } wlc_fbt_auth_resp_t; 19897 19898 /** FBT Action Response frame */ 19899 typedef struct wlc_fbt_action_resp { 19900 uint16 version; /**< structure version */ 19901 uint16 length; /**< length of structure */ 19902 uint8 macaddr[ETHER_ADDR_LEN]; /**< station mac address */ 19903 uint8 data_len; /**< len of ie from Category */ 19904 uint8 data[1]; /**< data contains category, action, sta address, target ap, 19905 status code,fbt response frame body 19906 */ 19907 } wlc_fbt_action_resp_t; 19908 19909 #define MACDBG_PMAC_ADDR_INPUT_MAXNUM 16 19910 #define MACDBG_PMAC_OBJ_TYPE_LEN 8 19911 19912 typedef struct _wl_macdbg_pmac_param_t { 19913 char type[MACDBG_PMAC_OBJ_TYPE_LEN]; 19914 uint8 step; 19915 uint8 w_en; 19916 uint16 num; 19917 uint32 bitmap; 19918 uint8 addr_raw; 19919 uint8 addr_num; 19920 uint16 addr[MACDBG_PMAC_ADDR_INPUT_MAXNUM]; 19921 uint8 pad0[2]; 19922 uint32 w_val; 19923 } wl_macdbg_pmac_param_t; 19924 19925 /** IOVAR 'svmp_sampcol' parameter. Used to set and read SVMP_SAMPLE_COLLECT's setting */ 19926 typedef struct wl_svmp_sampcol_param { 19927 uint32 version; /* version */ 19928 uint8 enable; 19929 uint8 trigger_mode; /* SVMP_SAMPCOL_TRIGGER */ 19930 uint8 trigger_mode_s[2]; /* SVMP_SAMPCOL_PKTPROC */ 19931 uint8 data_samplerate; /* SVMP_SAMPCOL_SAMPLERATE */ 19932 uint8 data_sel_phy1; /* SVMP_SAMPCOL_PHY1MUX */ 19933 uint8 data_sel_rx1; /* SVMP_SAMPCOL_RX1MUX without iqCompOut */ 19934 uint8 data_sel_dualcap; /* SVMP_SAMPCOL_RX1MUX */ 19935 uint8 pack_mode; /* SVMP_SAMPCOL_PACK */ 19936 uint8 pack_order; 19937 uint8 pack_cfix_fmt; 19938 uint8 pack_1core_sel; 19939 uint16 waitcnt; 19940 uint16 caplen; 19941 uint32 buff_addr_start; /* in word-size (2-bytes) */ 19942 uint32 buff_addr_end; /* note: Tcl in byte-size, HW in vector-size (8-bytes) */ 19943 uint8 int2vasip; 19944 uint8 PAD; 19945 uint16 status; 19946 } wl_svmp_sampcol_t; 19947 19948 #define WL_SVMP_SAMPCOL_PARAMS_VERSION 1 19949 19950 enum { 19951 SVMP_SAMPCOL_TRIGGER_PKTPROC_TRANSITION = 0, 19952 SVMP_SAMPCOL_TRIGGER_FORCE_IMMEDIATE, 19953 SVMP_SAMPCOL_TRIGGER_RADAR_DET 19954 }; 19955 19956 enum { 19957 SVMP_SAMPCOL_PHY1MUX_GPIOOUT = 0, 19958 SVMP_SAMPCOL_PHY1MUX_FFT, 19959 SVMP_SAMPCOL_PHY1MUX_DBGHX, 19960 SVMP_SAMPCOL_PHY1MUX_RX1MUX 19961 }; 19962 19963 enum { 19964 SVMP_SAMPCOL_RX1MUX_FARROWOUT = 4, 19965 SVMP_SAMPCOL_RX1MUX_IQCOMPOUT, 19966 SVMP_SAMPCOL_RX1MUX_DCFILTEROUT, 19967 SVMP_SAMPCOL_RX1MUX_RXFILTEROUT, 19968 SVMP_SAMPCOL_RX1MUX_ACIFILTEROUT 19969 }; 19970 19971 enum { 19972 SVMP_SAMPCOL_SAMPLERATE_1XBW = 0, 19973 SVMP_SAMPCOL_SAMPLERATE_2XBW 19974 }; 19975 19976 enum { 19977 SVMP_SAMPCOL_PACK_DUALCAP = 0, 19978 SVMP_SAMPCOL_PACK_4CORE, 19979 SVMP_SAMPCOL_PACK_2CORE, 19980 SVMP_SAMPCOL_PACK_1CORE 19981 }; 19982 19983 enum { 19984 SVMP_SAMPCOL_PKTPROC_RESET = 0, 19985 SVMP_SAMPCOL_PKTPROC_CARRIER_SEARCH, 19986 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_NB_PWR, 19987 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_W1_PWR, 19988 SVMP_SAMPCOL_PKTPROC_WAIT_FOR_W2_PWR, 19989 SVMP_SAMPCOL_PKTPROC_OFDM_PHY, 19990 SVMP_SAMPCOL_PKTPROC_TIMING_SEARCH, 19991 SVMP_SAMPCOL_PKTPROC_CHAN_EST_1, 19992 SVMP_SAMPCOL_PKTPROC_LEG_SIG_DEC, 19993 SVMP_SAMPCOL_PKTPROC_SIG_DECODE_1, 19994 SVMP_SAMPCOL_PKTPROC_SIG_DECODE_2, 19995 SVMP_SAMPCOL_PKTPROC_HT_AGC, 19996 SVMP_SAMPCOL_PKTPROC_CHAN_EST_2, 19997 SVMP_SAMPCOL_PKTPROC_PAY_DECODE, 19998 SVMP_SAMPCOL_PKTPROC_DSSS_CCK_PHY, 19999 SVMP_SAMPCOL_PKTPROC_WAIT_ENERGY_DROP, 20000 SVMP_SAMPCOL_PKTPROC_WAIT_NCLKS, 20001 SVMP_SAMPCOL_PKTPROC_PAY_DEC_EXT, 20002 SVMP_SAMPCOL_PKTPROC_SIG_FAIL_DELAY, 20003 SVMP_SAMPCOL_PKTPROC_RIFS_SEARCH, 20004 SVMP_SAMPCOL_PKTPROC_BOARD_SWITCH_DIV_SEARCH, 20005 SVMP_SAMPCOL_PKTPROC_DSSS_CCK_BOARD_SWITCH_DIV_SEARCH, 20006 SVMP_SAMPCOL_PKTPROC_CHAN_EST_3, 20007 SVMP_SAMPCOL_PKTPROC_CHAN_EST_4, 20008 SVMP_SAMPCOL_PKTPROC_FINE_TIMING_SEARCH, 20009 SVMP_SAMPCOL_PKTPROC_SET_CLIP_GAIN, 20010 SVMP_SAMPCOL_PKTPROC_NAP, 20011 SVMP_SAMPCOL_PKTPROC_VHT_SIGA_DEC, 20012 SVMP_SAMPCOL_PKTPROC_VHT_SIGB_DEC, 20013 SVMP_SAMPCOL_PKTPROC_PKT_ABORT, 20014 SVMP_SAMPCOL_PKTPROC_DCCAL 20015 }; 20016 20017 /** IOVAR 'svmp_mem' parameter. Used to read/clear svmp memory */ 20018 typedef struct svmp_mem { 20019 uint32 addr; /**< offset to read svmp memory from vasip base address */ 20020 uint16 len; /**< length in count of uint16's */ 20021 uint16 val; /**< set the range of addr/len with a value */ 20022 } svmp_mem_t; 20023 20024 /** IOVAR 'mu_rate' parameter. read/set mu rate for upto four users */ 20025 #define MU_RATE_CFG_VERSION 1 20026 typedef struct mu_rate { 20027 uint16 version; /**< version of the structure as defined by MU_RATE_CFG_VERSION */ 20028 uint16 length; /**< length of entire structure */ 20029 uint8 auto_rate; /**< enable/disable auto rate */ 20030 uint8 PAD; 20031 uint16 rate_user[4]; /**< rate per each of four users, set to -1 for no change */ 20032 } mu_rate_t; 20033 20034 /** IOVAR 'mu_group' parameter. Used to set and read MU group recommendation setting */ 20035 #define WL_MU_GROUP_AUTO_COMMAND -1 20036 #define WL_MU_GROUP_PARAMS_VERSION 3 20037 #define WL_MU_GROUP_METHOD_NAMELEN 64 20038 #define WL_MU_GROUP_NGROUP_MAX 15 20039 #define WL_MU_GROUP_NUSER_MAX 4 20040 #define WL_MU_GROUP_METHOD_MIN 0 20041 #define WL_MU_GROUP_NUMBER_AUTO_MIN 1 20042 #define WL_MU_GROUP_NUMBER_AUTO_MAX 15 20043 #define WL_MU_GROUP_NUMBER_FORCED_MAX 8 20044 #define WL_MU_GROUP_METHOD_OLD 0 20045 #define WL_MU_GROUP_MODE_AUTO 0 20046 #define WL_MU_GROUP_MODE_FORCED 1 20047 #define WL_MU_GROUP_FORCED_1GROUP 1 20048 #define WL_MU_GROUP_ENTRY_EMPTY -1 20049 typedef struct mu_group { 20050 uint32 version; /* version */ 20051 int16 forced; /* forced group recommendation */ 20052 int16 forced_group_mcs; /* forced group with mcs */ 20053 int16 forced_group_num; /* forced group number */ 20054 int16 group_option[WL_MU_GROUP_NGROUP_MAX][WL_MU_GROUP_NUSER_MAX]; 20055 /* set mode for forced grouping and read mode for auto grouping */ 20056 int16 group_GID[WL_MU_GROUP_NGROUP_MAX]; 20057 int16 group_method; /* methof for VASIP group recommendation */ 20058 int16 group_number; /* requested number for VASIP group recommendation */ 20059 int16 auto_group_num; /* exact number from VASIP group recommendation */ 20060 int8 group_method_name[WL_MU_GROUP_METHOD_NAMELEN]; 20061 uint8 PAD[2]; 20062 } mu_group_t; 20063 20064 typedef struct mupkteng_sta { 20065 struct ether_addr ea; 20066 uint8 PAD[2]; 20067 int32 nrxchain; 20068 int32 idx; 20069 } mupkteng_sta_t; 20070 20071 typedef struct mupkteng_client { 20072 int32 rspec; 20073 int32 idx; 20074 int32 flen; 20075 int32 nframes; 20076 } mupkteng_client_t; 20077 20078 typedef struct mupkteng_tx { 20079 mupkteng_client_t client[8]; 20080 int32 nclients; 20081 int32 ntx; 20082 } mupkteng_tx_t; 20083 20084 /* 20085 * MU Packet engine interface. 20086 * The following two definitions will go into 20087 * wlioctl_defs.h 20088 * when wl utility changes are merged to EAGLE TOB & Trunk 20089 */ 20090 20091 #define WL_MUPKTENG_PER_TX_START 0x10 20092 #define WL_MUPKTENG_PER_TX_STOP 0x20 20093 20094 /** IOVAR 'mu_policy' parameter. Used to configure MU admission control policies */ 20095 #define WL_MU_POLICY_PARAMS_VERSION 1 20096 #define WL_MU_POLICY_SCHED_DEFAULT 60 20097 #define WL_MU_POLICY_DISABLED 0 20098 #define WL_MU_POLICY_ENABLED 1 20099 #define WL_MU_POLICY_NRX_MIN 1 20100 #define WL_MU_POLICY_NRX_MAX 2 20101 typedef struct mu_policy { 20102 uint16 version; 20103 uint16 length; 20104 uint32 sched_timer; 20105 uint32 pfmon; 20106 uint32 pfmon_gpos; 20107 uint32 samebw; 20108 uint32 nrx; 20109 uint32 max_muclients; 20110 } mu_policy_t; 20111 20112 #define WL_NAN_BAND_STR_SIZE 5 /* sizeof ("auto") */ 20113 20114 /** Definitions of different NAN Bands */ 20115 /* do not change the order */ 20116 enum { 20117 NAN_BAND_B = 0, 20118 NAN_BAND_A, 20119 NAN_BAND_AUTO, 20120 NAN_BAND_INVALID = 0xFF 20121 }; 20122 20123 /* ifdef WL11ULB */ 20124 /* ULB Mode configured via "ulb_mode" IOVAR */ 20125 enum { 20126 ULB_MODE_DISABLED = 0, 20127 ULB_MODE_STD_ALONE_MODE = 1, /* Standalone ULB Mode */ 20128 ULB_MODE_DYN_MODE = 2, /* Dynamic ULB Mode */ 20129 /* Add all other enums before this */ 20130 MAX_SUPP_ULB_MODES 20131 }; 20132 20133 /* ULB BWs configured via "ulb_bw" IOVAR during Standalone Mode Only. 20134 * Values of this enumeration are also used to specify 'Current Operational Bandwidth' 20135 * and 'Primary Operational Bandwidth' sub-fields in 'ULB Operations' field (used in 20136 * 'ULB Operations' Attribute or 'ULB Mode Switch' Attribute) 20137 */ 20138 typedef enum { 20139 ULB_BW_DISABLED = 0, 20140 ULB_BW_10MHZ = 1, /* Standalone ULB BW in 10 MHz BW */ 20141 ULB_BW_5MHZ = 2, /* Standalone ULB BW in 5 MHz BW */ 20142 ULB_BW_2P5MHZ = 3, /* Standalone ULB BW in 2.5 MHz BW */ 20143 /* Add all other enums before this */ 20144 MAX_SUPP_ULB_BW 20145 } ulb_bw_type_t; 20146 /* endif WL11ULB */ 20147 20148 #define WL_MESH_IOCTL_VERSION 1 20149 #define MESH_IOC_BUFSZ 512 /* sufficient ioc buff size for mesh */ 20150 20151 /* container for mesh ioctls & events */ 20152 typedef struct wl_mesh_ioc { 20153 uint16 version; /* interface command or event version */ 20154 uint16 id; /* mesh ioctl cmd ID */ 20155 uint16 len; /* total length of all tlv records in data[] */ 20156 uint16 pad; /* pad to be 32 bit aligment */ 20157 uint8 data[]; /* var len payload of bcm_xtlv_t type */ 20158 } wl_mesh_ioc_t; 20159 20160 enum wl_mesh_cmds { 20161 WL_MESH_CMD_ENABLE = 1, 20162 WL_MESH_CMD_JOIN = 2, 20163 WL_MESH_CMD_PEER_STATUS = 3, 20164 WL_MESH_CMD_ADD_ROUTE = 4, 20165 WL_MESH_CMD_DEL_ROUTE = 5, 20166 WL_MESH_CMD_ADD_FILTER = 6, 20167 WL_MESH_CMD_ENAB_AL_METRIC = 7, 20168 WL_MESH_CMD_START_AUTOPEER = 8 20169 }; 20170 20171 enum wl_mesh_cmd_xtlv_id { 20172 WL_MESH_XTLV_ENABLE = 1, 20173 WL_MESH_XTLV_JOIN = 2, 20174 WL_MESH_XTLV_STATUS = 3, 20175 WL_MESH_XTLV_ADD_ROUTE = 4, 20176 WL_MESH_XTLV_DEL_ROUTE = 5, 20177 WL_MESH_XTLV_ADD_FILTER = 6, 20178 WL_MESH_XTLV_ENAB_AIRLINK = 7, 20179 WL_MESH_XTLV_START_AUTOPEER = 8 20180 }; 20181 /* endif WLMESH */ 20182 20183 /* Fast BSS Transition parameter configuration */ 20184 #define FBT_PARAM_CURRENT_VERSION 0 20185 20186 typedef struct _wl_fbt_params { 20187 uint16 version; /* version of the structure 20188 * as defined by FBT_PARAM_CURRENT_VERSION 20189 */ 20190 uint16 length; /* length of the entire structure */ 20191 20192 uint16 param_type; /* type of parameter defined below */ 20193 uint16 param_len; /* length of the param_value */ 20194 uint8 param_value[1]; /* variable length */ 20195 } wl_fbt_params_t; 20196 20197 #define WL_FBT_PARAM_TYPE_RSNIE 0 20198 #define WL_FBT_PARAM_TYPE_FTIE 0x1 20199 #define WL_FBT_PARAM_TYPE_SNONCE 0x2 20200 #define WL_FBT_PARAM_TYPE_MDE 0x3 20201 #define WL_FBT_PARAM_TYPE_PMK_R0_NAME 0x4 20202 #define WL_FBT_PARAM_TYPE_R0_KHID 0x5 20203 #define WL_FBT_PARAM_TYPE_R1_KHID 0x6 20204 #define WL_FBT_PARAM_TYPE_FIRST_INVALID 0x7 20205 20206 /* Assoc Mgr commands for fine control of assoc */ 20207 #define WL_ASSOC_MGR_CURRENT_VERSION 0x0 20208 20209 typedef struct { 20210 uint16 version; /* version of the structure as 20211 * defined by WL_ASSOC_MGR_CURRENT_VERSION 20212 */ 20213 uint16 length; /* length of the entire structure */ 20214 20215 uint16 cmd; 20216 uint16 params; 20217 } wl_assoc_mgr_cmd_t; 20218 20219 enum wl_sae_auth_xtlv_id { 20220 WL_SAE_AUTH_XTLV_CONTAINER = 0xa1, 20221 WL_SAE_AUTH_XTLV_BSSID = 0xa2, 20222 WL_SAE_AUTH_XTLV_CYCLIC_GROUP = 0xa3, 20223 WL_SAE_AUTH_XTLV_SCALAR = 0xa4, 20224 WL_SAE_AUTH_XTLV_ELEMENTS = 0xa5, 20225 WL_SAE_AUTH_XTLV_ANTI_CLOGGING = 0xa6, 20226 WL_SAE_AUTH_XTLV_SEND_CONFIRM = 0xa7, 20227 WL_SAE_AUTH_XTLV_CONFIRM = 0xa8, 20228 WL_SAE_AUTH_XTLV_STATUS = 0xa9, 20229 WL_SAE_AUTH_XTLV_LAST = 0xac 20230 }; 20231 20232 #define WL_ASSOC_MGR_CMD_PAUSE_ON_EVT 0 /* have assoc pause on certain events */ 20233 #define WL_ASSOC_MGR_CMD_ABORT_ASSOC 1 20234 #define WL_ASSOC_MGR_CMD_SET_SAE_FRAME 2 20235 #define WL_ASSOC_MGR_CMD_SEND_AUTH 3 20236 20237 #define WL_ASSOC_MGR_PARAMS_EVENT_NONE 0 /* use this to resume as well as clear */ 20238 #define WL_ASSOC_MGR_PARAMS_PAUSE_EVENT_AUTH_RESP 1 20239 20240 #define WL_WINVER_STRUCT_VER_1 (1) 20241 20242 typedef struct wl_winver { 20243 20244 /* Version and length of this structure. Length includes all fields in wl_winver_t */ 20245 uint16 struct_version; 20246 uint16 struct_length; 20247 20248 /* Windows operating system version info (Microsoft provided) */ 20249 struct { 20250 uint32 major_ver; 20251 uint32 minor_ver; 20252 uint32 build; 20253 } os_runtime; 20254 20255 /* NDIS runtime version (Microsoft provided) */ 20256 struct { 20257 uint16 major_ver; 20258 uint16 minor_ver; 20259 } ndis_runtime; 20260 20261 /* NDIS Driver version (Broadcom provided) */ 20262 struct { 20263 uint16 major_ver; 20264 uint16 minor_ver; 20265 } ndis_driver; 20266 20267 /* WDI Upper Edge (UE) Driver version (Microsoft provided) */ 20268 struct { 20269 uint8 major_ver; 20270 uint8 minor_ver; 20271 uint8 suffix; 20272 } wdi_ue; 20273 20274 /* WDI Lower Edge (LE) Driver version (Broadcom provided) */ 20275 struct { 20276 uint8 major_ver; 20277 uint8 minor_ver; 20278 uint8 suffix; 20279 } wdi_le; 20280 uint8 PAD[2]; 20281 } wl_winver_t; 20282 20283 /* defined(WLRCC) || defined(ROAM_CHANNEL_CACHE) */ 20284 #define MAX_ROAM_CHANNEL 20 20285 typedef struct { 20286 int32 n; 20287 chanspec_t channels[MAX_ROAM_CHANNEL]; 20288 } wl_roam_channel_list_t; 20289 /* endif RCC || ROAM_CHANNEL_CACHE */ 20290 20291 /* values for IOV_MFP arg */ 20292 enum { 20293 WL_MFP_NONE = 0, 20294 WL_MFP_CAPABLE, 20295 WL_MFP_REQUIRED 20296 }; 20297 20298 typedef enum { 20299 CHANSW_UNKNOWN = 0, /* channel switch due to unknown reason */ 20300 CHANSW_SCAN = 1, /* channel switch due to scan */ 20301 CHANSW_PHYCAL = 2, /* channel switch due to phy calibration */ 20302 CHANSW_INIT = 3, /* channel set at WLC up time */ 20303 CHANSW_ASSOC = 4, /* channel switch due to association */ 20304 CHANSW_ROAM = 5, /* channel switch due to roam */ 20305 CHANSW_MCHAN = 6, /* channel switch triggered by mchan module */ 20306 CHANSW_IOVAR = 7, /* channel switch due to IOVAR */ 20307 CHANSW_CSA_DFS = 8, /* channel switch due to chan switch announcement from AP */ 20308 CHANSW_APCS = 9, /* Channel switch from AP channel select module */ 20309 20310 #ifdef WLAWDL 20311 CHANSW_AWDL = 10, /* channel switch due to AWDL */ 20312 #endif /* WLAWDL */ 20313 20314 CHANSW_FBT = 11, /* Channel switch from FBT module for action frame response */ 20315 CHANSW_UPDBW = 12, /* channel switch at update bandwidth */ 20316 CHANSW_ULB = 13, /* channel switch at ULB */ 20317 CHANSW_LAST = 14 /* last channel switch reason */ 20318 } chansw_reason_t; 20319 20320 /* 20321 * WOWL unassociated mode power svae pattern. 20322 */ 20323 typedef struct wowl_radio_duty_cycle { 20324 uint16 wake_interval; 20325 uint16 sleep_interval; 20326 } wowl_radio_duty_cycle_t; 20327 20328 typedef struct nd_ra_ol_limits { 20329 uint16 version; /* version of the iovar buffer */ 20330 uint16 type; /* type of data provided */ 20331 uint16 length; /* length of the entire structure */ 20332 uint16 pad1; /* pad union to 4 byte boundary */ 20333 union { 20334 struct { 20335 uint16 min_time; /* seconds, min time for RA offload hold */ 20336 uint16 lifetime_percent; 20337 /* percent, lifetime percentage for offload hold time */ 20338 } lifetime_relative; 20339 struct { 20340 uint16 hold_time; /* seconds, RA offload hold time */ 20341 uint16 pad2; /* unused */ 20342 } fixed; 20343 } limits; 20344 } nd_ra_ol_limits_t; 20345 20346 #define ND_RA_OL_LIMITS_VER 1 20347 20348 /* nd_ra_ol_limits sub-types */ 20349 #define ND_RA_OL_LIMITS_REL_TYPE 0 /* relative, percent of RA lifetime */ 20350 #define ND_RA_OL_LIMITS_FIXED_TYPE 1 /* fixed time */ 20351 20352 /* buffer lengths for the different nd_ra_ol_limits types */ 20353 #define ND_RA_OL_LIMITS_REL_TYPE_LEN 12 20354 #define ND_RA_OL_LIMITS_FIXED_TYPE_LEN 10 20355 20356 /* 20357 * Temperature Throttling control mode 20358 */ 20359 typedef struct wl_temp_control { 20360 uint8 enable; 20361 uint8 PAD; 20362 uint16 control_bit; 20363 } wl_temp_control_t; 20364 20365 /* SensorHub Interworking mode */ 20366 20367 #define SHUB_CONTROL_VERSION 1 20368 #define SHUB_CONTROL_LEN 12 20369 20370 typedef struct { 20371 uint16 verison; 20372 uint16 length; 20373 uint16 cmd; 20374 uint16 op_mode; 20375 uint16 interval; 20376 uint16 enable; 20377 } shub_control_t; 20378 20379 /* WLC_MAJOR_VER <= 5 */ 20380 /* Data structures for non-TLV format */ 20381 20382 /* Data structures for rsdb caps */ 20383 /* 20384 * The flags field of the rsdb_caps_response is designed to be 20385 * a Bit Mask. As of now only Bit 0 is used as mentioned below. 20386 */ 20387 20388 /* Bit-0 in flags is used to indicate if the cores can operate synchronously 20389 * i.e either as 2x2 MIMO or 2(1x1 SISO). This is true only for 4349 variants 20390 * 0 - device can operate only in rsdb mode (eg: 4364) 20391 * 1 - device can operate in both rsdb and mimo (eg : 4359 variants) 20392 */ 20393 20394 #define WL_RSDB_CAPS_VER 2 20395 #define SYNCHRONOUS_OPERATION_TRUE (1 << 0) 20396 #define WL_RSDB_CAPS_FIXED_LEN OFFSETOF(rsdb_caps_response_t, num_chains) 20397 20398 typedef struct rsdb_caps_response { 20399 uint8 ver; /* Version */ 20400 uint8 len; /* length of this structure excluding ver and len */ 20401 uint8 rsdb; /* TRUE for rsdb chip */ 20402 uint8 num_of_cores; /* no of d11 cores */ 20403 uint16 flags; /* Flags to indicate various capabilities */ 20404 uint8 num_chains[1]; /* Tx/Rx chains for each core */ 20405 } rsdb_caps_response_t; 20406 20407 /* Data structures for rsdb bands */ 20408 20409 #define WL_RSDB_BANDS_VER 2 20410 #define WL_RSDB_BANDS_FIXED_LEN OFFSETOF(rsdb_bands_t, band) 20411 20412 typedef struct rsdb_bands 20413 { 20414 uint8 ver; 20415 uint8 len; 20416 uint16 num_cores; /* num of D11 cores */ 20417 int16 band[1]; /* The band operating on each of the d11 cores */ 20418 } rsdb_bands_t; 20419 20420 /* rsdb config */ 20421 20422 #define WL_RSDB_CONFIG_VER 3 20423 #define ALLOW_SIB_PARALLEL_SCAN (1 << 0) 20424 #define MAX_BANDS 2 20425 20426 #define WL_RSDB_CONFIG_LEN sizeof(rsdb_config_t) 20427 20428 typedef uint8 rsdb_opmode_t; 20429 typedef uint32 rsdb_flags_t; 20430 20431 typedef enum rsdb_modes { 20432 WLC_SDB_MODE_NOSDB_MAIN = 1, /* 2X2 or MIMO mode (applicable only for 4355) */ 20433 WLC_SDB_MODE_NOSDB_AUX = 2, 20434 WLC_SDB_MODE_SDB_MAIN = 3, /* This is RSDB mode(default) applicable only for 4364 */ 20435 WLC_SDB_MODE_SDB_AUX = 4, 20436 WLC_SDB_MODE_SDB_AUTO = 5, /* Same as WLC_RSDB_MODE_RSDB(1+1) mode above */ 20437 } rsdb_modes_t; 20438 20439 typedef struct rsdb_config { 20440 uint8 ver; 20441 uint8 len; 20442 uint16 reserved; 20443 rsdb_opmode_t non_infra_mode; 20444 rsdb_opmode_t infra_mode[MAX_BANDS]; 20445 rsdb_flags_t flags[MAX_BANDS]; 20446 rsdb_opmode_t current_mode; /* Valid only in GET, returns the current mode */ 20447 uint8 pad[3]; 20448 } rsdb_config_t; 20449 20450 /* WLC_MAJOR_VER > =5 */ 20451 /* TLV definitions and data structures for rsdb subcmds */ 20452 20453 enum wl_rsdb_cmd_ids { 20454 /* RSDB ioctls */ 20455 WL_RSDB_CMD_VER = 0, 20456 WL_RSDB_CMD_CAPS = 1, 20457 WL_RSDB_CMD_BANDS = 2, 20458 WL_RSDB_CMD_CONFIG = 3, 20459 /* Add before this !! */ 20460 WL_RSDB_CMD_LAST 20461 }; 20462 #define WL_RSDB_IOV_VERSION 0x1 20463 20464 typedef struct rsdb_caps_response_v1 { 20465 uint8 rsdb; /* TRUE for rsdb chip */ 20466 uint8 num_of_cores; /* no of d11 cores */ 20467 uint16 flags; /* Flags to indicate various capabilities */ 20468 uint8 num_chains[MAX_NUM_D11CORES]; /* Tx/Rx chains for each core */ 20469 uint8 band_cap[MAX_NUM_D11CORES]; /* band cap bitmask per slice */ 20470 } rsdb_caps_response_v1_t; 20471 20472 typedef struct rsdb_bands_v1 20473 { 20474 uint8 num_cores; /* num of D11 cores */ 20475 uint8 pad; /* padding bytes for 4 byte alignment */ 20476 int8 band[MAX_NUM_D11CORES]; /* The band operating on each of the d11 cores */ 20477 } rsdb_bands_v1_t; 20478 20479 typedef struct rsdb_config_xtlv { 20480 rsdb_opmode_t reserved1; /* Non_infra mode is no more applicable */ 20481 rsdb_opmode_t infra_mode[MAX_BANDS]; /* Target mode for Infra association */ 20482 uint8 pad; /* pad bytes for 4 byte alignment */ 20483 rsdb_flags_t flags[MAX_BANDS]; 20484 rsdb_opmode_t current_mode; /* GET only; has current mode of operation */ 20485 uint8 pad1[3]; 20486 } rsdb_config_xtlv_t; 20487 20488 /* Definitions for slot_bss chanseq iovar */ 20489 #define WL_SLOT_BSS_VERSION 1 20490 20491 /* critical slots max size */ 20492 #define WL_SLOTTED_BSS_CS_BMP_CFG_MAX_SZ 128 /* arbitrary */ 20493 20494 enum wl_slotted_bss_cmd_id { 20495 WL_SLOTTED_BSS_CMD_VER = 0, 20496 WL_SLOTTED_BSS_CMD_CHANSEQ = 1, 20497 WL_SLOTTED_BSS_CMD_CS_BMP = 2 /* critical slots bitmap */ 20498 }; 20499 20500 typedef uint16 chan_seq_type_t; 20501 enum chan_seq_type { 20502 CHAN_SEQ_TYPE_AWDL = 1, 20503 CHAN_SEQ_TYPE_SLICE = 2, 20504 CHAN_SEQ_TYPE_NAN = 3, /* NAN avail XTLV */ 20505 CHAN_SEQ_TYPE_NANHO = 4 /* NANHO channel schedule XTLV */ 20506 }; 20507 20508 typedef uint8 sched_flag_t; 20509 enum sched_flag { 20510 NO_SDB_SCHED = 0x1, 20511 SDB_TDM_SCHED = 0x2, 20512 SDB_SPLIT_BAND_SCHED = 0x4, /* default mode for 4357 */ 20513 MAIN_ONLY = 0x8, 20514 AUX_ONLY = 0x10, 20515 SDB_DUAL_TIME = (MAIN_ONLY | AUX_ONLY), 20516 NO_SDB_MAIN_ONLY = (NO_SDB_SCHED | MAIN_ONLY), /* default mode for 4364 */ 20517 SDB_TDM_SCHED_MAIN = (SDB_TDM_SCHED | MAIN_ONLY), 20518 SDB_TDM_SCHED_AUX = (SDB_TDM_SCHED | AUX_ONLY), 20519 SDB_TDM_SCHED_DUAL_TIME = (SDB_TDM_SCHED | SDB_DUAL_TIME), 20520 SDB_SPLIT_BAND_SCHED_DUAL_TIME = (SDB_SPLIT_BAND_SCHED | SDB_DUAL_TIME) 20521 }; 20522 20523 typedef struct chan_seq_tlv_data { 20524 uint32 flags; 20525 uint8 data[1]; 20526 } chan_seq_tlv_data_t; 20527 20528 typedef struct chan_seq_tlv { 20529 chan_seq_type_t type; 20530 uint16 len; 20531 chan_seq_tlv_data_t chanseq_data[1]; 20532 } chan_seq_tlv_t; 20533 20534 typedef struct sb_channel_sequence { 20535 sched_flag_t sched_flags; /* (sdb-tdm or sdb-sb or Dual-Time) */ 20536 uint8 num_seq; /* number of chan_seq_tlv following */ 20537 uint16 pad; 20538 chan_seq_tlv_t seq[1]; 20539 } sb_channel_sequence_t; 20540 20541 typedef struct slice_chan_seq { 20542 uint8 slice_index; /* 0(Main) or 1 (Aux) */ 20543 uint8 num_chanspecs; 20544 uint8 dur; 20545 uint8 pad; 20546 chanspec_t chanspecs[1]; 20547 } slice_chan_seq_t; 20548 20549 #define SLOT_BSS_SLICE_TYPE_DUR_MAX_RANGE 2u 20550 #define SLOTTED_BSS_AGGR_EN (1 << 0) /* Bitmap of mode */ 20551 #define SLOTTED_BSS_AGGR_LIMIT_DUR (1 << 1) /* Jira 49554 */ 20552 #define SLOTTED_BSS_HE_1024_QAM_SUPPORT (1 << 2) /* MCS10-11 Support */ 20553 20554 #define WL_SLICE_CHAN_SEQ_FIXED_LEN OFFSETOF(slice_chan_seq_t, chanspecs) 20555 /* Definitions for slotted_bss stats */ 20556 #define SBSS_STATS_VERSION 1 20557 #define SBSS_STATS_CURRENT_VERSION SBSS_STATS_VERSION 20558 20559 #define SBSS_MAX_CHAN_STATS 4 20560 20561 typedef struct sbss_core_stats { 20562 uint32 sb_slot_start; 20563 uint32 sb_slot_end; 20564 uint32 sb_slot_skip; 20565 uint32 mismatch_count; 20566 } sbss_core_stats_t; 20567 20568 typedef struct sbss_chan_stats { 20569 chanspec_t chanspec; 20570 uint32 slot_start; 20571 uint32 slot_end; 20572 uint32 slot_skip; 20573 } sbss_chan_stats_t; 20574 20575 typedef struct sbss_stats_v1 { 20576 uint16 version; 20577 uint16 length; 20578 sbss_core_stats_t corestats[MAX_NUM_D11CORES]; 20579 sbss_chan_stats_t sbss_chanstats[MAX_NUM_D11CORES][SBSS_MAX_CHAN_STATS]; 20580 } sbss_stats_t; 20581 20582 /* slotted bss critical slots */ 20583 typedef struct wl_sbss_cs_bmp_s { 20584 uint8 bitmap_len; 20585 uint8 pad[3]; 20586 uint8 bitmap[]; 20587 } wl_sbss_cs_bmp_t; 20588 20589 typedef struct sim_pm_params { 20590 uint32 enabled; 20591 uint16 cycle; 20592 uint16 up; 20593 } sim_pm_params_t; 20594 20595 /* Digital napping status */ 20596 #define WL_NAP_STATUS_VERSION_1 1 20597 typedef struct wl_nap_status_v1 { 20598 uint16 version; /* structure version */ 20599 uint16 len; /* length of returned data */ 20600 uint16 fw_status; /* bitmask of FW disable reasons */ 20601 uint8 hw_status; /* bitmask for actual HW state info */ 20602 uint8 slice_index; /* which slice this represents */ 20603 uint32 total_disable_dur; /* total time (ms) disabled for fw_status */ 20604 } wl_nap_status_v1_t; 20605 20606 /* Bits for fw_status */ 20607 #define NAP_DISABLED_HOST 0x0001 /* Host has disabled through nap_enable */ 20608 #define NAP_DISABLED_RSSI 0x0002 /* Disabled because of nap_rssi_threshold */ 20609 #define NAP_DISABLED_SCAN 0x0004 /* Disabled because of scan */ 20610 #define NAP_DISABLED_ASSOC 0x0008 /* Disabled because of association */ 20611 #define NAP_DISABLED_LTE 0x0010 /* Disabled because of LTE */ 20612 #define NAP_DISABLED_ACI 0x0020 /* Disabled because of ACI mitigation */ 20613 #define NAP_DISABLED_SEQ_RANGE 0x0040 /* Disabled during SEQ Ranging */ 20614 #define NAP_DISABLED_CHANSWITCH 0x0080 /* Disabled during channel switch */ 20615 20616 /* Bits for hw_status */ 20617 #define NAP_HWCFG 0x01 /* State of NAP config bit in phy HW */ 20618 #define NAP_NOCLK 0x80 /* No clock to read HW (e.g. core down) */ 20619 20620 /* ifdef WL_NATOE */ 20621 #define WL_NATOE_IOCTL_VERSION 1 20622 #define WL_NATOE_IOC_BUFSZ 512 /* sufficient ioc buff size for natoe */ 20623 #define WL_NATOE_DBG_STATS_BUFSZ 2048 20624 #define NATOE_FLAGS_ENAB_MASK 0x1 20625 #define NATOE_FLAGS_ACTIVE_MASK 0x2 20626 #define NATOE_FLAGS_PUBNW_MASK 0x4 20627 #define NATOE_FLAGS_PVTNW_MASK 0x8 20628 #define NATOE_FLAGS_ENAB_SHFT_MASK 0 20629 #define NATOE_FLAGS_ACTIVE_SHFT_MASK 1 20630 #define NATOE_FLAGS_PUBNW_SHFT_MASK 2 20631 #define NATOE_FLAGS_PVTNW_SHFT_MASK 3 20632 #define NATOE_FLAGS_PUB_NW_UP (1 << NATOE_FLAGS_PUBNW_SHFT_MASK) 20633 #define NATOE_FLAGS_PVT_NW_UP (1 << NATOE_FLAGS_PVTNW_SHFT_MASK) 20634 20635 #define PCIE_FRWDPKT_STATS_VERSION 1 20636 20637 /* Module version is 1 for IGUANA */ 20638 #define WL_NATOE_MODULE_VER_1 1 20639 /* Module version is 2 for Lemur */ 20640 #define WL_NATOE_MODULE_VER_2 2 20641 20642 /* WL_NATOE_CMD_MOD_VER */ 20643 typedef uint16 wl_natoe_ver_t; 20644 /* config natoe STA and AP IP's structure */ 20645 typedef struct { 20646 uint32 sta_ip; 20647 uint32 sta_netmask; 20648 uint32 sta_router_ip; 20649 uint32 sta_dnsip; 20650 uint32 ap_ip; 20651 uint32 ap_netmask; 20652 } wl_natoe_config_ips_t; 20653 20654 /* natoe ports config structure */ 20655 typedef struct { 20656 uint16 start_port_num; 20657 uint16 no_of_ports; 20658 } wl_natoe_ports_config_t; 20659 20660 /* natoe ports exception info */ 20661 typedef struct { 20662 uint16 sta_port_num; 20663 uint16 dst_port_num; /* for SIP type protocol, dst_port_num info can be ignored by FW */ 20664 uint32 ip; /* for SIP ip is APcli_ip and for port clash it is dst_ip */ 20665 uint8 entry_type; /* Create/Destroy */ 20666 uint8 pad[3]; 20667 } wl_natoe_exception_port_t; 20668 20669 /* container for natoe ioctls & events */ 20670 typedef struct wl_natoe_ioc { 20671 uint16 version; /* interface command or event version */ 20672 uint16 id; /* natoe ioctl cmd ID */ 20673 uint16 len; /* total length of all tlv records in data[] */ 20674 uint16 pad; /* pad to be 32 bit aligment */ 20675 uint8 data[]; /* var len payload of bcm_xtlv_t type */ 20676 } wl_natoe_ioc_t; 20677 20678 typedef struct wl_natoe_pool_stats_v1 { 20679 /* For debug purposes */ 20680 uint16 poolreorg_cnt; 20681 uint16 poolrevert_cnt; 20682 uint16 txfrag_state; 20683 uint16 rxfrag_state; 20684 uint16 txfrag_plen; 20685 uint16 rxfrag_plen; 20686 uint16 tx_pavail; 20687 uint16 rx_pavail; 20688 uint16 txmin_bkup_bufs; 20689 uint16 rxmin_bkup_bufs; 20690 uint16 pktpool_sbuf_alloc; 20691 uint16 pktpool_plen; 20692 uint16 pktpool_pavail; 20693 /* Peak shared buffer count in all iterations */ 20694 uint16 sbuf_peak; 20695 /* Peak shared buffer count in current D3 iteration */ 20696 uint16 sbuf_peak_cur; 20697 } wl_natoe_pool_stats_v1_t; 20698 20699 typedef struct wl_natoe_arp_entry_v1 { 20700 struct ipv4_addr ip; 20701 struct ether_addr mac_addr; 20702 uint8 lifetime; 20703 uint8 flags; 20704 } wl_natoe_arp_entry_v1_t; 20705 20706 typedef struct wl_natoe_dbg_arp_tbl_info_v1 { 20707 uint8 valid_arp_entries; 20708 uint8 PAD[3]; 20709 wl_natoe_arp_entry_v1_t arp_ent[]; 20710 } wl_natoe_dbg_arp_tbl_info_v1_t; 20711 20712 typedef struct wl_natoe_skip_port_entry_v1 { 20713 struct ipv4_addr srcip; 20714 uint16 src_port; 20715 uint16 lifetime; 20716 } wl_natoe_skip_port_entry_v1_t; 20717 20718 typedef struct wl_natoe_skip_port_info_v1 { 20719 uint8 valid_entries; 20720 uint8 PAD[3]; 20721 wl_natoe_skip_port_entry_v1_t skip_port_ent[]; 20722 } wl_natoe_skip_port_info_v1_t; 20723 20724 typedef struct wl_natoe_dbg_stats_v1 { 20725 uint16 active_nat_entries; 20726 uint16 active_dns_entries; 20727 uint16 active_icmp_entries; 20728 uint16 valid_arp_entries; 20729 uint16 prev_nat_entries; 20730 uint16 prev_dns_entries; 20731 uint16 tcp_fast_reclaim_cnt; 20732 uint16 mcast_packets; 20733 uint16 bcast_packets; 20734 uint16 port_commands_rcvd; 20735 uint16 unsupported_prot; 20736 uint16 arp_req_sent; 20737 uint16 arp_rsp_rcvd; 20738 uint16 non_ether_frames; 20739 uint16 port_alloc_fail; 20740 uint16 srcip_tbl_full; 20741 uint16 dstip_tbl_full; 20742 uint16 nat_tbl_full; 20743 uint16 icmp_error_cnt; 20744 uint16 pkt_drops_resource; 20745 uint32 frwd_nat_pkt_cnt; 20746 uint32 reverse_nat_pkt_cnt; 20747 uint16 pub_nw_chspec; 20748 uint16 pvt_nw_chspec; 20749 uint8 pubnw_cfg_idx; 20750 uint8 pvtnw_cfg_idx; 20751 uint8 pubnw_cfg_ID; 20752 uint8 pvtnw_cfg_ID; 20753 uint16 natoe_flags; 20754 } wl_natoe_dbg_stats_v1_t; 20755 20756 typedef struct wl_natoe_exception_port_inf_v1 { 20757 uint16 except_bmap_size; 20758 uint8 port_except_bmap[]; 20759 } wl_natoe_exception_port_inf_v1_t; 20760 20761 typedef struct wl_natoe_dstnat_entry_v1 { 20762 struct ipv4_addr clientip; 20763 struct ether_addr client_mac_addr; 20764 uint16 client_listenport; 20765 uint8 opcode; 20766 } wl_natoe_dstnat_entry_v1_t; 20767 20768 typedef struct wl_pcie_frwd_stats_v1 { 20769 uint16 version; 20770 uint16 len; 20771 uint16 frwd_txfrag_q_cnt; /* no. of txfrags in frwd_txfrag_list */ 20772 /* no. of outstanding lbufs in txpath on if0/ifx */ 20773 uint16 tx_frwd_n_lb_if0; 20774 uint16 tx_frwd_n_lb_ifx; 20775 /* no. of outstanding lfrags in txpath on if0/ifx */ 20776 uint16 tx_frwd_n_lf_if0; 20777 uint16 tx_frwd_n_lf_ifx; 20778 /* no. of pending frwd pkts dropped upon d3 entry */ 20779 uint16 tx_frwd_d3_drop_cnt; 20780 /* Total no. of lbufs frwded in txpath on if0/ifx */ 20781 uint32 tx_frwd_n_lb_if0_cnt; 20782 uint32 tx_frwd_n_lb_ifx_cnt; 20783 /* Total no. of lfrags frwded in txpath on if0/ifx */ 20784 uint32 tx_frwd_n_lf_if0_cnt; 20785 uint32 tx_frwd_n_lf_ifx_cnt; 20786 uint32 frwd_tx_drop_thr_cnt; /* no. of pkts dropped due to txfrag threshold */ 20787 uint32 frwd_tx_drop_err_cnt; /* no. of pkts dropped due to txfrags not avail / errors */ 20788 } wl_pcie_frwd_stats_v1_t; 20789 20790 enum wl_natoe_cmds { 20791 WL_NATOE_CMD_MOD_VER = 0, 20792 WL_NATOE_CMD_ENABLE = 1, 20793 WL_NATOE_CMD_CONFIG_IPS = 2, 20794 WL_NATOE_CMD_CONFIG_PORTS = 3, 20795 WL_NATOE_CMD_DBG_STATS = 4, 20796 WL_NATOE_CMD_EXCEPTION_PORT = 5, 20797 WL_NATOE_CMD_SKIP_PORT = 6, 20798 WL_NATOE_CMD_TBL_CNT = 7, 20799 WL_NATOE_CMD_CONFIG_DSTNAT = 8, 20800 WL_NATOE_CMD_CTRL = 9 20801 }; 20802 20803 enum wl_natoe_cmd_xtlv_id { 20804 WL_NATOE_XTLV_MOD_VER = 0, 20805 WL_NATOE_XTLV_ENABLE = 1, 20806 WL_NATOE_XTLV_CONFIG_IPS = 2, 20807 WL_NATOE_XTLV_CONFIG_PORTS = 3, 20808 WL_NATOE_XTLV_DBG_STATS = 4, 20809 WL_NATOE_XTLV_EXCEPTION_PORT = 5, 20810 WL_NATOE_XTLV_SKIP_PORT = 6, 20811 WL_NATOE_XTLV_TBL_CNT = 7, 20812 WL_NATOE_XTLV_ARP_TBL = 8, 20813 WL_NATOE_XTLV_POOLREORG = 9, 20814 WL_NATOE_XTLV_CONFIG_DSTNAT = 10, 20815 WL_NATOE_XTLV_CTRL = 11 20816 }; 20817 20818 /* endif WL_NATOE */ 20819 20820 enum wl_idauth_cmd_ids { 20821 WL_IDAUTH_CMD_CONFIG = 1, 20822 WL_IDAUTH_CMD_PEER_INFO = 2, 20823 WL_IDAUTH_CMD_COUNTERS = 3, 20824 WL_IDAUTH_CMD_LAST 20825 }; 20826 enum wl_idauth_xtlv_id { 20827 WL_IDAUTH_XTLV_AUTH_ENAB = 0x1, 20828 WL_IDAUTH_XTLV_GTK_ROTATION = 0x2, 20829 WL_IDAUTH_XTLV_EAPOL_COUNT = 0x3, 20830 WL_IDAUTH_XTLV_EAPOL_INTRVL = 0x4, 20831 WL_IDAUTH_XTLV_BLKLIST_COUNT = 0x5, 20832 WL_IDAUTH_XTLV_BLKLIST_AGE = 0x6, 20833 WL_IDAUTH_XTLV_PEERS_INFO = 0x7, 20834 WL_IDAUTH_XTLV_COUNTERS = 0x8 20835 }; 20836 enum wl_idauth_stats { 20837 WL_AUTH_PEER_STATE_AUTHORISED = 0x01, 20838 WL_AUTH_PEER_STATE_BLACKLISTED = 0x02, 20839 WL_AUTH_PEER_STATE_4WAY_HS_ONGOING = 0x03, 20840 WL_AUTH_PEER_STATE_LAST 20841 }; 20842 typedef struct { 20843 uint16 state; /* Peer State: Authorised or Blacklisted */ 20844 struct ether_addr peer_addr; /* peer Address */ 20845 uint32 blklist_end_time; /* Time of blacklist end */ 20846 } auth_peer_t; 20847 typedef struct wl_idauth_counters { 20848 uint32 auth_reqs; /* No of auth req recvd */ 20849 uint32 mic_fail; /* No of mic fails */ 20850 uint32 four_way_hs_fail; /* No of 4-way handshake fails */ 20851 } wl_idauth_counters_t; 20852 20853 #define WLC_UTRACE_LEN (1024u * 4u) // default length 20854 #define WLC_UTRACE_LEN_AUX (1024u * 3u) // reduced length to fit smaller AUX BM 20855 #define WLC_UTRACE_LEN_SC (1024u * 3u) // reduced length to fit smaller Scan core BM 20856 20857 #define WLC_UTRACE_READ_END 0 20858 #define WLC_UTRACE_MORE_DATA 1 20859 20860 typedef struct wl_utrace_capture_args_v1 { 20861 uint32 length; 20862 uint32 flag; 20863 } wl_utrace_capture_args_v1_t; 20864 20865 #define UTRACE_CAPTURE_VER_2 2 20866 typedef struct wl_utrace_capture_args_v2 { 20867 /* structure control */ 20868 uint16 version; /**< structure version */ 20869 uint16 length; /**< length of the response */ 20870 uint32 flag; /* Indicates if there is more data or not */ 20871 } wl_utrace_capture_args_v2_t; 20872 20873 /* Signal read end. */ 20874 #define WLC_REGVAL_READ_END 0 20875 /* Signal more data pending. */ 20876 #define WLC_REGVAL_MORE_DATA 1 20877 /* Internal read state. */ 20878 #define WLC_REGVAL_READ_CONTINUE 2 20879 20880 #define WLC_REGVAL_DUMP_PHYREG 0 20881 #define WLC_REGVAL_DUMP_RADREG 1 20882 20883 #define PHYREGVAL_CAPTURE_BUFFER_LEN 2048 20884 20885 typedef struct wl_regval_capture_args { 20886 uint32 control_flag; /* Carries status information. */ 20887 } wl_regval_capture_args_t; 20888 20889 /* XTLV IDs for the Health Check "hc" iovar top level container */ 20890 enum { 20891 WL_HC_XTLV_ID_CAT_HC = 1, /* category for HC as a whole */ 20892 WL_HC_XTLV_ID_CAT_DATAPATH_TX = 2, /* Datapath Tx */ 20893 WL_HC_XTLV_ID_CAT_DATAPATH_RX = 3, /* Datapath Rx */ 20894 WL_HC_XTLV_ID_CAT_SCAN = 4, /* Scan */ 20895 WL_HC_XTLV_ID_CAT_EVENTMASK = 5, /* Health Check event mask. */ 20896 }; 20897 20898 /* Health Check: Common XTLV IDs for sub-elements in the top level container 20899 * Number starts at 0x8000 to be out of the way for category specific IDs. 20900 */ 20901 enum { 20902 WL_HC_XTLV_ID_ERR = 0x8000, /* for sub-command err return */ 20903 WL_HC_XTLV_ID_IDLIST = 0x8001, /* container for uint16 IDs */ 20904 }; 20905 20906 /* Health Check: Datapath TX IDs */ 20907 enum { 20908 WL_HC_TX_XTLV_ID_VAL_STALL_THRESHOLD = 1, /* stall_threshold */ 20909 WL_HC_TX_XTLV_ID_VAL_STALL_SAMPLE_SIZE = 2, /* stall_sample_size */ 20910 WL_HC_TX_XTLV_ID_VAL_STALL_TIMEOUT = 3, /* stall_timeout */ 20911 WL_HC_TX_XTLV_ID_VAL_STALL_FORCE = 4, /* stall_force */ 20912 WL_HC_TX_XTLV_ID_VAL_STALL_EXCLUDE = 5, /* stall_exclude */ 20913 WL_HC_TX_XTLV_ID_VAL_FC_TIMEOUT = 6, /* flow ctl timeout */ 20914 WL_HC_TX_XTLV_ID_VAL_FC_FORCE = 7, /* flow ctl force failure */ 20915 WL_HC_TX_XTLV_ID_VAL_DELAY_TO_TRAP = 8, /* delay threshold for forced trap */ 20916 WL_HC_TX_XTLV_ID_VAL_DELAY_TO_RPT = 9, /* delay threshold for event log report */ 20917 WL_HC_TX_XTLV_ID_VAL_FAILURE_TO_RPT = 10, /* threshold for consecutive TX failures */ 20918 }; 20919 20920 /* Health Check: Datapath RX IDs */ 20921 enum { 20922 WL_HC_RX_XTLV_ID_VAL_DMA_STALL_TIMEOUT = 1, /* dma_stall_timeout */ 20923 WL_HC_RX_XTLV_ID_VAL_DMA_STALL_FORCE = 2, /* dma_stall test trigger */ 20924 WL_HC_RX_XTLV_ID_VAL_STALL_THRESHOLD = 3, /* stall_threshold */ 20925 WL_HC_RX_XTLV_ID_VAL_STALL_SAMPLE_SIZE = 4, /* stall_sample_size */ 20926 WL_HC_RX_XTLV_ID_VAL_STALL_FORCE = 5, /* stall test trigger */ 20927 WL_HC_RX_XTLV_ID_VAL_STALL_UC_DECRYPT_FAIL = 6, /* trigger uc decrypt failures */ 20928 WL_HC_RX_XTLV_ID_VAL_STALL_BCMC_DECRYPT_FAIL = 7, /* trigger bcmc decrypt failures */ 20929 }; 20930 20931 /* Health Check: Datapath SCAN IDs */ 20932 enum { 20933 WL_HC_XTLV_ID_VAL_SCAN_STALL_THRESHOLD = 1, /* scan stall threshold */ 20934 }; 20935 20936 /* Health check: PHY IDs */ 20937 /* Needed for iguana 13.35 branch */ 20938 typedef enum { 20939 PHY_HC_DD_ALL = 0, 20940 PHY_HC_DD_TEMPSENSE = 1, 20941 PHY_HC_DD_VCOCAL = 2, 20942 PHY_HC_DD_RX = 3, 20943 PHY_HC_DD_TX = 4, 20944 PHY_HC_DD_LAST /* This must be the last entry */ 20945 } phy_hc_dd_type_t; 20946 20947 typedef enum { 20948 PHY_HC_DD_TEMP_FAIL = 0, 20949 PHY_HC_DD_VCO_FAIL = 1, 20950 PHY_HC_DD_RXDSN_FAIL = 2, 20951 PHY_HC_DD_TXPOW_FAIL = 3, 20952 PHY_HC_DD_END /* This must be the last entry */ 20953 } phy_hc_dd_type_v2_t; 20954 20955 /* IDs of Health Check report structures for sub types of health checks within WL */ 20956 typedef enum wl_hc_dd_type { 20957 WL_HC_DD_PCIE = 0, /* PCIe */ 20958 WL_HC_DD_RX_DMA_STALL = 1, /* RX DMA stall check */ 20959 WL_HC_DD_RX_STALL = 2, /* RX stall check */ 20960 WL_HC_DD_TX_STALL = 3, /* TX stall check */ 20961 WL_HC_DD_SCAN_STALL = 4, /* SCAN stall check */ 20962 WL_HC_DD_PHY = 5, /* PHY health check */ 20963 WL_HC_DD_REINIT = 6, /* Reinit due to other reasons */ 20964 WL_HC_DD_TXQ_STALL = 7, /* TXQ stall */ 20965 WL_HC_DD_RX_STALL_V2 = 8, /* RX stall check v2 */ 20966 20967 #ifdef WLAWDL 20968 WL_HC_DD_AWDL = 9, /* AWDL health check */ 20969 #endif /* WLAWDL */ 20970 20971 WL_HC_DD_SBSS =10, /* Slotted bss health check */ 20972 WL_HC_DD_NAN =11, /* NAN health check */ 20973 WL_HC_DD_MAX 20974 } wl_hc_dd_type_t; 20975 20976 /* RX stall reason codes sent with wl_rx_hc_info_v2_t */ 20977 typedef enum bcm_rx_hc_stall_reason { 20978 BCM_RX_HC_RESERVED = 0, 20979 BCM_RX_HC_UNSPECIFIED = 1, /* All other. Catch all */ 20980 BCM_RX_HC_UNICAST_DECRYPT_FAIL = 2, /* Unicast decrypt fail */ 20981 BCM_RX_HC_BCMC_DECRYPT_FAIL = 3, /* BCMC decrypt fail */ 20982 BCM_RX_HC_UNICAST_REPLAY = 4, /* Unicast replay */ 20983 BCM_RX_HC_BCMC_REPLAY = 5, /* BCMC replay */ 20984 BCM_RX_HC_AMPDU_DUP = 6, /* AMPDU DUP */ 20985 BCM_RX_HC_MAX 20986 } bcm_rx_hc_stall_reason_t; 20987 20988 /* 20989 * Health Check report structures for sub types of health checks within WL 20990 */ 20991 20992 /* Health Check report structure for Rx DMA Stall check */ 20993 typedef struct { 20994 uint16 type; 20995 uint16 length; 20996 uint16 timeout; 20997 uint16 stalled_dma_bitmap; 20998 } wl_rx_dma_hc_info_t; 20999 21000 /* Health Check report structure for Tx packet failure check */ 21001 typedef struct { 21002 uint16 type; 21003 uint16 length; 21004 uint32 stall_bitmap; 21005 uint32 stall_bitmap1; 21006 uint32 failure_ac; 21007 uint32 threshold; 21008 uint32 tx_all; 21009 uint32 tx_failure_all; 21010 } wl_tx_hc_info_t; 21011 21012 /* Health Check report structure for Rx dropped packet failure check */ 21013 typedef struct { 21014 uint16 type; /* WL_HC_RX_DD_STALL */ 21015 uint16 length; 21016 uint32 bsscfg_idx; 21017 uint32 rx_hc_pkts; 21018 uint32 rx_hc_dropped_all; 21019 uint32 rx_hc_alert_th; 21020 } wl_rx_hc_info_t; 21021 21022 /* Health Check report structure for Rx dropped packet failure check */ 21023 typedef struct { 21024 uint16 type; /* WL_HC_RX_DD_STALL_V2 */ 21025 uint16 length; 21026 uint8 if_idx; /* interface index on which issue is reported */ 21027 uint8 ac; /* access category on which this problem is seen */ 21028 uint8 pad[2]; /* Reserved */ 21029 uint32 rx_hc_pkts; 21030 uint32 rx_hc_dropped_all; 21031 uint32 rx_hc_alert_th; 21032 uint32 reason; /* refer to bcm_rx_hc_stall_reason_t above */ 21033 struct ether_addr peer_ea; 21034 } wl_rx_hc_info_v2_t; 21035 21036 /* HE top level command IDs */ 21037 enum { 21038 WL_HE_CMD_ENAB = 0u, 21039 WL_HE_CMD_FEATURES = 1u, 21040 WL_HE_CMD_TWT_SETUP = 2u, 21041 WL_HE_CMD_TWT_TEARDOWN = 3u, 21042 WL_HE_CMD_TWT_INFO = 4u, 21043 WL_HE_CMD_BSSCOLOR = 5u, 21044 WL_HE_CMD_PARTIAL_BSSCOLOR = 6u, 21045 WL_HE_CMD_CAP = 7u, 21046 WL_HE_CMD_STAID = 8u, 21047 WL_HE_CMD_MUEDCA = 9u, 21048 WL_HE_CMD_RTSDURTHRESH = 10u, 21049 WL_HE_CMD_PEDURATION = 11u, 21050 WL_HE_CMD_TESTBED_MODE = 12u, 21051 WL_HE_CMD_OMI_CONFIG = 13u, 21052 WL_HE_CMD_OMI_STATUS = 14u, 21053 WL_HE_CMD_OMI_ULMU_THROTTLE = 15u, 21054 WL_HE_CMD_ULMU_DISABLE_POLICY = 16u, 21055 WL_HE_CMD_ULMU_DISABLE_STATS = 17u, 21056 WL_HE_CMD_OMI_DLMU_RSD_RCM_MPF_MAP = 18u, 21057 WL_HE_CMD_SR_PROHIBIT = 19u, 21058 WL_HE_CMD_LAST 21059 }; 21060 21061 enum { 21062 WL_HE_MUEDCA_IE = 0, 21063 WL_HE_MUEDCA_SHM = 1, 21064 WL_HE_MUEDCA_LAST 21065 }; 21066 21067 #ifdef WL11AX 21068 21069 /* struct for dump MU EDCA IE/SHM paramters */ 21070 typedef struct wl_he_muedca_ie_v1 { 21071 uint16 version; /* structure version */ 21072 uint16 length; /* data length (starting after this field) */ 21073 uint8 mu_qos_info; 21074 he_mu_ac_param_record_t param_ac[AC_COUNT]; 21075 } wl_he_muedca_ie_v1_t; 21076 21077 typedef wl_he_muedca_ie_v1_t wl_he_muedca_ie_t; 21078 21079 #define WL_HE_MUEDCA_VER_1 1 21080 21081 #endif /* WL11AX */ 21082 21083 /* TWT top level command IDs */ 21084 enum { 21085 WL_TWT_CMD_ENAB = 0, 21086 WL_TWT_CMD_SETUP = 1, 21087 WL_TWT_CMD_TEARDOWN = 2, 21088 WL_TWT_CMD_INFO = 3, 21089 WL_TWT_CMD_AUTOSCHED = 4, 21090 WL_TWT_CMD_STATS = 5, 21091 WL_TWT_CMD_EARLY_TERM_TIME = 6, 21092 WL_TWT_CMD_RESP_CONFIG = 7, 21093 WL_TWT_CMD_SPPS_ENAB = 8, 21094 WL_TWT_CMD_CAP = 9, 21095 WL_TWT_CMD_STATUS = 10, 21096 WL_TWT_CMD_CONFIG = 11, 21097 WL_TWT_CMD_LAST 21098 }; 21099 21100 #define WL_HEB_VER_1 1 21101 21102 /* HEB top level command IDs */ 21103 enum { 21104 WL_HEB_CMD_ENAB = 0, 21105 WL_HEB_CMD_NUM_HEB = 1, 21106 WL_HEB_CMD_COUNTERS = 2, 21107 WL_HEB_CMD_CLEAR_COUNTERS = 3, 21108 WL_HEB_CMD_CONFIG = 4, 21109 WL_HEB_CMD_STATUS = 5, 21110 WL_HEB_CMD_LAST 21111 }; 21112 21113 /* HEB counters structures */ 21114 typedef struct wl_heb_int_cnt_v1 { 21115 uint16 pre_event; 21116 uint16 start_event; 21117 uint16 end_event; 21118 uint16 missed; 21119 } wl_heb_int_cnt_v1_t; 21120 21121 typedef struct wl_heb_cnt_v1 { 21122 /* structure control */ 21123 uint16 version; /* structure version */ 21124 uint16 length; /* data length (starting after this field) */ 21125 wl_heb_int_cnt_v1_t heb_int_cnt[1]; 21126 } wl_heb_cnt_v1_t; 21127 21128 // struct for configuring HEB 21129 typedef struct wl_config_heb_fill_v1 { 21130 uint16 version; /* structure version */ 21131 uint16 length; /* data length (starting after this field) */ 21132 uint32 duration; 21133 uint32 periodicity; 21134 uint16 heb_idx; 21135 uint16 preeventtime; 21136 uint8 count; 21137 uint8 PAD[3]; 21138 } wl_config_heb_fill_v1_t; 21139 21140 typedef struct wl_heb_blk_params_v1 { 21141 /* Don't change the order of following elements. This is as per the HEB HW spec */ 21142 uint32 event_int_val_l; 21143 uint32 event_int_val_h; 21144 uint32 param2; 21145 uint32 param3; 21146 uint32 pre_event_intmsk_bmp; 21147 uint32 start_event_intmsk_bmp; 21148 uint32 end_event_intmsk_bmp; 21149 uint32 event_driver_info; 21150 uint16 param1; 21151 uint8 event_count; 21152 uint8 noa_invert; 21153 } wl_heb_blk_params_v1_t; 21154 21155 typedef struct wl_heb_int_status_v1 { 21156 uint32 heb_idx; 21157 wl_heb_blk_params_v1_t blk_params; 21158 } wl_heb_reg_status_v1_t; 21159 21160 typedef struct wl_heb_status_v1 { 21161 uint16 version; /* structure version */ 21162 uint16 length; /* data length (starting after this field) */ 21163 wl_heb_reg_status_v1_t heb_status[1]; 21164 } wl_heb_status_v1_t; 21165 21166 /* HWA */ 21167 #define WL_HWA_VER_1 1 21168 21169 /* HWA top level command IDs */ 21170 typedef enum wl_hwa_cmd_type { 21171 WL_HWA_CMD_ENAB = 0, 21172 WL_HWA_CMD_CAPS = 1, 21173 WL_HWA_CMD_COUNTERS = 2, 21174 WL_HWA_CMD_CLRCNTS = 3, 21175 WL_HWA_CMD_REGDUMP = 4, 21176 WL_HWA_CMD_INDUCE_ERR = 5, 21177 WL_HWA_CMD_LAST 21178 } wl_hwa_cmd_type_t; 21179 21180 typedef struct wl_hwa_cnts_info_v1 { 21181 uint16 cnt_rxs_filter; /* #filters added */ 21182 uint16 cnt_rxs_chainable; /* #rxchainable matched */ 21183 } wl_hwa_cnts_info_v1_t; 21184 21185 /* HWA dump info structures */ 21186 typedef struct wl_hwa_hwcaps_info_v1 { 21187 uint16 up; /* is hwa init'd/deint'd */ 21188 uint16 corerev; /* hwa core revision */ 21189 uint32 submodules_mask; /* mask for hwa submodules that are enabled */ 21190 } wl_hwa_hwcaps_info_v1_t; 21191 21192 typedef struct wl_hwa_cnts_v1 { 21193 /* structure control */ 21194 uint16 version; /* structure version */ 21195 uint16 length; /* data length (starting after this field) */ 21196 wl_hwa_cnts_info_v1_t hwa_cnts_info[]; /* variable length array with hwa counters */ 21197 } wl_hwa_cnts_v1_t; 21198 21199 /* All submodules, order is important and define order of initialization. */ 21200 /* Not use enumeration here because these defines are also used in macro */ 21201 #define HWA_SUBMODULES_COMMON 0 /**< Common */ 21202 #define HWA_SUBMODULES_TXPOST 1u /**< TxPost 3a */ 21203 #define HWA_SUBMODULES_RXPOSTFILL 2u /**< RxPost and Fill 1a/1b */ 21204 #define HWA_SUBMODULES_TXDMA 3u /**< TxDMA 3b */ 21205 #define HWA_SUBMODULES_TXS 4u /**< TxStatus 4a */ 21206 #define HWA_SUBMODULES_BUFMGR 5u /**< Buffer Manager, RX and TX. Do this last */ 21207 #define HWA_SUBMODULES_CPL 6u /**< Completion 2b/4b */ 21208 #define HWA_SUBMODULES_RXS 7u /**< RxStatus 2a */ 21209 #define HWA_SUBMODULES_NUM 8u /**< number of submodules */ 21210 21211 #define HWA_SUBMODULES_ALL 0xFF /* Bitmaps for all submodules */ 21212 #ifdef HWA 21213 #define HWA_SUBMODULE_MASK(submodule) (1u << (submodule)) 21214 #else 21215 #define HWA_SUBMODULE_MASK(submodule) (0) 21216 #endif /* HWA */ 21217 /* 21218 * NOTES: 21219 * wl_twt_sdesc_t is used to support both broadcast TWT and individual TWT. 21220 * Value in bit[0:2] in 'flow_id' field is interpreted differently: 21221 * - flow id for individual TWT (when WL_TWT_FLOW_FLAG_BROADCAST bit is NOT set 21222 * in 'flow_flags' field) 21223 * - flow id as defined in Table 8-248l1 for broadcast TWT (when 21224 * WL_TWT_FLOW_FLAG_BROADCAST bit is set) 21225 * In latter case other bits could be used to differentiate different flows 21226 * in order to support multiple broadcast TWTs with the same flow id. 21227 */ 21228 21229 /* TWT Setup descriptor */ 21230 typedef struct wl_twt_sdesc { 21231 /* Setup Command. */ 21232 uint8 setup_cmd; /* See TWT_SETUP_CMD_XXXX in 802.11ah.h */ 21233 uint8 flow_flags; /* Flow attributes. See WL_TWT_FLOW_FLAG_XXXX below */ 21234 uint8 flow_id; /* must be between 0 and 7. Set 0xFF for auto assignment */ 21235 uint8 bid; /* must be between 0 and 31. Set 0xFF for auto assignment */ 21236 uint8 channel; /* Twt channel - Not used for now */ 21237 uint8 negotiation_type; /* Negotiation Type: See macros TWT_NEGO_TYPE_X */ 21238 uint8 frame_recomm; /* frame recommendation for broadcast TWTs - Not used for now */ 21239 uint8 wake_type; /* See WL_TWT_TIME_TYPE_XXXX below */ 21240 uint32 wake_time_h; /* target wake time - BSS TSF (us) */ 21241 uint32 wake_time_l; 21242 uint32 wake_dur; /* target wake duration in unit of microseconds */ 21243 uint32 wake_int; /* target wake interval */ 21244 uint32 btwt_persistence; /* Broadcast TWT Persistence */ 21245 uint32 wake_int_max; /* max wake interval(uS) for TWT */ 21246 uint8 duty_cycle_min; /* min duty cycle for TWT(Percentage) */ 21247 uint8 pad; 21248 /* deprecated - to be removed */ 21249 uint16 li; 21250 } wl_twt_sdesc_t; 21251 21252 #define WL_TWT_SETUP_DESC_VER 1u 21253 21254 /* TWT Setup descriptor (Version controlled) */ 21255 typedef struct wl_twt_sdesc_v1 { 21256 /* structure control */ 21257 uint16 version; /* structure version */ 21258 uint16 length; /* data length (starting after this field) */ 21259 uint8 setup_cmd; /* See TWT_SETUP_CMD_XXXX in 802.11ah.h */ 21260 uint8 flow_flags; /* Flow attributes. See WL_TWT_FLOW_FLAG_XXXX below */ 21261 uint8 flow_id; /* must be between 0 and 7. Set 0xFF for auto assignment */ 21262 uint8 bid; /* must be between 0 and 31. Set 0xFF for auto assignment */ 21263 uint8 channel; /* Twt channel - Not used for now */ 21264 uint8 negotiation_type; /* Negotiation Type: See macros TWT_NEGO_TYPE_X */ 21265 uint8 frame_recomm; /* frame recommendation for broadcast TWTs - Not used for now */ 21266 uint8 wake_type; /* See WL_TWT_TIME_TYPE_XXXX below */ 21267 uint32 wake_time_h; /* target wake time - BSS TSF (us) */ 21268 uint32 wake_time_l; 21269 uint32 wake_dur; /* target wake duration in unit of microseconds */ 21270 uint32 wake_int; /* target wake interval */ 21271 uint32 btwt_persistence; /* Broadcast TWT Persistence */ 21272 uint32 wake_int_max; /* max wake interval(uS) for TWT */ 21273 uint32 wake_int_min; /* Min. wake interval allowed for TWT Setup */ 21274 uint32 wake_dur_min; /* Min. wake duration allowed for TWT Setup */ 21275 uint32 wake_dur_max; /* Max. wake duration allowed for TWT Setup */ 21276 } wl_twt_sdesc_v1_t; 21277 21278 #define WL_TWT_CONFIG_DESC_VER 1u 21279 21280 /* TWT config descriptor */ 21281 typedef struct wl_twt_cdesc { 21282 /* structure control */ 21283 uint16 version; /* structure version */ 21284 uint16 length; /* data length (starting after this field) */ 21285 uint8 negotiation_type; /* Negotiation Type: See macros TWT_NEGO_TYPE_X */ 21286 uint8 PAD[3]; 21287 uint32 wake_time_h; /* target wake time - BSS TSF (us) */ 21288 uint32 wake_time_l; 21289 uint32 wake_dur; /* target wake duration in unit of microseconds */ 21290 uint32 wake_int; /* target wake interval */ 21291 uint32 wake_int_max; /* max wake interval(uS) for TWT */ 21292 uint32 wake_int_min; /* Min. wake interval allowed for TWT Setup */ 21293 uint32 wake_dur_min; /* Min. wake duration allowed for TWT Setup */ 21294 uint32 wake_dur_max; /* Max. wake duration allowed for TWT Setup */ 21295 uint32 avg_pkt_num; /* Average Number of Packets per interval */ 21296 } wl_twt_cdesc_t; 21297 21298 /* Flow flags */ 21299 #define WL_TWT_FLOW_FLAG_UNANNOUNCED (1u << 0u) 21300 #define WL_TWT_FLOW_FLAG_TRIGGER (1u << 1u) 21301 #define WL_TWT_FLOW_FLAG_REQUEST (1u << 2u) 21302 #define WL_TWT_FLOW_FLAG_PROTECT (1u << 3u) 21303 #define WL_TWT_FLOW_FLAG_RESPONDER_PM (1u << 4u) 21304 #define WL_TWT_FLOW_FLAG_UNSOLICITED (1u << 5u) 21305 #define WL_TWT_FLOW_FLAG_WAKEDUR_UNIT_1ms (1u << 6u) 21306 #define WL_TWT_FLOW_FLAG_INFO_FRM_DISABLED (1u << 7u) 21307 21308 /* Deprecated - To be removed */ 21309 #define WL_TWT_FLOW_FLAG_BROADCAST (1u << 5u) 21310 #define WL_TWT_FLOW_FLAG_IMPLICIT (1u << 7u) 21311 21312 /* Flow id */ 21313 #define WL_TWT_FLOW_ID_FID 0x07u /* flow id */ 21314 #define WL_TWT_FLOW_ID_GID_MASK 0x70u /* group id - broadcast TWT only */ 21315 #define WL_TWT_FLOW_ID_GID_SHIFT 4u 21316 21317 #define WL_TWT_INV_BCAST_ID 0xFFu 21318 #define WL_TWT_INV_FLOW_ID 0xFFu 21319 21320 /* auto flow_id */ 21321 #define WL_TWT_SETUP_FLOW_ID_AUTO 0xFFu 21322 /* auto broadcast ID */ 21323 #define WL_TWT_SETUP_BCAST_ID_AUTO 0xFFu 21324 /* Infinite persistence for broadcast schedule */ 21325 #define WL_TWT_INFINITE_BTWT_PERSIST 0xFFFFFFFFu 21326 21327 /* Maximum individual & broadcast TWT supported */ 21328 #define WL_TWT_MAX_ITWT 4u 21329 #define WL_TWT_MAX_BTWT 4u 21330 21331 /* should be larger than what chip supports */ 21332 #define WL_TWT_STATS_MAX_BTWT WL_TWT_MAX_BTWT 21333 #define WL_TWT_STATS_MAX_ITWT WL_TWT_MAX_ITWT 21334 21335 #define WL_TWT_INACTIVE 0u /* Resource is not allotted */ 21336 #define WL_TWT_RESERVED 1u /* Resource is allotted but HEB is not yet programmed */ 21337 #define WL_TWT_ACTIVE 2u /* Resource is allotted and HEB is programmed */ 21338 #define WL_TWT_SUSPEND 3u /* Resource is suspended and HEB released */ 21339 21340 /* Wake type */ 21341 /* TODO: not yet finalized */ 21342 #define WL_TWT_TIME_TYPE_BSS 0u /* The time specified in wake_time_h/l is 21343 * the BSS TSF time. 21344 */ 21345 #define WL_TWT_TIME_TYPE_OFFSET 1u /* The time specified in wake_time_h/l is an offset 21346 * of the TSF time when the iovar is processed. 21347 */ 21348 #define WL_TWT_TIME_TYPE_AUTO 2u /* The target wake time is chosen internally by the FW */ 21349 21350 #define WL_TWT_SETUP_VER 0u 21351 21352 /* HE TWT Setup command */ 21353 typedef struct wl_twt_setup { 21354 /* structure control */ 21355 uint16 version; /* structure version */ 21356 uint16 length; /* data length (starting after this field) */ 21357 struct ether_addr peer; /* Peer address - leave it all 0s' for AP */ 21358 uint8 pad[2]; 21359 wl_twt_sdesc_t desc; /* Setup Descriptor */ 21360 uint16 dialog; /* Deprecated - to be removed */ 21361 uint8 pad1[2]; 21362 } wl_twt_setup_t; 21363 21364 #define WL_TWT_CONFIG_VER 0u 21365 21366 /* TWT Config command */ 21367 typedef struct wl_twt_config { 21368 /* structure control */ 21369 uint16 version; /* structure version */ 21370 uint16 length; /* data length (starting after this field) */ 21371 struct ether_addr peer; /* Peer address. leave it all 0s' for AP */ 21372 uint8 pad[2]; 21373 wl_twt_cdesc_t desc; /* Config Descriptor */ 21374 } wl_twt_config_t; 21375 21376 #define WL_TWT_TEARDOWN_VER 0u 21377 21378 /* twt teardown descriptor */ 21379 typedef struct wl_twt_teardesc { 21380 uint8 negotiation_type; 21381 uint8 flow_id; /* must be between 0 and 7 */ 21382 uint8 bid; /* must be between 0 and 31 */ 21383 bool alltwt; /* all twt teardown - 0 or 1 */ 21384 } wl_twt_teardesc_t; 21385 21386 /* HE TWT Teardown command */ 21387 typedef struct wl_twt_teardown { 21388 /* structure control */ 21389 uint16 version; /* structure version */ 21390 uint16 length; /* data length (starting after this field) */ 21391 /* peer address */ 21392 struct ether_addr peer; /* leave it all 0s' for AP */ 21393 wl_twt_teardesc_t teardesc; /* Teardown descriptor */ 21394 21395 /* deprecated - to be removed */ 21396 uint8 flow_flags; 21397 uint8 flow_id; 21398 uint8 bid; 21399 uint8 pad; 21400 } wl_twt_teardown_t; 21401 21402 /* twt information descriptor */ 21403 typedef struct wl_twt_infodesc { 21404 uint8 flow_flags; /* See WL_TWT_INFO_FLAG_XXX below */ 21405 uint8 flow_id; 21406 uint8 pad[2]; 21407 uint32 next_twt_h; 21408 uint32 next_twt_l; 21409 /* deprecated - to be removed */ 21410 uint8 wake_type; 21411 uint8 pad1[3]; 21412 } wl_twt_infodesc_t; 21413 21414 /* Flow flags */ 21415 #define WL_TWT_INFO_FLAG_ALL_TWT (1u << 0u) /* All TWT */ 21416 #define WL_TWT_INFO_FLAG_RESUME (1u << 1u) /* 1 is TWT Resume, 0 is TWT Suspend */ 21417 21418 /* deprecated - to be removed */ 21419 #define WL_TWT_INFO_FLAG_RESP_REQ (1 << 0) /* Response Requested */ 21420 #define WL_TWT_INFO_FLAG_NEXT_TWT_REQ (1 << 1) /* Next TWT Request */ 21421 #define WL_TWT_INFO_FLAG_BTWT_RESCHED (1 << 2) /* Broadcast Reschedule */ 21422 typedef wl_twt_infodesc_t wl_twt_idesc_t; 21423 21424 #define WL_TWT_INFO_VER 0u 21425 21426 /* HE TWT Information command */ 21427 typedef struct wl_twt_info { 21428 /* structure control */ 21429 uint16 version; /* structure version */ 21430 uint16 length; /* data length (starting after this field) */ 21431 /* peer address */ 21432 struct ether_addr peer; /* leave it all 0s' for AP */ 21433 uint8 pad[2]; 21434 wl_twt_infodesc_t infodesc; /* information descriptor */ 21435 /* deprecated - to be removed */ 21436 wl_twt_idesc_t desc; 21437 } wl_twt_info_t; 21438 21439 /* wl twt status */ 21440 #define WL_TWT_CMD_STATUS_VERSION_1 1u 21441 21442 #define WL_TWT_STATUS_FLAG_SPPS_ENAB (1u << 0u) 21443 #define WL_TWT_STATUS_FLAG_WAKE_STATE (1u << 1u) 21444 #define WL_TWT_STATUS_FLAG_WAKE_OVERRIDE (1u << 2u) 21445 21446 typedef struct wl_twt_status { 21447 uint8 state; /* TWT State */ 21448 uint8 heb_id; /* HEB ID */ 21449 uint8 PAD[2]; 21450 struct ether_addr peer; 21451 uint8 PAD[2]; 21452 wl_twt_sdesc_t desc; /* TWT Descriptor */ 21453 } wl_twt_status_t; 21454 21455 /* wl twt status output */ 21456 typedef struct wl_twt_status_v1 { 21457 uint16 version; 21458 uint16 length; 21459 uint8 num_fid; /* Number of individual TWT setup */ 21460 uint8 num_bid; /* Number of Broadcast TWT setup */ 21461 uint16 status_flags; /* see WL_TWT_STATUS_FLAGS_XX */ 21462 wl_twt_status_t itwt_status[WL_TWT_MAX_ITWT]; 21463 wl_twt_status_t btwt_status[WL_TWT_MAX_BTWT]; 21464 } wl_twt_status_v1_t; 21465 21466 /* wl twt status command input */ 21467 typedef struct wl_twt_status_cmd_v1 { 21468 uint16 version; 21469 uint16 length; 21470 struct ether_addr peer; 21471 uint8 PAD[2]; 21472 } wl_twt_status_cmd_v1_t; 21473 21474 #define WL_TWT_PEER_STATS_VERSION_1 1u 21475 typedef struct wl_twt_peer_stats_v1 { 21476 uint16 version; 21477 uint16 length; 21478 struct ether_addr peer; 21479 uint8 PAD[2]; 21480 uint8 id; 21481 uint8 flow_flags; 21482 uint8 PAD[2]; 21483 uint32 sp_seq; /* sequence number of the service period */ 21484 uint32 tx_ucast_pkts; 21485 uint32 tx_pkts_min; 21486 uint32 tx_pkts_max; 21487 uint32 tx_pkts_avg; 21488 uint32 tx_failures; 21489 uint32 rx_ucast_pkts; 21490 uint32 rx_pkts_min; 21491 uint32 rx_pkts_max; 21492 uint32 rx_pkts_avg; 21493 uint32 rx_pkts_retried; 21494 } wl_twt_peer_stats_v1_t; 21495 21496 #define WL_TWT_STATS_VERSION_1 1 21497 typedef struct wl_twt_stats_v1 { 21498 uint16 version; 21499 uint16 length; 21500 uint32 num_stats; /* number of peer stats in the peer_stats_list */ 21501 wl_twt_peer_stats_v1_t peer_stats_list[]; 21502 } wl_twt_stats_v1_t; 21503 21504 #define WL_TWT_STATS_CMD_VERSION_1 1 21505 #define WL_TWT_STATS_CMD_FLAGS_RESET (1u << 0u) 21506 /* HE TWT stats command */ 21507 typedef struct wl_twt_stats_cmd_v1 { 21508 uint16 version; 21509 uint16 length; 21510 struct ether_addr peer; 21511 uint8 PAD[2]; 21512 uint16 flags; /* see WL_TWT_STATS_CMD_FLAGS */ 21513 uint8 num_fid; 21514 uint8 num_bid; 21515 uint8 fid_list[WL_TWT_STATS_MAX_ITWT]; 21516 uint8 bid_list[WL_TWT_STATS_MAX_BTWT]; 21517 } wl_twt_stats_cmd_v1_t; 21518 21519 #define WL_TWT_RESP_CFG_VER 0u 21520 21521 #define WL_TWT_CMD_RESP_CFG_TYPE_ALTERNATE 0u 21522 #define WL_TWT_CMD_RESP_CFG_TYPE_DICTATE 1u 21523 /* HE TWT resp command */ 21524 typedef struct wl_twt_resp_cfg { 21525 /* structure control */ 21526 uint16 version; /* Structure version */ 21527 uint16 length; /* Data length (starting after this field) */ 21528 uint8 dc_max; /* Max supported duty cycle for single TWT */ 21529 uint8 resp_type; /* Resp. type(Alt/dict) if duty cycle>max duty cycle */ 21530 } wl_twt_resp_cfg_t; 21531 21532 #define WL_TWT_CAP_CMD_VERSION_1 1u 21533 21534 #define WL_TWT_CAP_FLAGS_REQ_SUPPORT (1u << 0u) 21535 #define WL_TWT_CAP_FLAGS_RESP_SUPPORT (1u << 1u) 21536 #define WL_TWT_CAP_FLAGS_BTWT_SUPPORT (1u << 2u) 21537 #define WL_TWT_CAP_FLAGS_FLEX_SUPPORT (1u << 3u) 21538 #define WL_TWT_CAP_FLAGS_TWT_REQUIRED (1u << 4u) 21539 21540 /* HE TWT capabilities output */ 21541 typedef struct wl_twt_cap { 21542 uint16 version; 21543 uint16 length; 21544 uint16 device_cap; /* see WL_TWT_CAP_CMD_FLAGS */ 21545 uint16 peer_cap; /* see WL_TWT_CAP_CMD_FLAGS */ 21546 } wl_twt_cap_t; 21547 21548 /* HE TWT capabilities command input */ 21549 typedef struct wl_twt_cap_cmd { 21550 uint16 version; 21551 uint16 length; 21552 struct ether_addr peer; 21553 uint8 PAD[2]; 21554 } wl_twt_cap_cmd_t; 21555 21556 /* EHT sub command IDs */ 21557 enum { 21558 WL_EHT_CMD_ENAB = 0u, /* enable/disable EHT feature as a whole */ 21559 WL_EHT_CMD_DBG = 1u, /* configure EHT debug facilities */ 21560 WL_EHT_CMD_FEATURES = 2u, /* configure EHT sub-features */ 21561 WL_EHT_CMD_LAST 21562 }; 21563 21564 /* Current version for wlc_clm_power_limits_req_t structure and flags */ 21565 #define WLC_CLM_POWER_LIMITS_REQ_VERSION 1 21566 /* "clm_power_limits" iovar request structure */ 21567 typedef struct wlc_clm_power_limits_req { 21568 /* Input. Structure and flags version */ 21569 uint32 version; 21570 /* Full length of buffer (includes this structure and space for TLV-encoded PPR) */ 21571 uint32 buflen; 21572 /* Input. Flags (see WLC_CLM_POWER_LIMITS_INPUT_FLAG_... below) */ 21573 uint32 input_flags; 21574 /* Input. CC of region whose data is being requested */ 21575 char cc[WLC_CNTRY_BUF_SZ]; 21576 /* Input. Channel/subchannel in chanspec_t format */ 21577 uint32 chanspec; 21578 /* Subchannel encoded as clm_limits_type_t */ 21579 uint32 clm_subchannel; 21580 /* Input. 0-based antenna index */ 21581 uint32 antenna_idx; 21582 /* Output. General flags (see WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_... below) */ 21583 uint32 output_flags; 21584 /* Output. 2.4G country flags, encoded as clm_flags_t enum */ 21585 uint32 clm_country_flags_2g; 21586 /* Output. 5G country flags, encoded as clm_flags_t enum */ 21587 uint32 clm_country_flags_5g; 21588 /* Output. Length of TLV-encoded PPR data that follows this structure */ 21589 uint32 ppr_tlv_size; 21590 /* Output. Beginning of buffer for TLV-encoded PPR data */ 21591 uint8 ppr_tlv[1]; 21592 } wlc_clm_power_limits_req_t; 21593 21594 /* Input. Do not apply SAR limits */ 21595 #define WLC_CLM_POWER_LIMITS_INPUT_FLAG_NO_SAR 0x00000001 21596 /* Input. Do not apply board limits */ 21597 #define WLC_CLM_POWER_LIMITS_INPUT_FLAG_NO_BOARD 0x00000002 21598 /* Output. Limits taken from product-specific country data */ 21599 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_PRODUCT_LIMITS 0x00000001 21600 /* Output. Limits taken from product-specific worldwide data */ 21601 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_WORLDWIDE_LIMITS 0x00000002 21602 /* Output. Limits taken from country-default (all-product) data */ 21603 #define WLC_CLM_POWER_LIMITS_OUTPUT_FLAG_DEFAULT_COUNTRY_LIMITS 0x00000004 21604 21605 #define WL_MBO_IOV_MAJOR_VER 1 21606 #define WL_MBO_IOV_MINOR_VER 1 21607 #define WL_MBO_IOV_MAJOR_VER_SHIFT 8 21608 #define WL_MBO_IOV_VERSION \ 21609 ((WL_MBO_IOV_MAJOR_VER << WL_MBO_IOV_MAJOR_VER_SHIFT)| WL_MBO_IOV_MINOR_VER) 21610 21611 #define MBO_MAX_CHAN_PREF_ENTRIES 16 21612 21613 enum wl_mbo_cmd_ids { 21614 WL_MBO_CMD_ADD_CHAN_PREF = 1, 21615 WL_MBO_CMD_DEL_CHAN_PREF = 2, 21616 WL_MBO_CMD_LIST_CHAN_PREF = 3, 21617 WL_MBO_CMD_CELLULAR_DATA_CAP = 4, 21618 WL_MBO_CMD_DUMP_COUNTERS = 5, 21619 WL_MBO_CMD_CLEAR_COUNTERS = 6, 21620 WL_MBO_CMD_FORCE_ASSOC = 7, 21621 WL_MBO_CMD_BSSTRANS_REJECT = 8, 21622 WL_MBO_CMD_SEND_NOTIF = 9, 21623 /* Unused command, This enum no can be use 21624 * for next new command 21625 */ 21626 WL_MBO_CMD_CLEAR_CHAN_PREF = 10, 21627 WL_MBO_CMD_NBR_INFO_CACHE = 11, 21628 WL_MBO_CMD_ANQPO_SUPPORT = 12, 21629 WL_MBO_CMD_DBG_EVENT_CHECK = 13, 21630 WL_MBO_CMD_EVENT_MASK = 14, 21631 /* Add before this !! */ 21632 WL_MBO_CMD_LAST 21633 }; 21634 21635 enum wl_mbo_xtlv_id { 21636 WL_MBO_XTLV_OPCLASS = 0x1, 21637 WL_MBO_XTLV_CHAN = 0x2, 21638 WL_MBO_XTLV_PREFERENCE = 0x3, 21639 WL_MBO_XTLV_REASON_CODE = 0x4, 21640 WL_MBO_XTLV_CELL_DATA_CAP = 0x5, 21641 WL_MBO_XTLV_COUNTERS = 0x6, 21642 WL_MBO_XTLV_ENABLE = 0x7, 21643 WL_MBO_XTLV_SUB_ELEM_TYPE = 0x8, 21644 WL_MBO_XTLV_BTQ_TRIG_START_OFFSET = 0x9, 21645 WL_MBO_XTLV_BTQ_TRIG_RSSI_DELTA = 0xa, 21646 WL_MBO_XTLV_ANQP_CELL_SUPP = 0xb, 21647 WL_MBO_XTLV_BIT_MASK = 0xc 21648 }; 21649 21650 /* event bit mask flags for MBO */ 21651 #define MBO_EVT_BIT_MASK_CELLULAR_SWITCH 0x0001 /* Evt bit mask to enab cellular switch */ 21652 #define MBO_EVT_BIT_MASK_BTM_REQ_RCVD 0x0002 /* Evt bit mask to enab BTM req rcvd */ 21653 21654 typedef struct wl_mbo_counters { 21655 /* No of transition req recvd */ 21656 uint16 trans_req_rcvd; 21657 /* No of transition req with disassoc imminent */ 21658 uint16 trans_req_disassoc; 21659 /* No of transition req with BSS Termination */ 21660 uint16 trans_req_bss_term; 21661 /* No of trans req w/ unspecified reason */ 21662 uint16 trans_resn_unspec; 21663 /* No of trans req w/ reason frame loss */ 21664 uint16 trans_resn_frm_loss; 21665 /* No of trans req w/ reason traffic delay */ 21666 uint16 trans_resn_traffic_delay; 21667 /* No of trans req w/ reason insufficient buffer */ 21668 uint16 trans_resn_insuff_bw; 21669 /* No of trans req w/ reason load balance */ 21670 uint16 trans_resn_load_bal; 21671 /* No of trans req w/ reason low rssi */ 21672 uint16 trans_resn_low_rssi; 21673 /* No of trans req w/ reason excessive retransmission */ 21674 uint16 trans_resn_xcess_retransmn; 21675 /* No of trans req w/ reason gray zone */ 21676 uint16 trans_resn_gray_zone; 21677 /* No of trans req w/ reason switch to premium AP */ 21678 uint16 trans_resn_prem_ap_sw; 21679 /* No of transition rejection sent */ 21680 uint16 trans_rejn_sent; 21681 /* No of trans rejn reason excessive frame loss */ 21682 uint16 trans_rejn_xcess_frm_loss; 21683 /* No of trans rejn reason excessive traffic delay */ 21684 uint16 trans_rejn_xcess_traffic_delay; 21685 /* No of trans rejn reason insufficient QoS capability */ 21686 uint16 trans_rejn_insuffic_qos_cap; 21687 /* No of trans rejn reason low RSSI */ 21688 uint16 trans_rejn_low_rssi; 21689 /* No of trans rejn reason high interference */ 21690 uint16 trans_rejn_high_interference; 21691 /* No of trans rejn reason service unavilable */ 21692 uint16 trans_rejn_service_unavail; 21693 /* No of beacon request rcvd */ 21694 uint16 bcn_req_rcvd; 21695 /* No of beacon report sent */ 21696 uint16 bcn_rep_sent; 21697 /* No of null beacon report sent */ 21698 uint16 null_bcn_rep_sent; 21699 /* No of wifi to cell switch */ 21700 uint16 wifi_to_cell; 21701 } wl_mbo_counters_t; 21702 21703 #define WL_FILS_IOV_MAJOR_VER 1 21704 #define WL_FILS_IOV_MINOR_VER 1 21705 #define WL_FILS_IOV_MAJOR_VER_SHIFT 8 21706 #define WL_FILS_IOV_VERSION \ 21707 ((WL_FILS_IOV_MAJOR_VER << WL_FILS_IOV_MAJOR_VER_SHIFT)| WL_FILS_IOV_MINOR_VER) 21708 21709 enum wl_fils_cmd_ids { 21710 WL_FILS_CMD_ADD_IND_IE = 1, 21711 WL_FILS_CMD_ADD_AUTH_DATA = 2, /* Deprecated, kept to prevent ROM invalidation */ 21712 WL_FILS_CMD_ADD_HLP_IE = 3, 21713 WL_FILS_CMD_ADD_CONNECT_PARAMS = 4, 21714 WL_FILS_CMD_GET_CONNECT_PARAMS = 5, 21715 /* Add before this !! */ 21716 WL_FILS_CMD_LAST 21717 }; 21718 21719 enum wl_fils_xtlv_id { 21720 WL_FILS_XTLV_IND_IE = 0x1, 21721 WL_FILS_XTLV_AUTH_DATA = 0x2, /* Deprecated, kept to prevent ROM invalidation */ 21722 WL_FILS_XTLV_HLP_IE = 0x3, 21723 WL_FILS_XTLV_ERP_USERNAME = 0x4, 21724 WL_FILS_XTLV_ERP_REALM = 0x5, 21725 WL_FILS_XTLV_ERP_RRK = 0x6, 21726 WL_FILS_XTLV_ERP_NEXT_SEQ_NUM = 0x7, 21727 WL_FILS_XTLV_KEK = 0x8, 21728 WL_FILS_XTLV_PMK = 0x9, 21729 WL_FILS_XTLV_TK = 0xa, 21730 WL_FILS_XTLV_PMKID = 0xb 21731 }; 21732 21733 #define WL_OCE_IOV_MAJOR_VER 1 21734 #define WL_OCE_IOV_MINOR_VER 1 21735 #define WL_OCE_IOV_MAJOR_VER_SHIFT 8 21736 #define WL_OCE_IOV_VERSION \ 21737 ((WL_OCE_IOV_MAJOR_VER << WL_OCE_IOV_MAJOR_VER_SHIFT)| WL_OCE_IOV_MINOR_VER) 21738 21739 enum wl_oce_cmd_ids { 21740 WL_OCE_CMD_ENABLE = 1, 21741 WL_OCE_CMD_PROBE_DEF_TIME = 2, 21742 WL_OCE_CMD_FD_TX_PERIOD = 3, 21743 WL_OCE_CMD_FD_TX_DURATION = 4, 21744 WL_OCE_CMD_RSSI_TH = 5, 21745 WL_OCE_CMD_RWAN_LINKS = 6, 21746 WL_OCE_CMD_CU_TRIGGER = 7, 21747 WL_OCE_CMD_TXPWR_USED = 8, 21748 /* Add before this !! */ 21749 WL_OCE_CMD_LAST 21750 }; 21751 21752 enum wl_oce_xtlv_id { 21753 WL_OCE_XTLV_ENABLE = 0x1, 21754 WL_OCE_XTLV_PROBE_DEF_TIME = 0x2, 21755 WL_OCE_XTLV_FD_TX_PERIOD = 0x3, 21756 WL_OCE_XTLV_FD_TX_DURATION = 0x4, 21757 WL_OCE_XTLV_RSSI_TH = 0x5, 21758 WL_OCE_XTLV_RWAN_LINKS = 0x6, 21759 WL_OCE_XTLV_CU_TRIGGER = 0x7, 21760 WL_OCE_XTLV_TXPWR_USED = 0x8 21761 }; 21762 21763 /* Robust Audio Video (RAV), MSCS (Mirrored Stream Classification Service) commands */ 21764 #define WL_RAV_MSCS_IOV_MAJOR_VER 1u 21765 #define WL_RAV_MSCS_IOV_MINOR_VER 1u 21766 #define WL_RAV_MSCS_IOV_MAJOR_VER_SHIFT 8u 21767 21768 #define WL_RAV_MSCS_IOV_VERSION \ 21769 ((WL_RAV_MSCS_IOV_MAJOR_VER << WL_RAV_MSCS_IOV_MAJOR_VER_SHIFT)| WL_RAV_MSCS_IOV_MINOR_VER) 21770 21771 enum wl_rav_mscs_cmd_ids { 21772 WL_RAV_MSCS_CMD_CONFIG = 1u, /* MSCS configuration */ 21773 WL_RAV_MSCS_CMD_ENABLE = 2u, /* Activate/deactivate MSCS */ 21774 WL_RAV_MSCS_CMD_UP_BITMAP = 3u, /* User priority bitmap */ 21775 WL_RAV_MSCS_CMD_UP_LIMIT = 4u, /* User priority limit */ 21776 WL_RAV_MSCS_CMD_STREAM_TIMEOUT = 5u, /* Stream timeout for MSCS Request */ 21777 WL_RAV_MSCS_CMD_FC_TYPE = 6u, /* Frame classifier type, IPv4, IPv6, etc. */ 21778 WL_RAV_MSCS_CMD_FC_MASK = 7u, /* Specifies the frame classifier mask */ 21779 WL_RAV_MSCS_CMD_REQ_TYPE = 8u, /* Indicates the MSCS Request type (add/remove) */ 21780 WL_RAV_MSCS_CMD_ASSOC_NEG = 9u, /* MSCS negotiation in the association */ 21781 21782 /* Add before this !! */ 21783 WL_RAV_MSCS_CMD_LAST 21784 }; 21785 21786 typedef enum wl_rav_mscs_xtlv_id { 21787 WL_RAV_MSCS_XTLV_CONFIG = 1u, 21788 WL_RAV_MSCS_XTLV_ENABLE = 2u, 21789 WL_RAV_MSCS_XTLV_UP_BITMAP = 3u, 21790 WL_RAV_MSCS_XTLV_UP_LIMIT = 4u, 21791 WL_RAV_MSCS_XTLV_STREAM_TIMEOUT = 5u, 21792 WL_RAV_MSCS_XTLV_FC_TYPE = 6u, 21793 WL_RAV_MSCS_XTLV_FC_MASK = 7u, 21794 WL_RAV_MSCS_XTLV_REQ_TYPE = 8u, 21795 WL_RAV_MSCS_XTLV_ASSOC_NEG = 9u 21796 } wl_rav_mscs_xtlv_id_t; 21797 21798 #define WL_ESP_IOV_MAJOR_VER 1 21799 #define WL_ESP_IOV_MINOR_VER 1 21800 #define WL_ESP_IOV_MAJOR_VER_SHIFT 8 21801 #define WL_ESP_IOV_VERSION \ 21802 ((WL_ESP_IOV_MAJOR_VER << WL_ESP_IOV_MAJOR_VER_SHIFT)| WL_ESP_IOV_MINOR_VER) 21803 21804 enum wl_esp_cmd_ids { 21805 WL_ESP_CMD_ENABLE = 1, 21806 WL_ESP_CMD_STATIC = 2, 21807 /* Add before this !! */ 21808 WL_ESP_CMD_LAST 21809 }; 21810 21811 enum wl_esp_xtlv_id { 21812 WL_ESP_XTLV_ENABLE = 0x1, 21813 WL_ESP_XTLV_STATIC_AC = 0x2, /* access category */ 21814 WL_ESP_XTLV_STATIC_TYPE = 0x3, /* data type */ 21815 WL_ESP_XTLV_STATIC_VAL = 0x4 21816 }; 21817 21818 #define WL_BCN_PROT_IOV_MAJOR_VER 1 21819 #define WL_BCN_PROT_IOV_MINOR_VER 1 21820 #define WL_BCN_PROT_IOV_MAJOR_VER_SHIFT 8 21821 #define WL_BCN_PROT_IOV_VERSION \ 21822 ((WL_BCN_PROT_IOV_MAJOR_VER << WL_BCN_PROT_IOV_MAJOR_VER_SHIFT)| WL_BCN_PROT_IOV_MINOR_VER) 21823 21824 enum wl_bcn_prot_cmd_ids { 21825 WL_BCN_PROT_CMD_ENABLE = 1, 21826 WL_BCN_PROT_CMD_COUNTERS = 2, 21827 /* Add before this !! */ 21828 WL_BCN_PROT_CMD_LAST 21829 }; 21830 21831 enum wl_bcn_prot_xtlv_id { 21832 WL_BCN_PROT_XTLV_ENABLE = 0x1, 21833 WL_BCN_PROT_XTLV_COUNTERS = 0x2 21834 }; 21835 21836 typedef struct wlc_bcn_prot_counters { 21837 uint32 no_en_bit; /* counts beacons without bcn prot enable bit at ext cap */ 21838 uint32 no_mme_ie; /* counts beacons without mme ie */ 21839 uint32 mic_fails; /* counts beacons failed mic check */ 21840 uint32 replay_fails; /* counts beacons failed replay check */ 21841 } wlc_bcn_prot_counters_t; 21842 #define BCN_PROT_COUNTERS_SIZE sizeof(wlc_bcn_prot_counters_t) 21843 21844 #define WL_DRR_IOV_MAJOR_VER 1 21845 #define WL_DRR_IOV_MINOR_VER 1 21846 #define WL_DRR_IOV_MAJOR_VER_SHIFT 8 21847 #define WL_DRR_IOV_VERSION \ 21848 ((WL_DRR_IOV_MAJOR_VER << WL_DRR_IOV_MAJOR_VER_SHIFT)| WL_DRR_IOV_MINOR_VER) 21849 21850 enum wl_drr_cmd_ids { 21851 WL_DRR_CMD_ENABLE = 1u, 21852 /* Add before this !! */ 21853 WL_DRR_CMD_LAST 21854 }; 21855 21856 enum wl_drr_xtlv_id { 21857 WL_DRR_XTLV_ENABLE = 0x1u 21858 }; 21859 21860 /* otpread command */ 21861 #define WL_OTPREAD_VER 1 21862 21863 typedef struct { 21864 uint16 version; /* cmd structure version */ 21865 uint16 cmd_len; /* cmd struct len */ 21866 uint32 rdmode; /* otp read mode */ 21867 uint32 rdoffset; /* byte offset into otp to start read */ 21868 uint32 rdsize; /* number of bytes to read */ 21869 } wl_otpread_cmd_t; 21870 21871 /* "otpecc_rows" command */ 21872 typedef struct { 21873 uint16 version; /* version of this structure */ 21874 uint16 len; /* len in bytes of this structure */ 21875 uint32 cmdtype; /* command type : 0 : read row data, 1 : ECC lock */ 21876 uint32 rowoffset; /* start row offset */ 21877 uint32 numrows; /* number of rows */ 21878 uint8 rowdata[]; /* read rows data */ 21879 } wl_otpecc_rows_t; 21880 21881 #define WL_OTPECC_ROWS_VER 1 21882 21883 #define WL_OTPECC_ROWS_CMD_READ 0 21884 #define WL_OTPECC_ROWS_CMD_LOCK 1 21885 21886 #define WL_OTPECC_ARGIDX_CMDTYPE 0 /* command type */ 21887 #define WL_OTPECC_ARGIDX_ROWOFFSET 1 /* start row offset */ 21888 #define WL_OTPECC_ARGIDX_NUMROWS 2 /* number of rows */ 21889 21890 /* "otpeccrows" raw data size per row */ 21891 #define WL_ECCDUMP_ROW_SIZE_BYTE 6 /* 4 bytes row data + 2 bytes ECC status */ 21892 #define WL_ECCDUMP_ROW_SIZE_WORD 3 21893 21894 /* otpECCstatus */ 21895 #define OTP_ECC_ENAB_SHIFT 13 21896 #define OTP_ECC_ENAB_MASK 0x7 21897 #define OTP_ECC_CORR_ST_SHIFT 12 21898 #define OTP_ECC_CORR_ST_MASK 0x1 21899 #define OTP_ECC_DBL_ERR_SHIFT 11 21900 #define OTP_ECC_DBL_ERR_MASK 0x1 21901 #define OTP_ECC_DED_ST_SHIFT 10 21902 #define OTP_ECC_DED_ST_MASK 0x1 21903 #define OTP_ECC_SEC_ST_SHIFT 9 21904 #define OTP_ECC_SEC_ST_MASK 0x1 21905 #define OTP_ECC_DATA_SHIFT 0 21906 #define OTP_ECC_DATA_MASK 0x7f 21907 21908 /* OTP_ECC_CORR_ST field */ 21909 #define OTP_ECC_MODE 1 21910 #define OTP_NO_ECC_MODE 0 21911 21912 /* OTP_ECC_ENAB field (bit15:13) : 21913 * When 2 or 3 bits are set, 21914 * it indicates that OTP ECC is enabled on the last row read. 21915 * Otherwise, ECC is disabled 21916 */ 21917 #define OTP_ECC_ENAB(val) \ 21918 (bcm_bitcount((uint8 *)&(val), sizeof(uint8)) > 1) 21919 21920 /* otp command details */ 21921 #define WL_OTP_IOV_MAJOR_VER 1u 21922 #define WL_OTP_IOV_MINOR_VER 1u 21923 #define WL_OTP_IOV_MAJOR_VER_SHIFT 8u 21924 #define WL_OTP_IOV_VERSION \ 21925 ((WL_OTP_IOV_MAJOR_VER << WL_OTP_IOV_MAJOR_VER_SHIFT) | WL_OTP_IOV_MINOR_VER) 21926 21927 /* OTP Regions HW/SW */ 21928 #define OTP_RGN_NONE 0u 21929 #define OTP_RGN_HW 1u 21930 #define OTP_RGN_SW 2u 21931 21932 /* OTP Lock Regions */ 21933 #define OTP_LOCK_RGN_NONE 0u 21934 #define OTP_LOCK_RGN_WAFER_SORT 1u 21935 #define OTP_LOCK_RGN_HASH_DATA 2u 21936 #define OTP_LOCK_RGN_FINAL_TEST 3u 21937 #define OTP_LOCK_RGN_AUTOLOAD 4u 21938 #define OTP_LOCK_RGN_UPPER_GU 5u 21939 #define OTP_LOCK_RGN_LOWER_GU 6u 21940 #define OTP_LOCK_RGN_HW_SW 7u 21941 #define OTP_LOCK_RGN_BT 8u 21942 #define OTP_LOCK_RGN_SECURE 9u 21943 #define OTP_LOCK_RGN_SECURE_V 10u 21944 #define OTP_LOCK_RGN_SECURE_VI_0 11u 21945 #define OTP_LOCK_RGN_SECURE_VI_1 12u 21946 21947 enum wl_otp_cmd_ids { 21948 WL_OTP_CMD_RGNSTATUS = 1u, 21949 WL_OTP_CMD_RGNDUMP = 2u, 21950 WL_OTP_CMD_RGNWRITE = 3u, 21951 WL_OTP_CMD_SBOOT = 4u, 21952 WL_OTP_CMD_RGNLOCK = 5u, 21953 21954 /* Add before this !!! */ 21955 WL_OTP_CMD_LAST 21956 }; 21957 21958 enum wl_otp_xtlv_id { 21959 WL_OTP_XTLV_NONE = 0u, /* Not valid otp tag */ 21960 WL_OTP_XTLV_RGN = 1u, /* OTP region type */ 21961 WL_OTP_XTLV_ADDR = 2u, /* OTP region start address */ 21962 WL_OTP_XTLV_SIZE = 3u, /* OTP region size */ 21963 WL_OTP_XTLV_DATA = 4u, /* OTP dump data */ 21964 21965 /* SBOOT TAGs: */ 21966 WL_OTP_XTLV_SBOOT_FW_SIG_ENABLE = 5u, /* FW signing enable bit */ 21967 WL_OTP_XTLV_SBOOT_FW_SIG_DISABLE = 6u, /* FW signing disaable bit */ 21968 WL_OTP_XTLV_SBOOT_ROM_PROTECT_ENABLE = 7u, /* ROM protect enable bit */ 21969 WL_OTP_XTLV_SBOOT_ROM_PROTECT_PATCH = 8u, /* ROM protect from patch */ 21970 WL_OTP_XTLV_SBOOT_HOST_READ_NONSEC_EN = 9u, /* Host read non secure enable bit */ 21971 WL_OTP_XTLV_SBOOT_HOST_READ_NONSEC_DIS = 10u, /* Host read non secure disable bit */ 21972 WL_OTP_XTLV_SBOOT_HOST_WRITE_NONSEC_EN = 11u, /* Host write non secure enable bit */ 21973 WL_OTP_XTLV_SBOOT_HOST_WRITE_NONSEC_DIS = 12u, /* Host write non secure disable bit */ 21974 WL_OTP_XTLV_SBOOT_DBGREGS_PROTECT_ENAB = 13u, /* ARM DBG regs protect enable bit */ 21975 WL_OTP_XTLV_SBOOT_DBGREGS_PROTECT_DIS = 14u, /* ARM DBG regs protect disable bit */ 21976 WL_OTP_XTLV_SBOOT_JTAG_PROTECT_ENAB = 15u, /* JTAG protect disable bit */ 21977 WL_OTP_XTLV_SBOOT_JTAG_PROTECT_DIS = 16u, /* JTAG protect re-enable bit */ 21978 WL_OTP_XTLV_SBOOT_TCAM_PROTECT_SIZE = 17u, /* TCAM protect enable size field 8 bits */ 21979 WL_OTP_XTLV_SBOOT_ACTIVATE_SECURITY = 18u, /* Active security enable bit */ 21980 WL_OTP_XTLV_SBOOT_KEY_REVOC_BITS = 19u, /* Key revocation Bits field 16 bits */ 21981 WL_OTP_XTLV_SBOOT_CUSTOMER_PUBLIC_KEY_1 = 20u, /* Customer public key 1 field 257 bits */ 21982 WL_OTP_XTLV_SBOOT_CUSTOMER_PUBLIC_KEY_2 = 21u, /* Customer public key 2 field 257 bits */ 21983 WL_OTP_XTLV_SBOOT_LOT_NUM = 22u, /* Chip lot num 17 bits */ 21984 WL_OTP_XTLV_SBOOT_WAFER_NUM = 23u, /* Chip wafer num 5 bits */ 21985 WL_OTP_XTLV_SBOOT_WAFER_X = 24u, /* Chip wafer X 9 bits */ 21986 WL_OTP_XTLV_SBOOT_WAFER_Y = 25u, /* Chip wafer Y 9 bits */ 21987 WL_OTP_XTLV_SBOOT_UNLOCK_HASH_VAL = 26u, /* Unlock Hash Val 128 bits */ 21988 }; 21989 21990 #define WL_LEAKY_AP_STATS_GT_TYPE 0 21991 #define WL_LEAKY_AP_STATS_PKT_TYPE 1 21992 typedef struct wlc_leaked_infra_guard_marker { 21993 /* type field for this TLV: WL_LEAKY_AP_STATS_GT_TYPE */ 21994 uint16 type; 21995 /* length field for this TLV */ 21996 uint16 len; 21997 /* guard sample sequence number; Updated by 1 on every guard sample */ 21998 uint32 seq_number; 21999 /* Guard time start time (tsf; PS indicated and acked) */ 22000 uint32 start_time; 22001 /* tsf timestamp for the GT end event */ 22002 uint32 gt_tsf_l; 22003 /* Guard time period in ms */ 22004 uint16 guard_duration; 22005 /* Number PPDUs in the notification */ 22006 uint16 num_pkts; 22007 /* Flags to indicate some states see below */ 22008 uint8 flag; 22009 /* pad for 32-bit alignment */ 22010 uint8 reserved[3]; 22011 } wlc_leaked_infra_guard_marker_t; 22012 22013 /* Flag information */ 22014 #define WL_LEAKED_GUARD_TIME_NONE 0 /* Not in any guard time */ 22015 #define WL_LEAKED_GUARD_TIME_FRTS (0x01 << 0) /* Normal FRTS power save */ 22016 #define WL_LEAKED_GUARD_TIME_SCAN (0x01 << 1) /* Channel switch due to scanning */ 22017 22018 #ifdef WLAWDL 22019 #define WL_LEAKED_GUARD_TIME_AWDL_PSF (0x01 << 2) /* Channel switch due to AWDL PSF */ 22020 #define WL_LEAKED_GUARD_TIME_AWDL_AW (0x01 << 3) /* Channel switch due to AWDL AW */ 22021 #endif /* WLAWDL */ 22022 22023 #define WL_LEAKED_GUARD_TIME_INFRA_STA (0x01 << 4) /* generic type infra sta channel switch */ 22024 #define WL_LEAKED_GUARD_TIME_TERMINATED (0x01 << 7) /* indicate a GT is terminated early */ 22025 22026 typedef struct wlc_leaked_infra_packet_stat { 22027 uint16 type; /* type field for this TLV: WL_LEAKY_AP_STATS_PKT_TYPE */ 22028 uint16 len; /* length field for this TLV */ 22029 uint16 ppdu_len_bytes; /* PPDU packet length in bytes */ 22030 uint16 num_mpdus; /* number of the MPDUs in the PPDU */ 22031 uint32 ppdu_time; /* PPDU arrival time at the begining of the guard time */ 22032 uint32 rate; /* PPDU packet rate; Received packet's data rate */ 22033 uint16 seq_number; /* sequence number */ 22034 int8 rssi; /* RSSI */ 22035 uint8 tid; /* tid */ 22036 } wlc_leaked_infra_packet_stat_t; 22037 22038 /* Wake timer structure definition */ 22039 #define WAKE_TIMER_VERSION 1 22040 #define WAKE_TIMER_NOLIMIT 0xFFFF 22041 22042 typedef struct wake_timer { 22043 uint16 ver; 22044 uint16 len; 22045 uint16 limit; /* number of events to deliver 22046 * 0-disable, 0xffff-indefinite, num_events otherwise 22047 */ 22048 uint16 count; /* number of events delivered since enable (get only) */ 22049 uint16 period; /* timeout/period in milliseconds */ 22050 } wake_timer_t; 22051 22052 typedef struct wl_desense_restage_gain { 22053 uint16 version; 22054 uint16 length; 22055 uint32 band; 22056 uint8 num_cores; 22057 uint8 desense_array[WL_TX_CHAINS_MAX]; 22058 uint8 PAD[3]; 22059 } wl_desense_restage_gain_t; 22060 22061 #define MAX_UCM_CHAINS 5 22062 #define MAX_UCM_PROFILES 10 22063 #define UCM_PROFILE_VERSION_1 1 22064 22065 /* UCM per chain attribute struct */ 22066 typedef struct wlc_btcx_chain_attr { 22067 uint16 length; /* chain attr length, version is same as profile version */ 22068 int8 desense_level; /* per chain desense level */ 22069 int8 ack_pwr_strong_rssi; /* per chain ack power at strong rssi */ 22070 int8 ack_pwr_weak_rssi; /* per chain ack power at weak rssi */ 22071 int8 tx_pwr_strong_rssi; /* per chain tx power at strong rssi */ 22072 int8 tx_pwr_weak_rssi; /* per chain tx power at weak rssi */ 22073 uint8 PAD[1]; /* additional bytes for alignment */ 22074 } wlc_btcx_chain_attr_t; 22075 22076 typedef struct wlc_btcx_profile_v1 { 22077 uint16 version; /* UCM profile version */ 22078 uint16 length; /* profile size */ 22079 uint16 fixed_length; /* size of the fixed portion of the profile */ 22080 uint8 init; /* profile initialized or not */ 22081 uint8 chain_attr_count; /* Number of elements in chain_attr array */ 22082 uint8 profile_index; /* profile index */ 22083 uint8 mode_strong_wl_bt; /* Mode under strong WLAN and BT RSSI */ 22084 uint8 mode_weak_wl; /* Mode under weak WLAN RSSI */ 22085 uint8 mode_weak_bt; /* Mode under weak BT RSSI */ 22086 uint8 mode_weak_wl_bt; /* Mode under weak BT and WLAN RSSI */ 22087 int8 mode_wl_hi_lo_rssi_thresh; /* Strong to weak WLAN RSSI threshold for mode selection */ 22088 int8 mode_wl_lo_hi_rssi_thresh; /* Weak to strong WLAN RSSI threshold for mode selection */ 22089 int8 mode_bt_hi_lo_rssi_thresh; /* Strong to weak BT RSSI threshold for mode selection */ 22090 int8 mode_bt_lo_hi_rssi_thresh; /* Weak to strong BT RSSI threshold for mode selection */ 22091 int8 desense_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for desense */ 22092 int8 desense_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for desense */ 22093 int8 ack_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for ACK power */ 22094 int8 ack_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for ACK power */ 22095 int8 tx_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for Tx power */ 22096 int8 tx_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for Tx power */ 22097 uint8 PAD[1]; /* additional bytes for 4 byte alignment */ 22098 wlc_btcx_chain_attr_t chain_attr[]; /* variable length array with chain attributes */ 22099 } wlc_btcx_profile_v1_t; 22100 22101 #define UCM_PROFILE_VERSION_2 2u 22102 22103 typedef struct wlc_btcx_profile_v2 { 22104 uint16 version; /* UCM profile version */ 22105 uint16 length; /* profile size */ 22106 uint16 fixed_length; /* size of the fixed portion of the profile */ 22107 uint8 init; /* profile initialized or not */ 22108 uint8 chain_attr_count; /* Number of elements in chain_attr array */ 22109 uint8 profile_index; /* profile index */ 22110 uint8 mode_strong_wl_bt; /* Mode under strong WLAN and BT RSSI */ 22111 uint8 mode_weak_wl; /* Mode under weak WLAN RSSI */ 22112 uint8 mode_weak_bt; /* Mode under weak BT RSSI */ 22113 uint8 mode_weak_wl_bt; /* Mode under weak BT and WLAN RSSI */ 22114 int8 mode_wl_hi_lo_rssi_thresh; /* Strong to weak WLAN RSSI threshold for mode selection */ 22115 int8 mode_wl_lo_hi_rssi_thresh; /* Weak to strong WLAN RSSI threshold for mode selection */ 22116 int8 mode_bt_hi_lo_rssi_thresh; /* Strong to weak BT RSSI threshold for mode selection */ 22117 int8 mode_bt_lo_hi_rssi_thresh; /* Weak to strong BT RSSI threshold for mode selection */ 22118 int8 desense_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for desense */ 22119 int8 desense_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for desense */ 22120 int8 ack_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for ACK power */ 22121 int8 ack_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for ACK power */ 22122 int8 tx_pwr_wl_hi_lo_rssi_thresh; /* Strong to weak RSSI threshold for Tx power */ 22123 int8 tx_pwr_wl_lo_hi_rssi_thresh; /* Weak to strong RSSI threshold for Tx power */ 22124 uint8 hybrid_ant_core_config; /* Select antenna configuration for hybrid */ 22125 wlc_btcx_chain_attr_t chain_attr[]; /* variable length array with chain attributes */ 22126 } wlc_btcx_profile_v2_t; 22127 22128 #define SSSR_D11_RESET_SEQ_STEPS 5u 22129 #define SSSR_HWA_RESET_SEQ_STEPS 8u 22130 22131 #define SSSR_REG_INFO_VER_0 0u 22132 #define SSSR_REG_INFO_VER_1 1u 22133 #define SSSR_REG_INFO_VER_2 2u 22134 #define SSSR_REG_INFO_VER_3 3u 22135 22136 typedef struct sssr_reg_info_v0 { 22137 uint16 version; 22138 uint16 length; /* length of the structure validated at host */ 22139 struct { 22140 struct { 22141 uint32 pmuintmask0; 22142 uint32 pmuintmask1; 22143 uint32 resreqtimer; 22144 uint32 macresreqtimer; 22145 uint32 macresreqtimer1; 22146 } base_regs; 22147 } pmu_regs; 22148 struct { 22149 struct { 22150 uint32 intmask; 22151 uint32 powerctrl; 22152 uint32 clockcontrolstatus; 22153 uint32 powerctrl_mask; 22154 } base_regs; 22155 } chipcommon_regs; 22156 struct { 22157 struct { 22158 uint32 clockcontrolstatus; 22159 uint32 clockcontrolstatus_val; 22160 } base_regs; 22161 struct { 22162 uint32 resetctrl; 22163 uint32 itopoobb; 22164 } wrapper_regs; 22165 } arm_regs; 22166 struct { 22167 struct { 22168 uint32 ltrstate; 22169 uint32 clockcontrolstatus; 22170 uint32 clockcontrolstatus_val; 22171 } base_regs; 22172 struct { 22173 uint32 itopoobb; 22174 } wrapper_regs; 22175 } pcie_regs; 22176 struct { 22177 struct { 22178 uint32 ioctrl; 22179 } wrapper_regs; 22180 uint32 vasip_sr_addr; 22181 uint32 vasip_sr_size; 22182 } vasip_regs; 22183 struct { 22184 struct { 22185 uint32 xmtaddress; 22186 uint32 xmtdata; 22187 uint32 clockcontrolstatus; 22188 uint32 clockcontrolstatus_val; 22189 } base_regs; 22190 struct { 22191 uint32 resetctrl; 22192 uint32 itopoobb; 22193 uint32 ioctrl; 22194 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 22195 } wrapper_regs; 22196 uint32 sr_size; 22197 } mac_regs[MAX_NUM_D11CORES]; 22198 } sssr_reg_info_v0_t; 22199 22200 typedef struct sssr_reg_info_v1 { 22201 uint16 version; 22202 uint16 length; /* length of the structure validated at host */ 22203 struct { 22204 struct { 22205 uint32 pmuintmask0; 22206 uint32 pmuintmask1; 22207 uint32 resreqtimer; 22208 uint32 macresreqtimer; 22209 uint32 macresreqtimer1; 22210 } base_regs; 22211 } pmu_regs; 22212 struct { 22213 struct { 22214 uint32 intmask; 22215 uint32 powerctrl; 22216 uint32 clockcontrolstatus; 22217 uint32 powerctrl_mask; 22218 } base_regs; 22219 } chipcommon_regs; 22220 struct { 22221 struct { 22222 uint32 clockcontrolstatus; 22223 uint32 clockcontrolstatus_val; 22224 } base_regs; 22225 struct { 22226 uint32 resetctrl; 22227 uint32 itopoobb; 22228 } wrapper_regs; 22229 } arm_regs; 22230 struct { 22231 struct { 22232 uint32 ltrstate; 22233 uint32 clockcontrolstatus; 22234 uint32 clockcontrolstatus_val; 22235 } base_regs; 22236 struct { 22237 uint32 itopoobb; 22238 } wrapper_regs; 22239 } pcie_regs; 22240 struct { 22241 struct { 22242 uint32 ioctrl; 22243 } wrapper_regs; 22244 uint32 vasip_sr_addr; 22245 uint32 vasip_sr_size; 22246 } vasip_regs; 22247 struct { 22248 struct { 22249 uint32 xmtaddress; 22250 uint32 xmtdata; 22251 uint32 clockcontrolstatus; 22252 uint32 clockcontrolstatus_val; 22253 } base_regs; 22254 struct { 22255 uint32 resetctrl; 22256 uint32 itopoobb; 22257 uint32 ioctrl; 22258 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 22259 } wrapper_regs; 22260 uint32 sr_size; 22261 } mac_regs[MAX_NUM_D11CORES]; 22262 struct { 22263 uint32 dig_sr_addr; 22264 uint32 dig_sr_size; 22265 } dig_mem_info; 22266 } sssr_reg_info_v1_t; 22267 22268 #define MAX_NUM_D11_CORES_WITH_SCAN 3u 22269 22270 typedef struct sssr_reg_info_v2 { 22271 uint16 version; 22272 uint16 length; /* length of the structure validated at host */ 22273 struct { 22274 struct { 22275 uint32 pmuintmask0; 22276 uint32 pmuintmask1; 22277 uint32 resreqtimer; 22278 uint32 macresreqtimer; 22279 uint32 macresreqtimer1; 22280 uint32 macresreqtimer2; 22281 } base_regs; 22282 } pmu_regs; 22283 struct { 22284 struct { 22285 uint32 intmask; 22286 uint32 powerctrl; 22287 uint32 clockcontrolstatus; 22288 uint32 powerctrl_mask; 22289 } base_regs; 22290 } chipcommon_regs; 22291 struct { 22292 struct { 22293 uint32 clockcontrolstatus; 22294 uint32 clockcontrolstatus_val; 22295 } base_regs; 22296 struct { 22297 uint32 resetctrl; 22298 uint32 extrsrcreq; 22299 } wrapper_regs; 22300 } arm_regs; 22301 struct { 22302 struct { 22303 uint32 ltrstate; 22304 uint32 clockcontrolstatus; 22305 uint32 clockcontrolstatus_val; 22306 } base_regs; 22307 struct { 22308 uint32 extrsrcreq; 22309 } wrapper_regs; 22310 } pcie_regs; 22311 struct { 22312 struct { 22313 uint32 xmtaddress; 22314 uint32 xmtdata; 22315 uint32 clockcontrolstatus; 22316 uint32 clockcontrolstatus_val; 22317 } base_regs; 22318 struct { 22319 uint32 resetctrl; 22320 uint32 extrsrcreq; 22321 uint32 ioctrl; 22322 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 22323 } wrapper_regs; 22324 uint32 sr_size; 22325 } mac_regs[MAX_NUM_D11_CORES_WITH_SCAN]; 22326 struct { 22327 uint32 dig_sr_addr; 22328 uint32 dig_sr_size; 22329 } dig_mem_info; 22330 } sssr_reg_info_v2_t; 22331 22332 typedef struct sssr_reg_info_v3 { 22333 uint16 version; 22334 uint16 length; /* length of the structure validated at host */ 22335 struct { 22336 struct { 22337 uint32 pmuintmask0; 22338 uint32 pmuintmask1; 22339 uint32 resreqtimer; 22340 uint32 macresreqtimer; 22341 uint32 macresreqtimer1; 22342 uint32 macresreqtimer2; 22343 } base_regs; 22344 } pmu_regs; 22345 struct { 22346 struct { 22347 uint32 intmask; 22348 uint32 powerctrl; 22349 uint32 clockcontrolstatus; 22350 uint32 powerctrl_mask; 22351 } base_regs; 22352 } chipcommon_regs; 22353 struct { 22354 struct { 22355 uint32 clockcontrolstatus; 22356 uint32 clockcontrolstatus_val; 22357 } base_regs; 22358 struct { 22359 uint32 resetctrl; 22360 uint32 extrsrcreq; 22361 } wrapper_regs; 22362 } arm_regs; 22363 struct { 22364 struct { 22365 uint32 ltrstate; 22366 uint32 clockcontrolstatus; 22367 uint32 clockcontrolstatus_val; 22368 } base_regs; 22369 struct { 22370 uint32 extrsrcreq; 22371 } wrapper_regs; 22372 } pcie_regs; 22373 struct { 22374 struct { 22375 uint32 xmtaddress; 22376 uint32 xmtdata; 22377 uint32 clockcontrolstatus; 22378 uint32 clockcontrolstatus_val; 22379 } base_regs; 22380 struct { 22381 uint32 resetctrl; 22382 uint32 extrsrcreq; 22383 uint32 ioctrl; 22384 uint32 ioctrl_resetseq_val[SSSR_D11_RESET_SEQ_STEPS]; 22385 } wrapper_regs; 22386 uint32 sr_size; 22387 } mac_regs[MAX_NUM_D11_CORES_WITH_SCAN]; 22388 struct { 22389 uint32 dig_sr_addr; 22390 uint32 dig_sr_size; 22391 } dig_mem_info; 22392 uint32 fis_enab; 22393 struct { 22394 struct { 22395 uint32 clkenable; 22396 uint32 clkgatingenable; 22397 uint32 clkext; 22398 uint32 clkctlstatus; 22399 } base_regs; 22400 struct { 22401 uint32 ioctrl; 22402 uint32 resetctrl; 22403 } wrapper_regs; 22404 uint32 hwa_resetseq_val[SSSR_HWA_RESET_SEQ_STEPS]; 22405 } hwa_regs; 22406 } sssr_reg_info_v3_t; 22407 22408 #ifndef SSSR_REG_INFO_HAS_ALIAS 22409 typedef sssr_reg_info_v0_t sssr_reg_info_t; 22410 #define SSSR_REG_INFO_VER SSSR_REG_INFO_VER_0 22411 #endif 22412 22413 /* A wrapper structure for all versions of SSSR register information structures */ 22414 typedef union sssr_reg_info { 22415 sssr_reg_info_v0_t rev0; 22416 sssr_reg_info_v1_t rev1; 22417 sssr_reg_info_v2_t rev2; 22418 sssr_reg_info_v3_t rev3; 22419 } sssr_reg_info_cmn_t; 22420 22421 /* ADaptive Power Save(ADPS) structure definition */ 22422 #define WL_ADPS_IOV_MAJOR_VER 1 22423 #define WL_ADPS_IOV_MINOR_VER 0 22424 #define WL_ADPS_IOV_MAJOR_VER_SHIFT 8 22425 #define WL_ADPS_IOV_VER \ 22426 ((WL_ADPS_IOV_MAJOR_VER << WL_ADPS_IOV_MAJOR_VER_SHIFT) | WL_ADPS_IOV_MINOR_VER) 22427 22428 #define ADPS_NUM_DIR 2 22429 #define ADPS_RX 0 22430 #define ADPS_TX 1 22431 22432 #define WL_ADPS_IOV_MODE 0x0001 22433 #define WL_ADPS_IOV_RSSI 0x0002 22434 #define WL_ADPS_IOV_DUMP 0x0003 22435 #define WL_ADPS_IOV_DUMP_CLEAR 0x0004 22436 #define WL_ADPS_IOV_SUSPEND 0x0005 22437 #define WL_ADPS_IOV_GAIN 0x0006 22438 #define WL_ADPS_IOV_RESET_GAIN 0x0007 22439 22440 #define ADPS_SUMMARY_STEP_NUM 2 22441 #define ADPS_SUMMARY_STEP_LOW 0 22442 #define ADPS_SUMMARY_STEP_HIGH 1 22443 22444 #define ADPS_SUB_IOV_VERSION_1 1 22445 #define ADPS_SUB_IOV_VERSION_2 2 22446 22447 /* suspend/resume ADPS by wl/private command from host */ 22448 #define ADPS_RESUME 0u 22449 #define ADPS_SUSPEND 1u 22450 22451 typedef struct wl_adps_params_v1 { 22452 uint16 version; 22453 uint16 length; 22454 uint8 band; /* band - 2G or 5G */ 22455 uint8 mode; /* operation mode, default = 0 (ADPS disable) */ 22456 uint16 padding; 22457 } wl_adps_params_v1_t; 22458 22459 typedef struct wl_adps_rssi { 22460 int32 thresh_hi; /* rssi threshold to resume ADPS operation */ 22461 int32 thresh_lo; /* rssi threshold to suspend ADPS operation */ 22462 } wl_adps_rssi_t; 22463 22464 typedef struct wl_adps_rssi_params_v1 { 22465 uint16 version; 22466 uint16 length; 22467 uint8 band; 22468 uint8 padding[3]; 22469 wl_adps_rssi_t rssi; 22470 } wl_adps_rssi_params_v1_t; 22471 22472 typedef struct adps_stat_elem { 22473 uint32 duration; /* each step duration time (mSec) */ 22474 uint32 counts; /* each step hit count number */ 22475 } adps_stat_elem_t; 22476 22477 typedef struct wl_adps_dump_summary_v1 { 22478 uint16 version; 22479 uint16 length; 22480 uint8 mode; /* operation mode: On/Off */ 22481 uint8 flags; /* restrict flags */ 22482 uint8 current_step; /* current step */ 22483 uint8 padding; 22484 adps_stat_elem_t stat[ADPS_SUMMARY_STEP_NUM]; /* statistics */ 22485 } wl_adps_dump_summary_v1_t; 22486 22487 typedef struct wl_adps_dump_summary_v2 { 22488 uint16 version; 22489 uint16 length; 22490 uint8 mode; /* operation mode: On/Off */ 22491 uint8 current_step; /* current step */ 22492 uint8 padding[2]; 22493 uint32 flags; /* restrict flags */ 22494 adps_stat_elem_t stat[ADPS_SUMMARY_STEP_NUM]; /* statistics */ 22495 } wl_adps_dump_summary_v2_t; 22496 22497 typedef struct wl_adps_suspend_v1 { 22498 uint16 version; 22499 uint16 length; 22500 uint8 suspend; /* 1: suspend 0: resume */ 22501 uint8 padding[3]; 22502 } wl_adps_suspend_v1_t; 22503 22504 /* For ADPS energy gain */ 22505 typedef struct wlc_adps_energy_gain_data { 22506 uint32 pm_dur_gain; /* gain of pm duration by ADPS */ 22507 uint32 step0_dur; /* duration of ADPS STEP0(PM MAX + PSPOLL PRD) */ 22508 uint32 wake_up_dur; /* duration of wake up state */ 22509 uint32 pad; 22510 uint64 tx_tot_bytes; /* Total Tx bytes */ 22511 } wlc_adps_energy_gain_data_t; 22512 22513 typedef struct wl_adps_energy_gain_v1 { 22514 uint16 version; 22515 uint16 length; 22516 uint32 pad; 22517 wlc_adps_energy_gain_data_t gain_data[MAX_BANDS]; 22518 } wl_adps_energy_gain_v1_t; 22519 22520 typedef struct wlc_btc_2gchain_dis { 22521 uint16 ver; 22522 uint16 len; 22523 uint8 chain_dis; 22524 uint8 flag; 22525 } wlc_btc_2gchain_dis_t; 22526 22527 /* TDLS structure definition */ 22528 #define WL_TDLS_T_VERSION_V1 1 22529 typedef struct wl_tdls_dump_summary_v1 { 22530 uint16 version; 22531 uint16 length; /* length of the entire structure */ 22532 uint32 txsetupreq; /* tdls setup req sent */ 22533 uint32 txsetupresp; /* tdls setup resp sent */ 22534 uint32 txsetupcfm; /* tdls setup confirm sent */ 22535 uint32 txteardown; /* tdls teardwon frames sent */ 22536 uint32 txptireq; /* tdls pti req frames sent */ 22537 uint32 txptiresp; /* tdls pti resp frames sent */ 22538 uint32 txchswreq; /* tdls chsw req frames sent */ 22539 uint32 txchswresp; /* tdls chsw resp frame sent */ 22540 uint32 rxsetupreq; /* tdls setup req rcvd */ 22541 uint32 rxdsetupresp; /* tdls setup resp rcvd */ 22542 uint32 rxsetupcfm; /* tdls setup confirm rcvd */ 22543 uint32 rxteardown; /* tdls teardown frames rcvd */ 22544 uint32 rxptireq; /* tdls pti req frames rcvd */ 22545 uint32 rxptiresp; /* tdls pti resp frames rcvd */ 22546 uint32 rxchswreq; /* tdls chsw req frames rcvd */ 22547 uint32 rxchswresp; /* tdls chsw resp frames rcvd */ 22548 uint32 discard; /* frames discarded due to full buffer */ 22549 uint32 ubuffered; /* frames buffered by TDLS txmod */ 22550 uint32 buf_reinserted; /* frames reinserted */ 22551 uint32 idletime; /* time since no traffic on tdls link */ 22552 uint32 uptime; /* time since tdls link connected */ 22553 uint32 tx_cnt; /* frames txed over tdls link */ 22554 uint32 rx_cnt; /* frames rcvd over tdls link */ 22555 uint32 blist_cnt; /* number of tdls black list */ 22556 uint32 scb_flags; /* connected tdls scb flags */ 22557 struct ether_addr peer_addr; /* connected peer addr */ 22558 uint8 padding[2]; 22559 } wl_tdls_dump_summary_v1_t; 22560 22561 #define WLC_BTC_2GCHAIN_DIS_REASSOC 0x1 22562 #define WLC_BTC_2GCHAIN_DIS_VER1 0x1 22563 #define WLC_BTC_2GCHAIN_DIS_VER1_LEN 6 22564 22565 /* --- BTCX WiFi Protection (btc_wifi_prot iovar) --- */ 22566 22567 /* Current iovar structure version: 1 */ 22568 #define WL_BTC_WIFI_PROT_VER_1 1 22569 22570 typedef struct wl_btc_wifi_prot_v1 { 22571 uint16 ver; /* version */ 22572 uint16 len; /* total length */ 22573 uint8 data[]; /* bcm_xtlv_t payload */ 22574 } wl_btc_wifi_prot_v1_t; 22575 22576 /* Xtlv tags (protection type) and data */ 22577 #define WL_BTC_WIFI_PROT_M1_M4 1 22578 typedef struct wl_btc_wifi_prot_m1_m4 { 22579 uint32 enable; /* enable/disable m1-m4 protection */ 22580 uint32 timeout; /* maximum timeout in ms (0: default) */ 22581 } wl_btc_wifi_prot_m1_m4_t; 22582 22583 #define WL_BTC_WIFI_PROT_ENABLE 1 22584 #define WL_BTC_WIFI_PROT__DISABLE 0 22585 22586 /* --- End BTCX WiFi Protection --- */ 22587 22588 /* --- BTCX ULMU disable (btc_ulmu_config iovar) --- */ 22589 22590 /* Version number */ 22591 #define WL_BTC_ULMU_CONFIG_VER_1 1 22592 typedef struct wl_btc_ulmu_config_v1 { 22593 uint16 version; /* btc_ulmu_config version */ 22594 uint16 len; /* Total length */ 22595 uint32 ulmu_bt_task_bm; /* BT Task bimtap for ULMU disable */ 22596 uint32 ulmu_bt_period_th; /* BT period thresh for ULMU disable */ 22597 } wl_btc_ulmu_config_v1_t; 22598 22599 /* --- End BTCX ULMU config --- */ 22600 22601 #define RPSNOA_IOV_MAJOR_VER 1 22602 #define RPSNOA_IOV_MINOR_VER 1 22603 #define RPSNOA_IOV_MAJOR_VER_SHIFT 8 22604 #define RPSNOA_IOV_VERSION \ 22605 ((RPSNOA_IOV_MAJOR_VER << RPSNOA_IOV_MAJOR_VER_SHIFT)| RPSNOA_IOV_MINOR_VER) 22606 22607 enum wl_rpsnoa_cmd_ids { 22608 WL_RPSNOA_CMD_ENABLE = 1, 22609 WL_RPSNOA_CMD_STATUS, 22610 WL_RPSNOA_CMD_PARAMS, 22611 WL_RPSNOA_CMD_LAST 22612 }; 22613 22614 typedef struct rpsnoa_cmnhdr { 22615 uint16 ver; /* cmd structure version */ 22616 uint16 len; /* cmd structure len */ 22617 uint32 subcmd; 22618 uint32 cnt; 22619 } rpsnoa_cmnhdr_t; 22620 22621 typedef struct rpsnoa_data { 22622 int16 band; 22623 int16 value; 22624 } rpsnoa_data_t; 22625 22626 typedef struct rpsnoa_stats { 22627 int16 band; 22628 int16 state; 22629 uint32 sleep_dur; 22630 uint32 sleep_avail_dur; 22631 uint32 last_pps; 22632 } rpsnoa_stats_t; 22633 22634 typedef struct rpsnoa_param { 22635 uint16 band; 22636 uint8 level; 22637 uint8 stas_assoc_check; 22638 uint32 pps; 22639 uint32 quiet_time; 22640 } rpsnoa_param_t; 22641 22642 typedef struct rpsnoa_iovar { 22643 rpsnoa_cmnhdr_t hdr; 22644 rpsnoa_data_t data[1]; 22645 } rpsnoa_iovar_t; 22646 22647 typedef struct rpsnoa_iovar_status { 22648 rpsnoa_cmnhdr_t hdr; 22649 rpsnoa_stats_t stats[1]; 22650 } rpsnoa_iovar_status_t; 22651 22652 typedef struct rpsnoa_iovar_params { 22653 rpsnoa_cmnhdr_t hdr; 22654 rpsnoa_param_t param[1]; 22655 } rpsnoa_iovar_params_t; 22656 22657 /* Per-interface reportable stats types */ 22658 enum wl_ifstats_xtlv_id { 22659 /* global */ 22660 WL_IFSTATS_XTLV_SLICE_INDEX = 1, 22661 WL_IFSTATS_XTLV_IF_INDEX = 2, 22662 WL_IFSTATS_XTLV_MAC_ADDR = 3, 22663 WL_IFSTATS_XTLV_REPORT_CMD = 4, /* Comes in an iovar */ 22664 WL_IFSTATS_XTLV_BUS_PCIE = 5, 22665 WL_STATS_XTLV_BUS_PCIE_TX_HISTOGRAMS = 6, 22666 WL_STATS_XTLV_BUS_PCIE_TX_QUEUE_DEPTH = 7, 22667 /* history of blocks freed most recently */ 22668 WL_STATS_XTLV_FBINFO_STATS = 8, 22669 22670 /* Report data across all SCBs using ecounters */ 22671 /* STA_info ecounters */ 22672 WL_IFSTATS_XTLV_WL_STA_INFO_ECOUNTERS = 0x100, 22673 /* For AMPDU stat sub-types requested in a different format */ 22674 /* these could be sum and report stats across slices. OR 22675 * report sub-types in pairs so host can sum and add. 22676 * Information sent here is across slices, therefore global 22677 */ 22678 WL_IFSTATS_XTLV_TX_AMPDU_STATS = 0x101, 22679 WL_IFSTATS_XTLV_RX_AMPDU_STATS = 0x102, 22680 /* scb ecounter statistics */ 22681 WL_IFSTATS_XTLV_SCB_ECOUNTERS = 0x103, 22682 /* Global NAN stats */ 22683 WL_IFSTATS_XTLV_NAN_STATS = 0x104, 22684 WL_IFSTATS_XTLV_CHAN_STATS = 0x105, 22685 /* TDLS state */ 22686 WL_IFSTATS_XTLV_IF_TDLS_STATE = 0x106, 22687 WL_IFSTATS_XTLV_KEY_PLUMB_INFO = 0x107, 22688 /* HE TX related stats */ 22689 WL_IFSTATS_XTLV_HE_TXMU_STATS = 0x108, 22690 22691 WL_IFSTATS_XTLV_SC_PERIODIC_STATE = 0x109, 22692 WL_IFSTATS_XTLV_WBUS_PERIODIC_STATE = 0x10A, 22693 22694 /* Per-slice information 22695 * Per-interface reporting could also include slice specific data 22696 */ 22697 /* xtlv container for reporting */ 22698 WL_IFSTATS_XTLV_WL_SLICE = 0x301, 22699 /* Per-slice AMPDU stats */ 22700 WL_IFSTATS_XTLV_WL_SLICE_TX_AMPDU_DUMP = 0x302, 22701 WL_IFSTATS_XTLV_WL_SLICE_RX_AMPDU_DUMP = 0x303, 22702 /* Per-slice BTCOEX stats */ 22703 WL_IFSTATS_XTLV_WL_SLICE_BTCOEX = 0x304, 22704 /* V11_WLCNTRS used in ecounters */ 22705 WL_IFSTATS_XTLV_WL_SLICE_V11_WLCNTRS = 0x305, 22706 /* V30_WLCNTRS Used in ecounters */ 22707 WL_IFSTATS_XTLV_WL_SLICE_V30_WLCNTRS = 0x306, 22708 /* phy,ucode,scan pwrstats */ 22709 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_PHY = 0x307, 22710 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_SCAN = 0x308, 22711 WL_IFSTATS_XTLV_WL_SLICE_PWRSTATS_WAKE_V2 = 0x309, 22712 /* Per-slice LTECOEX stats */ 22713 WL_IFSTATS_XTLV_WL_SLICE_LTECOEX = 0x30A, 22714 /* TVPM ecounters */ 22715 WL_IFSTATS_XTLV_WL_SLICE_TVPM = 0x30B, 22716 /* TDMTX ecounters */ 22717 WL_IFSTATS_XTLV_WL_SLICE_TDMTX = 0x30C, 22718 /* Slice specific state capture in periodic fasion */ 22719 WL_SLICESTATS_XTLV_PERIODIC_STATE = 0x30D, 22720 WL_SLICESTATS_XTLV_HIST_TX_STATS = 0x30E, 22721 WL_SLICESTATS_XTLV_HIST_RX_STATS = 0x30F, 22722 /* TX histograms */ 22723 WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS = 0x310, 22724 /* TX queue depth */ 22725 WL_STATS_XTLV_WL_SLICE_TX_QUEUE_DEPTH = 0x311, 22726 /* Latency instrumentation debug */ 22727 WL_STATS_XTLV_WL_QUEUE_STOP = 0x312, 22728 /* Beamforming counters */ 22729 WL_IFSTATS_XTLV_WL_SLICE_TXBF = 0x313, 22730 /* Per-slice BTCOEX task duration stats */ 22731 WL_IFSTATS_XTLV_WL_SLICE_BTCOEX_TSKDUR_STATS = 0x314, 22732 /* Per-slice RC1 COEX (NR5G Coex) stats */ 22733 WL_IFSTATS_XTLV_WL_SLICE_NR5GCX = 0x315, 22734 /* Per-slice RC1 COEX (RC1 Coex) stats for trunk and future branches */ 22735 WL_IFSTATS_XTLV_WL_SLICE_RC1CX = 0x315, 22736 /* Per-slice sta offload stats */ 22737 WL_IFSTATS_XTLV_WL_SLICE_STA_OFLD_STATS = 0x316, 22738 /* Per-Slice [only aux] btcec sc stats */ 22739 WL_IFSTATS_XTLV_WL_SLICE_BTCEC_PERIODIC_STATS = 0x317, 22740 /* Per-Slice sc lq stats */ 22741 WL_IFSTATS_XTLV_SC_CHANIM_PERIODIC_STATS = 0x318, 22742 /* Per-slice RC2 COEX stats */ 22743 WL_IFSTATS_XTLV_WL_SLICE_RC2CX = 0x319, 22744 22745 /* Per-interface */ 22746 /* XTLV container for reporting */ 22747 WL_IFSTATS_XTLV_IF = 0x501, 22748 /* Generic stats applicable to all IFs */ 22749 WL_IFSTATS_XTLV_GENERIC = 0x502, 22750 /* Infra specific */ 22751 WL_IFSTATS_XTLV_INFRA_SPECIFIC = 0x503, 22752 /* MGT counters infra and softAP */ 22753 WL_IFSTATS_XTLV_MGT_CNT = 0x504, 22754 /* AMPDU stats on per-IF */ 22755 WL_IFSTATS_XTLV_AMPDU_DUMP = 0x505, 22756 WL_IFSTATS_XTLV_IF_SPECIFIC = 0x506, 22757 22758 #ifdef WLAWDL 22759 WL_IFSTATS_XTLV_WL_PWRSTATS_AWDL = 0x507, 22760 #endif /* WLAWDL */ 22761 22762 WL_IFSTATS_XTLV_IF_LQM = 0x508, 22763 /* Interface specific state capture in periodic fashion */ 22764 WL_IFSTATS_XTLV_IF_PERIODIC_STATE = 0x509, 22765 /* Event statistics on per-IF */ 22766 WL_IFSTATS_XTLV_IF_EVENT_STATS = 0x50A, 22767 /* Infra HE specific */ 22768 WL_IFSTATS_XTLV_INFRA_SPECIFIC_HE = 0x50B, 22769 /* Roam statistics */ 22770 WL_IFSTATS_XTLV_ROAM_STATS_PERIODIC = 0x50C, 22771 WL_IFSTATS_XTLV_ROAM_STATS_EVENT = 0x50D, 22772 /* ecounters for nan */ 22773 /* nan slot stats */ 22774 WL_IFSTATS_XTLV_NAN_SLOT_STATS = 0x601, 22775 /* Ecounters for NDP session status */ 22776 WL_STATS_XTLV_NDP_SESSION_STATUS = 0x602, 22777 /* NAN disc frame status ecounters */ 22778 WL_STATS_XTLV_NAN_DISC_FRM_STATUS = 0x603 22779 }; 22780 22781 /* current version of wl_stats_report_t structure for request */ 22782 #define WL_STATS_REPORT_REQUEST_VERSION_V2 2 22783 22784 /* current version of wl_stats_report_t structure for response */ 22785 #define WL_STATS_REPORT_RESPONSE_VERSION_V2 2 22786 22787 /** Top structure of if_counters IOVar buffer */ 22788 typedef struct wl_stats_report { 22789 uint16 version; /**< see version definitions above */ 22790 uint16 length; /**< length of data including all paddings. */ 22791 uint8 data []; /**< variable length payload: 22792 * 1 or more bcm_xtlv_t type of tuples. 22793 * each tuple is padded to multiple of 4 bytes. 22794 * 'length' field of this structure includes all paddings. 22795 */ 22796 } wl_stats_report_t; 22797 22798 /* interface specific mgt count */ 22799 #define WL_MGT_STATS_VERSION_V1 1 22800 /* Associated stats type: WL_IFSTATS_MGT_CNT */ 22801 typedef struct { 22802 uint16 version; 22803 uint16 length; 22804 22805 /* detailed control/management frames */ 22806 uint32 txnull; 22807 uint32 rxnull; 22808 uint32 txqosnull; 22809 uint32 rxqosnull; 22810 uint32 txassocreq; 22811 uint32 rxassocreq; 22812 uint32 txreassocreq; 22813 uint32 rxreassocreq; 22814 uint32 txdisassoc; 22815 uint32 rxdisassoc; 22816 uint32 txassocrsp; 22817 uint32 rxassocrsp; 22818 uint32 txreassocrsp; 22819 uint32 rxreassocrsp; 22820 uint32 txauth; 22821 uint32 rxauth; 22822 uint32 txdeauth; 22823 uint32 rxdeauth; 22824 uint32 txprobereq; 22825 uint32 rxprobereq; 22826 uint32 txprobersp; 22827 uint32 rxprobersp; 22828 uint32 txaction; 22829 uint32 rxaction; 22830 uint32 txpspoll; 22831 uint32 rxpspoll; 22832 } wl_if_mgt_stats_t; 22833 22834 /* This structure (wl_if_infra_stats_t) is deprecated in favour of 22835 * versioned structure (wl_if_infra_enh_stats_vxxx_t) defined below 22836 */ 22837 #define WL_INFRA_STATS_VERSION_V1 1 22838 /* Associated stats type: WL_IFSTATS_INFRA_SPECIFIC */ 22839 typedef struct wl_infra_stats { 22840 uint16 version; /**< version of the structure */ 22841 uint16 length; 22842 uint32 rxbeaconmbss; 22843 uint32 tbtt; 22844 } wl_if_infra_stats_t; 22845 22846 /* Starting the versioned structure with version as 2 to distinguish 22847 * between legacy unversioned structure 22848 */ 22849 #define WL_INFRA_ENH_STATS_VERSION_V2 2u 22850 /* Associated stats type: WL_IFSTATS_INFRA_SPECIFIC */ 22851 typedef struct wl_infra_enh_stats_v2 { 22852 uint16 version; /**< version of the structure */ 22853 uint16 length; 22854 uint32 rxbeaconmbss; 22855 uint32 tbtt; 22856 uint32 tim_mcast_ind; /**< number of beacons with tim bits indicating multicast data */ 22857 uint32 tim_ucast_ind; /**< number of beacons with tim bits indicating unicast data */ 22858 } wl_if_infra_enh_stats_v2_t; 22859 22860 #define WL_INFRA_STATS_HE_VERSION_V1 (1u) 22861 /* Associated stats type: WL_IFSTATS_INFRA_SPECIFIC_HE */ 22862 typedef struct wl_infra_stats_he { 22863 uint16 version; /**< version of the structure */ 22864 uint16 length; 22865 uint32 PAD; /**< Explicit padding */ 22866 22867 /* DL SU MPDUs and total number of bytes */ 22868 uint64 dlsu_mpdudata; 22869 uint64 dlsu_mpdu_bytes; 22870 22871 /* DL MUMIMO MPDUs and total number of bytes */ 22872 uint64 dlmumimo_mpdudata; 22873 uint64 dlmumimo_mpdu_bytes; 22874 22875 /* DL OFDMA MPDUs and total number of bytes */ 22876 uint64 dlofdma_mpdudata; 22877 uint64 dlofdma_mpdu_bytes; 22878 22879 /* UL SU MPDUs and total number of bytes */ 22880 uint64 ulsu_mpdudata; 22881 uint64 ulsu_mpdu_bytes; 22882 22883 /* ULOFDMA MPSUs and total number of bytes */ 22884 uint64 ulofdma_mpdudata; 22885 uint64 ulofdma_mpdu_bytes; 22886 } wl_if_infra_stats_he_t; 22887 22888 #define LTECOEX_STATS_VER 1 22889 22890 typedef struct wlc_ltecoex_stats { 22891 uint16 version; /**< WL_IFSTATS_XTLV_WL_SLICE_LTECOEX */ 22892 uint16 len; /* Length of wl_ltecx_stats structure */ 22893 uint8 slice_index; /* Slice unit of wl_ltecx_stats structure */ 22894 uint8 pad[3]; /* Padding */ 22895 /* LTE noise based eCounters Bins 22896 cumulative the wl_cnt_wlc_t and wl_ctl_mgt_cnt_t 22897 counter information based on LTE Coex interference level 22898 */ 22899 uint32 txframe_no_LTE; /* txframe counter in no LTE Coex case */ 22900 uint32 rxframe_no_LTE; /* rxframe counter in no LTE Coex case */ 22901 uint32 rxrtry_no_LTE; /* rxrtry counter in no LTE Coex case */ 22902 uint32 txretrans_no_LTE; /* txretrans counter in no LTE Coex case */ 22903 uint32 txnocts_no_LTE; /* txnocts counter in no LTE Coex case */ 22904 uint32 txrts_no_LTE; /* txrts counter in no LTE Coex case */ 22905 uint32 txdeauth_no_LTE; /* txdeauth counter in no LTE Coex case */ 22906 uint32 txassocreq_no_LTE; /* txassocreq counter in no LTE Coex case */ 22907 uint32 txassocrsp_no_LTE; /* txassocrsp counter in no LTE Coex case */ 22908 uint32 txreassocreq_no_LTE; /* txreassocreq counter in no LTE Coex case */ 22909 uint32 txreassocrsp_no_LTE; /* txreassocrsp counter in no LTE Coex case */ 22910 uint32 txframe_light_LTE; /* txframe counter in light LTE Coex case */ 22911 uint32 txretrans_light_LTE; /* txretrans counter in light LTE Coex case */ 22912 uint32 rxframe_light_LTE; /* rxframe counter in light LTE Coex case */ 22913 uint32 rxrtry_light_LTE; /* rxrtry counter in light LTE Coex case */ 22914 uint32 txnocts_light_LTE; /* txnocts counter in light LTE Coex case */ 22915 uint32 txrts_light_LTE; /* txrts counter in light LTE Coex case */ 22916 uint32 txdeauth_light_LTE; /* txdeauth counter in light LTE Coex case */ 22917 uint32 txassocreq_light_LTE; /* txassocreq counter in light LTE Coex case */ 22918 uint32 txassocrsp_light_LTE; /* txassocrsp counter in light LTE Coex case */ 22919 uint32 txreassocreq_light_LTE; /* txreassocreq counter in light LTE Coex case */ 22920 uint32 txreassocrsp_light_LTE; /* txreassocrsp counter in light LTE Coex case */ 22921 uint32 txframe_heavy_LTE; /* txframe counter in heavy LTE Coex case */ 22922 uint32 txretrans_heavy_LTE; /* txretrans counter in heavy LTE Coex case */ 22923 uint32 rxframe_heavy_LTE; /* rxframe counter in heavy LTE Coex case */ 22924 uint32 rxrtry_heavy_LTE; /* rxrtry counter in heavy LTE Coex case */ 22925 uint32 txnocts_heavy_LTE; /* txnocts counter in heavy LTE Coex case */ 22926 uint32 txrts_heavy_LTE; /* txrts counter in heavy LTE Coex case */ 22927 uint32 txdeauth_heavy_LTE; /* txdeauth counter in heavy LTE Coex case */ 22928 uint32 txassocreq_heavy_LTE; /* txassocreq counter in heavy LTE Coex case */ 22929 uint32 txassocrsp_heavy_LTE; /* txassocrsp counter in heavy LTE Coex case */ 22930 uint32 txreassocreq_heavy_LTE; /* txreassocreq counter in heavy LTE Coex case */ 22931 uint32 txreassocrsp_heavy_LTE; /* txreassocrsp counter in heavy LTE Coex case */ 22932 22933 /* LTE specific ecounters */ 22934 uint16 type4_txinhi_dur; /* Duration of tx inhibit(in ms) due to Type4 */ 22935 uint16 type4_nonzero_cnt; /* Counts of none zero Type4 msg */ 22936 uint16 type4_timeout_cnt; /* Counts of Type4 timeout */ 22937 uint16 rx_pri_dur; /* Duration of wlan_rx_pri assertions */ 22938 uint16 rx_pri_cnt; /* Count of wlan_rx_pri assertions */ 22939 uint16 type6_dur; /* duration of LTE Tx power limiting assertions */ 22940 uint16 type6_cnt; /* Count of LTE Tx power limiting assertions */ 22941 uint16 ts_prot_frm_cnt; /* count of WLAN protection frames triggered by LTE coex */ 22942 uint16 ts_gr_cnt; /* count of intervals granted to WLAN in timesharing */ 22943 uint16 ts_gr_dur; /* duration granted to WLAN in timesharing */ 22944 } wlc_ltecoex_stats_t; 22945 22946 #define CSA_EVT_CSA_RXED (1 << 0) 22947 #define CSA_EVT_CSA_TIMEOUT (1 << 1) 22948 #define CSA_EVT_FROM_INFRA (1 << 2) 22949 typedef struct csa_event_data { 22950 chanspec_t chan_old; 22951 dot11_ext_csa_ie_t ecsa; 22952 dot11_mesh_csp_ie_t mcsp; 22953 dot11_wide_bw_chan_switch_ie_t wbcs; 22954 uint8 flags; 22955 uint8 pad[3]; 22956 } csa_event_data_t; 22957 22958 /* ifdef (WL_ASSOC_BCN_RPT) */ 22959 enum wl_bcn_report_cmd_id { 22960 WL_BCN_RPT_CMD_VER = 0, 22961 WL_BCN_RPT_CMD_CONFIG = 1, 22962 WL_BCN_RPT_CMD_VENDOR_IE = 2, 22963 WL_BCN_RPT_CMD_LAST 22964 }; 22965 22966 /* beacon report specific macros */ 22967 #define WL_BCN_RPT_CCX_IE_OVERRIDE (1u << 0) 22968 22969 /* beacon report specific macros */ 22970 #define WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE (1u << 1) 22971 #define WL_BCN_RPT_ASSOC_SCAN_SOLICITED_MODE (1u << 2) 22972 #define WL_BCN_RPT_ASSOC_SCAN_MODE_SHIFT (1) 22973 #define WL_BCN_RPT_ASSOC_SCAN_MODE_MASK (WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE |\ 22974 WL_BCN_RPT_ASSOC_SCAN_SOLICITED_MODE) 22975 #define WL_BCN_RPT_ASSOC_SCAN_MODE_MAX (WL_BCN_RPT_ASSOC_SCAN_MODE_MASK >> \ 22976 WL_BCN_RPT_ASSOC_SCAN_MODE_SHIFT) 22977 /* beacon report mode specific macro */ 22978 #define WL_BCN_RPT_ASSOC_SCAN_MODE_DEFAULT WL_BCN_RPT_ASSOC_SCAN_UNSOLICITED_MODE 22979 22980 /* beacon report timeout config specific macros */ 22981 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_DEFAULT (120000) 22982 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_MIN (60000) 22983 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_TIMEOUT_MAX (0xFFFFFFFF) 22984 22985 /* beacon report cache count specific macros */ 22986 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MIN (0) 22987 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MAX (8) 22988 #define WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_DEFAULT (WL_BCN_RPT_ASSOC_SCAN_CACHE_COUNT_MAX) 22989 22990 #define WL_BCN_REPORT_CMD_VERSION 1 22991 struct wl_bcn_report_cfg { 22992 uint32 flags; /**< Flags that defines the operation/setting information */ 22993 uint32 scan_cache_timeout; /**< scan cache timeout value in millisec */ 22994 uint32 scan_cache_timer_pend; /**< Read only pending time for timer expiry in millisec */ 22995 uint8 scan_cache_cnt; /**< scan cache count */ 22996 }; 22997 22998 /* endif (WL_ASSOC_BCN_RPT) */ 22999 23000 /* Thermal, Voltage, and Power Mitigation */ 23001 #define TVPM_REQ_VERSION_1 1 23002 #define TVPM_REQ_CURRENT_VERSION TVPM_REQ_VERSION_1 23003 23004 /* tvpm iovar data */ 23005 typedef struct { 23006 uint16 version; /* TVPM request version */ 23007 uint16 length; /* Length of the entire structure */ 23008 23009 uint16 req_type; /* Request type: wl_tvpm_req_type_t */ 23010 uint16 req_len; /* Length of the following value */ 23011 uint8 value[]; /* Variable length data depending on req_type */ 23012 } wl_tvpm_req_t; 23013 23014 /* tvpm iovar request types */ 23015 typedef enum { 23016 WL_TVPM_REQ_CLTM_INDEX, /* req_value: uint32, range 1...100 */ 23017 WL_TVPM_REQ_PPM_INDEX, /* req_value: uint32, range 1...100 */ 23018 WL_TVPM_REQ_ENABLE, /* req_value: uint32, range 0...1 */ 23019 WL_TVPM_REQ_STATUS, /* req_value: none */ 23020 WL_TVPM_REQ_PERIOD, /* req_value: int32, range {-1,1-10} */ 23021 WL_TVPM_REQ_TXDC, /* req_value: uint32, range 1...100 */ 23022 WL_TVPM_REQ_MAX 23023 } wl_tvpm_req_type_t; 23024 23025 /* structure for data returned by request type WL_TVPM_REQ_STATUS */ 23026 typedef struct wl_tvpm_status { 23027 uint16 enable; /* whether TVPM is enabled */ 23028 uint16 tx_dutycycle; /* a percentage: 1-100 */ 23029 int16 tx_power_backoff; /* 0...-6 */ 23030 uint16 num_active_chains; /* 1...3 */ 23031 int16 temp; /* local temperature in degrees C */ 23032 uint8 vbat; /* local voltage in units of 0.1V */ 23033 uint8 pad; 23034 } wl_tvpm_status_t; 23035 23036 /* TVPM ecounters */ 23037 typedef struct wl_tvpm_ecounters_t { 23038 uint16 version; /* version field */ 23039 uint16 length; /* byte length in wl_tvpm_ecounters_t starting at version */ 23040 uint16 tx_dutycycle; /* a percentage: 1-100 */ 23041 int16 tx_power_backoff; /* 0...-6 */ 23042 uint16 num_active_chains; /* 1...3 */ 23043 int16 temp; /* local temperature */ 23044 uint8 vbat; /* local voltage */ 23045 uint8 cltm; /* CLTM index */ 23046 uint8 ppm; /* PPM index */ 23047 uint8 pad; /* pad to align to uint16 */ 23048 } wl_tvpm_ecounters_t; 23049 23050 #define TDMTX_ECOUNTERS_VERSION_V1 1 23051 #define TDMTX_ECOUNTERS_VERSION_V2 2 23052 23053 /* TDMTX ecounters */ 23054 typedef struct wl_tdmtx_ecounters_v1 { 23055 uint16 version; /* version field */ 23056 uint16 length; /* byte length in wl_tdmtx_ecounters_t starting at version */ 23057 uint32 txa_on; /* TXA on requests */ 23058 uint32 txa_tmcnt; /* Total number of TXA timeout */ 23059 uint32 por_on; /* TXA POR requests */ 23060 uint32 txpuen; /* Path enable requests */ 23061 uint32 txpudis; /* Total number of times Tx path is muted on the slice */ 23062 uint32 txpri_on; /* Total number of times Tx priority was obtained by the slice */ 23063 uint32 txdefer; /* Total number of times Tx was deferred by the slice */ 23064 uint32 txmute; /* Total number of times active Tx muted on the slice */ 23065 uint32 actpwrboff; /* Total number of times TX power is backed off by the slice */ 23066 uint32 txa_dur; /* Total time txa on */ 23067 uint32 txpri_dur; /* Total time TXPri */ 23068 uint32 txdefer_dur; /* Total time txdefer */ 23069 } wl_tdmtx_ecounters_v1_t; 23070 23071 /* TDMTX ecounters for version 2 */ 23072 typedef struct wl_tdmtx_ecounters_v2 { 23073 uint16 version; /* version field */ 23074 uint16 length; /* byte length in wl_tdmtx_ecounters_t starting at version */ 23075 uint32 txa_on; /* TXA on requests */ 23076 uint32 txa_tmcnt; /* Total number of TXA timeout */ 23077 uint32 porhi_on; /* TXA PORHI requests */ 23078 uint32 porlo_on; /* TXA PORLO requests */ 23079 uint32 txpuen; /* Path enable requests */ 23080 uint32 txpudis; /* Total number of times Tx path is muted on the slice */ 23081 uint32 txpri_on; /* Total number of times Tx priority was obtained by the slice */ 23082 uint32 txdefer; /* Total number of times Tx was deferred by the slice */ 23083 uint32 txmute; /* Total number of times active Tx muted on the slice */ 23084 uint32 actpwrboff; /* Total number of times TX power is backed off by the slice */ 23085 uint32 txa_dur; /* Total time txa on */ 23086 uint32 txpri_dur; /* Total time TXPri */ 23087 uint32 txdefer_dur; /* Total time txdefer */ 23088 } wl_tdmtx_ecounters_v2_t; 23089 23090 /* Note: if this struct is changing update wl_scb_ecounters_vX_t version, 23091 * as this struct is sent as payload in wl_scb_ecounters_vX_t 23092 */ 23093 typedef struct wlc_scb_stats_v1 { 23094 uint32 tx_pkts; /* num of packets transmitted (ucast) */ 23095 uint32 tx_failures; /* num of packets failed */ 23096 uint32 rx_ucast_pkts; /* num of unicast packets received */ 23097 uint32 rx_mcast_pkts; /* num of multicast packets received */ 23098 uint32 tx_rate; /* Rate of last successful tx frame */ 23099 uint32 rx_rate; /* Rate of last successful rx frame */ 23100 uint32 rx_decrypt_succeeds; /* num of packets decrypted successfully */ 23101 uint32 rx_decrypt_failures; /* num of packets decrypted unsuccessfully */ 23102 uint32 tx_mcast_pkts; /* num of mcast pkts txed */ 23103 uint64 tx_ucast_bytes; /* data bytes txed (ucast) */ 23104 uint64 tx_mcast_bytes; /* data bytes txed (mcast) */ 23105 uint64 rx_ucast_bytes; /* data bytes recvd ucast */ 23106 uint64 rx_mcast_bytes; /* data bytes recvd mcast */ 23107 uint32 tx_pkts_retried; /* num of packets where a retry was necessary */ 23108 uint32 tx_pkts_retry_exhausted; /* num of packets where a retry was exhausted */ 23109 uint32 tx_rate_mgmt; /* Rate of last transmitted management frame */ 23110 uint32 tx_rate_fallback; /* last used lowest fallback TX rate */ 23111 uint32 rx_pkts_retried; /* # rx with retry bit set */ 23112 uint32 tx_pkts_total; /* total num of tx pkts */ 23113 uint32 tx_pkts_retries; /* total num of tx retries */ 23114 uint32 tx_pkts_fw_total; /* total num of tx pkts generated from fw */ 23115 uint32 tx_pkts_fw_retries; /* num of fw generated tx pkts retried */ 23116 uint32 tx_pkts_fw_retry_exhausted; /* num of fw generated tx pkts where retry exhausted */ 23117 } wlc_scb_stats_v1_t; 23118 23119 /* ecounters for scb stats 23120 * XTLV ID: WL_IFSTATS_XTLV_SCB_ECOUNTERS 23121 */ 23122 23123 #define WL_SCB_ECOUNTERS_VERSION_1 1 23124 #define WL_SCB_ECOUNTERS_VERSION_2 2 23125 23126 typedef struct wl_scb_ecounters_v1 { 23127 uint16 version; /* version field */ 23128 uint16 length; /* struct length starting from version */ 23129 uint32 chanspec; /* current chanspec where scb is operating */ 23130 struct ether_addr ea; /* peer ndi or sta ea */ 23131 uint8 peer_type; /* peer type */ 23132 uint8 pad; 23133 23134 /* scb tx and rx stats */ 23135 wlc_scb_stats_v1_t stats; 23136 } wl_scb_ecounters_v1_t; 23137 23138 typedef struct wl_scb_ecounters_v2 { 23139 uint16 version; /* version field */ 23140 uint16 length; /* struct length starting from version */ 23141 uint32 chanspec; /* current chanspec where scb is operating */ 23142 struct ether_addr ea; /* peer ndi or sta ea */ 23143 uint8 peer_type; /* peer type */ 23144 uint8 pad; 23145 23146 /* scb tx and rx stats */ 23147 uint16 tx_rate; /* Rate(in Mbps) of last successful tx frame */ 23148 uint16 rx_rate; /* Rate(in Mbps) of last successful rx frame */ 23149 uint16 tx_rate_fallback; /* last used lowest fallback TX rate(in Mbps) */ 23150 uint16 pad1; 23151 uint32 rx_decrypt_succeeds; /* num of packets decrypted successfully */ 23152 uint32 rx_decrypt_failures; /* num of packets decrypted unsuccessfully */ 23153 uint32 rx_pkts_retried; /* # rx with retry bit set */ 23154 uint32 tx_pkts_retries; /* total num of tx retries */ 23155 uint32 tx_failures; /* num of packets failed */ 23156 uint32 tx_pkts_total; /* total num of tx pkts */ 23157 int8 rssi[WL_STA_ANT_MAX]; /* average rssi per antenna of data frames */ 23158 } wl_scb_ecounters_v2_t; 23159 23160 /* ecounters for nan slot stats 23161 * XTLV ID: WL_IFSTATS_XTLV_NAN_SLOT_STATS 23162 */ 23163 23164 #define WL_NAN_SLOT_ECOUNTERS_VERSION_1 1 23165 #define WL_NAN_SLOT_ECOUNTERS_VERSION_2 2 23166 #define WL_NAN_SLOT_ECOUNTERS_VERSION_3 3 23167 23168 typedef struct wl_nan_slot_ecounters_v1 { 23169 uint16 version; /* version field */ 23170 uint16 length; /* struct length starting from version */ 23171 uint32 chan[NAN_MAX_BANDS]; /* cur nan slot chanspec of both bands */ 23172 uint16 cur_slot_idx; /* cur nan slot index */ 23173 uint16 pad; 23174 nan_sched_stats_t sched; /* sched stats */ 23175 wl_nan_mac_stats_t mac; /* mac stats */ 23176 } wl_nan_slot_ecounters_v1_t; 23177 23178 typedef struct wl_nan_slot_ecounters_v2 { 23179 uint16 version; /* version field */ 23180 uint16 length; /* struct length starting from version */ 23181 uint32 chan[NAN_MAX_BANDS]; /* cur nan slot chanspec of both bands */ 23182 uint16 cur_slot_idx; /* cur nan slot index */ 23183 uint16 pad; 23184 nan_sched_stats_t sched; /* sched stats */ 23185 wl_nan_mac_stats_t mac; /* mac stats */ 23186 /* for v2 */ 23187 uint16 bcn_rx_drop_rssi; /* Beacon received but ignored due to weak rssi */ 23188 uint16 bcn_rx_drop_rssi_5g; /* 5G Beacon received but ignored due to weak rssi */ 23189 uint16 cnt_rssi_close; /* cnt of beacon rssi > rssi_close received */ 23190 uint16 cnt_rssi_close_5g; /* cnt of 5G beacon rssi > rssi_close received */ 23191 uint16 cnt_rssi_mid; /* cnt of beacon rssi > rssi_middle received */ 23192 uint16 cnt_rssi_mid_5g; /* cnt of 5G beacon rssi > rssi_middle received */ 23193 uint16 bcn_txfail; /* Beacon sending failure count */ 23194 uint16 bcn_txfail_5g; /* sending 5G beacon failure count */ 23195 } wl_nan_slot_ecounters_v2_t; 23196 23197 typedef struct wl_nan_slot_ecounters_v3 { 23198 uint16 version; /* version field */ 23199 uint16 length; /* struct length starting from version */ 23200 uint32 chan[NAN_MAX_BANDS]; /* cur nan slot chanspec of both bands */ 23201 uint16 cur_slot_idx; /* cur nan slot index */ 23202 uint16 pad; 23203 nan_sched_stats_t sched; /* sched stats */ 23204 /* for v3 */ 23205 wl_nan_mac_stats_v1_t mac; /* mac stats */ 23206 uint16 bcn_rx_drop_rssi; /* Beacon received but ignored due to weak rssi */ 23207 uint16 bcn_rx_drop_rssi_5g; /* 5G Beacon received but ignored due to weak rssi */ 23208 uint16 cnt_rssi_close; /* cnt of beacon rssi > rssi_close received */ 23209 uint16 cnt_rssi_close_5g; /* cnt of 5G beacon rssi > rssi_close received */ 23210 uint16 cnt_rssi_mid; /* cnt of beacon rssi > rssi_middle received */ 23211 uint16 cnt_rssi_mid_5g; /* cnt of 5G beacon rssi > rssi_middle received */ 23212 uint16 bcn_txfail; /* Beacon sending failure count */ 23213 uint16 bcn_txfail_5g; /* sending 5G beacon failure count */ 23214 } wl_nan_slot_ecounters_v3_t; 23215 23216 /* WL_STATS_XTLV_NDP_SESSION_STATUS for ecounters */ 23217 #define WL_NAN_SESSION_STATUS_EC_VERSION_1 1 23218 typedef struct wl_nan_ndp_session_status_v1_s { 23219 uint16 version; /* version field */ 23220 uint16 length; /* struct length starting from version */ 23221 uint8 role; /* Role of NAN device */ 23222 uint8 ndp_id; /* local NDP ID */ 23223 uint8 state; /* NDP state */ 23224 uint8 nan_sec_csid; /* security csid */ 23225 struct ether_addr lndi_addr; /* Local NDI addr */ 23226 struct ether_addr pnmi_addr; /* Peer NMI addr */ 23227 struct ether_addr pndi_addr; /* Peer NDI addr */ 23228 uint8 dpe_state; /* DPE state to know where timeout/dpend has come */ 23229 uint8 pad; 23230 } wl_nan_ndp_session_status_v1_t; 23231 23232 /* WL_STATS_XTLV_NAN_DISC_FRM_STATUS for ecounters */ 23233 #define WL_NAN_DISC_FRM_STATUS_EC_VERSION_1 1 23234 typedef struct wl_nan_disc_frame_status_v1_s { 23235 uint16 version; /* version field */ 23236 uint16 length; /* struct length starting from version */ 23237 uint8 type; /* wl_nan_frame_type_t */ 23238 uint8 status; /* For TX status, success or failure */ 23239 uint8 reason_code; /* to identify reason when status is failure */ 23240 uint8 inst_id; /* Publish or subscribe instance id */ 23241 uint8 req_id; /* Requestor instance id */ 23242 uint8 pad; 23243 uint16 token; /* seq num to keep track of pkts sent by host */ 23244 } wl_nan_disc_frame_status_v1_t; 23245 23246 typedef struct wl_nan_oob_af { 23247 uint64 bitmap; /* 16 TU slots in 1024 TU window */ 23248 struct ether_addr sa; /* Optional SA. Default set to NMI */ 23249 struct ether_addr da; 23250 struct ether_addr bssid; 23251 bool secured; /* Optional. Default set to 0 (Open) */ 23252 uint8 map_id; /* Host selected map id. Default 0 */ 23253 uint16 timeout; /* OOB AF session timeout in milliseconds */ 23254 uint16 pad[3]; /* Structure padding. Can be used in future */ 23255 uint16 token; /* host generated. Used by FW in TX status event */ 23256 uint16 payload_len; 23257 uint8 payload[]; /* AF hdr + NAN attrbutes in TLV format */ 23258 } wl_nan_oob_af_t; 23259 23260 /* 23261 * BT log definitions 23262 */ 23263 23264 /* common iovar struct */ 23265 typedef struct wl_btl { 23266 uint16 subcmd_id; /* subcommand id */ 23267 uint16 len; /* total length of data[] */ 23268 uint8 data[2]; /* subcommand data, variable length */ 23269 } wl_btl_t; 23270 23271 /* subcommand ids */ 23272 #define WL_BTL_SUBCMD_ENABLE 0 /* enable/disable logging */ 23273 #define WL_BTL_SUBCMD_STATS 1 /* statistics */ 23274 23275 /* WL_BTL_SUBCMD_ENABLE data */ 23276 typedef struct wl_blt_enable { 23277 uint8 enable; /* 1 - enable, 0 - disable */ 23278 uint8 pad[3]; /* 4-byte struct alignment */ 23279 } wl_btl_enable_t; 23280 23281 /* WL_BTL_SUBCMD_STATS data */ 23282 typedef struct wl_blt_stats { 23283 uint32 bt_interrupt; /* num BT interrupts */ 23284 uint32 config_req; /* num CONFIG_REQ */ 23285 uint32 config_res_success; /* num CONFIG_RES successful */ 23286 uint32 config_res_fail; /* num CONFIG_RES failed */ 23287 uint32 log_req; /* num LOG_REQ */ 23288 uint32 log_res_success; /* num LOG_RES successful */ 23289 uint32 log_res_fail; /* num LOG_RES failed */ 23290 uint32 indirect_read_fail; /* num indirect read fail */ 23291 uint32 indirect_write_fail; /* num indirect write fail */ 23292 uint32 dma_fail; /* num DMA failed */ 23293 uint32 min_log_req_duration; /* min log request duration in usec */ 23294 uint32 max_log_req_duration; /* max log request duration in usec */ 23295 uint16 mem_dump_req; /* num mem dump requests */ 23296 uint16 mem_dump_success; /* num mem dumps successful */ 23297 uint16 mem_dump_fail; /* num mem dumps failed */ 23298 uint16 bt_wake_success; /* num BT wakes successful */ 23299 uint16 bt_wake_fail; /* num BT wakes failed */ 23300 uint16 mem_dump_req_interrupt; /* num MEM_DUMP_REQ interrupt */ 23301 uint16 mem_dump_res_interrupt; /* num MEM_DUMP_RES interrupt */ 23302 uint16 mem_dump_res_timeout; /* num MEM_DUMP_RES timeout */ 23303 uint16 mem_dump_proc_no_bt_ready; /* num proceed if no BT ready */ 23304 uint16 mem_dump_proc_no_bt_response; /* num proceed if no BT response */ 23305 uint16 mem_dump_proc_no_bt_clock; /* num proceed if no BT clock */ 23306 uint16 pad; /* alignment */ 23307 uint32 last_failed_region; /* start addr of last failed region */ 23308 uint32 min_mem_dump_duration; /* min mem dump duration in usec */ 23309 uint32 max_mem_dump_duration; /* max mem dump duration in usec */ 23310 } wl_btl_stats_t; 23311 23312 /* IOV AWD DATA */ 23313 23314 /* AWD DATA structures */ 23315 typedef struct { 23316 uint8 version; /* Extended trap version info */ 23317 uint8 reserved; /* currently unused */ 23318 uint16 length; /* Length of data excluding this header */ 23319 uint8 data[]; /* this data is TLV of tags */ 23320 } awd_data_v1_t; 23321 23322 /* AWD TAG structure */ 23323 typedef struct { 23324 uint8 tagid; /* one of AWD DATA TAGs numbers */ 23325 uint8 length; /* the data size represented by this field must be aligned to 32 bits */ 23326 uint8 data[]; /* variable size, defined by length field */ 23327 } awd_tag_data_v1_t; 23328 23329 /* IOV ETD DATA */ 23330 23331 /* ETD DATA structures */ 23332 typedef struct { 23333 uint8 version; /* Extended trap version info */ 23334 uint8 reserved; /* currently unused */ 23335 uint16 length; /* Length of data excluding this header */ 23336 uint8 data[]; /* this data is TLV of tags */ 23337 } etd_data_v1_t; 23338 23339 /* ETD TAG structure */ 23340 typedef struct { 23341 uint8 tagid; /* one of ETD DATA TAGs numbers */ 23342 uint8 length; /* the data size represented by this field must be aligned to 32 bits */ 23343 uint8 data[]; /* variable size, defined by length field */ 23344 } etd_tag_data_v1_t; 23345 23346 /* ETD information structures associated with ETD_DATA_Tags */ 23347 /* ETD_JOIN_CLASSIFICATION_INFO 10 */ 23348 typedef struct { 23349 uint8 assoc_type; /* assoc type */ 23350 uint8 assoc_state; /* current state of assoc state machine */ 23351 uint8 wpa_state; /* wpa->state */ 23352 uint8 wsec_portopen; /* shows if security port is open */ 23353 uint8 total_attempts_num; /* total number of join attempts (bss_retries) */ 23354 uint8 num_of_targets; /* up to 3, in current design */ 23355 uint8 reserved [2]; /* padding to get 32 bits alignment */ 23356 uint32 wsec; /* bsscfg->wsec */ 23357 uint32 wpa_auth; /* bsscfg->WPA_auth */ 23358 uint32 time_to_join; /* time duration to process WLC_SET_SSID request (ms) */ 23359 } join_classification_info_v1_t; 23360 23361 /* ETD_JOIN_TARGET_CLASSIFICATION_INFO 11 */ 23362 typedef struct { 23363 int8 rssi; /* RSSI on current channel */ 23364 uint8 cca; /* CCA on current channel */ 23365 uint8 channel; /* current channel */ 23366 uint8 num_of_attempts; /* (bss_retries) up to 5 */ 23367 uint8 oui[3]; /* the first three octets of the AP's address */ 23368 uint8 reserved; /* padding to get 32 bits alignment */ 23369 uint32 time_duration; /* time duration of current attempt (ms) */ 23370 } join_target_classification_info_v1_t; 23371 23372 /* ETD_ASSOC_STATE 12 */ 23373 typedef struct { 23374 uint8 assoc_state; /* assoc type */ 23375 uint8 reserved [3]; /* padding to get 32 bits alignment */ 23376 } join_assoc_state_v1_t; 23377 23378 /* ETD_CHANNEL 13 tag */ 23379 typedef struct { 23380 uint8 channel; /* last attempt channel */ 23381 uint8 reserved [3]; /* padding to get 32 bits alignment */ 23382 } join_channel_v1_t; 23383 23384 /* ETD_TOTAL_NUM_OF_JOIN_ATTEMPTS 14 */ 23385 typedef struct { 23386 uint8 total_attempts_num; /* total number of join attempts (bss_retries) */ 23387 uint8 reserved [3]; /* padding to get 32 bits alignment */ 23388 } join_total_attempts_num_v1_t; 23389 23390 /* IOV_ROAM_CACHE structures */ 23391 23392 enum wl_rmc_report_cmd_id { 23393 WL_RMC_RPT_CMD_VER = 0, 23394 WL_RMC_RPT_CMD_DATA = 1, 23395 WL_RMC_RPT_CMD_LAST 23396 }; 23397 23398 enum wl_rmc_report_xtlv_id { 23399 WL_RMC_RPT_XTLV_VER = 0x0, 23400 WL_RMC_RPT_XTLV_BSS_INFO = 0x1, 23401 WL_RMC_RPT_XTLV_CANDIDATE_INFO = 0x2, 23402 WL_RMC_RPT_XTLV_USER_CACHE_INFO = 0x3 23403 }; 23404 23405 /* WL_RMC_RPT_XTLV_BSS_INFO */ 23406 typedef struct { 23407 int16 rssi; /* current BSS RSSI */ 23408 uint8 reason; /* reason code for last full scan */ 23409 uint8 status; /* last status code for not roaming */ 23410 uint32 fullscan_count; /* number of full scans performed on current BSS */ 23411 uint32 time_full_scan; /* delta time (in ms) between cur time and full scan timestamp */ 23412 } rmc_bss_info_v1_t; 23413 23414 /* WL_RMC_RPT_XTLV_CANDIDATE_INFO */ 23415 typedef struct { 23416 int16 rssi; /* last seen rssi */ 23417 uint16 ctl_channel; /* channel */ 23418 uint32 time_last_seen; /* delta time (in ms) between cur time and last seen timestamp */ 23419 uint16 bss_load; /* BSS load */ 23420 uint8 bssid [6]; /* padding to get 32 bits alignment */ 23421 } rmc_candidate_info_v1_t; 23422 23423 #define WL_FILTER_IE_VERSION 1 /* deprecated */ 23424 enum wl_filter_ie_options { 23425 WL_FILTER_IE_CLEAR = 0, /* allow element id in packet.For suboption */ 23426 WL_FILTER_IE_SET = 1, /* filter element id in packet.For suboption */ 23427 WL_FILTER_IE_LIST = 2, /* list element ID's.Set as option */ 23428 WL_FILTER_IE_CLEAR_ALL = 3, /* clear all the element.Set as option */ 23429 WL_FILTER_IE_CHECK_SUB_OPTION = 4 /* check for suboptions.Set only as option */ 23430 }; 23431 23432 typedef struct wl_filter_ie_tlv { 23433 uint16 id; /* elelment id [ + ext id ] */ 23434 uint16 len; /* sub option length + pattern length */ 23435 uint8 data[]; /* sub option + pattern matching(OUI,type,sub-type) */ 23436 } wl_filter_ie_tlv_t; 23437 23438 #define WL_FILTER_IE_VERSION_1 1 /* the latest version */ 23439 typedef struct wl_filter_ie_iov_v1 { 23440 uint16 version; /* Structure version */ 23441 uint16 len; /* Total length of the structure */ 23442 uint16 fixed_length; /* Total length of fixed fields */ 23443 uint8 option; /* Filter action - check for suboption */ 23444 uint8 pad[1]; /* Align to 4 bytes */ 23445 uint32 pktflag; /* frame type - FC_XXXX */ 23446 uint8 tlvs[]; /* variable data (zero in for list ,clearall) */ 23447 } wl_filter_ie_iov_v1_t; 23448 23449 /* Event aggregation config */ 23450 #define EVENT_AGGR_CFG_VERSION 1 23451 #define EVENT_AGGR_DISABLED 0x0 23452 #define EVENT_AGGR_ENABLED 0x1 23453 23454 #define EVENT_AGGR_BUFSIZE_MAX 1512 23455 #define EVENT_AGGR_BUFSIZE_MIN 512 23456 23457 #define EVENT_AGGR_FLUSH_TIMEOUT_DEFAULT 100 23458 #define EVENT_AGGR_FLUSH_TIMEOUT_MAX 2000 23459 #define EVENT_AGGR_NUM_EVENTS_FLUSH 5 23460 typedef struct event_aggr_config { 23461 uint16 version; 23462 uint16 len; 23463 uint16 flags; /* bit 0 to enable/disable the feature */ 23464 uint16 bufsize; /* Aggregate buffer size */ 23465 uint16 flush_timeout; /* Timeout for event flush */ 23466 uint16 num_events_flush; /* Number of events aggregated before flush */ 23467 } event_aggr_config_t; 23468 23469 #ifndef WL_TDMTX_TYPEDEF_HAS_ALIAS 23470 typedef tdmtx_cnt_v1_t tdmtx_cnt_t; 23471 typedef tdmtx_cnt_shm_v1_t tdmtx_cnt_shm_t; 23472 typedef wl_tdmtx_ecounters_v1_t wl_tdmtx_ecounters_t; 23473 #define WL_CNT_TDMTX_STRUCT_SZ (sizeof(tdmtx_cnt_t)) 23474 #define WL_CNT_TDMTX_SHM_SZ (sizeof(tdmtx_cnt_shm_t)) 23475 #endif 23476 23477 /** chanctxt related statistics */ 23478 #define CHANCTXT_STATS_VERSION_1 1 23479 #define CHANCTXT_STATS_CURRENT_VERSION CHANCTXT_STATS_VERSION_1 23480 typedef struct wlc_chanctxt_stats { 23481 uint32 excursionq_end_miss; 23482 uint32 activeq_end_miss; 23483 uint32 no_chanctxt_count; 23484 uint32 txqueue_end_incomplete; 23485 uint32 txqueue_start_incomplete; 23486 } wlc_chanctxt_stats_core_t; 23487 23488 typedef struct chanctxt_stats { 23489 uint16 version; 23490 uint16 length; 23491 wlc_chanctxt_stats_core_t corestats[MAX_NUM_D11CORES]; 23492 } wlc_chanctxt_stats_t; 23493 23494 typedef struct wl_txdc_ioc { 23495 uint8 ver; 23496 uint8 id; /* ID of the sub-command */ 23497 uint16 len; /* total length of all data[] */ 23498 uint8 data[]; /* var len payload */ 23499 } wl_txdc_ioc_t; 23500 23501 /* 23502 * iovar subcommand ids 23503 */ 23504 enum { 23505 IOV_TXDC_ENB = 1, 23506 IOV_TXDC_MODE = 2, 23507 IOV_TXDC_DUMP = 3, 23508 IOV_TXDC_LAST 23509 }; 23510 23511 /* WL_NAN_XTLV_SLOT_STATS */ 23512 /* WL_NAN_EVENT_SLOT_START, WL_NAN_EVENT_SLOT_END */ 23513 typedef struct nan_slot_event_data { 23514 uint32 cur_slot_idx; /* current idx in channel schedule */ 23515 uint32 fw_time; /* target current time in microseconds */ 23516 uint32 band; /* current band (2G/5G) for which the event is received */ 23517 } nan_slot_event_data_t; 23518 23519 #ifndef BCMUTILS_ERR_CODES 23520 23521 /* SAE (Simultaneous Authentication of Equals) error codes. 23522 * These error codes are local. 23523 */ 23524 23525 /* SAE status codes are reserved from -3072 to -4095 (1K) */ 23526 23527 enum wl_sae_status { 23528 WL_SAE_E_AUTH_FAILURE = -3072, 23529 /* Discard silently */ 23530 WL_SAE_E_AUTH_DISCARD = -3073, 23531 /* Authentication in progress */ 23532 WL_SAE_E_AUTH_CONTINUE = -3074, 23533 /* Invalid scalar/elt */ 23534 WL_SAE_E_AUTH_COMMIT_INVALID = -3075, 23535 /* Invalid confirm token */ 23536 WL_SAE_E_AUTH_CONFIRM_INVALID = -3076, 23537 /* Peer scalar validation failure */ 23538 WL_SAE_E_CRYPTO_SCALAR_VALIDATION = -3077, 23539 /* Peer element prime validation failure */ 23540 WL_SAE_E_CRYPTO_ELE_PRIME_VALIDATION = -3078, 23541 /* Peer element is not on the curve */ 23542 WL_SAE_E_CRYPTO_ELE_NOT_ON_CURVE = -3079, 23543 /* Generic EC error (eliptic curve related) */ 23544 WL_SAE_E_CRYPTO_EC_ERROR = -3080, 23545 /* Both local and peer mac addrs are same */ 23546 WL_SAE_E_CRYPTO_EQUAL_MACADDRS = -3081, 23547 /* Loop exceeded in deriving the scalar */ 23548 WL_SAE_E_CRYPTO_SCALAR_ITER_EXCEEDED = -3082, 23549 /* ECC group is unsupported */ 23550 WL_SAE_E_CRYPTO_UNSUPPORTED_GROUP = -3083, 23551 /* Exceeded the hunting-and-pecking counter */ 23552 WL_SAE_E_CRYPTO_PWE_COUNTER_EXCEEDED = -3084, 23553 /* SAE crypto component is not initialized */ 23554 WL_SAE_E_CRYPTO_NOT_INITED = -3085, 23555 /* bn_get has failed */ 23556 WL_SAE_E_CRYPTO_BN_GET_ERROR = -3086, 23557 /* bn_set has failed */ 23558 WL_SAE_E_CRYPTO_BN_SET_ERROR = -3087, 23559 /* PMK is not computed yet */ 23560 WL_SAE_E_CRYPTO_PMK_UNAVAILABLE = -3088, 23561 /* Peer confirm did not match */ 23562 WL_SAE_E_CRYPTO_CONFIRM_MISMATCH = -3089, 23563 /* Element K is at infinity no the curve */ 23564 WL_SAE_E_CRYPTO_KEY_AT_INFINITY = -3090, 23565 /* SAE Crypto private data magic number mismatch */ 23566 WL_SAE_E_CRYPTO_PRIV_MAGIC_MISMATCH = -3091, 23567 /* Max retry exhausted */ 23568 WL_SAE_E_MAX_RETRY_LIMIT_REACHED = -3092 23569 }; 23570 23571 /* PMK manager block. Event codes from -5120 to -6143 */ 23572 23573 /* PSK hashing event codes */ 23574 typedef enum wlc_pmk_psk_hash_status { 23575 WL_PMK_E_PSK_HASH_FAILED = -5120, 23576 WL_PMK_E_PSK_HASH_DONE = -5121, 23577 WL_PMK_E_PSK_HASH_RUNNING = -5122, 23578 WL_PMK_E_PSK_INVALID = -5123, 23579 WL_PMK_E_PSK_NOMEM = -5124 23580 } wlc_pmk_psk_hash_status_t; 23581 23582 #endif /* BCMUTILS_ERR_CODES */ 23583 23584 /* Block Channel */ 23585 #define WL_BLOCK_CHANNEL_VER_1 1u 23586 23587 typedef struct wl_block_ch_v1 { 23588 uint16 version; 23589 uint16 len; 23590 uint32 band; /* Band select */ 23591 uint8 channel_num; /* The number of block channels in the selected band */ 23592 uint8 padding[3]; 23593 uint8 channel[]; /* Channel to block, Variable Length */ 23594 } wl_block_ch_v1_t; 23595 23596 typedef struct dma_wl_addr_region { 23597 uint32 addr_low; 23598 uint32 addr_high; 23599 } dma_wl_addr_region_t; 23600 23601 #define WL_ROAMSTATS_IOV_VERSION 1 23602 23603 #define MAX_PREV_ROAM_EVENTS 16u 23604 23605 #define ROAMSTATS_UNKNOWN_CNT 0xFFFFu 23606 23607 /* roaming statistics counter structures */ 23608 typedef struct wlc_assoc_roamstats_event_msg_v1 { 23609 uint32 event_type; /* Message (see below) */ 23610 uint32 status; /* Status code (see below) */ 23611 uint32 reason; /* Reason code (if applicable) */ 23612 uint32 timestamp; /* Timestamp of event */ 23613 } wlc_assoc_roamstats_event_msg_v1_t; 23614 23615 enum wl_roamstats_cmd_id { 23616 WL_ROAMSTATS_XTLV_CMD_VER = 0, 23617 WL_ROAMSTATS_XTLV_CMD_RESET = 1, 23618 WL_ROAMSTATS_XTLV_CMD_STATUS = 2, 23619 WL_ROAMSTATS_XTLV_CMD_LAST /* Keep this at the end */ 23620 }; 23621 23622 enum wl_roamstats_xtlv_id { 23623 WL_ROAMSTATS_XTLV_VER = 0x0, 23624 WL_ROAMSTATS_XTLV_COUNTER_INFO = 0x1, 23625 WL_ROAMSTATS_XTLV_PREV_ROAM_EVENTS = 0x2, 23626 WL_ROAMSTATS_XTLV_REASON_INFO = 0x3 23627 }; 23628 23629 /* WL_ROAMSTATS_XTLV_COUNTER_INFO */ 23630 typedef struct { 23631 uint32 initial_assoc_time; 23632 uint32 prev_roam_time; 23633 uint32 host_access_time; 23634 uint16 roam_success_cnt; 23635 uint16 roam_fail_cnt; 23636 uint16 roam_attempt_cnt; 23637 uint16 max_roam_target_cnt; 23638 uint16 min_roam_target_cnt; 23639 uint16 max_cached_ch_cnt; 23640 uint16 min_cached_ch_cnt; 23641 uint16 partial_roam_scan_cnt; 23642 uint16 full_roam_scan_cnt; 23643 } roamstats_counter_info_v1_t; 23644 23645 /* WL_ROAMSTATS_XTLV_PREV_ROAM_EVENTS */ 23646 typedef struct { 23647 uint16 max; 23648 uint16 pos; 23649 wlc_assoc_roamstats_event_msg_v1_t roam_event[]; 23650 } roamstats_prev_roam_events_v1_t; 23651 23652 /* WL_ROAMSTATS_XTLV_REASON_INFO */ 23653 typedef struct { 23654 uint16 max; 23655 uint16 reason_cnt[]; 23656 } roamstats_reason_info_v1_t; 23657 23658 #ifdef HEALTH_CHECK_WLIOCTL 23659 /* Health check status format: 23660 * reporting status size = uint32 23661 * 8 LSB bits are reserved for: WARN (0), ERROR (1), and other levels 23662 * MSB 24 bits are reserved for client to fill in its specific status 23663 */ 23664 #define HEALTH_CHECK_STATUS_OK 0 23665 /* Bit positions. */ 23666 #define HEALTH_CHECK_STATUS_WARN 0x1 23667 #define HEALTH_CHECK_STATUS_ERROR 0x2 23668 #define HEALTH_CHECK_STATUS_TRAP 0x4 23669 #define HEALTH_CHECK_STATUS_NOEVENT 0x8 23670 23671 /* Indication that required information is populated in log buffers */ 23672 #define HEALTH_CHECK_STATUS_INFO_LOG_BUF 0x80 23673 #define HEALTH_CHECK_STATUS_MASK (0xFF) 23674 23675 #define HEALTH_CHECK_STATUS_MSB_SHIFT 8 23676 #endif /* HEALTH_CHECK_WLIOCTL */ 23677 23678 /** receive signal reporting module interface */ 23679 23680 #define WL_RXSIG_IOV_MAJOR_VER (1u) 23681 #define WL_RXSIG_IOV_MINOR_VER (1u) 23682 #define WL_RXSIG_IOV_MAJOR_VER_SHIFT (8u) 23683 #define WL_RXSIG_IOV_VERSION \ 23684 ((WL_RXSIG_IOV_MAJOR_VER << WL_RXSIG_IOV_MAJOR_VER_SHIFT) | WL_RXSIG_IOV_MINOR_VER) 23685 #define WL_RXSIG_IOV_GET_MAJOR(x) (x >> WL_RXSIG_IOV_MAJOR_VER_SHIFT) 23686 #define WL_RXSIG_IOV_GET_MINOR(x) (x & 0xFF) 23687 23688 enum wl_rxsig_cmd_rssi_mode { 23689 WL_RXSIG_MODE_DB = 0x0, 23690 WL_RXSIG_MODE_QDB = 0x1, 23691 WL_RXSIG_MODE_LAST 23692 }; 23693 23694 /* structure defs for 'wl rxsig [cmd]' iovars */ 23695 enum wl_rxsig_iov_v1 { 23696 WL_RXSIG_CMD_RSSI = 0x1, /**< combined rssi moving avg */ 23697 WL_RXSIG_CMD_SNR = 0x2, /**< combined snr moving avg */ 23698 WL_RXSIG_CMD_RSSIANT = 0x3, /**< rssi moving avg per-ant */ 23699 WL_RXSIG_CMD_SNRANT = 0x4, /**< snr moving avg per-snr */ 23700 WL_RXSIG_CMD_SMPLWIN = 0x5, /**< config for sampling window size */ 23701 WL_RXSIG_CMD_SMPLGRP = 0x7, /**< config for grouping of pkt type */ 23702 WL_RXSIG_CMD_STA_MA = 0x8, 23703 WL_RXSIG_CMD_MAMODE = 0x9, 23704 WL_RXSIG_CMD_MADIV = 0xa, 23705 WL_RXSIG_CMD_DUMP = 0xb, 23706 WL_RXSIG_CMD_DUMPWIN = 0xc, 23707 WL_RXSIG_CMD_TOTAL 23708 }; 23709 23710 struct wl_rxsig_cfg_v1 { 23711 uint16 version; 23712 chanspec_t chan; /**< chanspec info for querying stats */ 23713 uint8 pmac[ETHER_ADDR_LEN]; /**< peer(link) mac address */ 23714 }; 23715 23716 struct wl_rxsig_iov_rssi_v1 { 23717 int8 rssi; 23718 uint8 rssi_qdb; 23719 uint8 pad[2]; 23720 }; 23721 23722 struct wl_rxsig_iov_snr_v1 { 23723 int16 snr; 23724 uint16 pad; 23725 }; 23726 23727 struct wl_rxsig_iov_rssi_ant_v1 { 23728 int8 deci[WL_RSSI_ANT_MAX]; 23729 uint8 frac[WL_RSSI_ANT_MAX]; 23730 uint8 rssi_mode; /**< MODE_DB or MODE_QDB */ 23731 uint8 num_of_ant; /**< total number of ants */ 23732 uint8 pad[2]; /**< padding for 32bit align */ 23733 }; 23734 23735 #ifdef BCM_SDC 23736 23737 #define SDC_TRIGGER_CONFIG_VER_1 1 23738 typedef struct { 23739 uint16 version; 23740 uint16 type; 23741 uint8 activate; 23742 uint8 pad; 23743 } sdc_trigger_cfg_t; 23744 23745 typedef enum sdc_trigger_types { 23746 SDC_TYPE_STA_ONBOARD_DEBUG = 1, 23747 SDC_TYPE_SCAN_DEBUG = 2, 23748 #ifdef SDC_TEST 23749 /* 23750 * This is for test purpose only. Don't assign specific value. 23751 * Keep at the end 23752 */ 23753 SDC_TYPE_TEST1, 23754 SDC_TYPE_TEST2, 23755 SDC_TYPE_TEST3, 23756 #endif /* SDC_TEST */ 23757 SDC_TYPE_MAX_TRIGGER 23758 } sdc_trigger_types_t; 23759 23760 /* *** SDC_TYPE_STA_ONBOARD_DEBUG specific ******* */ 23761 23762 /* tlv IDs uniquely identifies tx and rx stats component */ 23763 enum wl_slice_hist_stats_xtlv_id { 23764 WL_STATE_HIST_TX_TOSS_REASONS = 0x1, 23765 WL_STATE_HIST_RX_TOSS_REASONS = 0x2 23766 }; 23767 23768 #ifndef WLC_HIST_TOSS_LEN 23769 #define WLC_HIST_TOSS_LEN (8u) 23770 #endif 23771 #define WL_HIST_COMPACT_TOSS_STATS_TX_VER_1 (1u) 23772 #define WL_HIST_COMPACT_TOSS_STATS_RX_VER_1 (1u) 23773 23774 /* Format of running toss reasons with seq 23775 * [see HIST_TOSS_xxxx macros] 23776 * bits [7..0] : 8 bits : toss sts. 23777 * [11..8] : cfgidx 23778 * [15..12]: ac 23779 * [31..16]: seq 23780 */ 23781 #define HIST_TOSS_STS_POS (0u) 23782 #define HIST_TOSS_STS_MASK (0x000000ffu) 23783 #define HIST_TOSS_CFGIDX_POS (8u) 23784 #define HIST_TOSS_CFGIDX_MASK (0x00000f00u) 23785 #define HIST_TOSS_AC_POS (12u) 23786 #define HIST_TOSS_AC_MASK (0x0000f000u) 23787 #define HIST_TOSS_SEQ_POS (16u) 23788 #define HIST_TOSS_SEQ_MASK (0xffff0000u) 23789 23790 /* Format of toss reasons with count 23791 * bits [15..0] : 16 bits : toss reason 23792 * bits [31..16]: 16 bits : count 23793 */ 23794 #define HIST_TOSS_RC_REASON_POS (0u) 23795 #define HIST_TOSS_RC_REASON_MASK (0xffffu) 23796 #define HIST_TOSS_RC_COUNT_POS (16u) 23797 #define HIST_TOSS_RC_COUNT_MASK (0xffff0000u) 23798 23799 typedef struct { 23800 uint16 version; 23801 uint8 hist_toss_type; /* from wl_slice_hist_XX_stats_xtlv_id */ 23802 uint8 hist_toss_num; /* number of elements in hist_toss_xxx */ 23803 uint32 hist_toss_cur_idx; /* latest data is in this index */ 23804 uint32 hist_toss_reasons[WLC_HIST_TOSS_LEN]; /* last 8 reasons along with seq, etc as 23805 * per HIST_TOSS_xxx format 23806 */ 23807 uint32 hist_toss_counts[WLC_HIST_TOSS_LEN]; /* toss counts corr to reasons */ 23808 } wl_hist_compact_toss_stats_v1_t; 23809 23810 #define WL_HIST_COMPACT_TOSS_STATS_TX_VER_2 (2u) 23811 #define WL_HIST_COMPACT_TOSS_STATS_RX_VER_2 (2u) 23812 23813 typedef struct { 23814 uint16 version; 23815 uint8 htr_type; /* from wl_slice_hist_XX_stats_xtlv_id */ 23816 uint8 htr_num; /* number of elements in htr_running or htr_rc */ 23817 uint16 htr_rnidx; /* htr_running[rnidx-1] has latest data */ 23818 uint16 htr_rcidx; /* htr_rc[rcidx-1] has latest data */ 23819 uint32 htr_running[WLC_HIST_TOSS_LEN]; /* last 8 reasons along with seq, etc as 23820 * per WLC_SDC_COMPACT_TOSS_REASON() format 23821 */ 23822 uint32 htr_rn_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_running data */ 23823 uint32 htr_rc[WLC_HIST_TOSS_LEN]; /* last 8 toss reasons and counts in 23824 * WLC_SDC_COMPACT_TOSS_RC() format 23825 */ 23826 uint32 htr_rc_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_rc */ 23827 } wl_hist_compact_toss_stats_v2_t; 23828 23829 #define WL_HIST_COMPACT_TOSS_STATS_TX_VER_3 (3u) 23830 #define WL_HIST_COMPACT_TOSS_STATS_RX_VER_3 (3u) 23831 23832 typedef struct { 23833 uint8 toss_reason; 23834 uint8 cfg_ac; 23835 uint16 toss_seq; 23836 } toss_info_t; 23837 23838 typedef struct { 23839 uint16 toss_reason; 23840 uint16 toss_cnt; 23841 } toss_cnt_t; 23842 23843 typedef struct { 23844 uint16 version; 23845 uint8 htr_type; /* from wl_slice_hist_XX_stats_xtlv_id */ 23846 uint8 htr_num; /* number of elements in htr_running or htr_rc */ 23847 uint16 htr_rnidx; /* htr_running[rnidx-1] has latest data */ 23848 uint16 htr_rcidx; /* htr_rc[rcidx-1] has latest data */ 23849 toss_info_t htr_running[WLC_HIST_TOSS_LEN]; /* last 8 reasons along with seq, etc as 23850 * per WLC_SDC_COMPACT_TOSS_REASON() format 23851 */ 23852 uint32 htr_rn_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_running data */ 23853 toss_cnt_t htr_rc[WLC_HIST_TOSS_LEN]; /* last 8 toss reasons and counts in 23854 * WLC_SDC_COMPACT_TOSS_RC() format 23855 */ 23856 uint32 htr_rc_ts[WLC_HIST_TOSS_LEN]; /* time stamps corr to htr_rc */ 23857 } wl_hist_compact_toss_stats_v3_t; 23858 23859 /* ***END of SDC_TYPE_STA_ONBOARD_DEBUG specific ******* */ 23860 23861 #endif /* BCM_SDC */ 23862 23863 typedef struct wl_avs_info_v1 { 23864 uint16 version; /* Structure version */ 23865 uint16 equ_version; /* Equation Version */ 23866 uint32 RO; /* RO in OTP */ 23867 uint32 equ_csr; /* Equated CSR */ 23868 uint32 read_csr; /* Read Back CSR */ 23869 uint32 aging; /* aging setting in nvram */ 23870 } wl_avs_info_v1_t; 23871 23872 #define WL_AVS_INFO_VER_1 1 23873 23874 /* bitmap for clm_flags iovar */ 23875 #define WL_CLM_TXBF 0x01u /**< Flag for Tx beam forming */ 23876 #define WL_CLM_RED_EU 0x02u /* Flag for EU RED */ 23877 #define WL_CLM_EDCRS_EU 0x04u /**< Use EU post-2015 energy detect */ 23878 #define WL_CLM_DFS_TPC 0x08u /**< Flag for DFS TPC */ 23879 #define WL_CLM_RADAR_TYPE_EU 0x10u /**< Flag for EU */ 23880 #define WL_CLM_DSA 0x20u /**< Flag for DSA */ 23881 #define WL_CLM_PER_ANTENNA 0x40u /**< Flag for PER_ANTENNA */ 23882 #define WL_CLM_LO_GAIN_NBCAL 0x20u /**< Flag for LO_GAIN_NBCAL */ 23883 #define WL_CLM_PSD 0x80u /**< Flag for PSD */ 23884 #define WL_CLM_HE 0x100u /**< Flag for HE */ 23885 #define WL_CLM_NO_80MHZ 0x200u /**< Flag for NO_80MHZ */ 23886 #define WL_CLM_NO_40MHZ 0x400u /**< Flag for NO_40MHZ */ 23887 #define WL_CLM_NO_MIMO 0x800u /**< Flag for NO_MIMO */ 23888 #define WL_CLM_HAS_DSSS_EIRP 0x1000u /**< Flag for HAS_DSSS_EIRP */ 23889 #define WL_CLM_HAS_OFDM_EIRP 0x2000u /**< Flag for HAS_OFDM_EIRP */ 23890 #define WL_CLM_NO_160MHZ 0x4000u /**< Flag for NO_160MHZ */ 23891 #define WL_CLM_NO_80_80MHZ 0x8000u /**< Flag for NO_80_80MHZ */ 23892 #define WL_CLM_NO_240MHZ 0x10000u /**< Flag for NO_240MHZ */ 23893 #define WL_CLM_NO_320MHZ 0x200000u /**< Flag for NO_320MHZ */ 23894 #define WL_CLM_NO_160_160MHZ 0x400000u /**< Flag for NO_160_160MHZ */ 23895 #define WL_CLM_DFS_FCC WL_CLM_DFS_TPC /**< Flag for DFS FCC */ 23896 #define WL_CLM_DFS_EU (WL_CLM_DFS_TPC | WL_CLM_RADAR_TYPE_EU) /**< Flag for DFS EU */ 23897 23898 /* SC (scan core) command IDs */ 23899 enum wl_sc_cmd { 23900 WL_SC_CMD_DBG = 0, 23901 WL_SC_CMD_CNX = 1, 23902 WL_SC_CMD_CAP = 2, 23903 WL_SC_CMD_CONFIG = 3, 23904 WL_SC_CMD_PMALERT_ADJ_FACTOR = 4, 23905 WL_SC_CMD_LAST 23906 }; 23907 23908 /* WBUS sub-command IDs for unit test */ 23909 #define WL_WBUS_INA_SLOT_START 0x01u /**< Inactive slot start sub command ID. */ 23910 #define WL_WBUS_INA_SLOT_STOP 0x02u /**< Inactive slot stop sub command ID. */ 23911 23912 /* WBUS (WiFi BT uniform scheduler) command IDs */ 23913 enum wl_wbus_cmd { 23914 WL_WBUS_CMD_VER = 0, 23915 WL_WBUS_CMD_STATS = 1, 23916 WL_WBUS_CMD_UNIT_TEST = 2, 23917 WL_WBUS_CMD_BT_TEST = 3, 23918 WL_WBUS_CMD_CAP = 4, 23919 WL_WBUS_CMD_LAST 23920 }; 23921 23922 #define WBUS_BT_SCHED_TEST_PARAMS_VER_1 1 23923 23924 typedef struct wbus_bt_sched_test_params_v1 { 23925 uint16 version; 23926 uint8 min_duty_cycle; 23927 uint8 type; 23928 uint32 flags; 23929 uint32 action; 23930 uint32 duration; 23931 uint32 interval; 23932 } wbus_bt_sched_test_params_v1_t; 23933 23934 enum wl_wbus_bt_test_type { 23935 WBUS_TEST_BT_USER_TYPE_LE_SCAN = 0u, 23936 WBUS_TEST_BT_USER_TYPE_PAGE_SCAN = 1u, 23937 WBUS_TEST_BT_USER_TYPE_MAX = 2u 23938 }; 23939 23940 #define WBUS_BT_SCHED_ADD 0u 23941 #define WBUS_BT_SCHED_REMOVE 1u 23942 #define WBUS_BT_SCHED_INVALID 0xFFu 23943 23944 enum wlc_btcec_iocv_subcmds { 23945 WL_BTCEC_SUBCMD_TEST = 0, 23946 WL_BTCEC_SUBCMD_STATS = 1, 23947 WL_BTCEC_SUBCMD_TEST_BTMC_MODE = 2, 23948 WL_BTCEC_SUBCMD_LAST 23949 }; 23950 23951 /* btcec - bt schedule id's */ 23952 typedef enum { 23953 BTCEC_SCHED_ID_LE_SCAN = 1, 23954 BTCEC_SCHED_ID_PAGE_SCAN = 2 23955 } BTCEC_SCHED_IDS; 23956 /* max schedule id must be equal to last valid schedule id */ 23957 #define BTCEC_SCHED_MAX_V1 BTCEC_SCHED_ID_PAGE_SCAN 23958 23959 /* meanings of flags */ 23960 /* bit0: schedule with the given sch_id is present in btcec */ 23961 #define BTCEC_SCHSTATS_FLAG_ACTIVE (0x1) 23962 /* bit1: schedule with the given sch_id is successfully registered with wbus */ 23963 #define BTCEC_SCHSTATS_FLAG_WBUS_REG_OK (0x2) 23964 /* bit2: schedule with the given sch_id is being scheduled in wbus */ 23965 #define BTCEC_SCHSTATS_FLAG_WBUS_SCHEDULED (0x4) 23966 23967 /* v1 supports pmdur only */ 23968 #define WLC_BTCEC_STATS_V1 1u 23969 typedef struct wlc_btcec_stats_v1 { 23970 uint16 ver; 23971 uint16 len; 23972 uint32 pmdur; /* duration in millisec granted for bt corr to which wlsc slept */ 23973 } wlc_btcec_stats_v1_t; 23974 23975 /* v2 supports 1 page scan and 1 le scan */ 23976 #define WLC_BTCEC_STATS_V2 2u 23977 /* btcec per schedule stats for general reporting */ 23978 typedef struct wlc_btcec_sch_stats_v2 { 23979 uint8 sch_id; /* schedule id */ 23980 uint8 flags; /* flags. see BTCEC_SCHSTATS_FLAG_xxx */ 23981 uint8 pad[2]; 23982 uint32 slcnt; /* num slots granted to bt */ 23983 uint32 skip; /* count of btsc le/page scan, skipped */ 23984 uint32 btdur; /* duration in millisec granted for bt corr to which wlsc slept */ 23985 uint32 overlap; /* wlsc was awake and btsc le/page scan overlapped, in ms */ 23986 uint32 txblnk; /* wlauxtx blanked btsc le/page scan, in ms */ 23987 } wlc_btcec_sch_stats_v2_t; 23988 23989 /* btcec stats for general reporting */ 23990 typedef struct wlc_btcec_stats_v2 { 23991 uint16 ver; 23992 uint16 len; 23993 uint32 rx_msg_cnt; /* received messages counter */ 23994 uint32 tx_msg_cnt; /* transmitted messages counter */ 23995 uint32 add_msg_cnt; /* rx add messages counter */ 23996 uint32 del_msg_cnt; /* rx del messages counter */ 23997 uint32 stats_dur; /* dur in sec for which stats is accumulated */ 23998 uint8 pad[3]; 23999 uint8 num_sstats; /* number of elements in sstats struct */ 24000 wlc_btcec_sch_stats_v2_t sstats[]; /* sch specific stats */ 24001 } wlc_btcec_stats_v2_t; 24002 24003 /* v3 = v2 + ac_overlap */ 24004 #define WLC_BTCEC_STATS_V3 3u 24005 /* btcec per schedule stats for general reporting */ 24006 typedef struct wlc_btcec_sch_stats_v3 { 24007 uint8 sch_id; /* schedule id */ 24008 uint8 flags; /* flags. see BTCEC_SCHSTATS_FLAG_xxx */ 24009 uint8 pad[2]; 24010 uint32 slcnt; /* num slots granted to bt */ 24011 uint32 skip; /* count of btsc le/page scan, skipped */ 24012 uint32 btdur; /* duration in millisec granted for bt corr to which wlsc slept */ 24013 uint32 overlap; /* wlsc was awake and btsc le/page scan overlapped, in ms */ 24014 uint32 txblnk; /* wlauxtx blanked btsc le/page scan, in ms */ 24015 uint32 ac_overlap; /* wlaux overlapped btsc le/page scan, in ms */ 24016 uint16 sched_duration; /* duration finally scheduled in msch, in ms */ 24017 uint16 sched_interval; /* interval finally scheduled in msch, in ms */ 24018 uint16 req_duration; /* duration finally scheduled in msch, in ms */ 24019 uint16 req_interval; /* interval finally scheduled in msch, in ms */ 24020 uint16 min_duty_cycle; /* interval finally scheduled in msch, in ms */ 24021 uint16 pad2; 24022 } wlc_btcec_sch_stats_v3_t; 24023 24024 /* btcec stats for general reporting */ 24025 typedef struct wlc_btcec_stats_v3 { 24026 uint16 ver; 24027 uint16 len; 24028 uint32 rx_msg_cnt; /* received messages counter */ 24029 uint32 tx_msg_cnt; /* transmitted messages counter */ 24030 uint32 add_msg_cnt; /* rx add messages counter */ 24031 uint32 del_msg_cnt; /* rx del messages counter */ 24032 uint32 stats_dur; /* dur in sec for which stats is accumulated */ 24033 uint8 pad[3]; 24034 uint8 num_sstats; /* number of elements in sstats struct */ 24035 wlc_btcec_sch_stats_v3_t sstats[]; /* sch specific stats */ 24036 } wlc_btcec_stats_v3_t; 24037 24038 /* btcec periodic ecounters structs 24039 * [similar to wlc_btcec_stats_vX_t, but constrained in size due to its periodicity of reporting] 24040 */ 24041 #define WLC_BTCEC_PERIODIC_CNTRS_V1 (1u) 24042 24043 /* btcec per schedule stats for periodic ecounters reporting */ 24044 typedef struct wlc_btcec_periodic_sch_stats_v1 { 24045 uint8 sch_id; /* schedule id from BTCEC_SCHED_IDS */ 24046 uint8 flags; /* flags. see BTCEC_SCHSTATS_FLAG_xxx */ 24047 uint8 slcnt; /* num slots granted to bt */ 24048 uint8 skip; /* count of btsc le/page scan, skipped */ 24049 uint16 btdur; /* duration in millisec granted for bt corr to which wlsc slept */ 24050 uint16 overlap; /* wlsc was awake and btsc le/page scan overlapped, in ms */ 24051 uint16 txblnk; /* wlauxtx blanked btsc le/page scan, in ms */ 24052 uint16 ac_overlap; /* wlaux overlapped btsc le/page scan, in ms */ 24053 uint16 sched_duration; /* duration finally scheduled in msch, in ms */ 24054 uint16 sched_interval; /* interval finally scheduled in msch, in ms */ 24055 uint16 req_duration; /* duration finally scheduled in msch, in ms */ 24056 uint16 req_interval; /* interval finally scheduled in msch, in ms */ 24057 uint16 min_duty_cycle; /* interval finally scheduled in msch, in ms */ 24058 uint16 pad2; 24059 } wlc_btcec_periodic_sch_stats_v1_t; 24060 24061 /* btcec stats for periodic ecounters reporting */ 24062 typedef struct { 24063 uint16 ver; 24064 uint16 len; 24065 uint8 rx_msg_cnt; /* received messages counter */ 24066 uint8 tx_msg_cnt; /* transmitted messages counter */ 24067 uint8 add_msg_cnt; /* rx add messages counter */ 24068 uint8 del_msg_cnt; /* rx del messages counter */ 24069 uint8 pad[3]; 24070 uint8 num_sstats; /* number of elements in sstats struct */ 24071 wlc_btcec_periodic_sch_stats_v1_t sstats[BTCEC_SCHED_MAX_V1]; /* sch specific */ 24072 } wlc_btcec_periodic_stats_v1_t; 24073 24074 #define WBUS_OFFLOAD_STATS_V1 1u 24075 #define WBUS_OFFLOAD_USER_STATS_V1 1u 24076 24077 typedef struct wbus_offload_user_stats_v1 { 24078 uint16 version; /* version of this structure */ 24079 uint16 len; /* size of this structure */ 24080 uint8 type; /* Offload type */ 24081 uint8 pad[3]; 24082 uint32 num_accepted; /* num of times user got accepted */ 24083 uint32 num_rejected; /* num of times user got rejected */ 24084 uint32 num_failed; /* num of times user accept failed */ 24085 } wbus_offload_user_stats_v1_t; 24086 24087 typedef struct wbus_offload_stats_v1 { 24088 uint16 version; /* version of this structure */ 24089 uint16 len; /* size of this structure */ 24090 uint32 num_accept_ok; /* num accept pass */ 24091 uint32 num_accept_fail; /* num accept fail */ 24092 uint32 num_rejected; /* num of rejected users so far */ 24093 uint32 num_rejected_bt; /* num of rejected users so far for BT */ 24094 uint32 num_rejected_all; /* num times all offloads are rejected */ 24095 uint8 pad[3]; 24096 uint8 num_user; /* num of users stats */ 24097 wbus_offload_user_stats_v1_t user_stats[]; /* per user stats */ 24098 } wbus_offload_stats_v1_t; 24099 24100 #define KEY_UPDATE_INFO_VER_V1 1 24101 typedef struct key_update_info_v1 24102 { 24103 uint16 ver; 24104 uint8 pad; 24105 uint8 flags; 24106 uint32 timestamp; 24107 uint32 algo; 24108 uint32 key_flags; 24109 struct ether_addr ea; 24110 struct ether_addr sa; 24111 } key_update_info_v1_t; 24112 24113 /* Key update flag bit field */ 24114 #define KEY_UPD_FLAG_ADD_KEY 0x1 /* 0 - Removal, 1 - Add key */ 24115 24116 #ifdef WLLLW 24117 /* LLW Session */ 24118 #define LLW_VERSION 1 24119 #define LLW_STATS_VERSION 1 24120 24121 /* LLW roles */ 24122 #define LLW_ROLE_SCHEDULER 0 24123 #define LLW_ROLE_CLIENT 1 24124 24125 /* LLW modes */ 24126 #define LLW_MODE_GAPS 0 24127 #define LLW_MODE_BACK_TO_BACK 1 24128 24129 /* LLW session max values */ 24130 #define LLW_MAX_SESSION_ID 10 24131 #define LLW_MAX_FLOW_ID 40 24132 #define LLW_MAX_CLIENT_NUM 15 24133 #define LLW_MAX_GAPS_PERIOD 20 24134 #define LLW_MAX_GAPS_VAR 3 24135 #define LLW_MAX_RETX_CNT 10 24136 #define LLW_MAX_AIFSN EDCF_AIFSN_MAX 24137 #define LLW_MAX_CWMIN EDCF_ECW_MAX 24138 #define LLW_MAX_CWMAX EDCF_ECW_MAX 24139 #define LLW_MAX_PER_NUMERATOR 100 24140 #define LLW_MAX_PER_DENOM 10000 24141 #define LLW_MAX_CLIENT_ID 15 24142 #define LLW_MAX_PKT_SIZE 1500 24143 #define LLW_MAX_PKT_NUM 10 24144 #define LLW_MAX_MCS 9 24145 #define LLW_MAX_NUM_STREAMS 8 24146 #define LLW_MAX_IBS 32 24147 24148 /* Per LLW session config */ 24149 /* WL_LLW_CMD_SESSION_CREATE, WL_LLW_CMD_SESSION_UPDATE */ 24150 typedef struct wl_llw_session_cfg { 24151 uint8 session_id; 24152 uint8 role; 24153 uint8 mode; 24154 uint8 client_id; 24155 uint8 gaps_period; 24156 uint8 gaps_var; 24157 uint8 aifsn; 24158 uint8 ecwmin; /* exponent value for minimum contention window */ 24159 uint8 ecwmax; /* exponent value for maximum contention window */ 24160 uint8 mcs; 24161 uint8 num_streams; 24162 uint8 ibs; /* interblock spacing in usecs, for spacing between Transaction Blocks */ 24163 uint16 ul_pkt_size; 24164 uint16 dl_pkt_size; 24165 uint16 per_denom; /* denominator for target PER */ 24166 uint8 per_numerator; /* this value divided by per_denom gives the target PER */ 24167 uint8 dl_pkt_num; 24168 uint8 client_num; 24169 uint8 retx_cnt; 24170 uint8 pwr_save; 24171 uint8 auto_ba; /* automatic RX/TX BA session setup (no negotiation needed) */ 24172 uint8 if_index; 24173 uint8 padding[3]; 24174 struct ether_addr multicast_addr; 24175 struct ether_addr scheduler_addr; 24176 } wl_llw_session_cfg_t; 24177 24178 /* WL_LLW_CMD_SESSION_DELETE, WL_LLW_CMD_SESSION_ENABLE, WL_LLW_CMD_SESSION_DISABLE, */ 24179 /* WL_LLW_CMD_SESSION_GET */ 24180 typedef struct wl_llw_session_cmd { 24181 uint8 session_id; 24182 uint8 padding[3]; 24183 } wl_llw_session_cmd_t; 24184 24185 /* LLW client config */ 24186 /* WL_LLW_CMD_CLIENT_ADD, WL_LLW_CMD_CLIENT_DELETE, WL_LLW_CMD_CLIENT_GET */ 24187 typedef struct wl_llw_client_cfg { 24188 uint8 session_id; 24189 uint8 client_id; 24190 struct ether_addr mac; 24191 } wl_llw_client_cfg_t; 24192 24193 /* Get list of session IDs from FW */ 24194 /* WL_LLW_CMD_SESSION_ID */ 24195 typedef struct llw_session_id_list { 24196 uint8 id_count; /* Number of session IDs */ 24197 uint8 list[]; /* list of session IDs */ 24198 } llw_session_id_list_t; 24199 24200 /* LLW XTLV structures */ 24201 typedef struct wl_llw_iov_cmd { 24202 uint16 version; 24203 uint8 cmd_cnt; 24204 uint8 pad; 24205 uint8 cmds[]; 24206 } wl_llw_iov_cmd_t; 24207 24208 typedef struct wl_llw_iov_sub_cmd { 24209 uint16 type; 24210 uint16 len; 24211 union { 24212 int32 status; /* Processed status - Set by FW */ 24213 uint32 options; /* Command Process Options - Set by Host */ 24214 } u; 24215 uint8 data[]; 24216 } wl_llw_iov_sub_cmd_t; 24217 24218 /* to be used in type field of wl_llw_iov_sub_cmd_t structure while issuing LLW commands */ 24219 typedef enum wl_llw_sub_cmd_xtlv_id { 24220 WL_LLW_CMD_SESSION_ID, 24221 WL_LLW_CMD_SESSION_CREATE, 24222 WL_LLW_CMD_SESSION_DELETE, 24223 WL_LLW_CMD_SESSION_UPDATE, 24224 WL_LLW_CMD_SESSION_ENABLE, 24225 WL_LLW_CMD_SESSION_DISABLE, 24226 WL_LLW_CMD_SESSION_GET, 24227 WL_LLW_CMD_CLIENT_ADD, 24228 WL_LLW_CMD_CLIENT_DELETE, 24229 WL_LLW_CMD_CLIENT_GET, 24230 WL_LLW_CMD_FLOW_ADD, 24231 WL_LLW_CMD_FLOW_DELETE, 24232 WL_LLW_CMD_FLOW_GET, 24233 WL_LLW_CMD_STATS 24234 } wl_llw_sub_cmd_xtlv_id_t; 24235 24236 /* LLW stats */ 24237 typedef enum wl_llw_xtlv { 24238 WL_LLW_XTLV_STATS 24239 } wl_llw_xtlv_t; 24240 24241 typedef struct wl_llw_stats { 24242 uint32 txpackets; 24243 uint32 txbytes; 24244 uint32 txrts; 24245 uint32 txnocts; 24246 uint32 txnoack; 24247 uint32 txfail; 24248 uint32 txretry; 24249 uint32 txdropped; 24250 uint32 tx_avg_q_time; 24251 uint32 tx_min_q_time; 24252 uint32 tx_max_q_time; 24253 uint32 tx_avg_rem_lifetime; 24254 uint32 tx_min_rem_lifetime; 24255 uint32 tx_max_rem_lifetime; 24256 uint32 rxpackets; 24257 uint32 rxbytes; 24258 uint32 rxfail; 24259 uint32 rxretry; 24260 uint32 txschedfrm; 24261 uint32 retxschedfrm; 24262 } wl_llw_stats_t; 24263 24264 typedef struct wl_llw_stats_hdr { 24265 uint16 version; 24266 uint16 stats_cnt; 24267 uint32 tot_len; 24268 uint8 stat_xtlvs[]; 24269 } wl_llw_stats_hdr_t; 24270 24271 /* WL_LLW_XTLV_STATS */ 24272 typedef struct wl_llw_stats_xtlv { 24273 uint16 type; 24274 uint16 len; 24275 uint8 stats[]; 24276 } wl_llw_stats_xtlv_t; 24277 24278 /* WL_LLW_CMD_STATS */ 24279 typedef struct wl_llw_stats_cmd { 24280 uint8 session_id; 24281 uint8 client_id; 24282 uint16 padding; 24283 } wl_llw_stats_cmd_t; 24284 24285 /* LLW flow ring ID config */ 24286 /* WL_LLW_CMD_FLOW_ADD, WL_LLW_CMD_FLOW_DELETE, WL_LLW_CMD_FLOW_GET */ 24287 typedef struct wl_llw_flow_cfg { 24288 uint8 session_id; 24289 uint8 flow_id; 24290 uint16 padding; 24291 } wl_llw_flow_cfg_t; 24292 #endif /* End of LLW Session */ 24293 24294 #define WL_OMI_CONFIG_VERSION_1 1u 24295 24296 /* values for valid_bm */ 24297 #define OMI_CONFIG_VALID_BMP_RXNSS 0x0001u 24298 #define OMI_CONFIG_VALID_BMP_BW 0x0002u 24299 #define OMI_CONFIG_VALID_BMP_ULMU_DISABLE 0x0004u 24300 #define OMI_CONFIG_VALID_BMP_TXNSTS 0x0008u 24301 #define OMI_CONFIG_VALID_BMP_ERSU_DISABLE 0x0010u 24302 #define OMI_CONFIG_VALID_BMP_DLMU_RSD_RCM 0x0020u 24303 #define OMI_CONFIG_VALID_BMP_ULMU_DATA_DISABLE 0x0040u 24304 #define OMI_CONFIG_VALID_BMP_ALL 0x0FFFu 24305 24306 #define OMI_CONFIG_BW_MAX 3u 24307 24308 typedef struct wl_omi_config { 24309 uint16 valid_bm; /* validity bitmask for each config */ 24310 uint8 rxnss; 24311 uint8 bw; 24312 uint8 ulmu_disable; 24313 uint8 txnsts; 24314 uint8 ersu_disable; 24315 uint8 dlmu_resound_rec; 24316 uint8 ulmu_data_disable; 24317 uint8 pad[3]; 24318 } wl_omi_config_t; 24319 24320 typedef struct wl_omi_req { 24321 uint16 version; 24322 uint16 len; 24323 wl_omi_config_t config; 24324 } wl_omi_req_v1_t; 24325 24326 /* Bits for ULMU disable reason */ 24327 #define OMI_ULMU_DISABLED_HOST 0x01u /* Host has disabled through he omi */ 24328 24329 #ifdef WLAWDL 24330 #define OMI_ULMU_DISABLED_AWDL 0x02u /* Disabled due to AWDL enabled */ 24331 #endif /* WLAWDL */ 24332 24333 #define OMI_ULMU_DISABLED_NAN 0x04u /* Disabled due to NAN enabled */ 24334 #define OMI_ULMU_DISABLED_BTCOEX 0x08u /* Disabled while in BT Coex activity */ 24335 #define OMI_ULMU_DISABLED_LTECOEX 0x10u /* Disabled due to LTE Coex activity */ 24336 #define OMI_ULMU_DISABLED_NON11AX_CONN 0x20u /* Disabled due to not associated to 11ax AP */ 24337 #define OMI_ULMU_DISABLED_THROTTLE_ENABLE 0x40u /* Disabled due to throttle timer running */ 24338 #define OMI_ULMU_DISABLED_TXCHAIN_DOWNGRADE 0x80u /* Disabled due to Txchain downgrade */ 24339 #define OMI_ULMU_DISABLED_TX_DUTY_CYCLE 0x100u /* Disabled due to tx duty cycle */ 24340 24341 /* Bits for DLMU Resound Recommendation reason */ 24342 #define OMI_DLMU_RSD_RCM_HOST (0x1u << 0u) /* Host directly set the bit */ 24343 #define OMI_DLMU_RSD_RCM_MPF (0x1u << 1u) /* Set on MPF state change */ 24344 24345 #define WL_OMI_STATUS_VERSION_1 1u 24346 typedef struct wl_omi_status { 24347 uint16 version; 24348 uint16 len; 24349 wl_omi_config_t omi_pending; /* OMI requests pending */ 24350 uint16 omi_data; /* current OM Control field for completed OMI requests */ 24351 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 24352 uint32 ulmu_disable_duration; /* Duration (ms) for which UL OFDMA is disabled */ 24353 } wl_omi_status_v1_t; 24354 24355 #define WL_OMI_STATUS_VERSION_2 2u 24356 typedef struct wl_omi_status_v2 { 24357 uint16 version; 24358 uint16 len; 24359 wl_omi_config_t omi_pending; /* OMI requests pending */ 24360 uint16 omi_data; /* Current OM Control field for completed OMI requests */ 24361 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 24362 uint32 ulmu_disable_duration; /* Duration (ms) for which UL OFDMA is disabled */ 24363 uint32 dlmu_rsd_rcm_duration; /* Dur (ms) for which ResoundRecommentation is set */ 24364 uint16 dlmu_rsd_rcm_mpf_state; /* The MPF state value */ 24365 uint16 dlmu_rsd_rcm_reason; /* DL MU-MIMO recommendation reasons bitmap */ 24366 } wl_omi_status_v2_t; 24367 24368 #define WL_ULMU_DISABLE_STATS_VERSION_1 1u 24369 typedef struct wl_ulmu_disable_stats { 24370 uint16 version; 24371 uint16 len; 24372 uint32 ulmu_disable_ts; /* UL OFDMA disabled timestamp (ms) */ 24373 uint16 ulmu_disable_reason; /* Bits representing UL OFDMA disable reasons */ 24374 uint16 ulmu_disable_count; /* UL MU disable count during current infra association */ 24375 uint32 last_trig_rx_ts; /* Last trigger frame received timestamp (ms) */ 24376 uint16 trig_rx_count; /* No of trigger frames received after last UL OFDMA disable */ 24377 uint16 max_latency; /* Max latency by AP to re-act for UL OFDMA disable request (ms) */ 24378 uint16 min_latency; /* Min latency by AP to re-act for UL OFDMA disable request (ms) */ 24379 uint16 avg_latency; /* Avg latency by AP to re-act for UL OFDMA disable request (ms) */ 24380 } wl_ulmu_disable_stats_v1_t; 24381 24382 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS */ 24383 enum wl_tx_histogram_id { 24384 WL_TX_HIST_TXQ_ID = 1, 24385 WL_TX_HIST_LOW_TXQ_ID = 2, 24386 WL_TX_HIST_SCBQ_ID = 3, 24387 WL_TX_HIST_EXCUR_TXQ_ID = 4, 24388 WL_TX_HIST_EXCUR_LOW_TXQ_ID = 5 24389 }; 24390 24391 /* common tx histogram structure */ 24392 typedef struct wl_tx_hist { 24393 uint16 hist_bmap; /* bit N indicates histogram follows for priority or fifo N */ 24394 uint16 hist_count; /* count of histograms in var len array */ 24395 uint32 hist[1]; /* var len array of histograms each prefix by hist length */ 24396 } wl_tx_hist_t; 24397 24398 #define WL_TX_HIST_FIXED_LEN (OFFSETOF(wl_tx_hist_t, hist)) 24399 #define WL_TX_HIST_FULL_LEN(num_hist, max_hist_size) \ 24400 (WL_TX_HIST_FIXED_LEN + (num_hist) * \ 24401 (max_hist_size + 1) * sizeof(uint32)) 24402 24403 /* structure for WL_TX_HIST_TXQ, WL_TX_HIST_EXCUR_TXQ_ID */ 24404 typedef struct wl_tx_hist_txq { 24405 uint32 bsscfg_bmap; /* bitmap of bsscfg indexes associated with this queue */ 24406 wl_tx_hist_t tx_hist; /* tx histograms */ 24407 } wl_tx_hist_txq_t; 24408 24409 #define WL_TX_HIST_TXQ_FIXED_LEN \ 24410 (OFFSETOF(wl_tx_hist_txq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24411 #define WL_TX_HIST_TXQ_FULL_LEN(num_hist, max_hist_size) \ 24412 (OFFSETOF(wl_tx_hist_txq_t, tx_hist) + \ 24413 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24414 24415 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_HISTOGRAMS */ 24416 enum wl_txq_stop_histogram_id { 24417 WL_TXQ_STOP_HIST_SW = 1, 24418 WL_TXQ_STOP_HIST_HW = 2, 24419 WL_TXQ_STOP_HIST_PKTS_SW = 3, 24420 WL_TXQ_STOP_HIST_PKTS_HW = 4, 24421 WL_TXQ_STOP_HIST_MAX = WL_TXQ_STOP_HIST_PKTS_HW 24422 }; 24423 24424 /* common tx histogram structure */ 24425 typedef struct wl_txq_stop_hist { 24426 wl_tx_hist_t tx_hist; /* tx histograms */ 24427 } wl_txq_stop_hist_t; 24428 24429 #define WL_TXQ_STOP_HIST_FIXED_LEN \ 24430 (OFFSETOF(wl_txq_stop_hist_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24431 #define WL_TXQ_STOP_HIST_FULL_LEN(num_hist, max_hist_size) \ 24432 (OFFSETOF(wl_txq_stop_hist_t, tx_hist) + \ 24433 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24434 24435 /* structure for WL_TX_HIST_LOW_TXQ, WL_TX_HIST_EXCUR_LOW_TXQ_ID */ 24436 typedef struct wl_tx_hist_low_txq { 24437 wl_tx_hist_t tx_hist; /* tx histograms */ 24438 } wl_tx_hist_low_txq_t; 24439 24440 #define WL_TX_HIST_LOW_TXQ_FIXED_LEN \ 24441 (OFFSETOF(wl_tx_hist_low_txq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24442 #define WL_TX_HIST_LOW_TXQ_FULL_LEN(num_hist, max_hist_size) \ 24443 (OFFSETOF(wl_tx_hist_low_txq_t, tx_hist) + \ 24444 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24445 24446 /* structure for WL_TX_HIST_SCBQ */ 24447 typedef struct wl_tx_hist_scbq { 24448 struct ether_addr ea; /* ether addr of peer */ 24449 uint16 bsscfg_idx; /* bsscfg index */ 24450 wl_tx_hist_t tx_hist; /* tx histograms */ 24451 } wl_tx_hist_scbq_t; 24452 24453 #define WL_TX_HIST_SCBQ_FIXED_LEN \ 24454 (OFFSETOF(wl_tx_hist_scbq_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24455 #define WL_TX_HIST_SCBQ_FULL_LEN(num_hist, max_hist_size) \ 24456 (OFFSETOF(wl_tx_hist_scbq_t, tx_hist) + \ 24457 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24458 24459 /* sub-xtlv IDs within WL_STATS_XTLV_WL_SLICE_TX_QUEUE_DEPTH */ 24460 enum wl_tx_queue_depth_id { 24461 WL_TX_QUEUE_DEPTH_TXQ_ID = 1, 24462 WL_TX_QUEUE_DEPTH_LOW_TXQ_ID = 2, 24463 WL_TX_QUEUE_DEPTH_SCBQ_ID = 3, 24464 WL_TX_QUEUE_DEPTH_EXCUR_TXQ_ID = 4, 24465 WL_TX_QUEUE_DEPTH_EXCUR_LOW_TXQ_ID = 5 24466 }; 24467 24468 /* common tx queue depth structure */ 24469 typedef struct wl_tx_queue_depth { 24470 uint16 queue_depth_bmap; /* bitmap of queue depth in var len array */ 24471 uint16 queue_depth_count; /* count of queue depth in var len array */ 24472 uint16 queue_depth[1]; /* var len array of queue depth */ 24473 } wl_tx_queue_depth_t; 24474 24475 #define WL_TX_QUEUE_DEPTH_FIXED_LEN (OFFSETOF(wl_tx_queue_depth_t, queue_depth)) 24476 #define WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth) \ 24477 (WL_TX_QUEUE_DEPTH_FIXED_LEN + (num_queue_depth) * \ 24478 sizeof(uint16)) 24479 24480 /* structure for WL_TX_QUEUE_DEPTH_TXQ_ID, WL_TX_QUEUE_DEPTH_EXCUR_TXQ_ID */ 24481 typedef struct wl_tx_queue_depth_txq { 24482 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */ 24483 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 24484 } wl_tx_queue_depth_txq_t; 24485 24486 #define WL_TX_QUEUE_DEPTH_TXQ_FIXED_LEN \ 24487 (OFFSETOF(wl_tx_queue_depth_txq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 24488 #define WL_TX_QUEUE_DEPTH_TXQ_FULL_LEN(num_queue_depth) \ 24489 (OFFSETOF(wl_tx_queue_depth_txq_t, tx_queue_depth) + \ 24490 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 24491 24492 /* structure for WL_TX_QUEUE_DEPTH_LOW_TXQ_ID, WL_TX_QUEUE_DEPTH_EXCUR_LOW_TXQ_ID */ 24493 typedef struct wl_tx_queue_depth_low_txq { 24494 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 24495 } wl_tx_queue_depth_low_txq_t; 24496 24497 #define WL_TX_QUEUE_DEPTH_LOW_TXQ_FIXED_LEN \ 24498 (OFFSETOF(wl_tx_queue_depth_low_txq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 24499 #define WL_TX_QUEUE_DEPTH_LOW_TXQ_FULL_LEN(num_queue_depth) \ 24500 (OFFSETOF(wl_tx_queue_depth_low_txq_t, tx_queue_depth) + \ 24501 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 24502 24503 /* structure for WL_TX_QUEUE_DEPTH_SCBQ_ID */ 24504 typedef struct wl_tx_queue_depth_scbq { 24505 struct ether_addr ea; /* ether addr of peer */ 24506 uint16 bsscfg_idx; /* bsscfg index */ 24507 wl_tx_queue_depth_t tx_queue_depth; /* queue depth */ 24508 } wl_tx_queue_depth_scbq_t; 24509 24510 #define WL_TX_QUEUE_DEPTH_SCBQ_FIXED_LEN \ 24511 (OFFSETOF(wl_tx_queue_depth_scbq_t, tx_queue_depth) + WL_TX_QUEUE_DEPTH_FIXED_LEN) 24512 #define WL_TX_QUEUE_DEPTH_SCBQ_FULL_LEN(num_queue_depth) \ 24513 (OFFSETOF(wl_tx_queue_depth_scbq_t, tx_queue_depth) + \ 24514 WL_TX_QUEUE_DEPTH_FULL_LEN(num_queue_depth)) 24515 24516 /* sub-xtlv IDs within WL_STATS_XTLV_BUS_PCIE_TX_HISTOGRAMS */ 24517 enum wl_pcie_tx_histogram_id { 24518 WL_PCIE_TX_HIST_ID = 1 24519 }; 24520 24521 /* structure for PCIE_TX_HIST_ID */ 24522 typedef struct wl_pcie_tx_hist { 24523 uint16 ring_id; /* PCIe ring id */ 24524 uint16 pad; /* 4-byte alignment */ 24525 wl_tx_hist_t tx_hist; /* hist_bmap: 24526 * 0x1=tx histogram 24527 * 0x2=tx status pending histogram 24528 */ 24529 } wl_pcie_tx_hist_t; 24530 24531 #define WL_PCIE_TX_HIST_FIXED_LEN \ 24532 (OFFSETOF(wl_pcie_tx_hist_t, tx_hist) + WL_TX_HIST_FIXED_LEN) 24533 #define WL_PCIE_TX_HIST_FULL_LEN(num_hist, max_hist_size) \ 24534 (OFFSETOF(wl_pcie_tx_hist_t, tx_hist) + \ 24535 WL_TX_HIST_FULL_LEN(num_hist, max_hist_size)) 24536 24537 /* sub-xtlv IDs within WL_STATS_XTLV_BUS_PCIE_TX_QUEUE_DEPTH */ 24538 enum wl_pcie_tx_queue_depth_id { 24539 WL_PCIE_TX_QUEUE_DEPTH_ID = 1 24540 }; 24541 24542 /* structure for WL_PCIE_TX_QUEUE_DEPTH_ID */ 24543 typedef struct wl_pcie_tx_queue_depth { 24544 uint16 ring_id; /* PCIe ring id */ 24545 uint16 queue_depth; /* queue depth of ring id */ 24546 uint16 tx_status_pend; /* tx status pending of ring id */ 24547 uint16 pad; /* 4-byte alignment */ 24548 } wl_pcie_tx_queue_depth_t; 24549 24550 #define WL_PCIE_TX_QUEUE_DEPTH_FIXED_LEN sizeof(wl_pcie_tx_queue_depth_t) 24551 24552 #define WL_WSEC_DEL_PMK_VER_V1 1u 24553 /* tlv ids for del pmk */ 24554 #define WL_DEL_PMK_TLV_ID 1u 24555 #define WL_DEL_PMKID_TLV_ID 2u 24556 #define WL_DEL_PEER_ADDR_TLV_ID 3u 24557 typedef struct wl_wsec_del_pmk { 24558 uint16 version; 24559 uint16 length; 24560 uint8 xtlvs[]; 24561 } wl_wsec_del_pmk_t; 24562 #define WL_WSEC_DEL_PMK_FIXED_LEN_V1 OFFSETOF(wl_wsec_del_pmk_t, xtlvs) 24563 24564 /* WTC */ 24565 #define WLC_WTC_ROAM_VER_1 1 24566 24567 #define WLC_WTC_ROAM_CUR_VER WLC_WTC_ROAM_VER_1 24568 #define WLC_WTC_ROAM_CONFIG_HDRLEN 4u 24569 24570 typedef enum wtc_band_list { 24571 WTC_BAND_2G = 0, 24572 WTC_BAND_5G = 1, 24573 WTC_MAX_BAND = 2 24574 } wtc_band_list_e; 24575 24576 typedef struct wlc_wtcroam { 24577 uint16 ver; 24578 uint16 len; 24579 uint8 data[]; 24580 } wlc_wtc_args_t; 24581 24582 typedef struct wlc_wtcconfig_info { 24583 uint8 mode; /* enable or disable wtc. static config */ 24584 uint8 scantype; /* type of scan for wtc roam */ 24585 int8 rssithresh[WTC_MAX_BAND]; /* rssi value below which wtc is active */ 24586 int8 ap_rssithresh[WTC_MAX_BAND]; /* rssi value above which candidate AP is good */ 24587 } wlc_wtcconfig_info_v1_t; 24588 24589 /* RCROAM */ 24590 #define WLC_RC_ROAM_VER_1 1 24591 24592 typedef struct wlc_rcroam { 24593 uint16 ver; 24594 uint16 len; 24595 uint8 data[]; 24596 } wlc_rcroam_t; 24597 24598 typedef struct wlc_rcroam_info_v1 { 24599 uint16 inactivity_period; /* inactivty monitor period */ 24600 uint16 roam_scan_timeout; 24601 uint16 periodic_roam_scan_timeout; 24602 uint8 roam_trig_step; /* roaming trigger step value */ 24603 bool enab; 24604 } wlc_rcroam_info_v1_t; 24605 24606 #define WLC_RC_ROAM_CUR_VER WLC_RC_ROAM_VER_1 24607 #define RCROAM_HDRLEN 4u 24608 #define MAX_RCSCAN_TIMER 300u 24609 24610 /* Reasons for re-setting RC ROAM params */ 24611 #define WLC_RCROAM_RESET_JOIN 0 /* New join */ 24612 #define WLC_RCROAM_REASON_ROAM_SUCCESS 1 /* Successful roam */ 24613 #define WLC_RCROAM_RESET_RSSI_CHANGE 2 /* RSSI of the link which was bad regained/worsened */ 24614 #define WLC_RCROAM_RESET_BCN_LOSS 3 /* Beacon loss */ 24615 #define WLC_RCROAM_RESET_DISASSOC_RX 4 /* Disassoc was received */ 24616 #define WLC_RCROAM_RESET_DEAUTH_RX 5 /* Deauth was received */ 24617 #define WLC_RCROAM_RESET_IOVAR 6 /* Iovar to disable rcroam was received from host */ 24618 #define WLC_RCROAM_RESET_WTCREQ 7 /* WTC request overriding rcroam */ 24619 #define WLC_RCROAM_RESET_RSN_ABORT 8 /* Reset RCROAM params due to roam abort */ 24620 24621 #define WLC_SILENT_ROAM_VER_1 1 24622 /* silent roam information struct */ 24623 typedef struct wlc_sroam_info_v1 { 24624 /* Silent roam Set/Get value */ 24625 uint8 sroam_on; /* sroam on/off */ 24626 int8 sroam_min_rssi; /* minimum rssi threshold to activate the feature */ 24627 uint8 sroam_rssi_range; /* rssi tolerance to determine stationary status */ 24628 uint8 sroam_score_delta; /* roam score delta value to prune candidate ap */ 24629 uint8 sroam_period_time; /* required monitoring period to trigger roaming scan */ 24630 uint8 sroam_band; /* band setting of roaming scan (all, 5g, 2g) */ 24631 uint8 sroam_inact_cnt; /* tx/rx frame count threshold for checking inactivity */ 24632 /* Silent roam monitor value */ 24633 int8 sroam_ref_rssi; /* reference rssi which is picked when monitoring is 24634 * started. it is updated to current rssi when it's 24635 * out from rssi range 24636 */ 24637 uint8 sroam_time_since; /* elapsed time since start monitoring */ 24638 uint8 pad[3]; 24639 uint32 sroam_txfrm_prev; /* save current tx frame counts */ 24640 uint32 sroam_rxfrm_prev; /* save current rx frame counts */ 24641 } wlc_sroam_info_v1_t; 24642 24643 typedef struct wlc_sroam { 24644 uint16 ver; 24645 uint16 len; 24646 uint8 data[]; 24647 } wlc_sroam_t; 24648 24649 #define WLC_SILENT_ROAM_CUR_VER WLC_SILENT_ROAM_VER_1 24650 #define SROAM_HDRLEN 4u 24651 24652 #define DEF_SROAM_OFF 0 24653 #define DEF_SROAM_MIN_RSSI -65 24654 #define DEF_SROAM_RSSI_RANGE 3u 24655 #define DEF_SROAM_SCORE_DELTA 1u 24656 #define DEF_SROAM_PERIOD_TIME 10u 24657 #define DEF_SROAM_INACT_CNT 5u 24658 #define MAX_SROAM_RSSI -70 24659 #define MAX_SROAM_RSSI_RANGE 5u 24660 #define MAX_SROAM_SCORE_DELTA 10u 24661 #define MAX_SROAM_PERIOD_TIME 250u 24662 #define SROAM_BAND_AUTO 3u 24663 24664 /* MACSMPL IOVAR parameters */ 24665 typedef enum wl_macdbg_macsmpl_iovar_id { 24666 WL_MACSMPL_START = 0, 24667 WL_MACSMPL_STOP = 1, 24668 WL_MACSMPL_DUMP = 2, 24669 WL_MACSMPL_STATUS = 3, 24670 WL_MACSMPL_SIZE = 4 24671 } wl_macdbg_macsmpl_iovar_id_t; 24672 24673 /* WL_MACSMPL_STATUS values */ 24674 typedef enum wl_macdbg_macsmpl_status { 24675 WL_MACSMPL_STATUS_IDLE = 0, 24676 WL_MACSMPL_STATUS_ACTIVE = 1, 24677 WL_MACSMPL_STATUS_WAIT_FOR_TRIG = 2, 24678 WL_MACSMPL_STATUS_TRIGGERED = 3 24679 } wl_macdbg_macsmpl_status_t; 24680 24681 /* WL_MACSMPL_START_PARAM subcommand data */ 24682 typedef struct wl_macsmpl_start_param { 24683 uint32 trig_condition; /* trigger condition */ 24684 uint16 gpio_mux; /* MACControl1 GPIOSel field */ 24685 uint8 pad[2]; /* 4-byte struct alignment */ 24686 } wl_macsmpl_param_start_t; 24687 24688 /* MAC SC fragment request data */ 24689 typedef struct wl_macsmpl_frag_req_param { 24690 uint32 offset; /* requested MAC SC fragment offset */ 24691 uint32 size; /* requested MAC SC fragment size, bytes */ 24692 } wl_macsmpl_frag_req_param_t; 24693 24694 /* MAC SC fragment response data */ 24695 typedef struct wl_macsmpl_frag_resp_param { 24696 uint32 offset; /* MAC SC response fragment offset */ 24697 uint32 size; /* MAC SC reponse fragment size, bytes */ 24698 uint8 data[]; /* MAC SC response fragment data, flexible array */ 24699 } wl_macsmpl_frag_resp_param_t; 24700 24701 /* MAC SC status data */ 24702 typedef struct wl_macsmpl_status { 24703 uint32 maccontrol1; /* MACControl1 register value */ 24704 uint32 macsc_flags; /* M_MACSC_FLAGS SHM register value */ 24705 uint16 sc_play_ctrl; /* TXE SampleCollectPlayCtrl register value */ 24706 uint16 sc_cur_ptr; /* TXE SampleCollectCurPtr register value */ 24707 uint16 sc_start_ptr; /* TXE SampleCollectStartPtr register value */ 24708 uint16 sc_stop_ptr; /* TXE SampleCollectStopPtr register value */ 24709 } wl_macsmpl_status_t; 24710 24711 /* WL_MACSMPL parameters data */ 24712 typedef struct wl_macsmpl_param { 24713 wl_macdbg_macsmpl_iovar_id_t subcmd_id; 24714 union { 24715 wl_macsmpl_param_start_t start; 24716 wl_macsmpl_frag_req_param_t frag_req; 24717 } u; 24718 } wl_macsmpl_param_t; 24719 24720 /* High priority P2P */ 24721 #define WL_HP2P_COUNTERS_VER 2u 24722 typedef struct hp2p_counters { 24723 uint16 frames_queued; 24724 uint16 frames_processed; 24725 uint16 frames_exp; 24726 uint16 frames_preempt; 24727 uint16 frames_retried; 24728 uint16 reserved; /* reserved, rsvd2 and rsvd3 are experimental counters */ 24729 uint16 rsvd2; 24730 uint16 rsvd3; 24731 } hp2p_counters_t; 24732 24733 typedef struct hp2p_counters_v2 { 24734 uint32 frames_queued; /* Number of AMPDUs processed */ 24735 uint16 frames_exp; /* Number of Lifetime expiries */ 24736 uint16 edt_retry; /* Exceed due to - retry */ 24737 uint16 mpif_reconf; /* MPIF Reconfigure */ 24738 uint16 exceed_delay; /* Exceed delay threshold */ 24739 uint16 edt_nav_thresh; /* Exceed due to - NAV threshold */ 24740 uint16 edt_dc_def; /* Exceed due to - DC based deferral */ 24741 uint16 edt_tx_fifo_full; /* Exceed due to - Tx FIFO full */ 24742 uint16 edt_cts_thresh; /* Exceed due to - CTS threshold */ 24743 uint16 dbg1; /* dbgX are for internal debugging */ 24744 uint16 dbg2; 24745 uint16 dbg3; 24746 uint16 dbg4; 24747 uint16 dbg5; 24748 uint16 dbg6; 24749 uint16 dbg7; 24750 uint16 dbg8; 24751 uint16 dbg9; 24752 uint16 dbg10; 24753 } hp2p_counters_v2_t; 24754 24755 typedef struct hp2p_counters_hdr { 24756 uint16 version; /* version of hp2p_counters_t structure */ 24757 uint16 len; 24758 uint16 slice_idx; 24759 uint16 pad; 24760 uint8 counters[]; 24761 } hp2p_counters_hdr_t; 24762 24763 /* HP2P RLLW Stats */ 24764 #define WL_HP2P_RLLW_STATS_VER 1u 24765 typedef struct hp2p_rllw_stats_hdr { 24766 uint16 version; /* version of hptp_rllw_stats structure */ 24767 uint16 len; /* length of the payload */ 24768 uint8 slice_idx; /* Slice idx BAND_2G_INDEX - 0 / BAND_5G_INDEX - 1 */ 24769 uint8 pad[3]; 24770 uint8 stats[]; /* rllw_stats instance */ 24771 } hp2p_rllw_stats_hdr_t; 24772 24773 /* 24774 * rllw stats common & per band 24775 * 24776 */ 24777 typedef struct hp2p_rllw_stats_v1 { 24778 /* Slice Specific Stats */ 24779 uint16 n_hnav_intrs; /* # of high nav interrupts */ 24780 uint16 n_switches; /* # of Switches to band n */ 24781 /* Stats on wlc_trig */ 24782 uint16 n_override_pkts; /* # of pkts enqd with ovrd bit set */ 24783 uint16 n_overrides; /* # of overrides - this is only trig_wlc */ 24784 uint16 n_override_pkts_acked; /* # of ovrd pkts that got an ACK */ 24785 uint16 n_override_pkts_not_acked; /* # of ovrd pkts that werent ACKed */ 24786 } hp2p_rllw_stats_v1_t; 24787 24788 /* TX enable flags */ 24789 #define WL_HP2P_TX_AMPDU 0x0001u 24790 #define WL_HP2P_TX_AMSDU 0x0002u 24791 #define WL_HP2P_TX_RDG 0x0004u 24792 #define WL_HP2P_TX_TXOP 0x0008u 24793 #define WL_HP2P_TX_TXOP_RTS 0x0010u 24794 24795 /* RX enable flags */ 24796 #define WL_HP2P_RX_AMPDU 0x0001u 24797 #define WL_HP2P_RX_AMSDU 0x0002u 24798 #define WL_HP2P_RX_RDG 0x0004u 24799 #define WL_HP2P_RX_AMPDU_REORDER 0x0008u 24800 #define WL_HP2P_RX_DELETE 0x0010u 24801 24802 /* Max/min values for configuration parameters to check validity */ 24803 #define WL_HP2P_MAX_RETRY_MAX 14u 24804 #define WL_HP2P_MAX_RETRY_MIN 6u 24805 #define WL_HP2P_LATENCY_TARGET_MAX 30u 24806 #define WL_HP2P_BURST_INTERVAL_MAX 64u 24807 #define WL_HP2P_MAX_FIFO 5u 24808 #define WL_HP2P_MAX_UCODE_LATENCY_THR 500u 24809 #define WL_HP2P_MAX_UCODE_RECOV_TO 500u 24810 #define WL_HP2P_MAX_UCODE_NAV_THR 50000u 24811 24812 #define WLC_HP2P_DEF_NAV_THRESH 13u 24813 #define WLC_HP2P_MIN_NAV_THRESH 1u 24814 #define WLC_HP2P_MAX_NAV_THRESH 35u 24815 #define WLC_HP2P_MAX_HOF_WAIT_THRESH 65u 24816 24817 #define WL_HP2P_VERSION 1u 24818 typedef struct hp2p_tx_config { 24819 struct ether_addr peer_addr; 24820 uint16 max_burst; 24821 uint16 txop; /* stored in network order (ls octet first) */ 24822 uint16 flags; /* flags to enable/disable AMPDU, AMSDU, RDG, TXOP, TXOP_RTS */ 24823 uint8 aci; 24824 uint8 ecw; 24825 uint8 fifo; 24826 uint8 tid; 24827 uint8 burst_interval; 24828 uint8 latency_target; 24829 uint8 max_retry; 24830 uint8 pad; 24831 } hp2p_tx_config_t; 24832 24833 typedef struct hp2p_rx_config { 24834 struct ether_addr peer_addr; 24835 uint16 flags; /* flags to enable/disable AMPDU, AMSDU, RDG, AMPDU Reorder */ 24836 uint8 tid; 24837 uint8 pad; 24838 uint16 ba_wsize; /* AMPDU BA Window size */ 24839 } hp2p_rx_config_t; 24840 24841 typedef struct hp2p_udbg_config { 24842 uint16 recovery_timeout; /* multiples of 256 usecs */ 24843 uint16 latency_thresh; /* multiples of 256 usecs */ 24844 uint16 enable_trap; /* trap if ucode delay exceeds latency_thresh */ 24845 uint16 nav_thresh; /* in usec */ 24846 } hp2p_udbg_config_t; 24847 24848 #define WLC_HP2P_RLLW_RETRY_LIMIT 7u 24849 #define WLC_HP2P_MAX_PKTLIFETIME_IN_MS 2000u /* 2 seconds */ 24850 24851 /* 24852 * nav_thresh: 13 : By default set to 13ms 24853 * retry_limit: 0 : Auto / Default retry limit to be applied 24854 * Max retry limit is 7 24855 * pkt_lifetime: 0 : Auto / Default pkt lifetime to be applied 24856 * Max value cant exceed 2000u (2seconds) 24857 * floor_rate: 0 : Auto / Default min rate to be applied 24858 * ceiling_rate: 0 : Auto / Default max rate to be applied 24859 * hof_wait_thr: 0 : Disabled by default 24860 * hof_switch_dur: 0 : Disabled by default 24861 */ 24862 typedef struct hp2p_rllw_cfg { 24863 uint8 nav_thresh; /* NAV threshold in ms */ 24864 uint8 retry_limit; /* # max retries before pkt is discarded */ 24865 uint16 pkt_lifetime; /* Pkt lifetime in ms */ 24866 uint16 floor_rate; /* Min rate in Mbps */ 24867 uint16 ceiling_rate; /* Max rate in Mbps */ 24868 uint16 hof_wait_thr; /* HOF packet wait threshold in ms */ 24869 uint16 hof_switch_dur; /* How long to stay in the switched band in ms */ 24870 uint16 hof_pkt_life_thr; /* HOF remaining pkt lifetime threshold in ms */ 24871 uint16 pad; 24872 } hp2p_rllw_cfg_t; 24873 24874 #define WL_HP2P_CAP_MPEER 0x01u /* Multipeer Hp2p */ 24875 #define WL_HP2P_CAP_MPEER_TXOP 0x02u /* Same txop transmit on mpeer Hp2p */ 24876 #define WL_HP2P_CAP_RLLW 0x04u /* Band switching and override on NAV */ 24877 #define WL_HP2P_CAP_SPLIT_TXS 0x08u /* Spilt tx status for rllw sub feature */ 24878 24879 typedef uint32 hp2p_cap_t; /* HP2P capabilities */ 24880 24881 typedef struct hp2p_cmd { 24882 uint16 type; 24883 uint16 len; 24884 uint8 data[]; 24885 } hp2p_cmd_t; 24886 24887 #define WL_HP2P_CTRL_MPEER_TXOP_ENAB 0x01u /* Same txop transmit on mpeer Hp2p */ 24888 /* 24889 * Band switching on NAV. Control for band 24890 * switching for HPP traffic, applies only 24891 * for dual local/peer map availability. 24892 */ 24893 #define WL_HP2P_CTRL_RLLW_SWITCH_ENAB 0x02u /* RLLW Band switching enabled */ 24894 #define WL_HP2P_CTRL_RLLW_PRIMARY_OVR 0x04u /* RLLW Override enab on primary band. */ 24895 #define WL_HP2P_CTRL_RLLW_DENY_BT 0x08u /* RLLW Give WiFi priority over BT */ 24896 #define WL_HP2P_CTRL_RLLW_PKTLT_ENAB 0x10u /* RLLW pkt lifetime based decision enabled */ 24897 #define WL_HP2P_CTRL_RLLW_HOF_SW_ENAB 0x20u /* RLLW Band switching due to HOF timeout enabled */ 24898 24899 typedef uint32 hp2p_ctrl_t; /* HP2P Ctrl bits */ 24900 24901 /* TLVs for HP2P related IOVARs */ 24902 typedef enum wl_hp2p_tlv { 24903 HP2P_TLV_RLLW_SLICE_STATS = 1u, 24904 HP2P_TLV_RLLW_PEER_STATS = 2u 24905 } wl_hp2p_tlv_t; 24906 24907 /* Top level HP2P RLLW stats header */ 24908 typedef struct wl_hp2p_stats_hdr { 24909 uint32 n_stats; /* # of TLVs in the payload */ 24910 uint32 totlen; /* total length of TLVs following this field */ 24911 uint8 stats_tlvs[]; /* chain of TLVs for reader to decode based on length */ 24912 } wl_hp2p_stats_hdr; 24913 24914 /* Per Slice RLLW Stats */ 24915 typedef struct wlc_hp2p_rllw_slice_stats { 24916 uint8 slice; /* slice number */ 24917 uint8 pad; 24918 uint16 n_hnav_intrs; /* # of high nav interrupts on slice n */ 24919 uint16 n_overrides; /* # of overrides */ 24920 uint16 n_switches; /* # of switches */ 24921 uint32 n_switched_pkts; /* # of packets after switching to slice n */ 24922 uint32 n_switched_pkts_not_acked; /* # of packets after switch & Not ACKed */ 24923 uint32 n_override_pkts; /* # of pkts enqd with ovrd bit set on slice n */ 24924 uint32 n_override_pkts_not_acked; /* # of ovrd pkts that werent ACKed on slice n */ 24925 uint32 n_no_switch_in_pktlife; /* # of no switch happened,pkts within lifetime */ 24926 uint32 n_no_override_in_pktlife; /* # of no ovrd happened,pkts within lifetime */ 24927 uint16 n_no_hof_switch_in_pktlife; /* # of skipped HOF switches due to pkt lifetime */ 24928 uint16 n_no_hof_switch_null_pkt; /* # of skipped HOF switches due to NULL HOF pkt */ 24929 uint16 n_hof_switches; /* # of switches triggered by HOF timeout */ 24930 uint16 n_hof_intrs; /* # of HOF interrupts on slice n */ 24931 } wlc_hp2p_rllw_slice_stats_t; 24932 24933 /* Peer specific stats */ 24934 typedef struct { 24935 uint8 slice; /* slice number */ 24936 uint8 pad[3]; 24937 uint16 n_overrides; /* # of overrides */ 24938 uint16 n_switches; /* # of switches */ 24939 uint32 n_switched_pkts; /* # of packets after switching to slice n */ 24940 uint32 n_switched_pkts_not_acked; /* # of packets after switch & Not ACKed */ 24941 uint32 n_override_pkts; /* # of pkts enqd with ovrd bit set on slice n */ 24942 uint32 n_override_pkts_not_acked; /* # of ovrd pkts that werent ACKed on slice n */ 24943 uint32 n_no_switch_in_pktlife; /* # of no switch happened,pkts within lifetime */ 24944 uint32 n_no_override_in_pktlife; /* # of no ovrd happened,pkts within lifetime */ 24945 uint16 n_no_hof_switch_in_pktlife; /* # of skipped HOF switches due to pkt lifetime */ 24946 uint16 n_hof_switches; /* # of switches triggered by HOF timeout */ 24947 } wlc_hp2p_rllw_peer_stats_t; 24948 24949 /* Peer Stats Info to host */ 24950 typedef struct wlc_hp2p_peer_stats_info { 24951 struct ether_addr peer_mac; /* Mac Address of the HP2P peer */ 24952 uint16 nslices; /* Number of slices */ 24953 wlc_hp2p_rllw_peer_stats_t peer_stats[MAX_NUM_D11CORES]; /* Peer specific stats */ 24954 } wlc_hp2p_peer_stats_info_t; 24955 24956 typedef struct hp2p_cmd_hdr { 24957 uint16 version; 24958 uint16 slice_idx; 24959 uint8 cmd[]; 24960 } hp2p_cmd_hdr_t; 24961 24962 /* to be used in type field of hp2p_cmd_t structure while issuing HP2P commands */ 24963 typedef enum hp2p_cmd_id { 24964 WL_HP2P_CMD_ENABLE = 0, /* Enable HP2P */ 24965 WL_HP2P_CMD_TX_CONFIG = 1, /* Tx Configuration */ 24966 WL_HP2P_CMD_RX_CONFIG = 2, /* Rx Configuration */ 24967 WL_HP2P_CMD_COUNTERS = 3, /* HP2P Counters */ 24968 WL_HP2P_CMD_UDBG_CONFIG = 4, /* ucode debug config */ 24969 WL_HP2P_CMD_RLLW_CFG = 5, /* HP2P RLLW config */ 24970 WL_HP2P_CMD_RLLW_STATS = 6, /* HP2P RLLW Stats */ 24971 WL_HP2P_CMD_CAP = 7, /* HP2P Capability */ 24972 WL_HP2P_CMD_CTRL = 8, /* HP2P feature ctrl */ 24973 WL_HP2P_CMD_RLLW_CFG_V2 = 9, /* HP2P RLLW config v2 */ 24974 WL_HP2P_CMD_RLLW_STATS_V2 = 10 /* HP2P RLLW Stats v2 */ 24975 } hp2p_cmd_id_t; 24976 24977 /** 24978 * TX Profile. 24979 * 24980 * TX Profile allows the host to configure frames with a specific profile. This 24981 * includes but is not limited to transmit rate, number of retries, whether or 24982 * not to use frame aggregation, whether or not to use AMSDU and RTS protection 24983 * threshold. The original intent is for the host to be able to specify transmit 24984 * "reliability". 24985 */ 24986 24987 /* IOVAR */ 24988 typedef struct wlc_tx_profile_ioc { 24989 uint16 id; 24990 uint16 length; 24991 union { 24992 uint32 options; 24993 uint32 status; 24994 } u; 24995 uint8 data[]; 24996 } wlc_tx_profile_ioc_t; 24997 24998 #define TX_PROFILE_IOV_HDR_SIZE (OFFSETOF(wlc_tx_profile_ioc_t, u)) 24999 #define TX_PROFILE_IOV_OPTION_SIZE (sizeof(wlc_tx_profile_ioc_t) - TX_PROFILE_IOV_HDR_SIZE) 25000 25001 /* TX Profile parameter TLV */ 25002 enum tx_profile_param_id { 25003 WL_TX_PROFILE_PARAM_RATE = 0, 25004 WL_TX_PROFILE_PARAM_RTS = 1, 25005 WL_TX_PROFILE_PARAM_RETRY = 2, 25006 WL_TX_PROFILE_PARAM_BW = 3, 25007 WL_TX_PROFILE_PARAM_AGGRE = 4, 25008 WL_TX_PROFILE_PARAM_AMSDU = 5, 25009 WL_TX_PROFILE_PARAM_AMPDU = 6, 25010 WL_TX_PROFILE_PARAM_LAST = 7 25011 }; 25012 25013 typedef enum tx_profile_param_id tx_profile_param_id_t; 25014 25015 typedef struct tx_profile_param { 25016 uint16 param_id; 25017 uint16 length; 25018 uint8 param[]; 25019 } tx_profile_param_t; 25020 25021 /* Subcommands */ 25022 typedef enum tx_profile_cmd_id { 25023 /* The IOVAR to enable/disable the TX Profile in general. An integer 25024 * is passed to the firmware with value 0 or 1. 25025 */ 25026 WL_TX_PROFILE_ENABLE = 0, 25027 /* Create a TX Profile with provided parameters. */ 25028 WL_TX_PROFILE_CREATE = 1, 25029 /* Update a TX profile with provided parameters. */ 25030 WL_TX_PROFILE_UPDATE = 2, 25031 /* Delete a TX Profile. */ 25032 WL_TX_PROFILE_DELETE = 3, 25033 /* Dump TX Profile related debug information. */ 25034 WL_TX_PROFILE_DUMP = 4, 25035 /* Show TX Profile stats */ 25036 WL_TX_PROFILE_STATS = 5, 25037 /* Show Tx Profile tagged packets log */ 25038 WL_TX_PROFILE_PKT_LOGS = 6 25039 } tx_profile_cmd_id_t; 25040 25041 typedef struct tx_profile_index_params { 25042 uint16 profile_index; 25043 uint16 length; 25044 uint8 params[]; 25045 } tx_profile_index_params_t; 25046 25047 typedef struct tx_profile_index_stats { 25048 uint32 profile_index; 25049 uint32 tx_finish_cnt; 25050 uint32 tx_acked_cnt; 25051 uint32 tx_phy_err_cnt; 25052 uint32 tx_suspend_cnt; 25053 } tx_profile_index_stats_t; 25054 25055 typedef struct tx_profile_pkt_log { 25056 uint32 rate; 25057 uint16 retries; 25058 uint16 rts; 25059 } tx_profile_pkt_log_t; 25060 25061 /* End TX Profile section */ 25062 25063 typedef enum wl_rffe_cmd_type { 25064 WL_RFFE_CMD_DEBUG_MODE = 0, 25065 WL_RFFE_CMD_ELNABYP_MODE = 1, 25066 WL_RFFE_CMD_REG = 2, 25067 WL_RFFE_CMD_ELNA_VDD_MODE = 3, 25068 WL_RFFE_CMD_LAST 25069 } wl_rffe_cmd_type_t; 25070 25071 /** RFFE struct passed through ioctl */ 25072 typedef struct { 25073 uint32 regaddr; /**< rFEM_RegAddr */ 25074 uint32 antnum; /**< rFEM AntNum */ 25075 uint32 slaveid; /**< rFEM SlaveID */ 25076 uint32 value; /**< read/write value */ 25077 } rffe_reg_t; 25078 25079 #ifndef BCMUTILS_ERR_CODES 25080 25081 /* 25082 * SOE (Security Offload Engine) status codes. 25083 */ 25084 25085 /* SOE status codes are reserved from -6144 to -7167 (1K) */ 25086 25087 enum wl_soe_status { 25088 /* Invalid operational context */ 25089 WL_SOE_E_BAD_OP_CONTEXT = -6144, 25090 25091 /* Invalid operational type */ 25092 WL_SOE_E_BAD_OP_TYPE = -6145, 25093 25094 /* Failure to get NAF3 encoded scalar */ 25095 WL_SOE_E_BN_GET_NAF3_ERROR = -6146, 25096 25097 /* Failure to get NAF3 params */ 25098 WL_SOE_E_ECG_GET_NAF3_PARAMS_ERROR = -6147, 25099 25100 /* FAILURE to get Montgomery params */ 25101 WL_SOE_E_MONT_PARAMS_GET_ERROR = -6148, 25102 25103 /* Invalid OSL handle */ 25104 WL_SOE_E_BAD_SI_OSH = -6149, 25105 25106 /* Invalid ECG group */ 25107 WL_SOE_E_BAD_ECG_GROUP = -6150, 25108 25109 /* Invalid BN context */ 25110 WL_SOE_E_BAD_BN_CTX = -6151, 25111 25112 /* Invalid SOE core register base address */ 25113 WL_SOE_E_BAD_SOE_REGBASE = -6152, 25114 25115 /* Invalid SOE context */ 25116 WL_SOE_E_BAD_SOE_CONTXT = -6153, 25117 25118 /* Number of words are too short (i.e., not enough 25119 * room to encode the PKA sequence) 25120 */ 25121 WL_SOE_E_PKA_SEQUENCE_WORDS_TOO_SHORT = -6154, 25122 25123 /* Generic bn_get error */ 25124 WL_SOE_E_PKA_BN_GET_ERROR = -6155, 25125 25126 /* Sequence buf too short for BN */ 25127 WL_SOE_E_PKA_BN_BUF_TOO_SHORT_BN = -6156, 25128 25129 /* Sequence buf too short for ECG prime */ 25130 WL_SOE_E_PKA_BN_BUF_TOO_SHORT_ECG_PRIME = -6157, 25131 25132 /* Sequence buf too short for Montgomery N' */ 25133 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_MONT_PRIME = -6158, 25134 25135 /* Sequence buf too short for Accumulator registers */ 25136 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_ACCM_REG = -6159, 25137 25138 /* Sequence buf too short for the point P */ 25139 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_P = -6160, 25140 25141 /* Sequence buf too short for -P */ 25142 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_PN = -6161, 25143 25144 /* Sequence buf too short for 3P */ 25145 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_3P = -6162, 25146 25147 /* Sequence buf too short for -3P */ 25148 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_3PN = -6163, 25149 25150 /* Sequence buf too short for NAF3 scalar */ 25151 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_NAF3_SCALAR = -6164, 25152 25153 /* Sequence buf too short for load shift count */ 25154 WL_SOE_E_PKA_SEQ_BUF_TOO_SHORT_PRE_JMP = -6165, 25155 25156 /* SOE engine(SHA/PKA) failed to complete the operation */ 25157 WL_SOE_E_ENGINE_UNABLE_TO_COMPLETE = -6166, 25158 25159 /* Wrong LIR (Long Integer Register) type */ 25160 WL_SOE_E_PKA_BAD_LIR_TYPE = -6167, 25161 25162 /* Reference count has reached maximum */ 25163 WL_SOE_E_MAX_REF_COUNT_REACHED = -6168, 25164 25165 /* Failed to get the SOE context reference */ 25166 WL_SOE_E_GET_REF_FAILED = -6169, 25167 25168 /* Incoming digest length is invalid */ 25169 WL_SOE_E_SHA_WRONG_DIGEST_LEN = -6170 25170 }; 25171 25172 #endif /* BCMUTILS_ERR_CODES */ 25173 25174 #define NR5GCX_STATUS_VER_1 1 25175 /* NR coex status structures */ 25176 typedef struct wlc_nr5gcx_status_v1 { 25177 uint16 version; /* version info */ 25178 uint16 len; /* status length */ 25179 uint32 mode; /* NR coex status */ 25180 uint32 nr_req_cnt; /* NR req number since last read */ 25181 uint32 nr_dur; /* NR duration since last read, us */ 25182 uint32 nr_duty_cycle; /* NR duty cycle since last read */ 25183 uint32 nr_max_dur; /* NR max duration in a single request */ 25184 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 25185 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 25186 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 25187 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 25188 * 1 event per bit. 25189 */ 25190 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 25191 * event whose dur is max 25192 */ 25193 } wlc_nr5gcx_status_v1_t; 25194 25195 #define NR5GCX_STATUS_VER_2 2 25196 /* NR coex status structures */ 25197 typedef struct wlc_nr5gcx_status_v2 { 25198 uint16 version; /* version info */ 25199 uint16 len; /* status length */ 25200 uint32 mode; /* NR coex status */ 25201 uint32 nr_req_cnt; /* NR req number since last read */ 25202 uint32 nr_dur; /* NR duration since last read, us */ 25203 uint32 nr_duty_cycle; /* NR duty cycle since last read */ 25204 uint32 nr_max_dur; /* NR max duration in a single request */ 25205 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 25206 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 25207 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 25208 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 25209 * 1 event per bit. 25210 */ 25211 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 25212 * event whose dur is max 25213 */ 25214 uint16 data_stall_cnt; /* # of data stall, i.e., # of rate recovery. */ 25215 uint16 nr_deny_cnt_data_stall; /* # of NR deny due to data stall. */ 25216 uint16 nr_deny_dur_data_stall; /* Duration of NR deny due to data stall. */ 25217 uint16 succ_rr_cnt; /* # of successful rate recovery. */ 25218 } wlc_nr5gcx_status_v2_t; 25219 25220 #define RC1CX_STATUS_VER_1 1 25221 /* RC1 coex status structures */ 25222 typedef struct wlc_rc1cx_status_v1 { 25223 uint16 version; /* version info */ 25224 uint16 len; /* status length */ 25225 uint32 mode; /* RC1 coex status */ 25226 uint32 rc1_req_cnt; /* RC1 req number since last read */ 25227 uint32 rc1_dur; /* RC1 duration since last read, us */ 25228 uint32 rc1_duty_cycle; /* RC1 duty cycle since last read */ 25229 uint32 rc1_max_dur; /* RC1 max duration in a single request */ 25230 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 25231 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 25232 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 25233 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 25234 * 1 event per bit. 25235 */ 25236 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 25237 * event whose dur is max 25238 */ 25239 } wlc_rc1cx_status_v1_t; 25240 25241 #define RC1CX_STATUS_VER_2 2 25242 /* RC1 coex status structures */ 25243 typedef struct wlc_rc1cx_status_v2 { 25244 uint16 version; /* version info */ 25245 uint16 len; /* status length */ 25246 uint32 mode; /* RC1 coex status */ 25247 uint32 rc1_req_cnt; /* RC1 req number since last read */ 25248 uint32 rc1_dur; /* RC1 duration since last read, us */ 25249 uint32 rc1_duty_cycle; /* RC1 duty cycle since last read */ 25250 uint32 rc1_max_dur; /* RC1 max duration in a single request */ 25251 uint32 wlan_crit_cnt; /* aggregated # of WLAN critical events */ 25252 uint32 wlan_crit_dur; /* aggregated WLAN critical event duration, ms */ 25253 uint32 wlan_crit_max_dur; /* Duration of the WLAN critical events whose dur is max */ 25254 uint16 wlan_crit_evt_bitmap; /* WLAN critical event occurrence bitmap, 25255 * 1 event per bit. 25256 */ 25257 uint16 wlan_crit_max_evt_type; /* The event type of the WLAN critical 25258 * event whose dur is max 25259 */ 25260 uint16 data_stall_cnt; /* # of data stall, i.e., # of rate recovery. */ 25261 uint16 rc1_deny_cnt_data_stall; /* # of RC1 deny due to data stall. */ 25262 uint16 rc1_deny_dur_data_stall; /* Duration of RC1 deny due to data stall. */ 25263 uint16 succ_rr_cnt; /* # of successful rate recovery. */ 25264 } wlc_rc1cx_status_v2_t; 25265 25266 /* ifdef (WLC_OBSS_HW) */ 25267 /* OBSS HW specific Macros */ 25268 #define WLC_OBSS_HW_CMD_VERSION_1 1u 25269 25270 /* OBSS HW config sub command identification flag */ 25271 #define OBSS_HW_CFG_SUB_CMD_ENABLE (1u << 0u) 25272 #define OBSS_HW_CFG_SUB_CMD_SW_CACHE_INTVL (1u << 1u) 25273 #define OBSS_HW_CFG_SUB_CMD_PHY_SENSE_DUR (1u << 2u) 25274 #define OBSS_HW_CFG_SUB_CMD_MASK (OBSS_HW_CFG_SUB_CMD_ENABLE | \ 25275 OBSS_HW_CFG_SUB_CMD_SW_CACHE_INTVL | \ 25276 OBSS_HW_CFG_SUB_CMD_PHY_SENSE_DUR) 25277 25278 #define WLC_OBSS_HW_DEF_SW_CACHE_INTVL 1u /* 1 sec */ 25279 #define WLC_OBSS_HW_MAX_SW_CACHE_INTVL 5u /* 5 sec */ 25280 #define WLC_OBSS_HW_DEF_PHY_SENSE_DUR 30 /* 30 msec */ 25281 #define WLC_OBSS_HW_MAX_PHY_SENSE_DUR 500 /* 500 msec */ 25282 25283 /* OBSS HW test sub command identification flag */ 25284 #define WLC_OBSS_HW_TEST_SUB_CMD_TEST_MODE (1u << 0u) 25285 #define WLC_OBSS_HW_TEST_SUB_CMD_MITI_MODE (1u << 1u) 25286 #define WLC_OBSS_HW_TEST_SUB_CMD_MASK (WLC_OBSS_HW_TEST_SUB_CMD_TEST_MODE |\ 25287 WLC_OBSS_HW_TEST_SUB_CMD_MITI_MODE) 25288 25289 /* Test mode values */ 25290 #define WLC_OBSS_HW_TEST_MODE_STOP 0u /* Stop the test */ 25291 #define WLC_OBSS_HW_TEST_MODE_TRIGGER 1u /* Trigger mode */ 25292 #define WLC_OBSS_HW_TEST_MODE_FREE_RUNNING 2u /* Free running stats collection */ 25293 25294 #define WLC_OBSS_HW_TEST_MITI_TX_RX_DISABLE 0u /* Both Tx and Rx mitigation disabled */ 25295 #define WLC_OBSS_HW_TEST_MITI_RX_FILT_PKTENG 1u /* Rx mitigation via filter override enabled */ 25296 /* All Tx miti disabled; Only pkteng */ 25297 #define WLC_OBSS_HW_TEST_MITI_TX_ONLY 2u /* Rx mitigation disabled, Tx mitigation */ 25298 #define WLC_OBSS_HW_TEST_MITI_TX_RX_FILT 3u /* Rx Tx mitigation enabled */ 25299 #define WLC_OBSS_HW_TEST_MITI_CHAN_CHANGE 4u /* Mitigation by chanspec change */ 25300 25301 #define WL_OBSS_ANT_MAX 2u /* Max Antennas */ 25302 #define ACPHY_OBSS_STATS_BIN_CNT 8u /* min 1 for default */ 25303 #define ACPHY_OBSS_SUBBAND_CNT 8u /* Max sub band counts i.e., 160Mhz = 8 * 20MHZ */ 25304 25305 enum wlc_obss_hw_cmd_id { 25306 WLC_OBSS_HW_CMD_VER = 1u, 25307 WLC_OBSS_HW_CMD_CONFIG = 2u, 25308 WLC_OBSS_HW_CMD_DUMP_STATS = 3u, 25309 WLC_OBSS_HW_CMD_TEST = 4u, 25310 WLC_OBSS_HW_CMD_LAST 25311 }; 25312 25313 /* OBSS HW specific structures */ 25314 typedef struct wlc_obss_hw_cfg_v1 { 25315 uint16 sub_cmd_flags; /* Flag bits to Identify configuring sub command */ 25316 uint8 is_enable; /* Feature is enabled or not */ 25317 uint8 sw_cache_interval; /* SW cache interval to cache OBSS stats in sec */ 25318 uint16 phy_sensing_duration; /* PHY OBSS sensing duration in msec */ 25319 } wlc_obss_hw_cfg_v1_t; 25320 25321 typedef struct wlc_obss_hw_stats_v1 { 25322 uint16 avg_obss_stats[WL_OBSS_ANT_MAX][ACPHY_OBSS_SUBBAND_CNT][ACPHY_OBSS_STATS_BIN_CNT]; 25323 uint16 obss_det_stats[ACPHY_OBSS_SUBBAND_CNT]; 25324 uint16 stats_cnt; /* Stats count */ 25325 uint8 obss_mit_status; /* OBSS mitigation status */ 25326 uint8 mit_bw; /* Mitigation BW that got selected */ 25327 } wlc_obss_hw_stats_v1_t; 25328 25329 typedef struct wlc_obss_hw_test_v1 { 25330 uint16 sub_cmd_flags; /* Flag bits to Identify configuring sub command */ 25331 uint8 test_mode; /* To stop/start respective test mode */ 25332 uint8 mitigation_mode; /* mitigation enabling/disabling options */ 25333 } wlc_obss_hw_test_v1_t; 25334 25335 #define STA_PM_SC_OFLD_CFG_VER_V1 1u 25336 #define STA_PM_SC_OFLD_ENAB_FLAG (1u << 0u) 25337 25338 #define STA_PM_SC_FLAG_MASK (1u << 0u) 25339 #define STA_PM_SC_CONS_EXP_BCN_RX_THR_MASK (1u << 1u) 25340 #define STA_PM_SC_MISSED_BCN_THR_MASK (1u << 2u) 25341 #define STA_PM_SC_OFLD_RSSI_THR_MASK (1u << 3u) 25342 #define STA_PM_SC_OFLD_RSSI_HYST_MASK (1u << 4u) 25343 #define STA_PM_SC_OFLD_TIM_EXIT_DLY_MASK (1u << 5u) 25344 #define STA_PM_SC_OFLD_FIELD_MASK_ALL (STA_PM_SC_FLAG_MASK | \ 25345 STA_PM_SC_CONS_EXP_BCN_RX_THR_MASK | \ 25346 STA_PM_SC_MISSED_BCN_THR_MASK | \ 25347 STA_PM_SC_OFLD_RSSI_THR_MASK | \ 25348 STA_PM_SC_OFLD_RSSI_HYST_MASK | \ 25349 STA_PM_SC_OFLD_TIM_EXIT_DLY_MASK) 25350 25351 #define STA_PM_SC_OFLD_RSSI_HYST_MAX 80u 25352 25353 typedef struct wlc_sta_pm_sc_ofld_cfg_v1 { 25354 uint16 version; 25355 uint16 len; 25356 uint16 field_mask; /* Provides info on which of the following fields are valid */ 25357 uint16 flags; /* enable 0x1 */ 25358 uint8 cons_exp_bcn_rx_thr; /* Consecutive expected bcn in true slice to offload to SC */ 25359 uint8 sc_missed_bcn_thr; /* Missed beacons threshold in SC to exit offload */ 25360 int8 sc_offload_rssi_thr; /* Bcn RSSI threshold to exit offload, must be negative */ 25361 uint8 sc_offload_rssi_hyst; /* Hysteresis for the RSSI threshold, 0 - RSSI_HYST_MAX */ 25362 uint8 tim_exit_delay_ms; /* TIM exit delay when DTIM AID=0 is also set */ 25363 uint8 PAD[3]; 25364 } wlc_sta_pm_sc_ofld_cfg_v1_t; 25365 25366 typedef enum wlc_sta_pm_sc_ofld_fail_reason { 25367 STA_PM_SC_OFLD_FAIL_RSSI = (1u << 0u), /* Low rssi */ 25368 STA_PM_SC_OFLD_FAIL_UNSUPPORTED = (1u << 1u), /* Unsupported by WBUS */ 25369 STA_PM_SC_OFLD_FAIL_MISSED_BCN = (1u << 2u), /* missed bcns on true slice */ 25370 STA_PM_SC_OFLD_FAIL_NO_PS = (1u << 3u), /* not in PM */ 25371 STA_PM_SC_OFLD_FAIL_TX_ACTIVE = (1u << 4u), /* Active TX in true slice */ 25372 STA_PM_SC_OFLD_FAIL_CSA = (1u << 5u), /* CSA */ 25373 STA_PM_SC_OFLD_FAIL_MRC = (1u << 6u), /* in MRC */ 25374 STA_PM_SC_OFLD_FAIL_AS_STATE = (1u << 7u), /* Assoc state not IDLE */ 25375 STA_PM_SC_OFLD_FAIL_NO_BASIC_RATESET = (1u << 8u), /* AP bcn has no basic rate */ 25376 STA_PM_SC_OFLD_FAIL_UNSUP_BCN_RATE_RX = (1u << 8u), /* AP bcn at SC unsup rate */ 25377 STA_PM_SC_OFLD_FAIL_DISABLED = (1u << 9u), /* Offload disabled */ 25378 STA_PM_SC_OFLD_FAIL_CAL = (1u << 10u), /* Cal on main/aux core */ 25379 STA_PM_SC_OFLD_FAIL_UNSUP_BCMC_RATE_RX = (1u << 11u), /* unsupported bcmc rate rx */ 25380 STA_PM_SC_OFLD_FAIL_TWT_ACTIVE = (1u << 12u), /* TWT is active */ 25381 STA_PM_SC_OFLD_FAIL_AP_ENAB = (1u << 13u), /* AP cfg is enabled */ 25382 STA_PM_SC_OFLD_FAIL_SLOTTED_BSS_ENAB = (1u << 14u), /* Slotted BSS is enabled */ 25383 STA_PM_SC_OFLD_FAIL_BTMC_ACTIVE = (1u << 15u), /* BT Main Core is active */ 25384 STA_PM_SC_OFLD_FAIL_UNSUP_BASIC_RATE = (1u << 16u) /* SC Unsupported basic rate */ 25385 } wlc_sta_pm_sc_ofld_fail_reason_t; 25386 25387 typedef enum wlc_sta_pm_sc_ofld_exit_reason { 25388 STA_PM_SC_OFLD_EXIT_AS_STATE = 1u, /* Exit due to assoc state not IDLE */ 25389 STA_PM_SC_OFLD_EXIT_BCN_LOSS = 2u, /* Exit due to beacon loss */ 25390 STA_PM_SC_OFLD_EXIT_TIM = 3u, /* Exit due to TIM bit set */ 25391 STA_PM_SC_OFLD_EXIT_PM = 4u, /* Exit due to exit out of PM mode */ 25392 STA_PM_SC_OFLD_EXIT_TX = 5u, /* Exit due to tx on true slice */ 25393 STA_PM_SC_OFLD_EXIT_CSA = 6u, /* Exit due to CSA */ 25394 STA_PM_SC_OFLD_EXIT_LOW_RSSI = 7u, /* Exit due to rssi lower than threshold */ 25395 STA_PM_SC_OFLD_EXIT_MRC = 8u, /* Exit due to MRC being active */ 25396 STA_PM_SC_OFLD_EXIT_BSSCFG_DOWN = 9u, /* Exit due to bsscfg down */ 25397 STA_PM_SC_OFLD_EXIT_WLC_DOWN = 10u, /* Exit due to wlc down */ 25398 STA_PM_SC_OFLD_EXIT_WBUS_REJECT = 11u, /* Exit due to wbus reject */ 25399 STA_PM_SC_OFLD_EXIT_HOST_DISABLE = 12u, /* Exit due to disable by host */ 25400 STA_PM_SC_OFLD_EXIT_CAL_TVPM = 13u, /* Exit due to Cal/TVPM on main/aux core */ 25401 STA_PM_SC_OFLD_EXIT_DISASSOC = 14u, /* Exit due to disassoc */ 25402 STA_PM_SC_OFLD_EXIT_CAC = 15u, /* Exit due to CAC admit */ 25403 STA_PM_SC_OFLD_EXIT_CHN_OVERLAP = 16u, /* Exit due to true slice chan overlap */ 25404 STA_PM_SC_OFLD_EXIT_UNSUP_BCMC_RATE_RX = 17u, /* Exit due to unsupported bcmc rate rx */ 25405 STA_PM_SC_OFLD_EXIT_BCMC_LOSS = 18u, /* Exit due to bcmc pkt loss */ 25406 STA_PM_SC_OFLD_EXIT_TWT = 19u, /* Exit due to TWT active */ 25407 STA_PM_SC_OFLD_EXIT_SLOTTED_BSS = 20u, /* Exit due to Slotted BSS active */ 25408 STA_PM_SC_OFLD_EXIT_AP_BSS = 21u, /* Exit due to AP BSS active */ 25409 STA_PM_SC_OFLD_EXIT_MAX = 255u /* Max, uint8 for now */ 25410 } wlc_sta_pm_sc_ofld_exit_reason_t; 25411 25412 #define STA_PM_SC_OFLD_STATUS_VER_V1 1u 25413 25414 #define STA_PM_SC_OFLD_STATUS_CLEAR (1u << 0u) 25415 #define STA_PM_SC_OFLD_STATUS_OFFLOADED (1u << 1u) 25416 #define STA_PM_SC_OFLD_STATUS_ASSOCIATED (1u << 2u) 25417 25418 typedef struct wlc_sta_pm_sc_status_v1 { 25419 uint16 version; 25420 uint16 len; 25421 uint32 flags; 25422 uint32 sc_offload_enter_cnt; /* Offload enter cnt */ 25423 uint32 sc_offload_exit_cnt; /* Offload exit cnt */ 25424 uint32 sc_offload_wbus_reject_cnt; /* WBUS reject reg cnt */ 25425 uint32 sc_offload_exp_bcn_cnt; /* SC ofld expected bcn cnt */ 25426 uint32 sc_offload_exp_bcn_missed_cnt; /* SC ofld missed bcn cnt */ 25427 uint32 sc_offload_last_exit_reason; /* Previous exit reason */ 25428 uint32 sc_offload_enter_fail_reason; /* SC ofld enter fail reason */ 25429 uint32 sc_offload_total_dur_ms; /* Cumulative duration in offload (ms) */ 25430 uint32 sc_offload_tim_exit_dly_cnt; /* TIM exit delay cnt */ 25431 } wlc_sta_pm_sc_status_v1_t; 25432 25433 #define WL_SDTC_IOV_VERSION 1 25434 #define SDTC_SUB_IOV_VERSION_1 1 25435 #define SDTC_SUB_IOV_VERSION_1_1 1 25436 #define MAX_ATID_CORES 5u 25437 #define SDTC_ID_ALL 0xFFu 25438 25439 /* SDTC IOV ID's */ 25440 enum wl_sdtc_iov_id { 25441 SDTC_ID_INVALID = 0x0, 25442 SDTC_ID_CB = 0x1, 25443 SDTC_ID_PCIE = 0x2, 25444 SDTC_ID_SYSMEM = 0x3, 25445 SDTC_ID_AUXMAC = 0x4, 25446 SDTC_ID_MAINMAC = 0x5 25447 }; 25448 25449 /* SDTC Iovars */ 25450 enum wl_sdtc_cmd_ids { 25451 WL_SDTC_CMD_EN = 0x1, 25452 WL_SDTC_CMD_CONFIG = 0x2, 25453 WL_SDTC_CMD_CORE_ENAB = 0x3, 25454 WL_SDTC_CMD_ETB_INFO = 0x4, 25455 WL_SDTC_CMD_LAST 25456 }; 25457 25458 enum wl_sdtc_xtlv_version { 25459 WL_SDTC_ENABLE_V1 = 0x1 25460 }; 25461 25462 typedef struct sdtc_regs { 25463 uint32 addr; 25464 uint32 val; 25465 } sdtc_regs_t; 25466 25467 typedef struct sdtc_config { 25468 uint16 version; 25469 uint16 len; 25470 25471 uint8 sdtc_id; /* 0xFF indicates, all core id's enable */ 25472 uint8 pad; /* 32 bit alignment */ 25473 uint16 num_of_registers; /* if no of reg is "0",it will use default SDTC config */ 25474 sdtc_regs_t regs[1]; /* Array of register list */ 25475 } sdtc_config_t; 25476 25477 typedef struct sdtc_enab_atid_list { 25478 uint16 version; 25479 uint16 len; 25480 25481 uint32 sdtc_id_bmp; 25482 uint32 sdtc_id_mask; 25483 } sdtc_enab_atid_list_t; 25484 25485 typedef struct etb_addr_info { 25486 uint16 version; 25487 uint16 len; 25488 uint32 etbinfo_addr; /* etb_info address */ 25489 } etb_addr_info_t; 25490 25491 typedef struct etb_info { 25492 uint16 version; 25493 uint16 len; 25494 uint32 read_write_p; /* read write pointer address */ 25495 uint8 etb_full; /* status bit */ 25496 uint8 pad[3]; /* 32bit alignment */ 25497 uint32 addr; /* H/W Address */ 25498 uint32 read_bytes; /* Size of ETB(Embedded Trace Buffer) Memory */ 25499 } etb_info_t; 25500 25501 /* This ROAM RSSI limit value is used in order to prune LOW RSSI candidate 25502 * for Priority roam and Beacon lost 25503 * WLC_E_REASON_DEAUTH, WLC_E_REASON_DISASSOC, WLC_E_REASON_BCNS_LOST 25504 */ 25505 #define WLC_ROAM_RSSI_LMT_VER_1 1 25506 typedef struct wlc_roam_rssi_lmt_info_v1 { 25507 int16 rssi_limit_2g; 25508 int16 rssi_limit_5g; 25509 } wlc_roam_rssi_lmt_info_v1_t; 25510 25511 typedef struct wlc_wlc_roam_rssi_limit { 25512 uint16 ver; 25513 uint16 len; 25514 uint8 data[]; 25515 } wlc_roam_rssi_limit_t; 25516 25517 #define ROAMRSSI_HDRLEN 4u 25518 #define ROAMRSSI_2G_DEFAULT -128 25519 #define ROAMRSSI_2G_MAX -70 25520 #define ROAMRSSI_2G_MIN -128 25521 #define ROAMRSSI_5G_DEFAULT -128 25522 #define ROAMRSSI_5G_MAX -70 25523 #define ROAMRSSI_5G_MIN -128 25524 25525 #define WLC_ROAM_MIN_DELTA_VER_1 1 25526 typedef struct wlc_roam_min_score_delta_info_v1 { 25527 uint32 roam_min_delta_2g; 25528 uint32 roam_min_delta_5g; 25529 } wlc_roam_min_delta_info_v1_t; 25530 25531 typedef struct wlc_roam_min_delta { 25532 uint16 ver; 25533 uint16 len; 25534 uint8 data[]; 25535 } wlc_roam_min_delta_t; 25536 25537 #define ROAM_MIN_DELTA_HDRLEN 4u 25538 #define ROAM_MIN_DELTA_DEFAULT 0u 25539 /* MAX score is (RSSI Factor MAX * RSSI weight) + (CU factor MAX * CU weight) 25540 * 10000 = (100 * 65) + (100 * 35) 25541 */ 25542 #define ROAM_MIN_DELTA_MAX 10000u 25543 25544 /* Beacon mute mitigation specific Macros */ 25545 25546 /* Macro flags to identify the specific config commands in IOVAR set operation */ 25547 #define WLC_BCN_MUTE_MITI_CFG_CMD_ENABLE (1u << 0u) 25548 #define WLC_BCN_MUTE_MITI_CFG_CMD_PM0_PERIOD (1u << 1u) 25549 #define WLC_BCN_MUTE_MITI_CFG_CMD_MAX_MITI_TIMEOUT (1u << 2u) 25550 #define WLC_BCN_MUTE_MITI_CFG_CMD_MASK (WLC_BCN_MUTE_MITI_CFG_CMD_ENABLE |\ 25551 WLC_BCN_MUTE_MITI_CFG_CMD_PM0_PERIOD |\ 25552 WLC_BCN_MUTE_MITI_CFG_CMD_MAX_MITI_TIMEOUT) 25553 25554 /* Configurable PM0 period range in sec */ 25555 #define WLC_BCN_MUTE_MITI_CFG_PM0_PERIOD_MIN (0u) /* Minimum PM0 periodicity */ 25556 #define WLC_BCN_MUTE_MITI_CFG_PM0_PERIOD_DEFAULT (1u) /* Default PM0 periodicity */ 25557 #define WLC_BCN_MUTE_MITI_CFG_PM0_PERIOD_MAX (10u) /* Maximum PM0 priodicity */ 25558 25559 /* Configurable mitigation Timeout range */ 25560 #define WLC_BCN_MUTE_MITI_CFG_TIMEOUT_MIN (30u) /* Minimum Timeout in sec */ 25561 #define WLC_BCN_MUTE_MITI_CFG_TIMEOUT_DEFAULT (60u) /* Default Timeout in sec */ 25562 #define WLC_BCN_MUTE_MITI_CFG_TIMEOUT_MAX (120u) /* Maximum Timeout in sec */ 25563 25564 #define WLC_BCN_MUTE_MITI_CMD_VER_1 1u /* Version number for wlc_bcn_mute_miti_cfg_v1 struct */ 25565 typedef struct wlc_bcn_mute_miti_cfg_v1 { 25566 uint16 version; /* Structure version */ 25567 uint16 length; /* Length of whole struct */ 25568 uint32 cmd_flags; /* Flag bits to Identify configuring command */ 25569 uint8 is_enabled; /* Feature is enabled or not */ 25570 uint8 pm0_periodicity; /* Interval between consecutive PM0 during mitigation 25571 * period (in sec) 25572 */ 25573 uint16 max_miti_timeout; /* Maximum mitigation timeout in sec to send 25574 * Mitigation Timeout event. 25575 */ 25576 } wlc_bcn_mute_miti_cfg_v1_t; 25577 25578 #define WLC_BCN_TBTT_CMD_VER_1 (1u) /* Ver num for wlc_bcn_tbtt_cfg struct */ 25579 /* Configurable mitigation Timeout range */ 25580 #define WLC_BCN_TBTT_CFG_EVENT_PERIOD (3u) /* Send event after this value of drift */ 25581 #define WLC_BCN_TBTT_CFG_DRIFT_THRESH (3) /* in ms */ 25582 #define WLC_BCN_TBTT_CFG_JITTER_THRESH (1) /* in ms */ 25583 25584 /* Macro flags to identify the specific config commands in IOVAR set operation */ 25585 #define WLC_BCN_DRIFT_BCN_OFFSET (1u << 0u) 25586 #define WLC_BCN_DRIFT_EVENT_PERIOD (1u << 1u) 25587 #define WLC_BCN_DRIFT_DRIFT_THRESHOLD (1u << 2u) 25588 #define WLC_BCN_DRIFT_JITTER_THRESHOLD (1u << 3u) 25589 25590 /* configurable range */ 25591 #define WLC_BCN_DRIFT_BCN_OFFSET_MAX (15u) 25592 #define WLC_BCN_DRIFT_BCN_OFFSET_MIN (5u) 25593 25594 #define WLC_BCN_DRIFT_DRIFT_THRESHOLD_MAX (10) 25595 #define WLC_BCN_DRIFT_DRIFT_THRESHOLD_MIN (-4) 25596 25597 #define WLC_BCN_DRIFT_JITTER_THRESHOLD_MAX (2) 25598 #define WLC_BCN_DRIFT_JITTER_THRESHOLD_MIN (-2) 25599 25600 typedef struct wlc_bcn_tbtt_cfg_v1 { 25601 uint16 version; /* Structure version */ 25602 uint16 length; /* Length of whole struct */ 25603 uint32 cmd; /* type of cmd */ 25604 uint8 tbtt_bcn_off; /* num btw (5-15u) for uatbtt */ 25605 uint8 event_period; /* continous / periodic event */ 25606 int8 drift_thres; /* drift threshold for event in ms */ 25607 int8 jitter_thres; /* jitter threshold for event in ms */ 25608 } wlc_bcn_tbtt_cfg_v1_t; 25609 25610 /* SC scan retry config params */ 25611 #define SC_SCAN_RETRY_CFG_VERSION_1 1u 25612 #define SC_SCAN_RETRY_CFG_VERSION_2 2u 25613 25614 /* Bits indicating which are the valid params in the set command. */ 25615 #define SC_SCAN_RETRY_CFG_PARAMS_THRESHOLD (1u << 0u) 25616 #define SC_SCAN_RETRY_CFG_PARAMS_MODE (1u << 1u) 25617 #define SC_SCAN_RETRY_CFG_PARAMS_BTMCRX_WEIGHT (1u << 2u) 25618 25619 #ifndef SC_SCAN_RETRY_CFG_HAS_ALIAS 25620 #define SC_SCAN_RETRY_CFG_VERSION SC_SCAN_RETRY_CFG_VERSION_1 25621 #endif 25622 25623 /* Input structure for sc_scan_retry_cfg IOVAR */ 25624 typedef struct sc_scan_retry_cfg_params_v1 { 25625 uint16 version; /* config version. */ 25626 uint16 len; /* Length of this struct. */ 25627 uint32 set_flag; /* Flag bits to Identify valid param type to be set */ 25628 uint8 threshold; /* Amount of Tx-Blanking in percentage considered as failed scan. */ 25629 uint8 scan_mode; /* Scan mode in which scan need to be re-scheduled. */ 25630 uint8 PAD[2]; /* 32bit alignment */ 25631 } sc_scan_retry_cfg_params_v1_t; 25632 25633 /* Input structure for sc_scan_retry_cfg v2 IOVAR */ 25634 typedef struct sc_scan_retry_cfg_params_v2 { 25635 uint16 version; /* config version. */ 25636 uint16 len; /* Length of this struct. */ 25637 uint32 set_flag; /* Flag bits to Identify valid param type to 25638 * be set. 25639 */ 25640 uint8 threshold; /* Amount of Tx-Blanking + the weighted 25641 * BTMC Rx overlap. 25642 * in percentage considered as failed scan. 25643 */ 25644 uint8 scan_mode; /* Scan mode in which scan need to be 25645 *re-scheduled.. 25646 */ 25647 uint8 btmc_rx_overlap_weightage; /* weightage for btmc_rx_overlap duration in % */ 25648 uint8 PAD; /* 32bit alignment */ 25649 } sc_scan_retry_cfg_params_v2_t; 25650 25651 /* host queries RNG version from 'wl cap' iovar */ 25652 #define BCM_RNG_VERSION_1 1u /* for initial "reseed" version */ 25653 /* Supported entropy size, bytes */ 25654 #define BCM_RNG_ENTROPY_SIZE_BYTES 64u 25655 25656 /* RNG top level command IDs */ 25657 typedef enum wl_rng_cmd_id { 25658 WL_RNG_CMD_RESEED = 0u, 25659 WL_RNG_CMD_LAST = 1u 25660 } wl_rng_cmd_id_t; 25661 25662 /* RNG reseed host entropy */ 25663 typedef struct bcm_rng_reseed { 25664 uint16 entropy_size; /* host entropy size, bytes */ 25665 uint8 entropy[]; /* host entropy, flexible array */ 25666 } bcm_rng_reseed_t; 25667 25668 /* RNG IOVAR data */ 25669 typedef struct wl_rng_iovar { 25670 uint16 version; /* Version of this structure */ 25671 uint16 subcmd_id; /* RNG subcmd ID */ 25672 uint16 pad; /* padding for 32-bit struct alignment */ 25673 uint16 length; /* Length of data following this length field */ 25674 union { 25675 bcm_rng_reseed_t reseed; /* RNG reseed data */ 25676 } u; 25677 } wl_rng_iovar_t; 25678 25679 #ifdef RC2CX 25680 #define RC2CX_STATUS_VER_1 1 25681 /* RC2 coex status structures */ 25682 typedef struct wlc_rc2cx_stats_v1 { 25683 uint16 version; /* version info */ 25684 uint8 len; /* status length */ 25685 uint8 mode; /* RC2 coex mode */ 25686 uint16 rc2_req_cnt; /* RC2 req number since last read. */ 25687 uint16 rc2_grant_cnt; /* RC2 grant count since last read. */ 25688 uint32 rc2_dur; /* RC2 duration since last read, us. */ 25689 uint16 rc2_succ_pm_prot_cnt; /* RC2 number of successfully acked PM. */ 25690 uint16 rc2_succ_cts_prot_cnt; /* RC2 number of successfully TXed CTS2A. */ 25691 uint16 rc2_grant_delay_cnt; /* RC2 grant delay counter, delay > 4.5ms. */ 25692 uint16 rc2_crit_phycal_cnt; /* RC2 WLAN/BT critical: PHY cal. counter. */ 25693 uint16 rc2_crit_rate_cnt; /* RC2 WLAN/BT critical: rate recovery counter. */ 25694 uint16 rc2_crit_bcnloss_cnt; /* RC2 WLAN/BT critical: beacon loss counter. */ 25695 uint16 rc2_crit_hpp_cnt; /* RC2 WLAN/BT critical: HPP counter. */ 25696 uint16 rc2_crit_bt_cnt; /* RC2 WLAN/BT critical: BT counter. */ 25697 uint16 rc2_crit_slotbss_cnt; /* RC2 WLAN/BT critical: AWDL/NAN counter. */ 25698 uint16 rsvd; 25699 uint32 rc2_crit_cnt; /* RC2 WLAN/BT critical counter, aggregate. */ 25700 } wlc_rc2cx_stats_v1_t; 25701 25702 /* Definitions for RC2 coex iovar */ 25703 #define WL_RC2CX_VERSION 1 25704 25705 /* RC2 coex IOV sub command IDs */ 25706 typedef enum rc2cx_cmd_id { 25707 WL_RC2CX_CMD_VER = 0, /* RC2CX version sub command */ 25708 WL_RC2CX_CMD_MODE = 1, /* RC2CX Mode sub command */ 25709 WL_RC2CX_CMD_PM_PROT = 2, /* RC2CX PM Protection sub command */ 25710 WL_RC2CX_CMD_PER_CTS = 3 /* RC2CX Periodic CTS sub command */ 25711 } rc2cx_cmd_id_t; 25712 25713 /* first byte of bcm_iov_batch_subcmd.data for the WL_RC2CX_CMD_MODE command */ 25714 #define RC2CX_MODE_TDD 0x01u 25715 #define RC2CX_MODE_DISABLED 0x00u 25716 25717 /* first byte of bcm_iov_batch_subcmd.data for the WL_RC2CX_CMD_PM_PROT command */ 25718 #define RC2CX_PM_PROT_ENABLED 0x01u 25719 #define RC2CX_PM_PROT_DISABLED 0x00u 25720 25721 /* first byte of bcm_iov_batch_subcmd.data for the WL_RC2CX_CMD_PER_CTS command */ 25722 #define RC2CX_PER_CTS_ENABLED 0x01u 25723 #define RC2CX_PER_CTS_DISABLED 0x00u 25724 25725 #define RC2CX_PER_CTS_DENY_BT 0x02u 25726 #define RC2CX_PER_CTS_GRANT_BT 0x01u 25727 25728 /* payload for the WL_RC2CX_CMD_PER_CTS command */ 25729 typedef struct rc2cx_per_cts_config { 25730 uint8 enable_flag; /* 0: feature disabled; 25731 * 1: grant BT when granting RC2; 25732 * 2: deny BT when granting RC2 25733 */ 25734 uint8 duration_val; /* Must be valid with enable command */ 25735 uint8 interval_val; /* Must be valid with enable command */ 25736 uint8 pad; 25737 } rc2cx_per_cts_config_t; 25738 25739 #endif /* RC2CX */ 25740 25741 enum phy_rxgcrs_ed_enhncd_cmd_id { 25742 PHY_RXGCRS_ED_ENHNCD_CMD_EN = 1u, 25743 PHY_RXGCRS_ED_ENHNCD_CMD_STATUS = 2u, 25744 PHY_RXGCRS_ED_ENHNCD_CMD_COREMASK = 3u, 25745 PHY_RXGCRS_ED_ENHNCD_CMD_LAST 25746 }; 25747 25748 /* SAE command 25749 * Only IOV batching support - see bcmiov.h 25750 */ 25751 25752 /* SAE command version */ 25753 #define WL_SAE_CMD_VERSION 1 25754 25755 /* SAE sub-commands */ 25756 typedef enum sae_cmd_id { 25757 WL_SAE_CMD_AP_SESSION_HOLD_TIME = 1, /* AP rate limit session hold time 25758 * Data: uint32, 25759 * miliseconds 25760 */ 25761 WL_SAE_CMD_AP_MAX_ACTIVE_SESSIONS = 2, /* AP max sessions 25762 * Data: 25763 * uint32 25764 */ 25765 } sae_cmd_id_t; 25766 25767 /* Frameburst COT IOVAR data */ 25768 #define WL_FRAMEBURST_COT_VERSION 1u /* current version of frameburst_cot structure */ 25769 #define WL_FRAMEBURST_MAX_AC 4u 25770 typedef struct frameburst_cot { 25771 uint16 version; /* version of frameburst_cot_t structure */ 25772 uint16 length; 25773 chanspec_t chspec; 25774 uint16 pad; /* padding */ 25775 uint16 fbcot[WL_FRAMEBURST_MAX_AC]; /* per AC (BK, BE, VI, and VO) in us units */ 25776 } frameburst_cot_t; 25777 25778 typedef enum { 25779 BCM_TRACE_VER = 1, 25780 BCM_TRACE_ENAB = 2, 25781 BCM_TRACE_EVENT_ENAB = 3 25782 } bcm_trace_sub_cmds_t; 25783 25784 /* Trace events 25785 * Max trace event allowed = 255 25786 */ 25787 enum { 25788 BCM_TRACE_E_INVALID = 0, 25789 BCM_TRACE_E_WBUS = 1, 25790 BCM_TRACE_E_MSCH = 2, 25791 BCM_TRACE_E_SC = 3, 25792 BCM_TRACE_E_SCAN = 4, 25793 BCM_TRACE_E_LAST 25794 }; 25795 25796 #define BCM_TRACE_VERSION_1 1u 25797 25798 typedef struct bcm_trace_event_enab_v1 { 25799 uint8 version; 25800 uint8 event; 25801 uint8 enab; 25802 uint8 pad[1]; 25803 } bcm_trace_event_enab_v1_t; 25804 25805 /* rate_info command version */ 25806 #define WL_RATE_INFO_VERSION 1 25807 typedef struct wl_rate_info { 25808 uint16 version; /**< structure version */ 25809 uint16 length; /**< length of this struct */ 25810 uint32 mode_tx_rate; /**< the most used tx rate in tx_rate_histo */ 25811 uint32 mode_rx_rate; /**< the most used rx rate in rx_rate_histo */ 25812 } wl_rate_info_t; 25813 25814 /* "rng_test" IOVAR param */ 25815 typedef struct { 25816 uint32 rounds_no; /* IN number of generate cycles */ 25817 uint32 gen_no; /* IN number of buffers per cycle */ 25818 uint32 time_max; /* OUT max time of one cycle, us */ 25819 uint32 time_min; /* OUT min time of one cycle, us */ 25820 uint32 time_aver; /* OUT time of all cycles, us */ 25821 } rng_test_t; 25822 25823 /* latency_critical_data mode to reduce a latency */ 25824 typedef enum { 25825 LATENCY_CRT_DATA_MODE_OFF = 0, /* Turn off */ 25826 LATENCY_CRT_DATA_MODE_1 = 1u, /* Remap BLE scan window size */ 25827 LATENCY_CRT_DATA_MODE_2 = 2u, /* Remap BLE scan window size + 25828 * Prevent full roam scan 25829 */ 25830 LATENCY_CRT_DATA_MODE_LAST 25831 } latency_crt_mode_t; 25832 25833 typedef struct wl_ext_auth_evt { 25834 wlc_ssid_t ssid; 25835 struct ether_addr bssid; 25836 unsigned int key_mgmt_suite; 25837 int status; 25838 } wl_ext_auth_evt_t; 25839 25840 #define WL_AUTH_START_EVT_V1 1u 25841 typedef struct wl_auth_start_evt { 25842 uint16 version; 25843 uint16 len; 25844 wlc_ssid_t ssid; 25845 struct ether_addr bssid; 25846 uint8 PAD[2]; 25847 uint32 key_mgmt_suite; 25848 uint8 opt_tlvs[]; 25849 } wl_auth_start_evt_t; 25850 #endif /* _wlioctl_h_ */ 25851