Searched defs:mali_base_gpu_thread_props (Results 1 – 4 of 4) sorted by relevance
546 struct mali_base_gpu_thread_props { struct547 u32 max_threads; /* Max. number of threads per core */548 u32 max_workgroup_size; /* Max. number of threads per workgroup */549 u32 max_barrier_size; /* Max. number of threads that can synchronize on a simple barrier */550 u16 max_registers; /* Total size [1..65535] of the register file available per core. */551 …ask_queue; /* Max. tasks [1..255] which may be sent to a core before it becomes blocked. */552 u8 max_thread_group_split; /* Max. allowed value [1..15] of the Thread Group Split field. */553 … u8 impl_tech; /* 0 = Not specified, 1 = Silicon, 2 = FPGA, 3 = SW Model/Emulation */554 u8 padding[3];555 u32 tls_alloc; /* Number of threads per core that TLS must
541 struct mali_base_gpu_thread_props { struct542 __u32 max_threads;543 __u32 max_workgroup_size;544 __u32 max_barrier_size;545 __u16 max_registers;546 __u8 max_task_queue;547 __u8 max_thread_group_split;548 __u8 impl_tech;549 __u8 padding[3];550 __u32 tls_alloc;
1539 struct mali_base_gpu_thread_props { struct1540 u32 max_threads; /* Max. number of threads per core */1541 u32 max_workgroup_size; /* Max. number of threads per workgroup */1542 u32 max_barrier_size; /* Max. number of threads that can synchronize on a simple barrier */1543 u16 max_registers; /* Total size [1..65535] of the register file available per core. */1544 …ask_queue; /* Max. tasks [1..255] which may be sent to a core before it becomes blocked. */1545 u8 max_thread_group_split; /* Max. allowed value [1..15] of the Thread Group Split field. */1546 u8 impl_tech; /* 0 = Not specified, 1 = Silicon, 2 = FPGA, 3 = SW Model/Emulation */1547 u8 padding[7];
1520 struct mali_base_gpu_thread_props { struct1521 u32 max_threads; /* Max. number of threads per core */1522 u32 max_workgroup_size; /* Max. number of threads per workgroup */1523 u32 max_barrier_size; /* Max. number of threads that can synchronize on a simple barrier */1524 u16 max_registers; /* Total size [1..65535] of the register file available per core. */1525 …ask_queue; /* Max. tasks [1..255] which may be sent to a core before it becomes blocked. */1526 u8 max_thread_group_split; /* Max. allowed value [1..15] of the Thread Group Split field. */1527 … u8 impl_tech; /* 0 = Not specified, 1 = Silicon, 2 = FPGA, 3 = SW Model/Emulation */1528 u8 padding[7];