1 /**
2 ******************************************************************************
3 * @file stm32mp1xx_hal_dma_ex.c
4 * @author MCD Application Team
5 * @brief DMA Extension HAL module driver
6 * This file provides firmware functions to manage the following
7 * functionalities of the DMA Extension peripheral:
8 * + Extended features functions
9 *
10 @verbatim
11 ==============================================================================
12 ##### How to use this driver #####
13 ==============================================================================
14 [..]
15 The DMA Extension HAL driver can be used as follows:
16 (+) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
17 for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
18
19 (+) Configure the DMA_MUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function.
20 (+) Configure the DMA_MUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function.
21 Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used
22 to respectively enable/disable the request generator.
23
24 (+) To handle the DMAMUX Interrupts, the function HAL_DMAEx_MUX_IRQHandler should be called from
25 the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler or DMAMUX2_OVR_IRQHandler .
26 As only one interrupt line is available for all DMAMUX channels and request generators , HAL_DMA_MUX_IRQHandler should be
27 called with, as parameter, the appropriate DMA handle as many as used DMAs in the user project
28 (exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator)
29
30 -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
31 -@- When Multi (Double) Buffer mode is enabled, the transfer is circular by default.
32 -@- In Multi (Double) buffer mode, it is possible to update the base address for
33 the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
34 -@- Multi (Double) buffer mode is only possible with D2 DMAs i.e DMA1 or DMA2. not BDMA.
35 Multi (Double) buffer mode is not possible with D3 BDMA.
36
37 @endverbatim
38 ******************************************************************************
39 * @attention
40 *
41 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
42 * All rights reserved.</center></h2>
43 *
44 * This software component is licensed by ST under BSD 3-Clause license,
45 * the "License"; You may not use this file except in compliance with the
46 * License. You may obtain a copy of the License at:
47 * opensource.org/licenses/BSD-3-Clause
48 *
49 ******************************************************************************
50 */
51
52 /* Includes ------------------------------------------------------------------*/
53 #include "stm32mp1xx_hal.h"
54
55 /** @addtogroup STM32MP1xx_HAL_Driver
56 * @{
57 */
58
59 /** @defgroup DMAEx DMAEx
60 * @brief DMA Extended HAL module driver
61 * @{
62 */
63
64 #ifdef HAL_DMA_MODULE_ENABLED
65
66 /* Private types -------------------------------------------------------------*/
67 /* Private variables ---------------------------------------------------------*/
68 /* Private Constants ---------------------------------------------------------*/
69 #define DMAMUX_POSITION_CxCR_SE (uint32_t)POSITION_VAL(DMAMUX_CxCR_SE) /*!< Required for left shift of the DMAMUX SYNC enable/disable */
70 #define DMAMUX_POSITION_CxCR_EGE (uint32_t)POSITION_VAL(DMAMUX_CxCR_EGE) /*!< Required for left shift of the DMAMUX SYNC EVENT enable/disable */
71 /* Private macros ------------------------------------------------------------*/
72 /* Private functions ---------------------------------------------------------*/
73 /** @addtogroup DMAEx_Private_Functions
74 * @{
75 */
76
77 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
78
79 /**
80 * @}
81 */
82
83 /* Exported functions ---------------------------------------------------------*/
84
85 /** @addtogroup DMAEx_Exported_Functions
86 * @{
87 */
88
89
90 /** @addtogroup DMAEx_Exported_Functions_Group1
91 *
92 @verbatim
93 ===============================================================================
94 ##### Extended features functions #####
95 ===============================================================================
96 [..] This section provides functions allowing to:
97 (+) Configure the source, destination address and data length and
98 Start MultiBuffer DMA transfer
99 (+) Configure the source, destination address and data length and
100 Start MultiBuffer DMA transfer with interrupt
101 (+) Change on the fly the memory0 or memory1 address.
102 (+) Configure the DMA_MUX Synchronization Block using HAL_DMAEx_ConfigMuxSync function.
103 (+) Configure the DMA_MUX Request Generator Block using HAL_DMAEx_ConfigMuxRequestGenerator function.
104 (+) Functions HAL_DMAEx_EnableMuxRequestGenerator and HAL_DMAEx_DisableMuxRequestGenerator can then be used
105 to respectively enable/disable the request generator.
106 (+) Handle DMAMUX interrupts using HAL_DMAEx_MUX_IRQHandler : should be called from
107 the DMAMUX IRQ handler i.e DMAMUX1_OVR_IRQHandler or DMAMUX2_OVR_IRQHandler
108
109 @endverbatim
110 * @{
111 */
112
113
114 /**
115 * @brief Starts the multi_buffer DMA Transfer.
116 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
117 * the configuration information for the specified DMA Stream.
118 * @param SrcAddress: The source memory Buffer address
119 * @param DstAddress: The destination memory Buffer address
120 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
121 * @param DataLength: The length of data to be transferred from source to destination
122 * @retval HAL status
123 */
HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef * hdma,uint32_t SrcAddress,uint32_t DstAddress,uint32_t SecondMemAddress,uint32_t DataLength)124 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
125 {
126 HAL_StatusTypeDef status = HAL_OK;
127 __IO uint32_t *ifcRegister_Base; /* DMA Stream Interrupt Clear register */
128
129 /* Check the parameters */
130 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
131
132 /* Memory-to-memory transfer not supported in double buffering mode */
133 /* double buffering mode not supported for BDMA (D3 DMA) */
134 if ((IS_DMA_INSTANCE(hdma) == 0U) || (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY))
135 {
136 hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
137 status = HAL_ERROR;
138 }
139 else
140 {
141 /* Process Locked */
142 __HAL_LOCK(hdma);
143
144 if (HAL_DMA_STATE_READY == hdma->State)
145 {
146 /* Change DMA peripheral state */
147 hdma->State = HAL_DMA_STATE_BUSY;
148
149 /* Initialize the error code */
150 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
151
152 /* Enable the double buffer mode */
153 ((DMA_Stream_TypeDef *)hdma->Instance)->CR |= (uint32_t)DMA_SxCR_DBM;
154
155 /* Configure DMA Stream destination address */
156 ((DMA_Stream_TypeDef *)hdma->Instance)->M1AR = SecondMemAddress;
157
158 /* Configure the source, destination address and the data length */
159 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
160
161 /* Calculate the interrupt clear flag register (IFCR) base address */
162 ifcRegister_Base = (uint32_t *)((uint32_t)(hdma->StreamBaseAddress + 8U));
163
164 /* Clear all flags */
165 *ifcRegister_Base = 0x3FUL << hdma->StreamIndex;
166
167 /* Clear the DMAMUX synchro overrun flag */
168 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
169
170 if(hdma->DMAmuxRequestGen != NULL)
171 {
172 /* Clear the DMAMUX request generator overrun flag */
173 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
174 }
175
176 /* Enable the peripheral */
177 __HAL_DMA_ENABLE(hdma);
178 }
179 else
180 {
181 /* Set the error code to busy */
182 hdma->ErrorCode = HAL_DMA_ERROR_BUSY;
183
184 /* Return error status */
185 status = HAL_ERROR;
186 }
187 }
188 return status;
189 }
190
191 /**
192 * @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
193 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
194 * the configuration information for the specified DMA Stream.
195 * @param SrcAddress: The source memory Buffer address
196 * @param DstAddress: The destination memory Buffer address
197 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
198 * @param DataLength: The length of data to be transferred from source to destination
199 * @retval HAL status
200 */
HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef * hdma,uint32_t SrcAddress,uint32_t DstAddress,uint32_t SecondMemAddress,uint32_t DataLength)201 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
202 {
203 HAL_StatusTypeDef status = HAL_OK;
204 __IO uint32_t *ifcRegister_Base; /* DMA Stream Interrupt Clear register */
205
206 /* Check the parameters */
207 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
208
209 /* Memory-to-memory transfer not supported in double buffering mode */
210 if ((IS_DMA_INSTANCE(hdma) == 0U) || (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY))
211 {
212 hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
213 return HAL_ERROR;
214 }
215
216 /* Process locked */
217 __HAL_LOCK(hdma);
218
219 if (HAL_DMA_STATE_READY == hdma->State)
220 {
221 /* Change DMA peripheral state */
222 hdma->State = HAL_DMA_STATE_BUSY;
223
224 /* Initialize the error code */
225 hdma->ErrorCode = HAL_DMA_ERROR_NONE;
226
227 /* Enable the Double buffer mode */
228 ((DMA_Stream_TypeDef *)hdma->Instance)->CR |= (uint32_t)DMA_SxCR_DBM;
229
230 /* Configure DMA Stream destination address */
231 ((DMA_Stream_TypeDef *)hdma->Instance)->M1AR = SecondMemAddress;
232
233 /* Configure the source, destination address and the data length */
234 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
235
236 /* Calculate the interrupt clear flag register (IFCR) base address */
237 ifcRegister_Base = (uint32_t *)((uint32_t)(hdma->StreamBaseAddress + 8U));
238
239 /* Clear all flags */
240 *ifcRegister_Base = 0x3FUL << hdma->StreamIndex;
241
242 /* Clear the DMAMUX synchro overrun flag */
243 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
244
245 if(hdma->DMAmuxRequestGen != NULL)
246 {
247 /* Clear the DMAMUX request generator overrun flag */
248 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
249 }
250
251 /* Enable Common interrupts*/
252 MODIFY_REG(((DMA_Stream_TypeDef *)hdma->Instance)->CR, (DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT), (DMA_IT_TC | DMA_IT_TE | DMA_IT_DME));
253 ((DMA_Stream_TypeDef *)hdma->Instance)->FCR |= DMA_IT_FE;
254
255 if (hdma->XferHalfCpltCallback != NULL)
256 {
257 /*Enable Half Transfer IT if corresponding Callback is set*/
258 ((DMA_Stream_TypeDef *)hdma->Instance)->CR |= DMA_IT_HT;
259 }
260
261 /* Check if DMAMUX Synchronization is enabled*/
262 if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)
263 {
264 /* Enable DMAMUX sync overrun IT*/
265 hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;
266 }
267
268 if(hdma->DMAmuxRequestGen != NULL)
269 {
270 /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/
271 /* enable the request gen overrun IT*/
272 hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
273 }
274
275 /* Enable the peripheral */
276 __HAL_DMA_ENABLE(hdma);
277 }
278 else
279 {
280 /* Set the error code to busy */
281 hdma->ErrorCode = HAL_DMA_ERROR_BUSY;
282
283 /* Return error status */
284 status = HAL_ERROR;
285 }
286 return status;
287 }
288
289 /**
290 * @brief Change the memory0 or memory1 address on the fly.
291 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
292 * the configuration information for the specified DMA Stream.
293 * @param Address: The new address
294 * @param memory: the memory to be changed, This parameter can be one of
295 * the following values:
296 * MEMORY0 /
297 * MEMORY1
298 * @note The MEMORY0 address can be changed only when the current transfer use
299 * MEMORY1 and the MEMORY1 address can be changed only when the current
300 * transfer use MEMORY0.
301 * @retval HAL status
302 */
HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef * hdma,uint32_t Address,HAL_DMA_MemoryTypeDef memory)303 HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
304 {
305 if (memory == MEMORY0)
306 {
307 /* change the memory0 address */
308 ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = Address;
309 }
310 else
311 {
312 /* change the memory1 address */
313 ((DMA_Stream_TypeDef *)hdma->Instance)->M1AR = Address;
314 }
315
316 return HAL_OK;
317 }
318
319 /**
320 * @brief Configure the DMAMUX synchronization parameters for a given DMA stream (instance).
321 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
322 * the configuration information for the specified DMA Stream.
323 * @param pSyncConfig : pointer to HAL_DMA_MuxSyncConfigTypeDef : contains the DMAMUX synchronization parameters
324 * @retval HAL status
325 */
HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef * hdma,HAL_DMA_MuxSyncConfigTypeDef * pSyncConfig)326 HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig)
327 {
328 uint32_t syncSignalID = 0;
329 uint32_t syncPolarity = 0;
330
331 /* Check the parameters */
332 assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
333 assert_param(IS_DMAMUX_SYNC_STATE(pSyncConfig->SyncEnable));
334 assert_param(IS_DMAMUX_SYNC_EVENT(pSyncConfig->EventEnable));
335 assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber));
336
337 if (pSyncConfig->SyncEnable == ENABLE)
338 {
339 assert_param(IS_DMAMUX_SYNC_POLARITY(pSyncConfig->SyncPolarity));
340 assert_param(IS_DMAMUX_SYNC_SIGNAL_ID(pSyncConfig->SyncSignalID));
341 syncSignalID = pSyncConfig->SyncSignalID;
342 syncPolarity = pSyncConfig->SyncPolarity;
343 }
344
345 /*Check if the DMA state is ready */
346 if (hdma->State == HAL_DMA_STATE_READY)
347 {
348 /* Process Locked */
349 __HAL_LOCK(hdma);
350
351 /* Disable the synchronization and event generation before applying a new config */
352 CLEAR_BIT(hdma->DMAmuxChannel->CCR, (DMAMUX_CxCR_SE | DMAMUX_CxCR_EGE));
353
354 /* Set the new synchronization parameters (and keep the request ID filled during the Init)*/
355 MODIFY_REG(hdma->DMAmuxChannel->CCR, \
356 (~DMAMUX_CxCR_DMAREQ_ID), \
357 (syncSignalID << POSITION_VAL(DMAMUX_CxCR_SYNC_ID)) | \
358 ((pSyncConfig->RequestNumber - 1U) << POSITION_VAL(DMAMUX_CxCR_NBREQ)) | \
359 syncPolarity | ((uint32_t)pSyncConfig->SyncEnable << DMAMUX_POSITION_CxCR_SE) | \
360 ((uint32_t)pSyncConfig->EventEnable << DMAMUX_POSITION_CxCR_EGE));
361
362 /* Process Locked */
363 __HAL_UNLOCK(hdma);
364
365 return HAL_OK;
366 }
367 else
368 {
369 /* Set the error code to busy */
370 hdma->ErrorCode = HAL_DMA_ERROR_BUSY;
371
372 /* Return error status */
373 return HAL_ERROR;
374 }
375 }
376
377 /**
378 * @brief Configure the DMAMUX request generator block used by the given DMA stream (instance).
379 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
380 * the configuration information for the specified DMA Stream.
381 * @param pRequestGeneratorConfig : pointer to HAL_DMA_MuxRequestGeneratorConfigTypeDef :
382 * contains the request generator parameters.
383 *
384 * @retval HAL status
385 */
HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef * hdma,HAL_DMA_MuxRequestGeneratorConfigTypeDef * pRequestGeneratorConfig)386 HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
387 {
388 HAL_StatusTypeDef status;
389
390 /* Check the parameters */
391 assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
392
393 assert_param(IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(pRequestGeneratorConfig->SignalID));
394
395 assert_param(IS_DMAMUX_REQUEST_GEN_POLARITY(pRequestGeneratorConfig->Polarity));
396 assert_param(IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(pRequestGeneratorConfig->RequestNumber));
397
398 /* check if the DMA state is ready
399 and DMA is using a DMAMUX request generator block
400 */
401 if(hdma->DMAmuxRequestGen == NULL)
402 {
403 /* Set the error code to busy */
404 hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
405
406 /* error status */
407 status = HAL_ERROR;
408 }
409 else if ((hdma->State == HAL_DMA_STATE_READY) && ((hdma->DMAmuxRequestGen->RGCR & DMAMUX_RGxCR_GE) == 0U))
410 {
411 /* RequestGenerator must be disable prior to the configuration i.e GE bit is 0 */
412
413 /* Process Locked */
414 __HAL_LOCK(hdma);
415
416 /* Set the request generator new parameters*/
417 hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \
418 ((pRequestGeneratorConfig->RequestNumber - 1U) << POSITION_VAL(DMAMUX_RGxCR_GNBREQ)) | \
419 pRequestGeneratorConfig->Polarity;
420 /* Process Locked */
421 __HAL_UNLOCK(hdma);
422
423 return HAL_OK;
424 }
425 else
426 {
427 /* Set the error code to busy */
428 hdma->ErrorCode = HAL_DMA_ERROR_BUSY;
429
430 /* error status */
431 status = HAL_ERROR;
432 }
433
434 return status;
435 }
436
437 /**
438 * @brief Enable the DMAMUX request generator block used by the given DMA stream (instance).
439 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
440 * the configuration information for the specified DMA Stream.
441 * @retval HAL status
442 */
HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef * hdma)443 HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
444 {
445 /* Check the parameters */
446 assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
447
448 /* check if the DMA state is ready
449 and DMA is using a DMAMUX request generator block
450 */
451 if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != NULL))
452 {
453
454 /* Enable the request generator*/
455 hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_GE;
456
457 return HAL_OK;
458 }
459 else
460 {
461 return HAL_ERROR;
462 }
463 }
464
465 /**
466 * @brief Disable the DMAMUX request generator block used by the given DMA stream (instance).
467 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
468 * the configuration information for the specified DMA Stream.
469 * @retval HAL status
470 */
HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef * hdma)471 HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
472 {
473 /* Check the parameters */
474 assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
475
476 /* check if the DMA state is ready
477 and DMA is using a DMAMUX request generator block
478 */
479 if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != NULL))
480 {
481
482 /* Disable the request generator*/
483 hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_GE;
484
485 return HAL_OK;
486 }
487 else
488 {
489 return HAL_ERROR;
490 }
491 }
492
493 /**
494 * @brief Handles DMAMUX interrupt request.
495 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
496 * the configuration information for the specified DMA Stream.
497 * @retval None
498 */
HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef * hdma)499 void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
500 {
501 /* Check for DMAMUX Synchronization overrun */
502 if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
503 {
504 /* Disable the synchro overrun interrupt */
505 hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
506
507 /* Clear the DMAMUX synchro overrun flag */
508 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
509
510 /* Update error code */
511 hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;
512
513 if (hdma->XferErrorCallback != NULL)
514 {
515 /* Transfer error callback */
516 hdma->XferErrorCallback(hdma);
517 }
518 }
519
520 if(hdma->DMAmuxRequestGen != NULL)
521 {
522 /* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */
523 if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
524 {
525 /* Disable the request gen overrun interrupt */
526 hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
527
528 /* Clear the DMAMUX request generator overrun flag */
529 hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
530
531 /* Update error code */
532 hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;
533
534 if (hdma->XferErrorCallback != NULL)
535 {
536 /* Transfer error callback */
537 hdma->XferErrorCallback(hdma);
538 }
539 }
540 }
541 }
542
543
544 /**
545 * @}
546 */
547
548 /**
549 * @}
550 */
551
552 /** @addtogroup DMAEx_Private_Functions
553 * @{
554 */
555
556 /**
557 * @brief Set the DMA Transfer parameter.
558 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
559 * the configuration information for the specified DMA Stream.
560 * @param SrcAddress: The source memory Buffer address
561 * @param DstAddress: The destination memory Buffer address
562 * @param DataLength: The length of data to be transferred from source to destination
563 * @retval HAL status
564 */
DMA_MultiBufferSetConfig(DMA_HandleTypeDef * hdma,uint32_t SrcAddress,uint32_t DstAddress,uint32_t DataLength)565 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
566 {
567 /* Configure DMA Stream data length */
568 ((DMA_Stream_TypeDef *)hdma->Instance)->NDTR = DataLength;
569
570 /* Peripheral to Memory */
571 if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
572 {
573 /* Configure DMA Stream destination address */
574 ((DMA_Stream_TypeDef *)hdma->Instance)->PAR = DstAddress;
575
576 /* Configure DMA Stream source address */
577 ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = SrcAddress;
578 }
579 /* Memory to Peripheral */
580 else
581 {
582 /* Configure DMA Stream source address */
583 ((DMA_Stream_TypeDef *)hdma->Instance)->PAR = SrcAddress;
584
585 /* Configure DMA Stream destination address */
586 ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = DstAddress;
587 }
588 }
589
590 /**
591 * @}
592 */
593
594 #endif /* HAL_DMA_MODULE_ENABLED */
595 /**
596 * @}
597 */
598
599 /**
600 * @}
601 */
602
603 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
604